JOPJOPJava Optimized ProcessorJava Optimized Processor

DI Martin Schöberl

ContentContent

TargetsJava Virtal MachineThree different architecturesDatapath of JOP3First results

TargetsTargets

Small processorFits in a main stram FPGAEfficient execution of byte codesJVM real time enabledorganization of local memory ?Multi processor on a single chip ?

Java Virtual MachineJava Virtual Machine

32 (64) Bit stack machineVariable length instructionsSimple to very complex instructionsSymbolic referencesStack, heap, constants and code

First ApproachFirst Approach

Accu/Register Machine RISC like instruction set 16 Bit instruction set 32 Bit datapath 3 stage pipeline All instructions single cycle Larg register file (up to 1024) JVM complete in SW

Second ApproachSecond Approach

+ special register SP, AR 16 register + 16 constants Stack in local memory 8 Bit instruction Memory interface ‚extern‘ Byte code fetch/decode in HW 2+3 stage pipeline JVM instruction min. 3 cycles

JOP3JOP3

Stack machineByte code is instruction set8 Bit microcodeBasic JVM instructions single cycle4 stage pipelineNo traps for complex instructions

JOP3 FetchJOP3 Fetch

A

IR

JBR

OPDH

PC

JINS

RAM

jbc

JPC

+

+

ROM

microcode

-3

1

+

+

1

JOP3 Read/WriteJOP3 Read/WriteSP

SPP

SPM

IR

1+

+

-1

A

vp1

1+

vp2

2+

vp3

3+

vpix+

cpix+

vp

cpA

A

A

JINS

RD

ADDR

WR

ADDR

SPM

JOP3 ExecuteJOP3 Execute

Aldandorxor

shr

IOR

BRAM

wraddr dout

wrena

rdaddr

din

+

-

spvp0

cpimm

StatusStatus

Cores run on Altera ACEX 1K30-3Periphery: IO port, SRAM- and Flash

interface, UART, ECPFirst real application under development

PerformancePerformance

‚useless‘ benchmark (prime)486SX25: 1.2M transistors e.g. 300k gatesACEX 1K30: 24 MHz, 30k gates

486SX25 JVM -nojit 19.6 s 1.00486SX25 JIT 5.0 s 3.91

JOP1 8 Bit ext. mem. 79 s 0.25JOP2 local mem. 3.4 s 5.77JOP3 local mem. 1.7 s 11.3

http://http://wwwwww..jopdesignjopdesign..comcom//

Documentation as HTMLAll VHDL, ASM and Java sourcesActual version for download