CHENNAI INSTITUTE OF TECHNOLOGY

DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING

LAB MANUAL

CS6412 MICROPROCESSOR AND MICROCONTROLLER

Programs

8-Bit Addition

MOV AL, [1100H]

MOV BL, [1101H]

MOV CL, 00H

ADD AL, BL

JNC loop-1

INC CL

loop-1: MOV [1200H], AL

MOV [1201H], CL

HLT

8-Bit Subtraction

MOV AL, [1100H]

MOV BL, [1101H]

MOV CL, 00H

SUB AL, BL

JNC loop-1

INC CL

loop-1: MOV [1200H], AL

MOV [1201H], CL

HLT

8-Bit Multiplication

MOV AL, [1100H]

MOV BL, [1101H]

MOV AH, 00H

MUL BL

MOV [1200H], AX

HLT

8-Bit Division

MOV AL, [1100H]

MOV BL, [1101H]

MOV AH, 00H

DIV BL

MOV [1200H], AX

HLT

CS6412 MPMC Lab

1

Ex. No. 1 8-BIT ARITHMETIC OPERATIONS

Date:

Aim: To write an assembly language program to perform an addition, subtraction,

multiplication and division of two 8-bit numbers using 8086 microprocessor kit.

Algorithm

8-Bit Addition

Step 1: Get two 8-bit data from the input memory locations to AL and BL registers.

Step 2: Clear CL register to store the carry condition.

Step 3: Add the contents of BL to AL register and store the result in AL.

Step 4: Check carry flog, If CF = 0 then go to step 6.

Step 5: Increment CL register by 1.

Step 6: Store the contents of sum and carry to output memory locations.

Step 7: Stop the execution.

8-Bit Subtraction

Step 1: Get two 8-bit data from the input memory locations to AL and BL registers.

Step 2: Clear CL register to store the carry condition.

Step 3: Subtract the contents of AL from BL register and store the result in AL.

Step 4: Check carry flog, If CF = 0 then go to step 6.

Step 5: Increment CL register by 1.

Step 6: Store the contents of sum and carry to output memory locations.

Step 7: Stop the execution.

8-Bit Multiplication

Step 1: Get two 8-bit data from the input memory locations to AL and BL registers.

Step 2: Clear AH register to store the higher order product.

Step 3: Multiply the contents of BL with AL register and store the product in AX.

Step 4: Store the contents of product to output memory locations.

Step 5: Stop the execution.

8-Bit Division

Step 1: Get two 8-bit data from the input memory locations to AL and BL registers.

Step 2: Clear AH register to store the reminder.

Step 3: Divided the contents of BL from AL register and store thequiescentin AX.

Step 4: Store the contents of reminder and quiescent to output memory locations.

Step 5: Stop the execution.

MPMC Lab CS6412

2

Program with opcode

8-Bit Addition

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AL, [1100 H] A0 (AL) [1100 H] 1001 H 00 1002 H 11 1003 H MOV BL, [1101H] 8A (BL) [1101H] 1004 H 1E 1005 H 01 1006 H 11 1007 H MOV CL, 00H B1 (CL) 00H 1008 H 00 1009 H ADD AL, BL 02 (AL) (AL) + (BL) 100A H C3 100B H JNC loop-1 73 If CF=0, then go to loop-1 100C H 02 100D H INC CL FE (CL) (CL) + 1 100E H C1 100F H loop-1 MOV [1200 H], AL A2 [1200 H](AL) 1010 H 00 1011 H 12 1012 H MOV [1201H], CL 88 [1201H](CL) 1013 H 0E 1014 H 01 1015 H 12 1016 H HLT F4 Stop the execution

8-Bit Subtraction

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AL, [1100 H] A0 (AL) [1100 H]

1001 H 00

1002 H 11

1003 H MOV BL, [1101H] 8A (BL) [1101H]

1004 H 1E

1005 H 01

1006 H 11

1007 H MOV CL, 00H B1 (CL) 00H

1008 H 00

1009 H SUB AL, BL 2A (AL) (AL) - (BL)

100A H C3

100B H JNC loop-1 73 If CF=0, then go to loop-1

100C H 02

100D H INC CL FE (CL) (CL) + 1

100E H C1

100F H loop-1 MOV [1200 H], AL A2 [1200 H](AL)

1010 H 00

1011 H 12

1012 H MOV [1201H], CL 88 [1201H](CL)

1013 H 0E

1014 H 01

1015 H 12

1016 H HLT F4 Stop the execution

CS6412 MPMC Lab

3

8-Bit Multiplication

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AL, [1100 H] A0 (AL)[ 1100 H] 1001 H 00 1002 H 11 1003 H MOV BL, [1101H] 8A (BL)[ 1101H] 1004 H 1E 1005 H 01 1006 H 11 1007 H MOV AH, 00H B4 (AH)00H 1008 H 00 1009 H MUL BL F6 (AX)(AL) * (BL) 100A H E3 100B H MOV [1200 H], AX A3 [1200 H] (AX) 100C H 00 100D H 12 100E H HLT F4 Stop the execution

8-Bit Division

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AL, [1100 H] A0 (AL)[ 1100 H] 1001 H 00 1002 H 11 1003 H MOV BL, [1101H] 8A (BL)[ 1101H] 1004 H 1E 1005 H 01 1006 H 11 1007 H MOV AH, 00H B4 (AH)00H 1008 H 00 1009 H DIV BL F6 (AX)(AL) / (BL) 100A H F3 100B H MOV [1200 H], AX A3 [1200 H] (AX) 100C H 00 100D H 12 100E H HLT F4 Stop the execution

MPMC Lab CS6412

4

8-Bit Addition

Input Output

Address Data Address Data

1100H

1101H 1200H

1201H

1100H

1101H

1200H

1201H

8-Bit Subtraction

Input Output

Address Data Address Data

1100H

1101H

1200H

1201H

1100H

1101H

1200H

1201H

8-Bit Multiplication

Input Output

Address Data Address Data

1100H

1101H

1200H

1201H

1100H

1101H

1200H

1201H

8-Bit Division

Input Output

Address Data Address Data

1100H

1101H

1200H

1201H

1100H

1101H

1200H

1201H

CS6412 MPMC Lab

5

Procedure

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter

Opcode SPACE BAR Enter Opcode SPACE BAR . . .

SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter

Input Data SPACE BAR Input Data SPACE BAR . . .

SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY

SPACE BAR . . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

MPMC Lab CS6412

6

Programs

16-Bit Addition

MOV AX, [1100H]

MOV BX, [1102H]

MOV CL, 00H

ADD AX, BX

JNC loop-1

INC CL

loop-1: MOV [1200H], AX

MOV [1202H], CL

HLT

16-Bit Subtraction

MOV AX, [1100H]

MOV BX, [1102H]

MOV CL, 00H

SUB AX, BX

JNC loop-1

INC CL

loop-1: MOV [1200H], AX

MOV [1202H], CL

HLT

16-Bit Multiplication

MOV AX, [1100H]

MOV BX, [1102H]

MOV DX, 0000H

MUL BX

MOV [1200H], AX

MOV [1202H], DX

HLT

16-Bit Division

MOV AX, [1100H]

MOV BX, [1102H]

MOV DX, 0000H

DIV BX

MOV [1200H], AX

MOV [1202H], DX

HLT

CS6412 MPMC Lab

7

Ex. No. 2 16-BIT ARITHMETIC OPERATIONS

Date:

Aim: To write an assembly language program to perform an addition, subtraction,

multiplication and division of two 16-bit numbers using 8086 microprocessor kit.

Algorithm

16-Bit Addition

Step 1: Get two 16-bit data from the input memory locations to AX and BX registers.

Step 2: Clear CL register to store the carry condition.

Step 3: Add the contents of BX to AX register and store the result in AX.

Step 4: Check carry flog, If CF = 0 then go to step 6.

Step 5: Increment CL register by 1.

Step 6: Store the contents of sum and carry to output memory locations.

Step 7: Stop the execution.

16-Bit Subtraction

Step 1: Get two 16-bit data from the input memory locations to AX and BX registers.

Step 2: Clear CL register to store the carry condition.

Step 3: Subtract the contents of AX from BX register and store the result in AX.

Step 4: Check carry flog, If CF = 0 then go to step 6.

Step 5: Increment CL register by 1.

Step 6: Store the contents of sum and carry to output memory locations.

Step 7: Stop the execution.

16-Bit Multiplication

Step 1: Get two 16-bit data from the input memory locations to AX and BX registers.

Step 2: Clear DX register to store the higher order product.

Step 3: Multiply the contents of BX with AX register and store the product in DX and

AX.

Step 4: Store the contents of product to output memory locations.

Step 5: Stop the execution.

16-Bit Division

Step 1: Get two 16-bit data from the input memory locations to AX and BX registers.

Step 2: Clear DX register to store the reminder.

Step 3: Divided the contents of BX from AX register and store thequiescentin AX.

Step 4: Store the contents of reminder and quiescent to output memory locations.

Step 5: Stop the execution.

MPMC Lab CS6412

8

Program with opcode

16-Bit Addition

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AX, [1100 H] A1 (AX) [1100 H] 1001 H 00 1002 H 11 1003 H MOV BX, [1102 H] 8B (BX) [1102 H] 1004 H 1E 1005 H 02 1006 H 11 1007 H MOV CL, 00H B1 (CL) 00H 1008 H 00 1009 H ADD AX, BX 03 (AX) (AX) + (BX) 100A H C3 100B H JNC loop-1 73 If CF=0, then go to loop-1 100C H 02 100D H INC CL FE (CL) (CL) + 1 100E H C1 100F H loop-1 MOV [1200 H], AX A3 [1200 H](AX) 1010 H 00 1011 H 12 1012 H MOV [1202 H], CL 88 [1202 H](CL) 1013 H 0E 1014 H 02 1015 H 12 1016 H HLT F4 Stop the execution

16-Bit Subtraction

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AX, [1100 H] A1 (AX) [1100 H]

1001 H 00

1002 H 11

1003 H MOV BX, [1102 H] 8B (BX) [1102 H]

1004 H 1E

1005 H 02

1006 H 11

1007 H MOV CL, 00H B1 (CL) 00H

1008 H 00

1009 H SUB AX, BX 2B (AX) (AX) - (BX)

100A H C3

100B H JNC loop-1 73 If CF=0, then go to loop-1

100C H 02

100D H INC CL FE (CL) (CL) + 1

100E H C1

100F H loop-1 MOV [1200 H], AX A3 [1200 H](AX)

1010 H 00

1011 H 12

1012 H MOV [1202 H], CL 88 [1202 H](CL)

1013 H 0E

1014 H 02

1015 H 12

1016 H HLT F4 Stop the execution

CS6412 MPMC Lab

9

16-Bit Multiplication

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AX, [1100 H] A1 (AX)[ 1100 H] 1001 H 00 1002 H 11 1003 H MOV BX, [1102 H] 8B (BX)[ 1102 H] 1004 H 1E 1005 H 02 1006 H 11 1007 H MOV DX, 0000H BA (DX)0000H 1008 H 00 1009 H 00 100A H MUL BX F7 (DX:AX)(AX) * (BX) 100B H E3 100C H MOV [1200 H], AX A3 [1200 H] (AX) 100D H 00 100E H 12 100F H MOV [1202 H],DX 89 [1202 H] (DX) 1010 H 16 1011 H 02 1012 H 12 1013 H HLT F4 Stop the execution

16-Bit Division

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AX, [1100 H ] A1 (AX)[ 1100 H] 1001 H 00 1002 H 11 1003 H MOV BX, [1102 H] 8B (BX)[ 1102 H] 1004 H 1E 1005 H 02 1006 H 11 1007 H MOV DX, 0000H BA (DX)0000H 1008 H 00 1009 H 00 100A H DIV BX F7 (DX:AX)(AX) / (BX) 100B H F3 100C H MOV [1200 H], AX A3 [1200 H] (AX) 100D H 00 100E H 12 100F H MOV [1202 H],DX 89 [1202 H] (DX) 1010 H 16 1011 H 02 1012 H 12 1013 H HLT F4 Stop the execution

MPMC Lab CS6412

10

16-Bit Addition

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1200H

1201H

1202H

1100H

1101H

1102H 1103H

1200H

1201H

1202H

16-Bit Subtraction

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1200H

1201H

1202H

1100H

1101H

1102H 1103H

1200H

1201H

1202H

16-Bit Multiplication

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1200H

1201H

1202H 1203H

1100H

1101H

1102H 1103H

1200H

1201H

1202H 1203H

16-Bit Division

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1200H

1201H

1202H 1203H

1100H

1101H

1102H 1103H

1200H

1201H

1202H 1203H

CS6412 MPMC Lab

11

Procedure

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter

Opcode SPACE BAR Enter Opcode SPACE BAR . . .

SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter

Input Data SPACE BAR Input Data SPACE BAR . . .

SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY

SPACE BAR . . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

Programs

MPMC Lab CS6412

12

8-Bit AND Operation

MOV AL, [1100H]

MOV BL, [1101H]

AND AL, BL

MOV [1200H], AL

HLT

8-Bit OR Operation

MOV AL, [1100H]

MOV BL, [1101H]

OR AL, BL

MOV [1200H], AL

HLT

8-Bit XOR Operation

MOV AL, [1100H]

MOV BL, [1101H]

XOR AL, BL

MOV [1200H], AL

HLT

8-Bit NOT Operation

MOV AL, [1100H]

NOT AL

MOV [1200H], AL

HLT

CS6412 MPMC Lab

13

Ex. No. 3 8-BIT LOGICAL OPERATIONS

Date:

Aim: To write an assembly language program to perform an AND, OR, XOR and NOT

operations using 8086 microprocessor kit.

Algorithm

8-Bit AND operation

Step 1: Get two 8-bit data from the input memory locations to AL and BL registers.

Step 2: The contents of BL is AND with AL register and store the result in AL.

Step 3: Store the contents of AL to output memory location.

Step 4: Stop the execution.

8-Bit OR operation

Step 1: Get two 8-bit data from the input memory locations to AL and BL registers.

Step 2: The contents of BL is OR with AL register and store the result in AL.

Step 3: Store the contents of AL to output memory location.

Step 4: Stop the execution.

8-Bit XOR operation

Step 1: Get two 8-bit data from the input memory locations to AL and BL registers.

Step 2: The contents of BL is XOR with AL register and store the result in AL.

Step 3: Store the contents of AL to output memory location.

Step 4: Stop the execution.

8-Bit NOT operation

Step 1: Get an8-bit data from the input memory location to AL register.

Step 2: The content of AL is complimented with NOT operation and result is stored in

AL register.

Step 3: Store the contents of AL to output memory location.

Step 4: Stop the execution.

MPMC Lab CS6412

14

Program with opcode

8-Bit AND operation

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AL, [1100 H] A0 (AL) [1100 H] 1001 H 00 1002 H 11 1003 H MOV BL, [1101H] 8A (BL) [1101H] 1004 H 1E 1005 H 01 1006 H 11 1007 H AND AL, BL 22 (AL) (AL) ANDed (BL) 1008 H C3 1009 H MOV [1200 H], AL A2 [1200 H](AL) 100A H 00 100B H 12 100C H HLT F4 Stop the execution

8-Bit OR operation

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AL, [1100 H] A0 (AL) [1100 H] 1001 H 00 1002 H 11 1003 H MOV BL, [1101H] 8A (BL) [1101H] 1004 H 1E 1005 H 01 1006 H 11 1007 H OR AL, BL 0A (AL) (AL) ORed (BL) 1008 H C3 1009 H MOV [1200 H], AL A2 [1200 H](AL) 100A H 00 100B H 12 100C H HLT F4 Stop the execution

CS6412 MPMC Lab

15

8-Bit XOR operation

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AL, [1100 H] A0 (AL) [1100 H] 1001 H 00 1002 H 11 1003 H MOV BL, [1101H] 8A (BL) [1101H] 1004 H 1E 1005 H 01 1006 H 11 1007 H XOR AL, BL 32 (AL) (AL) XORed (BL) 1008 H C3 1009 H MOV [1200 H], AL A2 [1200 H](AL) 100A H 00 100B H 12 100C H HLT F4 Stop the execution

8-Bit XOR operation

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AL, [1100 H] A0 (AL) [1100 H] 1001 H 00 1002 H 11 1003 H NOT AL F6 (AL) 1’s compliment of AL 1004 H D0 1005 H MOV [1200 H], AL A2 [1200 H](AL) 1006 H 00 1007 H 12 1008 H HLT F4 Stop the execution

MPMC Lab CS6412

16

8-Bit AND operation

Input Output

Address Data Address Data

1100H

1101H

1200H

1100H

1101H

1200H

8-Bit OR operation

Input Output

Address Data Address Data

1100H

1101H

1200H

1100H

1101H

1200H

8-Bit XOR operation

Input Output

Address Data Address Data

1100H

1101H

1200H

1100H

1101H

1200H

8-Bit NOT operation

Input Output

Address Data Address Data

1100H

1200H

1100H

1200H

CS6412 MPMC Lab

17

Procedure

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter

Opcode SPACE BAR Enter Opcode SPACE BAR . . .

SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter

Input Data SPACE BAR Input Data SPACE BAR . . .

SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY

SPACE BAR . . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

MPMC Lab CS6412

18

Programs

16-Bit AND Operation

MOV AX, [1100H]

MOV BX, [1102H]

AND AX, BX

MOV [1200H], AX

HLT

16-Bit OR Operation

MOV AX, [1100H]

MOV BX, [1102H]

OR AX, BX

MOV [1200H], AX

HLT

16-Bit XOR Operation

MOV AX, [1100H]

MOV BX, [1102H]

XOR AX, BX

MOV [1200H], AX

HLT

16-Bit NOT Operation

MOV AX, [1100H]

NOT AX

MOV [1200H], AX

HLT

CS6412 MPMC Lab

19

Ex. No. 4 16-BIT LOGICAL OPERATIONS

Date:

Aim: To write an assembly language program to perform an AND, OR, XOR and NOT

operations using 8086 microprocessor kit.

Algorithm

16-Bit AND operation

Step 1: Get two 16-bit data from the input memory locations to AX and BX registers.

Step 2: The contents of BX is AND with AX register and store the result in AX.

Step 3: Store the contents of AX to output memory location.

Step 4: Stop the execution.

16-Bit OR operation

Step 1: Get two 16-bit data from the input memory locations to AX and BX registers.

Step 2: The contents of BX is OR with AX register and store the result in AX.

Step 3: Store the contents of AX to output memory location.

Step 4: Stop the execution.

16-Bit XOR operation

Step 1: Get two 16-bit data from the input memory locations to AX and BX registers.

Step 2: The contents of BX is XOR with AX register and store the result in AX.

Step 3: Store the contents of AX to output memory location.

Step 4: Stop the execution.

16-Bit NOT operation

Step 1: Get an8-bit data from the input memory location to AX register.

Step 2: The content of AX is complimented with NOT operation and result is stored in

AX register.

Step 3: Store the contents of AX to output memory location.

Step 4: Stop the execution.

MPMC Lab CS6412

20

Program with opcode

16-Bit AND operation

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AX, [1100 H] A1 (AX) [1100 H] 1001 H 00 1002 H 11 1003 H MOV BX, [1102H] 8B (BX) [1102H] 1004 H 1E 1005 H 02 1006 H 11 1007 H AND AX, BX 23 (AX) (AX) ANDed (BX) 1008 H C3 1009 H MOV [1200 H], AX A3 [1200 H](AX) 100A H 00 100B H 12 100C H HLT F4 Stop the execution

16-Bit OR operation

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AX, [1100 H] A1 (AX) [1100 H] 1001 H 00 1002 H 11 1003 H MOV BX, [1102H] 8B (BX) [1102H] 1004 H 1E 1005 H 02 1006 H 11 1007 H OR AX, BX 0B (AX) (AX) ORed (BX) 1008 H C3 1009 H MOV [1200 H], AX A3 [1200 H](AX) 100A H 00 100B H 12 100C H HLT F4 Stop the execution

CS6412 MPMC Lab

21

16-Bit XOR operation

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AX, [1100 H] A1 (AX) [1100 H] 1001 H 00 1002 H 11 1003 H MOV BX, [1102H] 8B (BX) [1102H] 1004 H 1E 1005 H 02 1006 H 11 1007 H XOR AX, BX 33 (AX) (AX) XORed (BX) 1008 H C3 1009 H MOV [1200 H], AX A3 [1200 H](AX) 100A H 00 100B H 12 100C H HLT F4 Stop the execution

16-Bit NOT operation

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV AX, [1100 H] A1 (AX) [1100 H] 1001 H 00 1002 H 11 1003 H NOT AX F7 (AX) 1’s compliment of AX 1004 H D0 1005 H MOV [1200 H], AX A3 [1200 H](AX) 1006 H 00 1007 H 12 1008 H HLT F4 Stop the execution

MPMC Lab CS6412

22

16-Bit AND operation

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1200H

1201H

1100H

1101H

1102H 1103H

1200H

1201H

16-Bit OR operation

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1200H

1201H

1100H

1101H

1102H 1103H

1200H

1201H

16-Bit XOR operation

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1200H

1201H

1100H

1101H

1102H 1103H

1200H

1201H

16-Bit NOT operation

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1200H

1201H

1100H

1101H

1102H

1200H

1201H

CS6412 MPMC Lab

23

1103H

Procedure

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter

Opcode SPACE BAR Enter Opcode SPACE BAR . . .

SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter

Input Data SPACE BAR Input Data SPACE BAR . . .

SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY

SPACE BAR . . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

MPMC Lab CS6412

24

Programs

8-Bit Smallest Number

MOV CL, 04H

MOV SI, 1100H

MOV AL, [SI]

loop-2: INC SI

MOV BL, [SI]

CMP AL, BL

JC loop-1

MOV AL, BL

loop-1: DEC CL

JNZloop-2

MOV [1200H], AL

HLT

8-Bit Largest Number

MOV CL, 04H

MOV SI, 1100H

MOV AL, [SI]

loop-2: INC SI

MOV BL, [SI]

CMP AL, BL

JNC loop-1

MOV AL, BL

loop-1: DEC CL

JNZloop-2

MOV [1200H], AL

HLT

CS6412 MPMC Lab

25

Ex. No. 5 8-BIT SMALLEST AND LARGEST NUMBER

Date:

Aim: To write an assembly language program to find a smallest and largest number out of

five 8-bit numbers using 8086 microprocessor kit.

Algorithm

8-Bit smallest Number

Step 1: Initialize CL register to number of comparison required (04H).

Step 2: initialize SI register to starting address of the array (1100H).

Step 3: Get the first data from the array to AL register.

Step 4: Increment CL register by 2 and get next data from the array to BL register.

Step 5: Compare AL with BL and If CF=1, then go to step – 7.

Step 6: Copy the contents of BL to AL register

Step 7: Decrement the CL register by 1 and If ZF=0, then go to step – 4.

Step 8: Store the contents of smallest number to output memory location (1200H).

Step 9: Stop the execution.

8-Bit largest Number

Step 1: Initialize CL register to number of comparison required (04H).

Step 2: initialize SI register to starting address of the array (1100H).

Step 3: Get the first data from the array to AL register.

Step 4: Increment CL register by 2 and get next data from the array to BL register.

Step 5: Compare AL with BL and If CF=0, then go to step – 7.

Step 6: Copy the contents of BL to AL register

Step 7: Decrement the CL register by 1 and If ZF=0, then go to step – 4.

Step 8: Store the contents of smallest number to output memory location (1200H).

Step 9: Stop the execution.

MPMC Lab CS6412

26

Program with opcode

8-Bit Smallest Number

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 04H B1 (CL) 04H 1001 H 04 1002 H MOV SI, 1100H BE (SI) 1100 H 1003 H 00 1004 H 11 1005 H MOV AL, [SI] 8A (AL)((SI)) 1006 H 04 1007 H loop-2 INC SI 46 (SI) (SI) + 1 1008 H MOV BL, [SI] 8A (BL)((SI)) 1009 H 1C 100A H CMP AL, BL 39 Compare AL and BL 100B H D8 100C H JC loop-1 72 If CF=1, then go to loop-1 100D H 03 100E H MOV AL, BL 88 (AL)(BL) 100F H D8 1010 H loop-1 DEC CL FE (CL) (CL) - 1 1011 H C9 1012 H JNZ loop-2 75 If ZF=0, then go to loop-2 1013 H F2 1014 H MOV [1200H ], AL A3 [1200H](AL) 1015 H 00 1016 H 12 1017 H HLT F4 Stop the execution

CS6412 MPMC Lab

27

8-Bit Largest Number

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 04H B1 (CL) 04H 1001 H 04 1002 H MOV SI, 1100H BE (SI) 1100 H 1003 H 00 1004 H 11 1005 H MOV AL, [SI] 8A (AL)((SI)) 1006 H 04 1007 H loop-2 INC SI 46 (SI) (SI) + 1 1008 H MOV BL, [SI] 8A (BL)((SI)) 1009 H 1C 100A H CMP AL, BL 39 Compare AL and BL 100B H D8 100C H JNC loop-1 72 If CF=0, then go to loop-1 100D H 03 100E H MOV AL, BL 88 (AL)(BL) 100F H D8 1010 H loop-1 DEC CL FE (CL) (CL) - 1 1011 H C9 1012 H JNZ loop-2 75 If ZF=0, then go to loop-2 1013 H F2 1014 H MOV [1200H ], AL A3 [1200H](AL) 1015 H 00 1016 H 12 1017 H HLT F4 Stop the execution

MPMC Lab CS6412

28

16-Bit Smallest Number

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1200H

1100H

1101H

1102H 1103H

1104H

1200H

16-Bit Largest Number

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1200H

1100H

1101H

1102H 1103H

1104H

1200H

CS6412 MPMC Lab

29

Procedure

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter

Opcode SPACE BAR Enter Opcode SPACE BAR . . .

SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter

Input Data SPACE BAR Input Data SPACE BAR . . .

SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY

SPACE BAR . . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

MPMC Lab CS6412

30

Programs

16-Bit Smallest Number

MOV CL, 04H

MOV SI, 1100H

MOV AX, [SI]

loop-2: INC SI

INC SI

MOV BX, [SI]

CMP AX, BX

JC loop-1

MOV AX, BX

loop-1: DEC CL

JNZloop-2

MOV [1200H], AX

HLT

16-Bit Largest Number

MOV CL, 04H

MOV SI, 1100H

MOV AX, [SI]

loop-2: INC SI

INC SI

MOV BX, [SI]

CMP AX, BX

JNC loop-1

MOV AX, BX

loop-1: DEC CL

JNZloop-2

MOV [1200H], AX

HLT

CS6412 MPMC Lab

31

Ex. No. 6 16-BIT SMALLEST AND LARGEST NUMBER

Date:

Aim: To write an assembly language program to find a smallest and largest number out of

five 16-bit numbers using 8086 microprocessor kit.

Algorithm

16-Bit smallest Number

Step 1: Initialize CL register to number of comparison required (04H).

Step 2: initialize SI register to starting address of the array (1100H).

Step 3: Get the first data from the array to AX register.

Step 4: Increment CL register by 2 and get next data from the array to BX register.

Step 5: Compare AX with BX and If CF=1, then go to step – 7.

Step 6: Copy the contents of BX to AX register

Step 7: Decrement the CL register by 1 and If ZF=0, then go to step – 4.

Step 8: Store the contents of smallest number to output memory location (1200H).

Step 9: Stop the execution.

16-Bit largest Number

Step 1: Initialize CL register to number of comparison required (04H).

Step 2: initialize SI register to starting address of the array (1100H).

Step 3: Get the first data from the array to AX register.

Step 4: Increment CL register by 2 and get next data from the array to BX register.

Step 5: Compare AX with BX and If CF=0, then go to step – 7.

Step 6: Copy the contents of BX to AX register

Step 7: Decrement the CL register by 1 and If ZF=0, then go to step – 4.

Step 8: Store the contents of smallest number to output memory location (1200H).

Step 9: Stop the execution.

MPMC Lab CS6412

32

Program with opcode

16-Bit Smallest Number

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 04H B1 (CL) 04H 1001 H 04 1002 H MOV SI, 1100H BE (SI) 1100 H 1003 H 00 1004 H 11 1005 H MOV AX, [SI] 8B (AX)((SI)) 1006 H 04 1007 H loop-2 INC SI 46 (SI) (SI) + 1 1008 H INC SI 46 (SI) (SI) + 1 1009 H MOV BX, [SI] 8B (BX)((SI)) 100A H 1C 100B H CMP AX, BX 39 Compare AX and BX 100C H D8 100D H JC loop-1 72 If CF=1, then go to loop-1 100E H 03 100F H MOV AX, BX 89 (AX)(BX) 1010 H D8 1011 H loop-1 DEC CL FE (CL) (CL) - 1 1012 H C9 1013 H JNZ loop-2 75 If ZF=0, then go to loop-2 1014 H F2 1015 H MOV [1200H ], AX A3 [1200H](AX) 1016 H 00 1017 H 12 1018 H HLT F4 Stop the execution

CS6412 MPMC Lab

33

16-Bit Largest Number

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 04H B1 (CL) 04H 1001 H 04 1002 H MOV SI, 1100H BE (SI) 1100 H 1003 H 00 1004 H 11 1005 H MOV AX, [SI] 8B (AX)((SI)) 1006 H 04 1007 H loop-2 INC SI 46 (SI) (SI) + 1 1008 H INC SI 46 (SI) (SI) + 1 1009 H MOV BX, [SI] 8B (BX)((SI)) 100A H 1C 100B H CMP AX, BX 39 Compare AX and BX 100C H D8 100D H JNC loop-1 72 If CF=0, then go to loop-1 100E H 03 100F H MOV AX, BX 89 (AX)(BX) 1010 H D8 1011 H loop-1 DEC CL FE (CL) (CL) - 1 1012 H C9 1013 H JNZ loop-2 75 If ZF=0, then go to loop-2 1014 H F2 1015 H MOV [1200H ], AX A3 [1200H](AX) 1016 H 00 1017 H 12 1018 H HLT F4 Stop the execution

MPMC Lab CS6412

34

16-Bit Smallest Number

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1200H

1201H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1200H

1201H

16-Bit Largest Number

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1200H

1201H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1200H

1201H

CS6412 MPMC Lab

35

Procedure

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter

Opcode SPACE BAR Enter Opcode SPACE BAR . . .

SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter

Input Data SPACE BAR Input Data SPACE BAR . . .

SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY

SPACE BAR . . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

MPMC Lab CS6412

36

Programs

8-Bit Ascending order

MOV CL, 04H

loop-3: MOV CH, 04H

MOV SI, 1100H

loop-2: MOV AL, [SI]

INC SI

MOV BL, [SI]

CMP AL, BL

JC loop-1

MOV [SI], AL

DEC SI

MOV [SI], BL

INC SI

loop-1: DEC CH

JNZ loop-2

DEC CL

JNZ loop-3

HLT

8-Bit Descending order

MOV CL, 04H

loop-3: MOV CH, 04H

MOV SI, 1100H

loop-2: MOV AL, [SI]

INC SI

MOV BL, [SI]

CMP AL, BL

JNC loop-1

MOV [SI], AL

DEC SI

MOV [SI], BL

INC SI

loop-1: DEC CH

JNZ loop-2

DEC CL

JNZ loop-3

HLT

CS6412 MPMC Lab

1

Ex. No. 7 8-BIT ASCENDING AND DESCENDING ORDER

Date:

Aim: To write an assembly language program to sort an array in ascending and descending

order using 8086 microprocessor kit (Array size is 05H ).

Algorithm

8-Bit Ascending order

Step 1: Initialize CL registers to number of times rearrange array (04H).

Step 2: Initialize CH registers to number of comparison required (04H).

Step 3: initialize SI register to starting address of the array (1100H).

Step 4: Get the data from the array to AL & BL registers.

Step 5: Compare AL with BL and If CF=1, then go to step – 7.

Step 6: Exchange the contents between two memory locations.

Step 7: Decrement the CH register by 1 and If ZF=0, then go to step – 4.

Step 8: Decrement the CL register by 1 and If ZF=0, then go to step – 2.

Step 9: Stop the execution.

8-Bit Descending order

Step 1: Initialize CL registers to number of rearrangement required (04H).

Step 2: Initialize CH registers to number of comparison required (04H).

Step 3: initialize SI register to starting address of the array (1100H).

Step 4: Get the data from the array to AL & BL registers.

Step 5: Compare AL with BL and If CF=0, then go to step – 7.

Step 6: Exchange the contents between two memory locations.

Step 7: Decrement the CH register by 1 and If ZF=0, then go to step – 4.

Step 8: Decrement the CL register by 1 and If ZF=0, then go to step – 2.

Step 9: Stop the execution.

MPMC Lab CS6412

2

Program with opcode

8-Bit Ascending order

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 04H B1 (CL) 04H 1001 H 04 1002 H loop-3 MOV CH, 04H B5 (CH) 04H 1003 H 04 1004 H MOV SI, 1100H BE (SI) 1100 H 1005 H 00 1006 H 11 1007 H loop-2 MOV AL, [SI] 8A (AL)((SI)) 1008 H 04 1009 H INC SI 46 (SI) (SI) + 1 100A H MOV BL, [SI] 8A (BL)((SI)) 100B H 1C 100C H CMP AL, BL 38 Compare AL and BL 100D H D8 100E H JC loop-1 72 If CF=1, then go to loop-1 100F H 06 1010 H MOV [SI], AL 88 ((SI))(AL) 1011 H 04 1012 H DEC SI 4E (SI) (SI) - 1 1013 H MOV [SI], BL 8A ((SI))(BL) 1014 H 1C 1015 H INC SI 46 (SI) (SI) + 1 1016 H loop-1 DEC CH FE (CH) (CH) - 1 1017 H CD 1018 H JNZ loop-2 75 If ZF=0, then go to loop-2 1019 H ED 101A H DEC CL FE (CL) (CL) - 1 101B H C9 101C H JNZ loop-3 75 If ZF=0, then go to loop-3 101D H E4 101E H HLT F4 Stop the execution

CS6412 MPMC Lab

3

16-Bit Descending order

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 04H B1 (CL) 04H 1001 H 04 1002 H loop-3 MOV CH, 04H B5 (CH) 04H 1003 H 04 1004 H MOV SI, 1100H BE (SI) 1100 H 1005 H 00 1006 H 11 1007 H loop-2 MOV AL, [SI] 8A (AL)((SI)) 1008 H 04 1009 H INC SI 46 (SI) (SI) + 1 100A H MOV BL, [SI] 8A (BL)((SI)) 100B H 1C 100C H CMP AL, BL 38 Compare AL and BL 100D H D8 100E H JNC loop-1 73 If CF=0, then go to loop-1 100F H 06 1010 H MOV [SI], AL 88 ((SI))(AL) 1011 H 04 1012 H DEC SI 4E (SI) (SI) - 1 1013 H MOV [SI], BL 8A ((SI))(BL) 1014 H 1C 1015 H INC SI 46 (SI) (SI) + 1 1016 H loop-1 DEC CH FE (CH) (CH) - 1 1017 H CD 1018 H JNZ loop-2 75 If ZF=0, then go to loop-2 1019 H ED 101A H DEC CL FE (CL) (CL) - 1 101B H C9 101C H JNZ loop-3 75 If ZF=0, then go to loop-3 101D H E4 101E H HLT F4 Stop the execution

MPMC Lab CS6412

4

8-Bit Ascending order

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

8-Bit Largest Number

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

CS6412 MPMC Lab

5

Procedure

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter

Opcode SPACE BAR Enter Opcode SPACE BAR . . .

SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter

Input Data SPACE BAR Input Data SPACE BAR . . .

SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY

SPACE BAR . . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

MPMC Lab CS6412

6

Programs

16-Bit Ascending order

MOV CL, 04H

loop-3: MOV CH, 04H

MOV SI, 1100H

loop-2: MOV AX, [SI]

INC SI

INC SI

MOV BX, [SI]

CMP AX, BX

JC loop-1

MOV [SI], AX

DEC SI

DEC SI

MOV [SI], BX

INC SI

INC SI

loop-1: DEC CH

JNZ loop-2

DEC CL

JNZ loop-3

HLT

16-Bit Descending order

MOV CL, 04H

loop-3: MOV CH, 04H

MOV SI, 1100H

loop-2: MOV AX, [SI]

INC SI

INC SI

MOV BX, [SI]

CMP AX, BX

JNC loop-1

MOV [SI], AX

DEC SI

DEC SI

MOV [SI], BX

INC SI

INC SI

loop-1: DEC CH

JNZ loop-2

DEC CL

JNZ loop-3

HLT

CS6412 MPMC Lab

17

Ex. No. 8 16-BIT ASCENDING AND DESCENDING ORDER

Date:

Aim: To write an assembly language program to sortan array in ascending and descending

order using 8086 microprocessor kit (Array size is 05H ).

Algorithm

16-Bit Ascending order

Step 1: Initialize CL registers to number of times rearrange array (04H).

Step 2: Initialize CH registers to number of comparison required (04H).

Step 3: initialize SI register to starting address of the array (1100H).

Step 4: Get the data from the array to AX & BX registers.

Step 5: Compare AX with BX and If CF=1, then go to step – 7.

Step 6: Exchange the contents between two memory locations.

Step 7: Decrement the CH register by 1 and If ZF=0, then go to step – 4.

Step 8: Decrement the CL register by 1 and If ZF=0, then go to step – 2.

Step 9: Stop the execution.

16-Bit Descending order

Step 1: Initialize CL registers to number of rearrangement required (04H).

Step 2: Initialize CH registers to number of comparison required (04H).

Step 3: initialize SI register to starting address of the array (1100H).

Step 4: Get the data from the array to AX & BX registers.

Step 5: Compare AX with BX and If CF=0, then go to step – 7.

Step 6: Exchange the contents between two memory locations.

Step 7: Decrement the CH register by 1 and If ZF=0, then go to step – 4.

Step 8: Decrement the CL register by 1 and If ZF=0, then go to step – 2.

Step 9: Stop the execution.

MPMC Lab CS6412

18

Program with opcode

16-Bit Ascending order

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 04H B1 (CL) 04H 1001 H 04 1002 H loop-3 MOV CH, 04H B5 (CH) 04H 1003 H 04 1004 H MOV SI, 1100H BE (SI) 1100 H 1005 H 00 1006 H 11 1007 H loop-2 MOV AX, [SI] 8B (AX)((SI)) 1008 H 04 1009 H INC SI 46 (SI) (SI) + 1 100A H INC SI 46 (SI) (SI) + 1 100B H MOV BX, [SI] 8B (BX)((SI)) 100C H 1C 100D H CMP AX, BX 39 Compare AX and BX 100E H D8 100F H JC loop-1 72 If CF=1, then go to loop-1 1010 H 08 1011 H MOV [SI], AX 89 ((SI))(AX) 1012 H 04 1013 H DEC SI 4E (SI) (SI) - 1 1014 H DEC SI 4E (SI) (SI) - 1 1015 H MOV [SI], BX 89 ((SI))(BX) 1016 H 1C 1017 H INC SI 46 (SI) (SI) + 1 1018 H INC SI 46 (SI) (SI) + 1 1019 H loop-1 DEC CH FE (CH) (CH) - 1 101A H CD 101B H JNZ loop-2 75 If ZF=0, then go to loop-2 101C H EA 101D H DEC CL FE (CL) (CL) - 1 101E H C9 101F H JNZ loop-3 75 If ZF=0, then go to loop-3 1020 H E1 1021 H HLT F4 Stop the execution

CS6412 MPMC Lab

19

16-Bit Descending order

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 04H B1 (CL) 04H 1001 H 04 1002 H loop-3 MOV CH, 04H B5 (CH) 04H 1003 H 04 1004 H MOV SI, 1100H BE (SI) 1100 H 1005 H 00 1006 H 11 1007 H loop-2 MOV AX, [SI] 8B (AX)((SI)) 1008 H 04 1009 H INC SI 46 (SI) (SI) + 1 100A H INC SI 46 (SI) (SI) + 1 100B H MOV BX, [SI] 8B (BX)((SI)) 100C H 1C 100D H CMP AX, BX 39 Compare AX and BX 100E H D8 100F H JNC loop-1 73 If CF=0, then go to loop-1 1010 H 08 1011 H MOV [SI], AX 89 ((SI))(AX) 1012 H 04 1013 H DEC SI 4E (SI) (SI) - 1 1014 H DEC SI 4E (SI) (SI) - 1 1015 H MOV [SI], BX 89 ((SI))(BX) 1016 H 1C 1017 H INC SI 46 (SI) (SI) + 1 1018 H INC SI 46 (SI) (SI) + 1 1019 H loop-1 DEC CH FE (CH) (CH) - 1 101A H CD 101B H JNZ loop-2 75 If ZF=0, then go to loop-2 101C H EA 101D H DEC CL FE (CL) (CL) - 1 101E H C9 101F H JNZ loop-3 75 If ZF=0, then go to loop-3 1020 H E1 1021 H HLT F4 Stop the execution

MPMC Lab CS6412

20

16-Bit Ascending order

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

16-Bit Largest Number

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

CS6412 MPMC Lab

21

Procedure

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter

Opcode SPACE BAR Enter Opcode SPACE BAR . . .

SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter

Input Data SPACE BAR Input Data SPACE BAR . . .

SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY

SPACE BAR . . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

MPMC Lab CS6412

22

Programs

8-Bit String Move

MOV SI, 1100H

MOV DI, 1200H

MOV CX, 0005H

REP

MOVSB

HLT

8-Bit String Reverse

MOV SI, 1100H

MOV DI, 1208H

MOV CX, 0005H

loop-1: LODSB

STD

STOSB

CLD

LOOP loop-1

HLT

16-Bit String Move

MOV SI, 1100H

MOV DI, 1200H

MOV CX, 0005H

REP

MOVSW

HLT

16-Bit String Reverse

MOV SI, 1100H

MOV DI, 1208H

MOV CX, 0005H

loop-1: LODSW

STD

STOSW

CLD

LOOP loop-1

HLT

MPMC Lab CS6412

18

Ex. No. 9 8 & 16-BIT STRING MOVE AND STRING REVERSE

Date:

Aim: To write an assembly language program for perform string move and string reverse

using string manipulation instructions using 8086 microprocessor kit.

Algorithm

8-Bit String Move

Step 1: Initialize SI and DI registers 1100H and 1200H respectively.

Step 2: Initialize CX register 0005H.

Step 3: Copy a string from source memory to destination memory and repeat the same

until CX becomes zero.

Step 4: Stop the execution.

8-Bit String Reverse

Step 1: Initialize SI and DI registers 1100H and 1208H respectively.

Step 2: Initialize CX register 0005H.

Step 3: Load a string to AL from source memory and set DF = 1.

Step 4: Store the string from AL to destination memory and Clear DF = 0.

Step 5: Decrement CX register by 1 and If CX ≠ 0 then go to step - 3.

Step 6: Stop the execution.

16-Bit String Move

Step 1: Initialize SI and DI registers 1100H and 1200H respectively.

Step 2: Initialize CX register 0005H.

Step 3: Copy a string from source memory to destination memory and repeat the same

until CX becomes zero.

Step 4: Stop the execution.

16-Bit String Reverse

Step 1: Initialize SI and DI registers 1100H and 1208H respectively.

Step 2: Initialize CX register 0005H.

Step 3: Load a string to AX from source memory and set DF = 1.

Step 4: Store the string from AX to destination memory and Clear DF = 0.

Step 5: Decrement CX register by 1 and If CX ≠ 0 then go to step - 3.

Step 6: Stop the execution.

MPMC Lab CS6412

18

Program with opcode

8-Bit String Move

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV SI, 1100H BE (SI) 1100 H 1001 H 00 1002 H 11 1003 H MOV DI, 1200H BF (DI) 1200 H 1004 H 00 1005 H 12 1006 H MOV CX, 0005H B9 (CX) 0000H 1007 H 05 1008 H 00

1009 H REP F3 Repeat the next instruction until CX = 0

100A H MOVSB A4 (DI) (SI) 101B H HLT F4 Stop the execution

8-Bit String Reverse

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV SI, 1100H BE (SI) 1100 H 1001 H 00 1002 H 11 1003 H MOV DI, 1208H BF (DI) 1200 H 1004 H 08 1005 H 12 1006 H MOV CX, 0005H B9 (CX) 0000H 1007 H 05 1008 H 00 1009 H loop-1 LODSB AC (AX) (SI) 100A H STD FD DF = 1 100B H STOSB AA (DI) (AX) 100C H CLD FC DF = 0 100D H LOOP loop-1 E2 If CX ≠ 0, then go to loop-1 100E H FA 100F H HLT F4 Stop the execution

16-Bit String Move

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV SI, 1100H BE (SI) 1100 H 1001 H 00 1002 H 11 1003 H MOV DI, 1200H BF (DI) 1200 H 1004 H 00 1005 H 12 1006 H MOV CX, 0005H B9 (CX) 0000H 1007 H 05 1008 H 00

1009 H REP F3 Repeat the next instruction until CX = 0

100A H MOVSW A5 (DI) (SI)

CS6412 MPMC Lab

19

101B H HLT F4 Stop the execution

16-Bit String Reverse

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV SI, 1100H BE (SI) 1100 H 1001 H 00 1002 H 11 1003 H MOV DI, 1208H BF (DI) 1200 H 1004 H 08 1005 H 12 1006 H MOV CX, 0005H B9 (CX) 0000H 1007 H 05 1008 H 00 1009 H loop-1 LODSW AD (AX) (SI) 100A H STD FD DF = 1 100B H STOSW AB (DI) (AX) 100C H CLD FC DF = 0 100D H LOOP loop-1 E2 If CX ≠ 0, then go to loop-1 100E H FA 100F H HLT F4 Stop the execution

8-Bit String Move

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

MPMC Lab CS6412

20

8-Bit String Move

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

1100H

1101H

1102H 1103H

1104H

16-Bit String Reverse

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

CS6412 MPMC Lab

21

16-Bit String Reverse

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

1100H

1101H

1102H 1103H

1104H

1105H

1106H 1107H

1108H 1109H

MPMC Lab CS6412

22

Producer

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter

Opcode SPACE BAR Enter Opcode SPACE BAR . . .

SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter

Input Data SPACE BAR Input Data SPACE BAR . . .

SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY

SPACE BAR . . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

CS6412 MPMC Lab

23

Programs

8-Bit Block Move

MOV CL, 05H

MOV SI, 1100H

MOV DI, 1200H

loop-1: MOV AL, [SI]

MOV [DI], AL

INC SI

INC DI

DEC CL

JNZloop-2

HLT

16-Bit Block Move

MOV CL, 05H

MOV SI, 1100H

MOV DI, 1200H

loop-1: MOV AX, [SI]

MOV [DI], AX

INC SI

INC SI

INC DI

INC DI

DEC CX

JNZloop-2

HLT

MPMC Lab CS6412

24

Ex. No. 10 8 & 16-BIT BLOCK MOVE

Date:

Aim: To write an assembly language program to block move operation with 8-bit & 16-bit

numbers using 8086 microprocessor kit.

Algorithm

8-Bit Block Move

Step 1: Initialize CL register to number of data in an array (05H).

Step 2: Initialize SI register to starting address of first array (1100H).

Step 3: Initialize DI register to starting address of second array (1200H).

Step 4: Get the data from the first array to AL register.

Step 5: Copy the data from the AL register to second array.

Step 6: Increment SI and DI registers by 1.

Step 7: Decrement the CL register by 1 and If ZF=0, then go to step – 4.

Step 8: Stop the execution.

16-Bit Block Move

Step 1: Initialize CL register to number of data in an array (05H).

Step 2: Initialize SI register to starting address of first array (1100H).

Step 3: Initialize DI register to starting address of second array (1200H).

Step 4: Get the data from the first array to AX register.

Step 5: Copy the data from the AX register to second array.

Step 6: Increment SI and DI registers by 2.

Step 7: Decrement the CL register by 1 and If ZF=0, then go to step – 4.

Step 8: Stop the execution.

CS6412 MPMC Lab

25

Program with opcode

8-Bit Block Move

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 05H B1 (CL) 05H 1001 H 05 1002 H MOV SI, 1100H BE (SI) 1100 H 1003 H 00 1004 H 11 1005 H MOV DI, 1200H BF (DI) 1200 H 1006 H 00 1007 H 12 1008 H loop-1 MOV AL, [SI] 8A (AL)((SI)) 1009 H 04 100A H MOV [DI], AL 88 ((DI))(AL) 100B H 05 100C H INC SI 46 (SI) (SI) + 1 100D H INC DI 4F (DI) (DI) + 1 100E H DEC CL FE (CL) (CL) - 1 100F H C9 1010 H JNZ loop-1 75 If ZF=0, then go to loop-1 1011 H F2 1012 H HLT F4 Stop the execution

16-Bit Block Move

Memory Address Label Mnemonics Opcodes Comments

1000 H MOV CL, 05H B1 (CL) 05H 1001 H 05 1002 H MOV SI, 1100H BE (SI) 1100 H 1003 H 00 1004 H 11 1005 H MOV DI, 1200H BF (DI) 1200 H 1006 H 00 1007 H 12 1008 H loop-1 MOV AX, [SI] 8B (AX)((SI)) 1009 H 04 100A H MOV [DI], AX 89 ((DI))(AX) 100B H 05 100C H INC SI 46 (SI) (SI) + 1 100D H INC DI 46 (SI) (SI) + 1 100E H INC DI 4F (DI) (DI) + 1 100F H INC DI 4F (DI) (DI) + 1 1010 H DEC CL FE (CL) (CL) - 1 1011 H C9 1012 H JNZ loop-1 75 If ZF=0, then go to loop-1 1013 H F2

MPMC Lab CS6412

26

1014 H HLT F4 Stop the execution

8-Bit Block Move

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1200H

1201H

1202H

1203H

1204H

1100H

1101H

1102H 1103H

1104H

1200H

1201H

1202H

1203H

1204H

16-Bit Block Move

Input Output

Address Data Address Data

1100H

1101H

1102H 1103H

1104H

1105H

1106H

1107H 1108H

1109H

1200H

1201H

1202H

1203H

1204H

1205H

1206H

1207H

1208H

1209H

1100H

1101H

1102H 1103H

1104H

1105H

1106H

1107H 1108H

1109H

1200H

1201H

1202H

1203H

1204H

1205H

1206H

1207H

1208H

1209H

Procedure

Program Entry:

Reset M Enter Program Starting Address ENTER KEY Enter Opcode

SPACE BAR Enter Opcode SPACE BAR . . . SPACE BAR

Input Data Entry:

Reset M Enter Input Data Address ENTER KEY Enter Input Data

SPACE BAR Input Data SPACE BAR . . . SPACE BAR

Program Execution:

Reset G Enter Program Starting Address ENTER KEY

CS6412 MPMC Lab

27

To Verify Output Data:

Reset M Enter Output Data Address ENTER KEY SPACE BAR

. . . SPACE BAR

Result:

The above programs were successfully executed and results were verified.

Programs

8-bit Addition

MOV DPTR, #8300H

MOVX A, @DPTR

MOV R0, A

INC DPTR

MOVX A, @DPTR

MOV R1, #00H

ADD A, R0

JNC loop-1

INCR1

loop-1: MOV DPTR, #8400H

MOVX @DPTR, A

INC DPTR

MOV A, R1

MOVX @DPTR, A

loop-2: SJMP loop-2

8-bit Subtraction

MOV DPTR, #8300H

MOVX A, @DPTR

MOV R0, A

INC DPTR

MOVX A, @DPTR

MOV R1, #00H

CLR C

SUBBA, R0

JNC loop-1

INCR1

loop-1: MOV DPTR, #8400H

MOVX @DPTR, A

INC DPTR

MOV A, R1

MOVX @DPTR, A

MPMC Lab CS6412

28

loop-2: SJMP loop-2

Ex. No. 11 8-BIT ADDITION AND SUBTRACTION

Date:

Aim: To write an assembly language program for perform an adding and subtracting of two 8-

bit numbers using 8051 microcontroller kit.

Algorithm

8-Bit Addition

Step 1: Get two 8-bit numbers from the input memory locations to R0 and A registers.

Step 2: Clear R1 register to store the carry condition.

Step 3: Add the contents of R0 to A register and store the result in A.

Step 4: Check carry flog, If CF = 0 then go to step 6.

Step 5: Increment R1 register by 1.

Step 6: Store the contents of Sum and Carry to output memory locations.

Step 7: Stop the execution.

8-Bit Subtraction

Step 1: Get two 8-bit numbers from the input memory locations to R0 and A registers.

Step 2: Clear R1 register to store the carry condition. Clear carry flag.

Step 3: Subtract the contents of R0 from A register and store the result in A.

Step 4: Check carry flog, If CF = 0 then go to step 6.

Step 5: Increment R1 register by 1.

Step 6: Store the contents of Difference and Borrow to output memory locations.

Step 7: Stop the execution.

CS6412 MPMC Lab

29

Program with opcode

8-Bit Addition

Memory

Address

Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H MOV R0, A F8 (R0) (A) 8205 H INC DPTR A3 (DPTR) (DPTR) + 1 8206 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8207 H MOV R1, #00 H 79 (R1) 00H 8208 H 00 8209 H ADD A, R0 28 (A) (A) + (R0) 820A H JNC loop-1 50 If CF=0, then go to loop-1 820B H 01 820C H INCR1 09 (R1) (R1) + 1 820D H loop-1 MOV DPTR, #8400 H 90 (DPTR) (8400 H) 820E H 84 820F H 00 8210 H MOVX @DPTR, A F0 ((DPTR))(A) 8211 H MOV A, R1 E9 (8401H)(A) 8212 H INC DPTR A3 (DPTR) (DPTR) + 1 8213 H MOVX @DPTR, A F0 ((DPTR))(A) 8214 H loop-2 SJMP loop-2 80 Stop the execution 8215 H FE

8-Bit Subtraction

Memory

Address

Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H MOV R0, A F8 (R0) (A) 8205 H INC DPTR A3 (DPTR) (DPTR) + 1 8206 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8207 H MOV R1, #00 H 79 (R1) 00H 8208 H 00 8209 H CLRC C C3 (CF)00H 820A H SUBBA, R0 98 (A) (A) - (R0) 820B H JNC loop-1 50 If CF=0, then go to loop-1 820C H 01 820D H INCR1 09 (R1) (R1) + 1 820E H loop-1 MOV DPTR, #8400 H 90 (DPTR) (8400 H) 820F H 84 8210 H 00 8211 H MOVX @DPTR, A F0 ((DPTR))(A) 8212 H MOV A, R1 E9 (8401H)(A) 8213 H INC DPTR A3 (DPTR) (DPTR) + 1 8214 H MOVX @DPTR, A F0 ((DPTR))(A) 8215 H loop-2 SJMP loop-2 80 Stop the execution 8216H FE

MPMC Lab CS6412

30

Producer

Program Entry:

Reset Enter Program Starting Address ADS Enter Opcode

INC . . . INC

Input Data Entry:

Reset Enter Input Data Address ADS Enter Input Data INC

. . . INC

Program Execution:

Reset Enter Program Starting Address ADS EXEC

To Verify Output Data:

Reset Enter Output Data Address ADS INC . . . INC

8-Bit Addition

Input Output

Address Data Address Data

8300H

8301H

8400H

8401H

8300H

8301H

8400H

8401H

8-Bit Subtraction

Input Output

Address Data Address Data

8300H

8301H

8400H

8401H

8300H

8301H

8400H

8401H

Result:

The above programs were successfully executed and results were verified.

CS6412 MPMC Lab

31

Programs

8 – bit Multiplication

MOV DPTR, #8300H

MOVX A, @DPTR

MOV B, A

INC DPTR

MOVX A, @DPTR

MULAB

MOV DPTR, #8400H

MOVX @DPTR, A

INC DPTR

MOV A, B

MOVX @DPTR, A

loop-1: SJMP loop-1

8 – bit Division

MOV DPTR, #8300H

MOVX A, @DPTR

MOV B, A

INC DPTR

MOVX A, @DPTR

DIVAB

MOV DPTR, #8400H

MOVX @DPTR, A

INC DPTR

MOV A, B

MOVX @DPTR, A

loop-1: SJMP loop-1

MPMC Lab CS6412

32

Ex. No. 12 8-BIT MULTIPLICATION AND DIVISION

Date:

Aim: To write an assembly language program perform multiplication and division of two 8-bit

numbers using 8051 microcontroller kit.

Algorithm

8-Bit Multiplication

Step 1: Get two 8-bit numbers from the input memory locations to B and A

registers.

Step 2: Multiply the contents of B with A register and store the product in A&B.

Step 3: Store the contents of product to output memory locations.

Step 4: Stop the execution.

8-Bit Division

Step 1: Get two 8-bit numbers from the input memory locations to B and A

registers.

Step 2: Divide the contents of B with A register and store the results in A&B.

Step 3: Store the contents of quotient & remainder to output memory locations.

Step 4: Stop the execution.

Program with opcode

CS6412 MPMC Lab

33

8-Bit Multiplication

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H MOV B, A F5 (B) (A) 8205 H F0 8206 H INC DPTR A3 (DPTR) (DPTR) + 1 8207 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8208 H MUL AB A4 (BA) (A) * (B) 8209 H MOV DPTR, #8400 H 90 (DPTR) (8400 H) 820A H 84 820B H 00 820C H MOVX @DPTR, A F0 ((DPTR))(A) 820D H MOV A, B E5 (A) (B) 820E H F0 820F H INC DPTR A3 (DPTR) (DPTR) + 1 8210 H MOVX @DPTR, A F0 ((DPTR))(A) 8211 H loop-1 SJMP loop-1 80 Stop the execution 8212 H FE

8-Bit Division

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H MOV B, A F5 (B) (A) 8205 H F0 8206 H INC DPTR A3 (DPTR) (DPTR) + 1 8207 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8208 H DIV AB 84 (AB) (A) / (B) 8209 H MOV DPTR, #8400 H 90 (DPTR) (8400 H) 820A H 84 820B H 00 820C H MOVX @DPTR, A F0 ((DPTR))(A) 820D H MOV A, B E5 (A) (B) 820E H F0 820F H INC DPTR A3 (DPTR) (DPTR) + 1 8210 H MOVX @DPTR, A F0 ((DPTR))(A) 8211 H loop-1 SJMP loop-1 80 Stop the execution 8212 H FE

MPMC Lab CS6412

34

Producer

Program Entry:

Reset Enter Program Starting Address ADS Enter Opcode

INC . . . INC

Input Data Entry:

Reset Enter Input Data Address ADS Enter Input Data INC

. . . INC

Program Execution:

Reset Enter Program Starting Address ADS EXEC

To Verify Output Data :

Reset Enter Output Data Address ADS INC . . INC.

8-Bit Multiplication

Input Output

Address Data Address Data

8300H

8301H

8400H

8401H

8300H

8301H

8400H

8401H

8-Bit Division

Input Output

Address Data Address Data

8300H

8301H

8400H

8401H

8300H

8301H

8400H

8401H

Result:

The above programs were successfully executed and results were verified.

CS6412 MPMC Lab

35

Programs

8 – bit AND Operation

MOV DPTR, #8300H

MOVX A, @DPTR

MOV R0, A

INC DPTR

MOVX A, @DPTR

ANLA, R0

MOV DPTR, #8400H

MOVX @DPTR, A

loop-1: SJMP loop-1

8 – bit OR Operation

MOV DPTR, #8300H

MOVX A, @DPTR

MOV R0, A

INC DPTR

MOVX A, @DPTR

ORLA, R0

MOV DPTR, #8400H

MOVX @DPTR, A

loop-1: SJMP loop-1

MPMC Lab CS6412

36

Ex. No. 13 8-BIT AND & OR OPERATION

Date:

Aim: To write an assembly language program perform AND&OR operation of two 8-bit

numbers using 8051 microcontroller kit.

Algorithm

8-Bit AND Operation

Step 1: Get two 8-bit numbers from the input memory locations to R0 and A

registers.

Step 2: Perform the AND operation between the contents of R0 with A registers and

stores the result in A register.

Step 3: Store the contents of result to output memory locations.

Step 4: Stop the execution.

8-Bit OR Operation

Step 1: Get two 8-bit numbers from the input memory locations to R0 and A

registers.

Step 2: Perform the OR operation between the contents of R0 with A registers and

stores the result in A register.

Step 3: Store the contents of result to output memory locations.

Step 4: Stop the execution.

CS6412 MPMC Lab

37

Program with opcode

8-Bit AND Operation

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H MOV R0, A F8 (R0) (A) 8205 H INC DPTR A3 (DPTR) (DPTR) + 1 8206 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8207 H ANL A, R0 58 (A) (A) ANDed (R0) 8208 H MOV DPTR, #8400 H 90 (DPTR) (8400 H) 8209 H 84 820A H 00 820B H MOVX @DPTR, A F0 ((DPTR))(A) 820C H loop-1 SJMP loop-1 80 Stop the execution 820D H FE

8-Bit OR Operation

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H MOV R0, A F8 (R0) (A) 8205 H INC DPTR A3 (DPTR) (DPTR) + 1 8206 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8207 H ORL A, R0 48 (A) (A) ORed (R0) 8208 H MOV DPTR, #8400 H 90 (DPTR) (8400 H) 8209 H 84 820A H 00 820B H MOVX @DPTR, A F0 ((DPTR))(A) 820C H loop-1 SJMP loop-1 80 Stop the execution 820D H FE

Producer

MPMC Lab CS6412

38

Program Entry:

Reset Enter Program Starting Address ADS Enter Opcode

INC . . . INC

Input Data Entry:

Reset Enter Input Data Address ADS Enter Input Data INC

. . . INC

Program Execution:

Reset Enter Program Starting Address ADS EXEC

To Verify Output Data :

Reset Enter Output Data Address ADS INC . . INC.

8-Bit AND Operation

Input Output

Address Data Address Data

8300H

8301H

8400H

8300H

8301H

8400H

8-Bit OR Operation

Input Output

Address Data Address Data

8300H

8301H

8400H

8300H

8301H

8400H

Result:

The above programs were successfully executed and results were verified.

Programs

CS6412 MPMC Lab

39

8 – bit EX-OR Operation

MOV DPTR, #8300H

MOVX A, @DPTR

MOV R0, A

INC DPTR

MOVX A, @DPTR

XRLA, R0

MOV DPTR, #8400H

MOVX @DPTR, A

loop-1: SJMP loop-1

8 – bit NOT Operation

MOV DPTR, #8300H

MOVX A, @DPTR

CPLA

MOV DPTR, #8400H

MOVX @DPTR, A

loop-1: SJMP loop-1

MPMC Lab CS6412

40

Ex. No. 14 8-BIT EX-OR & NOT OPERATION

Date:

Aim: To write an assembly language program perform EX-OR & NOT operations of two 8-

bit numbers using 8051 microcontroller kit.

Algorithm

8-Bit EX-OR Operation

Step 1: Get two 8-bit numbers from the input memory locations to R0 and A

registers.

Step 2: Perform the EX-OR operation between the contents of R0 with A registers and

stores the result in A register.

Step 3: Store the contents of result to output memory locations.

Step 4: Stop the execution.

8-Bit NOT Operation

Step 1: Get an 8-bit number from the input memory location to Aregister.

Step 2: Perform the NOT operation of on A register and store the result in A register.

Step 3: Store the contents of result to output memory location.

Step 4: Stop the execution.

CS6412 MPMC Lab

41

Program with opcode

8-Bit EX-OR Operation

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H MOV R0, A F8 (R0) (A) 8205 H INC DPTR A3 (DPTR) (DPTR) + 1 8206 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8207 H XRL A, R0 68 (A) (A) EX-ORed (R0) 8208 H MOV DPTR, #8400 H 90 (DPTR) (8400 H) 8209 H 84 820A H 00 820B H MOVX @DPTR, A F0 ((DPTR))(A) 820C H loop-1 SJMP loop-1 80 Stop the execution 820D H FE

8-Bit NOT Operation

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H CPLL A F4 (A) (A) ORed (R0) 8205 H MOV DPTR, #8400 H 90 (DPTR) (8400 H) 8206 H 84 8207 H 00 8208 H MOVX @DPTR, A F0 ((DPTR))(A) 8209 H loop-1 SJMP loop-1 80 Stop the execution 820A H FE

MPMC Lab CS6412

42

Producer

Program Entry:

Reset Enter Program Starting Address ADS Enter Opcode

INC . . . INC

Input Data Entry:

Reset Enter Input Data Address ADS Enter Input Data INC

. . . INC

Program Execution:

Reset Enter Program Starting Address ADS EXEC

To Verify Output Data :

Reset Enter Output Data Address ADS INC . . INC.

8-Bit EX-OR Operation

Input Output

Address Data Address Data

8300H

8301H

8400H

8300H

8301H

8400H

8-Bit NOT Operation

Input Output

Address Data Address Data

8300H 8400H

8300H 8400H

Result:

The above programs were successfully executed and results were verified.

CS6412 MPMC Lab

43

Programs

8 – bit Bit Manipulation in Acuumulator

MOV DPTR, #8300H

MOVX A, @DPTR

SETB A3

CLR A7

MOV DPTR, #8400H

MOVX @DPTR, A

loop-1: SJMP loop-1

8 – bit Odd/Even using Bit Manipulation

MOV DPTR, #8300H

MOVX A, @DPTR

JB A0, loop-1

MOV DPTR, #8400H

MOV A, #EEH

MOVX @DPTR, A

loop-2: SJMP loop-2

loop-1: MOV DPTR, #8400H

MOV A, #00H

MOVX @DPTR, A

loop-2: SJMP loop-2

MPMC Lab CS6412

44

Ex. No. 15 8-BIT BIT MANIPULATION PROGRAMS

Date:

Aim: To write an assembly language program perform bit manipulation of an 8-bit number

using 8051 microcontroller kit.

Algorithm

8-Bit Bit Manipulation in Acuumulator

Step 1: Get an 8-bit number from the input memory locationto A register.

Step 2: Set a bit A3 and Clear bit A7 in A register and store the result in A.

Step 3: Store the contents of product to output memory location.

Step 4: Stop the execution.

8 – bit Odd/Even using Bit Manipulation

Step 1: Get an 8-bit number from the input memory location to A register.

Step 2: Check whether the bit A0 is binary 1. If A0 = 1, then go to step- 4.

Step 3: Store the status of A register has even number in output memory location.Stop

the execution.

Step 4: Store the status of A register has odd number in output memory location.Stop

the execution.

CS6412 MPMC Lab

45

Program with opcode

8-Bit Bit Manipulation in Acuumulator

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H SETB A3 D2 (A3) 1 8205 H E3 8206 H CLR A7 C2 (A7) 0 8207 H E7 8208 H MOV DPTR, #8400 H 90 (DPTR) (8400 H) 8209 H 84 820A H 00 820B H MOVX @DPTR, A F0 ((DPTR))(A) 820C H loop-1 SJMP loop-1 80 Stop the execution 820D H FE

8 – bit Odd/Even using Bit Manipulation

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV DPTR, #8300 H 90 (DPTR) (8300 H) 8201 H 83 8202 H 00 8203 H MOVX A, @DPTR E0 (A) ( (DPTR)) 8204 H JB A0, loop-1 20 8205 H E0 8206 H 08 8207 H MOV DPTR, #8400 H 90 (DPTR) (8400 H) 8208 H 84 8209 H 00 820A H MOV A, #EE H 74 (A) EEH 820B H EE 820C H MOVX @DPTR, A F0 ((DPTR))(A) 820D H loop-2 SJMP loop-2 80 Stop the execution 820E H FE 820F H loop-1 MOV DPTR, #8400 H 90 (DPTR) (8400 H) 8210 H 84 8211 H 00 8212 H MOV A, #00 H 74 (A) 00H 8213H 00 8214H MOVX @DPTR, A F0 ((DPTR))(A) 8215H loop-2 SJMP loop-2 80 Stop the execution 8216H FE

MPMC Lab CS6412

46

Producer

Program Entry:

Reset Enter Program Starting Address ADS Enter Opcode

INC . . . INC

Input Data Entry:

Reset Enter Input Data Address ADS Enter Input Data INC

. . . INC

Program Execution:

Reset Enter Program Starting Address ADS EXEC

To Verify Output Data :

Reset Enter Output Data Address ADS INC . . INC.

8-Bit Bit Manipulation in Acuumulator

Input Output

Address Data Address Data

8300H 8400H

8300H 8400H

8 – bit Odd/Even using Bit Manipulation

Input Output

Address Data Address Data

8300H 8400H

8300H 8400H

Result:

The above programs were successfully executed and results were verified.

CS6412 MPMC Lab

47

Programs

Saw Tooth Wave Form

MOV A, #80H

MOV DPTR, #A003H

MOVX @DPTR, A

MVI A, 00H CW = 80H

MOV DPTR, #A001H

Loop-1: MOVX @DPTR, A

INR A

SJMP Loop-1

Triangle Wave Form

MOV A, #80H

MOV DPTR, #A003H

MOVX @DPTR, A

MVI A, 00H CW = 80H

MOV DPTR, #A001H

Loop-1: MOVX @DPTR, A

INC A

CJNE A, #FFH, Loop-1

Loop-2: MOVX @DPTR, A

DEC A

CJNE A, #00H, Loop-2

SJMP Loop-1

Square Wave Form

MOV A, #80H

MOV DPTR, #A003H

MOVX @DPTR, A

MVI A, 00H CW = 80H

MOV DPTR, #A001H

Loop-1: MOVX @DPTR, A Delay: MOV R0, #FFH

LCALL Delay loop-1: NOP

CPL A DJNZ loop-1

SJMP Loop-1 RET

7 6 5 4 3 2 1 0

I/O MS1 MS0 PA PCU MS PB PCL

1 0 0 0 0 0 0 0

7 6 5 4 3 2 1 0

I/O MS1 MS0 PA PCU MS PB PCL

1 0 0 0 0 0 0 0

7 6 5 4 3 2 1 0

I/O MS1 MS0 PA PCU MS PB PCL

1 0 0 0 0 0 0 0

MPMC Lab CS6412

48

Ex. No. 16 PROGRAMS USING DAC & 8255 PPI

Date: WITH 8051

Aim: To write an assembly language program for to learn the operation of

DAC and 8255 PPI interfacing with 8051 microcontroller kit using

simple programs.

Algorithm Saw Tooth Wave Form

Step 1: Initialize A register to 80H.

Step-2: Send the content of A register to Control word register.

Step-3: Initialize A register to 00H.

Step-4: Send the content of A register to Port - B.

Step-5: Increment the contents of A register by 1.

Step-6: Jump to step-4.

Triangle Wave Form

Step 1: Initialize A register to 80H.

Step-2: Send the content of A register to Control word register.

Step-3: Initialize A register to 00H.

Step-4: Send the content of A register to Port - B.

Step-5: Increment the contents of A register by 1.

Step-6: Compare the A and Immediate data FFH.If A≠ FFH, then go to step-4.

Step-7: Send the content of A register to Port - B.

Step-8: Decrement the contents of A register by 1.

Step-9: Compare the A and Immediate data 00H.If A≠00H, then go to step-7.

Step-10: Jump to step-4.

Square Wave Form

Main Program

Step 1: Initialize A register to 80H.

Step-2: Send the content of A register to Control word register.

Step-3: Initialize A register to 00H.

Step-4: Send the content of A register to Port - B. Step-5: Call the Delay Subroutine Program.

Step-6: Compliment the A register.

Step-7: Jump to step-4. Subroutine Program

Step 1: Initialize R0 register pair to FFH.

Step 2: Do No operation.

Step 3: Decrement R0 register by 1.If R0 ≠00H, then go to step-2.

Step 4: Return to Main program.

CS6412 MPMC Lab

49

Program with opcode

Saw Tooth Wave Form

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV A, #80H 74 (A) 80H 8201 H 80 8202 H M0V DPTR, #A003H 90 (DPTR) A003H 8203 H A0 8204 H 03 8205 H MOVX @DPTR, A F0 ((DPTR)) (A) 8206 H MOV A, #00H 74 (A) 00H 8207 H 00 8208 H M0V DPTR, #A001H 90 (DPTR) A001H 8209 H A0 820A H 01 820BH loop-1 MOVX @DPTR, A F0 ((DPTR)) (A) 820CH INC A 04 (A)(A) + 1 820DH SJMP loop-1 80 Go to loop-1 820EH FC

Triangle Wave Form

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV A, #80H 74 (A) 80H 8201 H 80 8202 H M0V DPTR, #A003H 90 (DPTR) A003H 8203 H A0 8204 H 03 8205 H MOVX @DPTR, A F0 ((DPTR)) (A) 8206 H MOV A, #00H 74 (A) 00H 8207 H 00 8208 H M0V DPTR, #A001H 90 (DPTR) A001H 8209 H A0 820A H 01 820B H loop-1 MOVX @DPTR, A F0 ((DPTR)) (A) 820CH INC A 04 (A)(A) + 1 820DH CJNE A, #FFH, loop-1 B4 Compare A & FFH&if A ≠FFH 820EH FF then go to loop-1 820FH FB 8210H loop-2 MOVX @DPTR, A F0 ((DPTR)) (A) 8211H DEC A 14 (A)(A) - 1 8212H CJNE A, #00H, loop-2 B4 Compare A & 00H&if A ≠00H 8213H 00 then go to loop-2 8214H FB 8215H SJMP loop-1 80 Go to loop-1 8216H FC

MPMC Lab CS6412

50

Square Wave Form

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV A, #80H 74 (A) 80H 8201 H 80 8202 H M0V DPTR, #A003H 90 (DPTR) A003H 8203 H A0 8204 H 03 8205 H MOVX @DPTR, A F0 ((DPTR)) (A) 8206 H MOV A, #00H 74 (A) 00H 8207 H 00 8208 H M0V DPTR, #A001H 90 (DPTR) A001H 8209 H A0 820A H 01 820B H loop-1 MOVX @DPTR, A F0 ((DPTR)) (A) 820CH LCALL Delay 12 Call delay subroutine 820DH 82 program 820EH 20 820FH CPL A F4 Compliment A register 8210H SJMP loop-1 80 Go to loop-1 8211H FA

Delay Subroutine Program 8220H Delay MOV R0, 20H 78 (R0)20H 8221H 20 8222H loop-3 MOV R1, FFH 79 (R1)FFH 8223H FF 8224H loop-2 NOP 00 No operation 8225H DJNZ R1, loop-2 D9 Decrement R1 by 1 and 8226H FD If R1≠0, then go to loop-2 8227H DJNZ R0, loop-3 D8 Decrement R1 by 1 and 8228H F9 If R1≠0, then go to loop-3 8229H RET 22 Return to main program

CS6412 MPMC Lab

51

Saw Tooth Wave Form

OUPUT A(V)

Amplitude:

Time:

0 T(msec)

Triangle Wave Form A(V)

OUPUT

Amplitude:

Time:

0 T(msec)

Square Wave Form A(V)

OUPUT

Amplitude:

Time:

0 T(msec)

MPMC Lab CS6412

52

Producer

Program Entry:

Reset Enter Program Starting Address ADS Enter Opcode

INC . . . INC

Program Execution:

Reset Enter Program Starting Address ADS EXEC

Result:

The above programs were successfully executed and results were

verified.

CS6412 MPMC Lab

53

Programs

Stepper Motor

MOV A, #80H

MOV DPTR, #A003H

MOVX @DPTR, A

MOV DPTR, #A000H CW = 80H

MOV A, #33H

Loop-1: MOVX @DPTR, A

LCALL Delay

RR A

SJMP Loop-1

Delay: MOV R0, #20H

loop-3: MOV R1, #FFH

loop-2: NOP

DJNZ R1, loop-2

DJNZ R0, loop-3

RET

7 6 5 4 3 2 1 0

I/O MS1 MS0 PA PCU MS PB PCL

1 0 0 0 0 0 0 0

MPMC Lab CS6412

54

Ex. No. 17 STEPPER MOTOR INTERFACE WITH 8255 PPI

Date:

Aim: To write an assembly language program for to demonstrate the operation of stepper

motor and 8255 PPI interfacing with 8051 microcontroller kit.

Algorithm

Stepper motor interface

Step 1: Initialize A register to 80H.

Step-2: Send the content of A register to Control ward register.

Step-3: Initialize A register to 33H.

Step-4: Send the content of A register to Port - A.

Step-5: Call Delay subroutine program.

Step-6: Rotate the contents of A register to right side by 1 bit position.

Step-7: Jump to step-4.

Subroutine Program

Step 1: Initialize R0 register to 20H.

Step 2: Initialize R1 register to FFH.

Step 3: No operation.

Step 4: Decrement R1 register by 1 and go to step-3, if R1≠0.

Step 5: Decrement R0 register by 1 and go to step-3, if R0≠0.

Step 6: Return to Main program.

CS6412 MPMC Lab

55

Program with opcode

Stepper Motor Interface

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV A, #80H 74 (A) 80H 8201 H 80 8202 H MOV DPTR, #A003H 90 (DPTR)A003 H 8203 H A0 8204 H 03 8205 H MOVX @DPTR, A F0 ((A003 H)) (A) 8206 H MOV A, #33H 74 (A) 33H 8207 H 33 8208 H MOV DPTR, #A000H 90 (DPTR)A000 H 8209 H A0 820A H 00 820B H loop-1 MOVX @DPTR, A F0 ((A000 H)) (A) 820CH LCALL Delay 12 Call delay subroutine 820DH 82 program 820EH 20 820FH RR A 03 Rotate Right Accumulator 8210H SJMP loop-1 80 Go to loop-1 8211H F9

Delay Subroutine Program 8220H Delay MOV R0, 20H 78 (R0)20H 8221H 20 8222H loop-3 MOV R1, FFH 79 (R1)FFH 8223H FF 8224H loop-2 NOP 00 No operation 8225H DJNZ R1, loop-2 D9 Decrement R1 by 1 and 8226H FD If R1≠0, then go to loop-2 8227H DJNZ R0, loop-3 D8 Decrement R1 by 1 and 8228H F9 If R1≠0, then go to loop-3 8229H RET 22 Return to main program

MPMC Lab CS6412

56

Producer

Program Entry:

Reset Enter Program Starting Address ADS Enter Opcode

INC . . . INC

Program Execution:

Reset Enter Program Starting Address ADS EXEC

Output

Instruction Direction of Rotation

RR A Clockwise Rotation

RL A Anti-clockwise Rotation

Result:

The above programs were successfully executed and results were verified.

CS6412 MPMC Lab

57

Programs

DC Motor

MOV A, #80H

MOV DPTR, #A003H

MOVX @DPTR, A

Loop-2: JB P1.2, Loop-1

MOV DPTR, #A001H CW = 80H

MOV A, #04H

MOVX @DPTR, A

SJMP Loop-2

loop-1: MOV A, #00H

MOVX @DPTR, A

SJMP Loop-2

7 6 5 4 3 2 1 0

I/O MS1 MS0 PA PCU MS PB PCL

1 0 0 0 0 0 0 0

MPMC Lab CS6412

58

Ex. No. 18 DC MOTOR INTERFACE WITH 8255 PPI

Date:

Aim: To write an assembly language program for to demonstrate the operation of DC motor

and 8255 PPI interfacing with 8051 microcontroller kit.

Algorithm

DC motor interface

Step 1: Initialize A register to 80H.

Step-2: Send the content of A register to Control ward register.

Step 3: If P1.2 bit = 1, then go to step-7.

Step-4: Initialize A register to 04H.

Step-5: Send the content of A register to Port - B.

Step-6: Jump to step-3.

Step 7: Initialize A register to 00H.

Step 8: Send the content of A register to Port - B.

Step 9: Jump to step-3.

CS6412 MPMC Lab

59

Program with opcode

DC Motor Interface

Memory Address Label Mnemonics Opcodes Comments

8200 H MOV A, #80H 74 (A) 80H 8201 H 80 8202 H MOV DPTR, #A003H 90 (DPTR)A003 H 8203 H A0 8204 H 03 8205 H MOVX @DPTR, A F0 ((A003 H)) (A) 8206 H loop-2 JB P1.2, loop-1 20 If P1.2 = 1, then go to loop-1 8207 H 92 8208 H 08 8209 H MOV A, #04H 74 (A) 04H 820A H 04 820B H MOV DPTR, #A001H 90 (DPTR)A001 H 820CH A0 820DH 01 820EH MOVX @DPTR, A F0 ((A001 H)) (A) 820FH SJMP loop-2 80 Go to loop-2 8210H F5 8211H loop-1 MOV A, #00H 74 (A) 00H 8212H 00 8213H MOVX @DPTR, A F0 ((A001 H)) (A) 8214H SJMP loop-2 80 Go to loop-2 8215H F0

MPMC Lab CS6412

60

Producer

Program Entry:

Reset Enter Program Starting Address ADS Enter Opcode

INC . . . INC

Program Execution:

Reset Enter Program Starting Address ADS EXEC

Output

Switch (SW29) is in ON : DC Motor starts to rotate.

Switch (SW29) is in OFF : DC Motor stops to rotate.

Result:

The above programs were successfully executed and results were verified.