lcws bangalore, march 13, 2006 p. colas, digital tpc rd1 rd for a digital tpc the sitpc project the...

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LCWS Bangalore, Ma rch 13, 2006 P. Colas, Digital TPC R&D 1 R&D for a digital TPC The SiTPC project •The digital TPC concept and advantages •VLSI electronics: from Medipix2 to TimePix •Micromegas and GEM achievements •Integrated grid •Protection issues •Aging studies A. Bamberger, D. Burke, M. Campbell, M. Chefdeville, P. Colas, K. Desch, A. Giganon, I. Giomataris, M. Hauschild, E. Heijne, X. Lloppart, S. van der Putten, C. Salm, J. Schmitz, S. Smits, H. Van der Graaf, J. Timmermans, M. Titov, J. Visschers, P. Wienemann (CERN, Freiburg, MESA+/Twente, NIKHEF, Saclay)

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LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC R&D3 In first approximation, gain fluctuates exponentially in a parallel- plate chamber. In presence of noise, a 4 or 5 st.dev. cut costs in efficiency for single electron A gain of was necessary to see the single electrons with 90% efficiency Sparks destroy the chips -> LOWER NOISE -> PROTECT CHIPS Gain fluctuations

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Page 1: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 1

R&D for a digital TPCThe SiTPC project

•The digital TPC concept and advantages•VLSI electronics: from Medipix2 to TimePix•Micromegas and GEM achievements•Integrated grid•Protection issues•Aging studies

A. Bamberger, D. Burke, M. Campbell, M. Chefdeville, P. Colas, K. Desch, A. Giganon, I. Giomataris, M. Hauschild, E. Heijne, X. Lloppart, S. van der Putten, C. Salm, J. Schmitz, S.

Smits, H. Van der Graaf, J. Timmermans, M. Titov, J. Visschers, P. Wienemann

(CERN, Freiburg, MESA+/Twente, NIKHEF, Saclay)

Page 2: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 2

The digital TPC concept•Reconstruct a track electron by electron (or cluster by cluster)•Optimally use this basic information:

•Insensitive to gain fluctuations•dE/dx optimal resolution from cluster counting

•If you cover the whole TPC surface, O(108-9) channels instead of 106, but all digital (1/0)•First costing attempts show it is comparable or cheaper than a standard readout•Can consider replacing a few pad-rings by digital anode chips (gas club sandwich)

1 cm

Page 3: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 3

•In first approximation, gain fluctuates exponentially in a parallel- plate chamber.•In presence of noise, a 4 or 5 st.dev. cut costs in efficiency for single electron•A gain of 19000 was necessary to see the single electrons with 90% efficiency•Sparks destroy the chips-> LOWER NOISE-> PROTECT CHIPS

Gain fluctuations single-electron avalanche distribution

0

0.0005

0.001

0.0015

0.002

0 1000 2000 3000 4000

electrons in avalanche

Prob

(n)

G=500

G=1000

G=2000

G=4000

G=8000

Expon. (G=500)

Expon. (G=1000)

Expon. (G=2000)

Expon. (G=4000)

Expon. (G=8000)

Single electron efficiency

0.00

0.20

0.40

0.60

0.80

1.00

0 1000 2000 3000 4000

Threshold setting (number of electrons)

Effic

ienc

y (-)

G=500

G=1000

g=2000

g=4000

g=8000

Expon. (G=500)

Expon. (G=1000)

Expon. (g=2000)

Expon. (g=4000)

Expon. (g=8000)

Page 4: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 4

•The gain with modified Medipix (80% conductive surface) is 3 to 4 times larger than with unmodified Medipix (20% conductive surface)

Gain with He+20% isobutane

Page 5: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 5

The Freiburg GEM setup

drift electrode

readout electrode

GEM 1 GEM 2GEM 3

typ. potentials/fields:ED= 1.1 kV/cmΔVGEM= 404 V ET = 3.2 kV/cmEI = 4.0 kV/cm

6mm

2mm2mm1mm

Page 6: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 6

25 pads of 2x2 cm2

with readout

β- source Ru106, 3.5 MeV from daughter Rh106 crosses 4 pads with MediPix2 in between

The Freiburg GEM setup for point resolution

measurement

Page 7: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 20067.3.2006

P. Colas, Digital TPC R&DA. Bamberger 7

Resolution

σ = 64.5 μm

Ar/CO2 He/CO2residuals (str. line)*

65 ± 1.4 μm 51 ± 2.5 μm

Triplet meth resolution,

57 ± 1.3 μm 53 ± 2.8 μm

Difference understood:

Due to multiple scattering

* slightly biased, still under investigation

n-1

n residual

n+1

triplet method:

residuals reweighted by a factor close to √(2/3)

Two methods:

residuals of a straight line fit and triplet method

Page 8: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 20067.3.2006

P. Colas, Digital TPC R&DA. Bamberger 8

a “fast” δ-electron

incoming e- from 106Ru outgoing

electron at ~ 10°

recoil electron of > 23 keV

because track length >3mm

angle close to 90°

He/CO2

Page 9: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 9

Simulations at CERN: Threshold Scan200 ± 20 e- 400 ± 40 e- 600 ± 60 e- 800 ± 80 e- 1000 ± 100 e-

detection thresholds per pixel (allow 10% variation):

noise: 100 e-

simulated 0.5 GeV muon measured

cosmic threshold: 3000 ± 300 e-

noise: 100 e- no threshold no noise

GEM

MicroMegasM. Hauschild

Page 10: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 10

From Medipix2 to Timepix•Medipix collaboration: 17 institutes, since 1999•CMOS chip, 0.25 technology, 65000 pixels on 2cm2

•Upgrade of Medipix2: MXR version, less sensitive to temperature, finer setting of the pedestals pixel by pixel•Also new readout board/card: USB (so far 6x slower than MUROS board)

1 pixel = preamp (1)+ 2discri (2,3) + 8-bit DACs (4)+ 14-bit counter (6)

Page 11: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 11

New Medipix2/MXR under study at Saclay

Page 12: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 12

New Medipix2/MXR under study at Saclay

Noise vs. Running Time (from cold)Medipix2/MXR Chip J07

0

500

1000

1500

2000

2500

0 200 400 600 800 1000 1200

Time (s)

Ave

rage

Hits

Per

Fra

me

Page 13: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 13

New Medipix2/MXR under study at Saclay

y = 3E+07x + 323.28R2 = 0.9764

0

500

1000

1500

2000

2500

3000

3500

4000

0 0.00002 0.00004 0.00006 0.00008 0.0001 0.00012

Time Window (s)

Ave

rage

Fra

me

Hits

Average number of hits vs time, for threshold at median noise:

Slight offset

Page 14: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 14

New Medipix2/MXR under study at Saclay

Average number of hits vs time, for threshold 1 step higher

Offset larger in relative value

This means that there is correlated noise, thus room for improvement

y = 1E+07x + 73.812R2 = 0.9336

0

20

40

60

80

100

120

140

0 0.0000005 0.000001 0.0000015 0.000002 0.0000025 0.000003 0.0000035

Time Window (s)

Ave

rage

Fra

me

Hits

Page 15: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 15

From Medipix2 to Timepix•Minimize changes to limit risks•Provide a time measurement : distribute the clock (10 to 100 MHz) on every pixel (a clock per pixel was envisaged, but clock frequency is a function of power)•Columns of ring oscillators with current starving are used for this (column buffered clock)•Switchable Time-Over-Threshold (provides spectral capability) pixel by pixel.•Provide protection by a resistive layer (3 microns of hydrogenated amorphous silicon, 1010-12 .cm), equivalent to a O(100 M) resistor which discharges slowly the mesh and lowers HV locally•OK for our signals 1/C << R (C~20 fF)•TEST IN PROGRESS

Page 16: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 16

Further Developments

• Chip tiling: large(r) detector surfaces (2x2, 2x4 chips)• Through Si connectivity: avoiding bonding wires• Fast readout technology (~5 Gb/s)

RELAXD project (Dutch/Belgian) NIKHEF,Panalytical,IMEC,Canberra:

Page 17: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 17

Further development:InGrid Further development:InGrid (MESA+/Twente,NIKHEF)(MESA+/Twente,NIKHEF)

Integrating the Micromegas by Silicon wafer post-processing allows:Integrating the Micromegas by Silicon wafer post-processing allows:

to avoid Moire effects (perfect alignment) and gap variationsto avoid Moire effects (perfect alignment) and gap variations

to avoid dead areas, like frames (even hidden pillars)to avoid dead areas, like frames (even hidden pillars)

to segment the mesh (lower noise, more reliability)to segment the mesh (lower noise, more reliability)

Page 18: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 18

Results with Argon + 20% isobutane55Fe 5.9 keV line and escape line in Ar clearly visible.Unprecedented resolution: E/E = 6.5%.(FWHM=15.3%)K and K (6.5 keV) lines are separated by the fit.

More tests in progress with smaller gaps (40 successful)Study of the gas gain fluctuations in progress

Ar escape

55Fe K

55Fe K

Page 19: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 19

Aging studies in NIKHEF and SaclayJanuary 2006 at NIKHEF:Use a Xe lamp to produce photo-electrons on a meshBroke record of current in a MPGD: 150 micro-Ampere on 65 mm2 !(equivalent to 5 years of LHC at 30cm from the beam in one hour)Aging studies continue, with this Xe lamp in NIKHEF and with a X-ray gun in Saclay

Xe lamp

Micromegas detectorcollimator

UV window

Page 20: LCWS Bangalore, March 13, 2006 P. Colas, Digital TPC RD1 RD for a digital TPC The SiTPC project The digital TPC concept and advantages VLSI electronics:

LCWS Bangalore, March 13, 2006

P. Colas, Digital TPC R&D 20

Future: EUDET/SiTPC

•Kick-off meetings held at NIKHEF and DESY in January and February ’06. Clear milestones with deliverables 2006 through 2009

•CERN-Freiburg-NIKHEF-Saclay (+ soon Bonn? Bucarest?), open to newcomers. 2M€+, of which 850 k€ allocated by EC.

•TimePix design at CERN (until June 2006)

•Develop post-processings for protection and mesh integration

•Return from submit this summer, then perform tests (and iterate?)

•Build a detector (deliverable in 2 years)

•Watch the outcome of 130 nm and 90 nm technologies (CERN)