lec16 mos es
TRANSCRIPT
ECE 663
MOSFETs
ECE 663
A little bit of history..
Substrate
Channel Drain
InsulatorGate
Operation of a transistorVSG > 0 n type operation
Positive gate bias attracts electrons into channelChannel now becomes more conductive
More electrons
Source
VSD
VSG
Substrate
Channel Drain
InsulatorGate
Operation of a transistor
Transistor turns on at high gate voltageTransistor current saturates at high drain bias
Source
VSD
VSG
Substrate
Channel Drain
InsulatorGate
Source
VSD
VSG
Start with a MOS capacitor
ECE 663
MIS Diode (MOS capacitor) – Ideal
W
QuestionsWhat is the MOS capacitance? QS(S)
What are the local conditions during inversion? S,cr
How does the potential vary with position? (x)
How much inversion charge is generated at the surface? Qinv(x,S)
Add in the oxide: how does the voltage divide? S(VG), ox(VG)
How much gate voltage do you need to invert the channel? VTH
How much inversion charge is generated by the gate? Qinv(VG)
What’s the overall C-V of the MOSFET? QS(VG)
ECE 663
EC
EF
EV
Ei
Ideal MIS Diode n-type, Vappl=0
Assume Flat-band at equilibrium
qS
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02
B
gmms q
E
Ideal MIS Diode n-type, Vappl=0
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Ideal MIS Diode p-type, Vappl=0
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Ideal MIS Diode p-type, Vappl=0
02
B
gmms q
E
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Accumulation
Pulling in majority carriers at surface
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But this increases the barrier for current flow !!
n+ p n+
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Depletion
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Need CB to dip below EF. Once below by B, minority carrier density trumps the intrinsic density. Once below by 2B, it trumps the major carrier density (doping) !
Inversion
B
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Sometimes maths can help…
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P-type semiconductor Vappl0
Convention for p-type: positive if bands bend down
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Ideal MIS diode – p-type
enenenenn pkTq
pkTEqE
ikTEE
ipFiFi
0/
0/)(/)( '
epepp pkTq
pp 0/
0
kTq
CB moves towards EF if > 0 n increases
VB moves away from EF if > 0 p decreases
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Ideal MIS diode – p-type
At the semiconductor surface, = s
senn ps 0
sepp ps 0
s < 0 - accumulation of holes
s =0 - flat band
B> s >0 – depletion of holes
s =B - intrinsic concentration ns=ps=ni
s > B – Inversion (more electrons than holes)
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Surface carrier concentrationsenn ps
0sepp ps
0
EC EF
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Want to find , E-field, Capacitance
• Solve Poisson’s equation to get E field, potential based on charge density distribution(one dimension)
s
s
dxd
dxd
Ddxdk
/
1//
2
2
0
)()( ppAD npNNqx
EE
E
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• Away from the surface, = 0
• and
00 ppAD pnNN
enepnp pppp 00
)1()1( 002
2
enepqdxd
pps
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Solve Poisson’s equation:
)1()1( 002
2
enepqdxd
pps
E = -d/dx
d2/dx2 = -dE/dx = (dE/d).(-d/dx) = EdE/d
)1()1( 002
2
enepqdxd
pps
EdE/d
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• Do the integral:• LHS:
• RHS:
• Get expression for E field (d/dx):
dxdxxxdx
x 0
2
2
x x
x dxdxe0 0
,
11
2 0
002
2 epn
eqp
qkTE
p
p
s
pfield
Solve Poisson’s equation:
ECE 663
2
1
0
0
0
0 11,
e
pn
epn
Fp
p
p
p
Define:
0
20 p
s
p
sD qpqp
kTL Debye Length
Then:
0
0,2
p
p
Dfield p
nF
qLkTE
+ for > 0 and – for < 0
> 0
E > 0
< 0E < 0
ECE 663
0
0,2
p
ps
DSss p
nF
qLkTEQ
Use Gauss’ Law to find surface charge per unit area
2
1
0
0 112
sp
ps
Ds
sS epn
eqL
kTQ
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Accumulation to depletion to strong Inversion
• For negative , first term in F dominates – exponential• For small positive , second term in F dominates -
• As gets larger, second exponential gets big
10
0
p
p
pen
B = (kT/q)ln(NA/ni) = (1/)ln(pp0/√pp0np0)
(np0/pp0) = e-2B
S > 2B
Questions What is the MOS capacitance? QS(S)
What are the local conditions during inversion? S,cr
How does the potential vary with position? (x)
How much inversion charge is generated at the surface? Qinv(x,S)
Add in the oxide: how does the voltage divide? S(VG), ox(VG)
How much gate voltage do you need to invert the channel? VTH
How much inversion charge is generated by the gate? Qinv(VG)
What’s the overall C-V of the MOSFET? QS(VG)
ECE 663
Charges, fields, and potentials
• Charge on metal = induced surface charge in semiconductor
• No charge/current in insulator (ideal)metal insulsemiconductor
depletioninversion
SAnM QWqNQQ
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Electric Field Electrostatic Potential
Charges, fields, and potentials
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Electric Field Electrostatic Potential
Depletion Region
11
2 0
002
2 epn
eqp
qkTE
p
p
s
pfield
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Electric Field Electrostatic Potential
= s(1-x/W)2
Wmax = 2s(2B)/qNA
B = (kT/q)ln(NA/ni)
Depletion Region
Questions What is the MOS capacitance? QS(S)
What are the local conditions during inversion? S,cr
How does the potential vary with position? (x)
How much inversion charge is generated at the surface? Qinv(x,S)
Add in the oxide: how does the voltage divide? S(VG), ox(VG)
How much gate voltage do you need to invert the channel? VTH
How much inversion charge is generated by the gate? Qinv(VG)
What’s the overall C-V of the MOSFET? QS(VG)
Couldn’t we just solve
this exactly?
U =
US = S
UB = B
Exact Solution
d/dx = -(2kT/qLD)F(B,np0/pp0)
dU/F(U) = x/LD
U
US
F(U) = [eUB(e-U-1+U)-e-UB (eU-1-U)]1/2
Exact Solution
dU’/F(U’,UB) = x/LDU
US
F(U,UB) = [eUB(e-U-1+U) + e-UB (eU-1-U)]1/2
= qni[eUB(e-U-1) – e-UB(eU-1)]
Exact Solution
NA = 1.67 x 1015
Qinv ~ 1/(x+x0)
x0 ~ LD . factor
Questions What is the MOS capacitance? QS(S)
What are the local conditions during inversion? S,cr
How does the potential vary with position? (x)
How much inversion charge is generated at the surface? Qinv(x,S)
Add in the oxide: how does the voltage divide? S(VG), ox(VG)
How much gate voltage do you need to invert the channel? VTH
How much inversion charge is generated by the gate? Qinv(VG)
What’s the overall C-V of the MOSFET? QS(VG)
ECE 663
Threshold Voltage for Strong Inversion
• Total voltage across MOS structure= voltage across dielectric plus s
Bi
SSiT C
QVinversionstrongV 2)_(
)2(2)(2)( max BAsA
ssAAS qN
qNinvqNWqNSIQ
Bi
BAsT C
qNV
2
)2(2
oxVi/tox = ss/(W/2) Before Inversion
After inversion there is a discontinuity in D due to surface Qinv
Vox (at threshold) = s(2B)/(Wmax/2)Ci =
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Notice Boundary Condition !!
Bi
BAsT C
qNV
2
)2(2
Local Potential vs Gate voltage VG = Vfb + s + (stox/ox) √(2kTNA/0s)[s + es-2B)]1/2
Initially, all voltage drops across channel (blue curve). Above threshold, channel potential stays pinned to 2B, varying only logarithmically, so that most of the gate voltage drops across the oxide (red curve).
oxs
Look at Effective charge width
Initially, a fast increasing channel potential drops across increasing depletion widthEventually, a constant potential drops across a decreasing inversion layer width, so field keeps increasing and thus matches increasing field in oxide
~Wdm/2
~tinv
Questions What is the MOS capacitance? QS(S)
What are the local conditions during inversion? S,cr
How does the potential vary with position? (x)
How much inversion charge is generated at the surface? Qinv(x,S)
Add in the oxide: how does the voltage divide? S(VG), ox(VG)
How much gate voltage do you need to invert the channel? VTH
How much inversion charge is generated by the gate? Qinv(VG)
What’s the overall C-V of the MOSFET? QS(VG)
Charge vs Local Potential Qs ≈ √(20skTNA)[s + es-2B)]1/2
Beyond threshold, all charge goes to inversion layer
How do we get the curvatures?
EXACTAdd other terms and keepLeading term
NEW
Inversion Charge vs Gate voltage Q ~ es-2B), s
- 2B ~ log(VG-VT)Exponent of a logarithm gives a linear variation of Qinv with VG
Qinv = -Cox(VG-VT)
Why Cox?
Questions What is the MOS capacitance? QS(S)
What are the local conditions during inversion? S,cr
How does the potential vary with position? (x)
How much inversion charge is generated at the surface? Qinv(x,S)
Add in the oxide: how does the voltage divide? S(VG), ox(VG)
How much gate voltage do you need to invert the channel? VTH
How much inversion charge is generated by the gate? Qinv(VG)
What’s the overall C-V of the MOSFET? QS(VG)
ECE 663
Capacitance
0
0
0
0
,
11
2
p
pS
p
p
D
SSD
pn
F
epne
LQC
ss
For s=0 (Flat Band):
D
SD L
bandflatC )_(
Expand exponentials….. ........!3!2
132
xxxe x
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Capacitance of whole structure
• Two capacitors in series:
Ci - insulator
CD - Depletion
Di CCC111 OR
Di
Di
CCCCC
dC i
i
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Capacitance vs Voltage
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Flat Band Capacitance
• Negative voltage = accumulation – C~Ci
• Zero voltage – Flat Band
i
Ds
i
si
Dis
D
siDiFB
LdLd
LdCCC
11111
FBCCV 00
D
iFB Ld
Cs
i
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CV• As voltage is increased, C goes through
minimum (weak inversion) where d/dQ is fairly flat
• C will increase with onset of strong inversion
• Capacitance is an AC measurement
• Only increases when AC period long wrt minority carrier lifetime
• At “high” frequency, carriers can’t keep up – don’t see increased capacitance with voltage
• For Si MOS, “high” frequency = 10-100 Hz
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CV Curves – Ideal MOS Capacitor
max
'min Wd
Cs
i
i
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But how can we operate gate attoday’s clock frequency (~ 2
GHz!)if we can’t generate minoritycarriers fast enough (> 100
Hz) ?
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MOScap vs MOSFET
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Substrate
DrainInsulator
Gate
Source Channel
Substrate
InsulatorGate
Channel
Minority carriers generated byRG, over minority carrier lifetime~ 100sSo Cinv can be << Cox if fast gateswitching (~ GHz)
Majority carriers pulled infrom contacts (fast !!)
Cinv = Cox
MOScap vs MOSFET
ECE 663
Example Metal-SiO2-Si
• NA = 1017/cm3
• At room temp kT/q = 0.026V• ni = 9.65x109/cm3
s = 11.9x1.85x10-14 F/cm
mcmW
XxxXxx
NqnNkT
WA
i
As
1.010
10106.11065.910ln026.01085.89.11ln4
5max
1719
91714
2max
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Example Metal-SiO2-Si
• d=50 nm thick oxide=10-5 cm i=3.9x8.85x10-14 F/cm
Voltsinvx
xxxCWqNV
CC
cmFxx
xxWd
C
Voltsx
xxnN
qkTinv
cmFxxxd
C
sBi
ATH
i
i
i
ABs
ii
s
i
07.184.023.0)(109.6
1010106.12
13.0
/101.9109.119.3105
1085.89.3
84.01065.9
10ln026.02ln22)(
/109.610
1085.89.3
7
51719max
'min
2857
14
max
'min
9
17
275
14
ECE 663
Real MIS Diode: Metal(poly)-Si-SiO2 MOS
• Work functions of gate and semiconductor are NOT the same
• Oxides are not perfect– Trapped, interface, mobile charges– Tunneling
• All of these will effect the CV characteristic and threshold voltage
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Band bending due to work function difference
msFBV
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Work Function Difference
• qs=semiconductor work function = difference between vacuum and Fermi level
• qm=metal work function• qms=(qm- qs)• For Al, qm=4.1 eV• n+ polysilicon qs=4.05 eV• p+ polysilicon qs=5.05 eV• qms varies over a wide range depending
on doping
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SiO2-Si Interface Charges
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Standard nomenclature for Oxide charges:
QM=Mobile charges (Na+/K+) – can causeunstable threshold shifts – cleanlinesshas eliminated this issue
QOT=Oxide trapped charge – Can be anywherein the oxide layer. Caused by brokenSi-O bonds – caused by radiation damagee.g. alpha particles, plasma processes,hot carriers, EPROM
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QF= Fixed oxide charge – positive charge layernear (~2mm) Caused by incompleteoxidation of Si atoms(dangling bonds)Does not change with applied voltage
QIT=Interface trapped charge. Similar in originto QF but at interface. Can be pos, neg,or neutral. Traps e- and h during deviceoperation. Density of QIT and QF usuallycorrelated-similar mechanisms. Cureis H anneal at the end of the process.
Oxide charges measured with C-V methods
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Effect of Fixed Oxide Charges
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Surface Recombination
Lattice periodicity broken at surface/interface – mid-gap E levelsCarriers generated-recombined per unit area
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Interface Trapped Charge - QIT
• Surface states – R-G centers caused by disruption of lattice periodicity at surface
• Trap levels distributed in band gap, with Fermi-type distributed:
• Ionization and polarity will depend on applied voltage (above or below Fermi level
• Frequency dependent capacitance due to surface recombination lifetime compared with measurement frequency
• Effect is to distort CV curve depending on frequency• Can be passivated w/H anneal – 1010/cm2 in Si/SiO2 system
kTEEDD
DDFegN
N/)(1
1
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Effect of Interface trapped charge on C-V curve
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a – idealb – lateral shift – Q oxide, msc – distorted by QIT
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Non-Ideal MOS capacitor C-V curves
• Work function difference and oxide charges shift CV curve in voltage from ideal case
• CV shift changes threshold voltage
• Mobile ionic charges can change threshold voltage as a function of time – reliability problems
• Interface Trapped Charge distorts CV curve – frequency dependent capacitance
• Interface state density can be reduced by H annealing in Si-Si02
• Other gate insulator materials tend to have much higher interface state densities
ECE 663
All of the above….
• For the three types of oxide charges the CV curve is shifted by the voltage on the capacitor Q/C
• When work function differences and oxide charges are present, the flat band voltage shift is:
d
iechoxideFB dxxx
dCV
0arg_ )(11
i
otmfmsFB C
QQQV
Some important equations in the inversion regime (Depth direction)
VT = ms + 2B + ox
Wdm = [2S(2B)/qNA]
Qinv = Cox(VG - VT)
ox = Qs/Cox
Qs = qNAWdm
VT = ms + 2B + ([4SBqNA] - Qf + Qm + Qot)/Cox
Substrate
Channel Drain
InsulatorGate
Source
x