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Flip- Flops A basic digital memory circuit

It has 2 stable states

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ii) R=1& S=0& .he .e .a t to store a 0 i the R-S latch# Q=0& 1=Qiii) R=0& S=1& .he .e .a t to store a 1 i the latch# Q=1& 0=Qi") R=1& S=1/ For+i e i p*ts

S R Q Q

0 0 Keep state

0 1 0 1

1 0 1 0

1 1 Unstablecondition

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( R-S latch )

R=0

0

Q

1

S=10

Q

Q

R Q

S

Q

(Set)

(Reset)

NOR gates ( R-S latch )

Property of a NOR gate

A=0

B

B

B B A =+

Whe ts li!e a i "erter#Whe o e $%P is 1& the O%P=0#'iffere t $%P co itio s for R-S latchi) R=S=0& c*rre t $%P is store i efi itely

( +eco,es casca e of i "erters)ol

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5

ross-co*ple NOR R

Q

S

Q

ross-co*ple NAN'R

S

Q

Q

ol State R=S=0 ol State R=S=1

Q

QR=1& S=1

R=0& S=0

For+i e $%Ps

2.o i,ple,e tatio s for R-S latch

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3) 2he '-4atch

R-S4atch

'S

R R 1

S1

Q

l! Q

loc!e 4atch(le"el-se siti"e cloc! latch)

5 see ter,i ology efi e later#

'=1& S=1& R=0 Q=1&'=0& S=0& R=1 Q=0&

l!=0 R 1&S1=0 (hol state)

0=Q

1=Q

l!=1

l!=1clk D Q Q

positive edge 0 0 1

positive edge 1 1 0

other ise 0 or 1

Keepprevious state

Keepprevious state

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3) 2he 2-4atch

clk T Q Q

positive edge 0 1 0

positive edge 1 0 1

other ise 0 or 1

Keepprevious state

Keepprevious state

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!

6) 2he 7-8 4atch 5 Propose to get ri of the for+i e $%P pro+le, of R-S i) 7=1& 8=0 (a) 4et Q=1& R=0&S=0

ol state of R-S Q=1&1=Q 0=Q

0=Q0=

Q

ii) 7=0& 8=1 Q=0& *si g a si,ilar a alysisiii) 7=8=0 ol state

i") 7=8=1& s*ppose Q=1& =0 R=1& S=0 Q=0& =1 S=1& R=0 Q=1& =02his type of toggli g co ti *es as lo g as 7=8=1& a the latchis e a+le ( 48=1 +elo. )

Q

QQ

(+) 4et Q=0& & R=0& S=1 Q=1&1=Q

R

R-S

Q

QS

R Q

1

Q 0 1 0 1

1 0 1 0

48

8

7

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"

J K Q Q0 0 Keep state

0 1 0 1

1 0 1 0

1 1 #oggle ith cloc$s risingedge

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Latch classification with respect to response to control signal2er,i ology Note that the ter,i ology +elo. applies to all types of latches

R-S& '& 7-8& 2& etc#& tho*gh the e9a,ples are gi"e for the R-S latch#

i) 2ra spare t 4atch O%P respo s to latch $%Ps .itho*t a y e a+le or cloc! sig al#R Q

S

Q

loc!

Fi9e fre:*e cy alter ati g 1 a 0 sig alii) loc!e or 4e"el-Se siti"e 4atch

Q

Q

S

loc! or e +

R O%P respo s to $%Ps o ly .he e + orcloc! is at a pre- eter,i e le"el (highor lo. 5 $ this e9a,ple& it is igh)

R

SQQ

Sy,+ol

R

SQQ

48 (high e a+le)

Sy,+ol or R S

QQ

48 (lo. e a+le)

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iii) ; ge-2riggere Flip-Flop (FF) or si,ply Flip-FlopO%P .ill respo to $%Ps o ly at either (a) the positi"e or risi g e ge of the e +%cloc! sig al (positi"e

e ge-triggere FF)& or

(+) the egati"e or falli g e ge of the e +%cloc! sig al ( egati"ee ge-triggere FF)#

loc!

O%P respo se perio for a positi"ee ge-triggereFF#

O%P respo se perio for a

egati"e

e ge-triggereFF

O%P respo se perio for a

$< -e a+le%cloc!

le"el-se siti"elatch

O%P resp# perio for a lo.-e a+le%cloc! le"el se siti"e latch

Sy,+ol

R S

QQ

48

Sy,+ol

R S

QQ

48

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12

Setup Times and Hold Time of FFs and Latches Ass*,e& positi"e e ge-triggere '-FF

2 ol relates to propagatio elayof a other part of circ*it#

'

48

2 Set*p relates to propagatio elays of

"ario*s gates i the FF#2he high poi t of the 48 eter,i es the positi"e e ge>s arri"al# $f egati"e e ge-triggere

48

'

2 ol2 Set*p

Negati"e e ge arri"al $f '-4atch is high-le"el se siti"e 2 set*p a 2 hol ha"e to +e aro* the egati"e e ge of cloc! (,ore specifically& .he the cloc! +egi s to go lo.)& si,ilar to egati"e e ge-triggere #$f '-4atch is lo.-le"el se siti"e 2

set*p a 2

hol ha"e to +e aro* the positi"e

e ge of cloc!& si,ilar to positi"e e ge-triggere #

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Sol*tio @ ; ge-2riggere FF

Q

Q

R

S

'

l!=1

D

D

0

0

ol s ' .hecloc! goes lo.

ol s .hecloc! goes lo.

DQ ='

DQ =

R

S

'

l!=0

D

D

'

Ass*,e '=1

'=1=SQ=1&

R D == 0

0=Q

48

Q

Q

R

S

'

l!=0

D

'

0

0

Q respo s toi ter al S sig al/ respo s to i ter al R sig al#

Q

Whe 48 is 1 ' $%P isi ter ally sa,ple +*toes ot appear at the O%P#

O%P is hel (cha gi g ' oes otca*se a y cha ge i i ter alsig als i the FF or i its o*tp*t)

O%P appears (Q=')

D

D

'

'

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15

Characteristic !uations of Latches"FFs

2he e9t O%P Q efi e i ter,s of the c*rre t O%P Q a the $%P#(FF%4atch is the si,plest possi+le se:*e tial c!t#)

1) R-S 4atch5 2r*th 2a+le

S(t) R(t) Q(t) Q = Q( t ) 0 0 0 0

0 0 1 1 0 1 0 0 0 1 1 0 1 0 0 1 1 0 1 1

1 1 0 9 1 1 1 9

al*es at ti,e t

ol

Reset

Set

For+i e

Q(t)CSR 00 01 11 10 0 0 0 9 1

1 1 0 9 1

Q = S Q( haracteristic e:*atio )

R

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Si,ilarly haracteristic ;:*atio s of

@) 7-8& Q = Q 7#D) '-FF& Q = '3) 2oggle FF%4atch Q = 2 Q or 2-FF % 4atch

K Q

Q T

Whe e"er $%P 2 is high&the FF .ill toggle& i#e#& Q = #Whe 2=0& Q =Q#

Q

Of co*rse& these characteristic e:*atio s co,e i to play o ly.he the FF%4atch is e a+le #

Q

Q2Sy,+ol

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1%

;9citatio 2a+le

5 Re"erse 2r*th 2a+le

5 What the i p*ts to FFs sho*l +e for gi"e o*tp*ttra sitio s (Q Q )

Q Q R S 7 8 2 '0 0 9 0 0 9 0 00 1 0 1 1 9 1 11 0 1 0 9 1 1 01 1 0 9 9 0 0 1

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1!

5 o "ersio +et.ee FFs;9a,ple 7-8 to '

'-FF

'

0 19 9

0 1

0

1

Q

'9 91 0

'Q

D

O%P f* ctio = 7 7='

F* ctio = 8 8= D

?ap the '&Q i p*t co,+i atio to a Q Q tra sitioa the ,ap this to 7-8 e9citatio re:*ire #

2h*s& .he '=1& Q=0& Q =1 7&8 = 1&9 '=0& Q=0& Q =0 7&8 = 0&9 '=1& Q=1& Q =1 7&8 = 9&0

'=0& Q=1& Q =0 7&8 = 9&1#

2his sho*l +eha"e li!e a '-FF#

7

8

QQ'

48

4ogic

7

8

Q

Q'

48

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1"

;9a,ple @ ' 7-8

;9citatio 2a+le for '

Q Q '0 0 00 1 11 0 01 1 1

7 8 Q Q0 0 0 00 0 1 10 1 0 00 1 1 01 0 0 1

1 0 1 11 1 0 11 1 1 0

Q

Q

'7

8

48

22 for 7-8 78 Q

0

1

00 01 11 10

0 0 1 1

1 0 0 1

F* ctio is

Q

Q

'

48

78

Q

Q

7-8 FF%4atchQ K Q J D +=

Q J

QK

4ogic

sho*l .or! li!e a 7-8

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Sy thesis (D-Bit Ep o* ter)

000 111

001 110

010 101

011 100

Reset

(a) State 2ra sitio 'iagra,

B A B A 2 2B 2A0 0 0 0 0 1 0 0 10 0 1 0 1 0 0 1 10 1 0 0 1 1 0 0 1

0 1 1 1 0 0 1 1 11 0 0 1 0 1 0 0 11 0 1 1 1 0 0 1 11 1 0 1 1 1 0 0 11 1 1 0 0 0 1 1 1

$ p*t

Prese t State

O*tp*t Ne9t State

2oggle Flip-Flop$ p*ts

(+) State 2ra sitio 2a+leFF ;9citatio 2a+le Re"isite

Q Q R S 7 8 2 '0 0 9 0 0 9 0 00 1 0 1 1 9 1 11 0 1 0 9 1 1 0

1 1 0 9 9 0 0 1;9citatio ta+le for R-S& 7-8& 2& a ' Flip-Flops

(What e9t state.ill +e gi"e thec*rre t state#)

State 2ra sitio 'iagra, a 2a+le for a D-+it Bi ary Ep- o* ter

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Fro, e9citatio ta+le for FF i p*ts& get 8-,ap for the FF i p*ts#

1 1 1 11 1 1 1

00 01 11 10

01

B

A

2A=1

0 0 0 00 1 1 0

00 01 11 10

01

AB

2 =AB

0 0 0 01 1 1 1

00 01 11 1001

AB

2B=A

8-,aps for Ep- o* ter Esi g 2oggleFlip-Flops#

O+tai logic e9pr# for FF $%Ps (as f* ctio s of c*rre t state +its A&B& & --- A=QA& B=QB& =Q ) a reali e the co* ter

* i h ? l 9 S * i (N * i" Bi O* * )

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o* ters .ith ?ore o,ple9 Se:*e ci g (No - o sec*ti"e Bi ary O*tp*ts)

000 110

010 101

011

State 2ra sitio 'iagra,

B A B A0 0 0 0 1 0

0 0 1 9 9 90 1 0 0 1 10 1 1 1 0 11 0 0 9 9 91 0 1 1 1 0

1 1 0 0 0 01 1 1 9 9 9

Prese t State Ne9t State

State 2ra sitio 2a+le$,ple,e tatio Esi g 7-8 FFs

B A B A 7 8 7B 8B 7A 8A0 0 0 0 1 0 0 9 1 9 0 90 0 1 9 9 9 9 9 9 9 9 90 1 0 0 1 1 0 9 9 0 1 90 1 1 1 0 1 1 9 9 1 9 01 0 0 9 9 9 9 9 9 9 9 91 0 1 1 1 0 9 0 1 9 9 11 1 0 0 0 0 9 1 9 1 0 9

1 1 1 9 9 9 9 9 9 9 9 9

Prese tState

Ne9tState

Re,appe Ne9tState

State 2ra sitio 2a+le a Re,appe Ne9t-State F* ctio s

Q Q 7 8

0 0 0 90 1 1 91 0 9 11 1 9 0

Q K Q J Q +=+

7-8 Flip-Flop ;9citatio 2a+le

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Ne9t State F* ctio s

C B J

J

A J

A

B

C

=

=

=

1

C K

C A K

A K

A

B

C

=

+=

=

0 0 9 99 1 9 9

00 01 11 1001

BA

79 9 1 99 9 9 0

BA 00 01 11 10

01

8

1 9 9 99 9 9 1

BA 00 01 11 10

0

17B

9 0 1 99 1 9 9

BA 00 01 11 10

0

18 B

0 1 0 99 9 9 9

00 01 11 1001

BA

7A 9 9 9 99 0 9 1

00 01 11 1001

BA

8 A

Re,appe 8-?aps for 7-8 $,ple,e tatio #

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Registers

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2%

Registers A flip-flop stores o e +it of i for,atio Whe a set of n flip-flops is used to store n +its of ata& .e referto these flip-flops as a register

G o,,o register *sages i cl* e ol i g a ata "al*e o*tp*t fro, a arith,etic circ*it ol i g a co* t "al*e i a co* ter circ*it

A co,,o cloc! sig al is typically *se for each flip-flop i a register

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2!

Shift register A register that pro"i es the a+ility

to shift itsco te ts +y a si gle +it

G ?ay +e to the right or left (or possi+ly +oth)

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Parallel&access shift register 'ata tra sfer i co,p*ter syste,s is a co,,of* ctio

G $f the tra sfer is n-bits at a time, the transfer is said to bein

parallel G $f the tra sfer is 1-bit at a time, the transfer is said to be

serial 2o tra sfer ata serially& ata is loa e i to aregister i parallel (i o e cloc! cycle) a theshifte o*t o e +it at a ti,e

G Parallel-to-serial ata co "ersio $f +its are recei"e serially& after n cloc c!cles theco te ts of a register ca +e accesse i parallel asa n-bit item

G Serial-to-parallel co "ersio

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Counters Special p*rpose arith,etic circ*its *se for

the p*rpose of co* ti g G 'esig circ*its that ca i cre,e t or ecre,e t aco* t +y 1 o* ter circ*its ser"er ,a y p*rposes

G o* t occ*rre ces of certai e"e ts G

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'p&counter with T flip&flops

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3%