lecture 16 mosfet (cont’d) - alexandria...

Lecture 16

MOSFET (cont’d)

MOSFET 1-1 Sunday 3/12/2017

Outline Continue Enhancement-type MOSFET Characteristics DC Biasing Circuits and Examples

Introduction to BJT-FET Combination Circuits Combination of BJT and FET devices in a circuit

MOSFET 1-2

Enhancement-Type MOSFET (Quick Review)

MOSFET 1-3

MOSFET is also known as insulated gate FET (IGFET)

Enhancement-Type MOSFET Symbol

MOSFET 1-4

n-channel E-Type MOSFET

p-channel E-Type MOSFET

Enhancement-Type MOSFET Characteristic

MOSFET 1-5

TGSTGSD VVVVkI for 2

2)(

)(

TonGS

onD

VV

Ik

Enhancement-Type MOSFET Characteristic

MOSFET 1-6

2

22

)(

)(mA/V 278.0

28

10

m

VV

Ik

TonGS

onD

22278.0 GSD VmI

Enhancement-Type MOSFET Transfer Curve

MOSFET 1-7

Plotting all the VGS(on) from the characteristic curve, the transfer curve can be obtained:

22278.0 GSD VmI

Enhancement-Type MOSFET Important Relationships

MOSFET 1-8

2

T)on(GS

)on(D

TGS

2

TGSD

SD

G

VV

Ik

VVfor VVkI

II

0I

Enhancement-Type MOSFET DC Biasing

Fixed-bias, self-bias and many more bias configuration can be applied to enhancement-type MOSFET

Two most popular MOSFET biasing configurations Feedback-bias configuration

Voltage-divider bias configuration

MOSFET 1-9

Feedback-Bias Configuration

MOSFET 1-10

As the situation IG = 0 still applied, the resistor RG will be ignored resulting in the drain and gate terminal to have the same voltage (VG = VD)

Example (1)

Determine VGSQ and IDQ

for the E-Type MOSFET shown in the figure

MOSFET 1-11

Example (1) – Solution

MOSFET 1-12

For the enhancement-type MOSFET’s equation, the value of k have to be obtained first:

2

2 2

T)on(GS

)on(DmA/V 24.0

38

m6

VV

Ik

the ID equation for the device:

3for 324.02

GSGSD VVmI

12 2G D DV V I

Since IG equals zero, then

Inserting the VGS equation into the device equation:

12 2 0 12 2GS G S D DV V V I I

Example (1) – Solution Substituting the ID equation for the MOSFET

MOSFET 1-13

2 2 2

2 2

2

0.24 3 0.24 12 2 3 0.24 9 2

0.24 81 36 4 19.44 8.64 960

960 9.64 19.44 0

D GS D D

D D D D

D D

I m V m I m I

m I I m I I

I I m

Solving the equation, we get:

Enhancement-type MOSFET doesn’t have limitation for saturation current (IDSS), the true value of ID is the smaller one

mA 2.79 andmA 25.7

)960(2

)44.19)(960(4)64.9(64.9

2

422

m

a

acbbID

2.79 mA 12 2 6.42 VQD GS DI and V I

(since VGS should be greater than VT)


MOSFET 1-14

For graphical approach, several plot points have to be obtained first:

3for 324.02

GSGSD VVmI

VGS ID

3 V 0 mA

4 V 0.24 mA

5 V 0.96 mA

6 V 2.16 mA

7 V 3.84 mA

8 V 6 mA

For the bias line, only two plot points are required:

12 2GS DV I

VGS ID

12 V 0 mA

0 V 6 mA


MOSFET 1-15

Plots all the device transfer curve and device representation points:

VT

Voltage-Divider Bias Configuration

MOSFET 1-16

Basically, the configuration is the same as in depletion-type MOSFET, JFET or BJT except the change of device to the enhancement-type MOSFET

All the calculation would be the same except for the transfer curve of enhancement-type MOSFET is different from those depletion-type MOSFET and JFET

Determine IDQ and VGSQ

Example (2)

MOSFET 1-17


MOSFET 1-18

Determining VG:

For VS:

So, for VGS:

V 18M22M18

M18 *40VG

DS IV 31082.0

DSGGS IVVV 31082.018

2

22

)(

)(mA/V 12.0

510

3

m

VV

Ik

TonGS

onD

Inserting the circuit representation equation into the device equation:

5for 51012.023

GSGSD VVI

2 23 3

2 3

0.12 10 5 0.12 10 18 0.82 5

80.69 3.56 20.28 10 0

D GS D

D D

I V I

I I


MOSFET 1-19

Solving the equation, we get:

mA 6.72 andmA 4.37

)69.80(2

)m28.20)(69.80(4)56.3(56.3

a2

ac4bbI

22

D

3

18 0.82

For 6.72 mA, 18 0.82 10 (6.72 ) 12.49 V

GS D

D GS

V I

I V m

We take the smaller value: mA 6.72DI

V 49.12

mA 72.6

Q

Q

GS

D

V

I

The Q-point for MOSFET is defined by


MOSFET 1-20

For graphical approach, several plot points have to be obtained first:

For the bias line, only two plot points are required:

VGS ID

5 V 0 mA

10 V 3 mA

15 V 12 mA

20 V 27 mA

25 V 48 mA

30 V 75 mA

VGS ID

18 V 0 mA

0 V 21.95 mA

5for 512.02

GSGSD VVmI DGS kIV 82.018


MOSFET 1-21

Plots all the device transfer curve and device representation points:

p-Channel Enhancement-Type MOSFET

MOSFET 1-22

It is the complement to n-channel enhancement-type MOSFET

All the current flow will be in the opposite direction

Although the current direction is reverse, however the current equation are still the same (just like in JFET and depletion-type MOSFET)

Construction Transfer Curve Characteristics

Comparisons between MOSFETs and BJTs

FET Small AC Signal Model 1-23

MOSFETs BJTs

Pros Cons

High input impedance Low input impedance

Minimal drive power, no DC current required at gate

Large drive power, continuous DC current required at base

Simple drive circuits Complex drive circuits as large +ve and –ve currents are involved

Devices can be easily paralleled Devices cannot be easily paralleled

Max. operating temp. ~ 200 oC , less temp. sensitive

Max. operating temp. ~ 150 oC , more sensitive to temp

Very low switching losses Medium to high switching losses (depends on trade-off with conduction losses)

High switching speed Lower switching speed

Cons Pros

High on-resistance Low on-resistance

Low transconductance High transconductance

BJT-FET Combination Circuits

Combination of BJT and FET device in a circuit Innovative circuits that take some advantages of FETs,

such as the high-input-impedance and low input power operation, and some merits of BJTs, such as high output current-driving capability

How to analyze such circuits Firstly, recognize both of the devices and their current

flows

To make the calculation simple and easier to view, transform the circuit into the equivalent form to avoid complexity

List down all the important relationships that involve for both of the devices

Start with approaching the device that is closer to the ground (bottom device)

MOSFET 1-24

Example (3)

MOSFET 1-25

Determine VD and VC


MOSFET 1-26

We know that for the JFET device, IG = 0 making the resistor RG = 1 MΩ useless and can be remove from the circuit

By analyzing the circuit, we notice that the configuration is a voltage-divider bias for both the JFET and BJT device

Due to involvement of BJT, we have to check βRE ≥ 10R2 to use the approximate analysis

As for βRE = (180)(1.6k) = 288k and 10R2 = 10(24k) = 240k, situation βRE ≥ 10R2 is satisfied and we can use approximate analysis for this configuration

Obtaining the ETH:

V 62.38224

24*16ETH


MOSFET 1-27

ETH = 3.62 V

Transforming the circuit into its equivalent form:

ETH = 3.62 V


MOSFET 1-28

By approaching BJT (bottom device) first, we know VBE = 0.7 active operating mode

From earlier calculation, we got ETH = VB = 3.62 V

Obtaining VE:

Obtaining IB from VBE = 0.7:

1

181 1.6 289.6

E E E B E

B B

V I R I R

I I

A 08.10I

kI6.28962.37.0

7.0VVV

B

B

EBBE


MOSFET 1-29

From the circuit, IB is not really important but IC is very important because

IC = IS = ID

As for that, obtain IC:

Knowing the value of ID, VD can be obtained:

mA 81.1)08.10)(180( BC II

V 11.11107.216 3 DD IV

ETH = 3.62 V


MOSFET 1-30

From the configuration, we notice that VS = VC

By obtaining VGS for the JFET, the value of VS can be achieved:

V 29.7

6

62.311281.1

1

62.362.3

2

2

C

C

P

GSDSSD

CSSGGS

V

Vmm

V

VII

VVVVV

ETH = 3.62 V

Conclusion: FET Advantages

FETs provide:

Excellent voltage gain

High input impedance

Low-power consumption

Good frequency range

MOSFET 1-31

MOSFET 1-32

Lecture Summary

Covered material

Continue Enhancement-type MOSFET Characteristics Biasing Circuits and Examples

Introduction to BJT-FET Combination Circuits

Material to be covered next lecture

Small AC Signal Analysis for FETs

lecture 16 mosfet (cont’d) - alexandria...

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