lecture #16 - multiplexers, decoders and encoders

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ECE 301 – Digital Electronics Multiplexers, Decoders and Encoders (Lecture #16) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and were used with permission from Cengage Learning.

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Page 1: Lecture #16 - Multiplexers, Decoders and Encoders

ECE 301 – Digital Electronics

Multiplexers, Decoders and Encoders

(Lecture #16)

The slides included herein were taken from the materials accompanying

Fundamentals of Logic Design, 6th Edition, by Roth and Kinney,

and were used with permission from Cengage Learning.

Page 2: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 2

Multiplexers

Page 3: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 3

Multiplexers

● A multiplexer has

– 2n data inputs

– n control inputs

– 1 output

● A multiplexer routes (or connects) the selected data input to the output.

– The value of the control inputs determines the data input that is selected.

Page 4: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 4

Multiplexers

Z = A′.I0 + A.I

1

Datainputs

Controlinput

Page 5: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 5

Multiplexers

Z = A′.B'.I0 + A'.B.I

1 + A.B'.I

2 + A.B.I

3

MSB LSB

A B Z

0 0 I0

0 1 I1

1 0 I2

1 1 I321 20

m0 = A'.B'

m1 = A'.B

m2 = A.B'

m3 = A.B

Page 6: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 6

Multiplexers

Z = A′.B'.C'.I0 + A'.B'.C.I

1 + A'.B.C'.I

2 + A'.B.C.I

3 +

A.B'.C'.I0 + A.B'.C.I

1 + A'.B.C'.I

2 + A.B.C.I

3

MSB LSB

A B C Z

0 0 0 I0

0 0 1 I1

0 1 0 I2

0 1 1 I3

1 0 0 I4

1 0 1 I5

1 1 0 I6

1 1 1 I72220

m0

m1

m2

m3

m4

m5

m6

m7

Page 7: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 7

Multiplexers

2n-120

Z = ΣΣΣΣ mi.Ii

Page 8: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 8

Decoders

Page 9: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 9

Decoders● A decoder has

– n inputs

– 2n outputs

● A decoder selects one of 2n outputs by decoding the binary value on the n inputs.

● The decoder generates all of the minterms of the n input variables.

– Exactly one output will be active for each combination of the inputs.

What does “active” mean?

Page 10: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 10

Decoders

A B Z0 Z1 Z2 Z3

0 0 1 0 0 0

0 1 0 1 0 0

1 0 0 0 1 0

1 1 0 0 0 1

msb

2-to-4Decoder

A

B

Z0

Z1

Z2

Z3

active-high output

Zi = mi

m0

m1

m2

m3

Page 11: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 11

Decoders

A B Z0 Z1 Z2 Z3

0 0 0 1 1 1

0 1 1 0 1 1

1 0 1 1 0 1

1 1 1 1 1 0

msb

active-low output

Zi = (mi)' = Mi

M0

M1

M2

M3

A

B

Z0

Z1

Z2

Z3

2-to-4Decoder

Page 12: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 12

Decodersmsb

3-to-8Decoder

Page 13: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 13

Decoder with Enable

En A B Z0 Z1 Z2 Z3

1 0 0 1 0 0 0

1 0 1 0 1 0 0

1 1 0 0 0 1 0

1 1 1 0 0 0 1

0 x x 0 0 0 0

enabled

disabled

active-high enable

En

2-to-4Decoder

withEnable

A Z0

Z1

Z2

Z3

B

Page 14: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 14

Decoder with Enable

En A B Z0 Z1 Z2 Z3

0 0 0 1 0 0 0

0 0 1 0 1 0 0

0 1 0 0 0 1 0

0 1 1 0 0 0 1

1 x x 0 0 0 0

enabled

disabled

active-low enable

En

2-to-4Decoder

withEnable

A Z0

Z1

Z2

Z3

B

Page 15: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 15

Encoders

Page 16: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 16

Encoders● An encoder has

– 2n inputs

– n outputs

● Outputs the binary value of the selected (or active) input.

● Performs the inverse operation of a decoder.

● Issues

– What if more than one input is active?

– What if no inputs are active?

Page 17: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 17

Encoders

Y0 Y1 Y2 Y3 A B

1 0 0 0 0 0

0 1 0 0 0 1

0 0 1 0 1 0

0 0 0 1 1 1

4-to-2Encoder

A

B

Y0

Y1

Y2

Y3

Page 18: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 18

Priority Encoders

● If more than one input is active, the higher-order input has priority over the lower-order input.

– The higher value is encoded on the output

● A valid indicator, d, is included to indicate whether or not the output is valid.

– Output is invalid when no inputs are active

● d = 0

– Output is valid when at least one input is active

● d = 1Why is the valid indicator needed?

Page 19: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 19

Priority Encoders

Valid bit

msb

3-to-8Priority

Encoder

Page 20: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 20

Circuit Design using Multiplexers

Page 21: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 21

Using a 2n-input Multiplexer● Use a 2n-input multiplexer to realize a logic circuit for

a function with 2n minterms.

– n = # of control inputs = # of variables in the function

● Each minterm of the function can be mapped to a data input of the multiplexer.

● For each row in the truth table, for the function, where the output is 1, set the corresponding data input of the multiplexer to 1.

– That is, for each minterm in the minterm expansion of the function, set the corresponding input of the multiplexer to 1.

● Set the remaining inputs of the multiplexer to 0.

Page 22: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 22

Using an 2n-input Mux

Example:

Using an 8-to-1 multiplexer, design a logic circuit to realize the following Boolean function

F(A,B,C) = Σm(2, 3, 5, 6, 7)

Page 23: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 23

Using an 2n-input Mux

Example:

Using an 8-to-1 multiplexer, design a logic circuit to realize the following Boolean function

F(A,B,C) = Σm(1, 2, 4)

Page 24: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 24

Using an 2(n-1)-input Multiplexer● Use a 2(n-1)-input multiplexer to realize a logic circuit

for a function with 2n minterms.

– n – 1 = # of control inputs; n = # of variables in function

● Group the rows of the truth table, for the function, into 2(n-1) pairs of rows.

– Each pair of rows represents a product term of (n – 1) variables.

– Each pair of rows is mapped to one data input of the mux.

● Determine the logical function of each pair of rows in terms of the remaining variable.

– If the remaining variable, for example, is x, then the possible values are x, x', 0, and 1.

Page 25: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 25

Using an 2(n-1)-input Mux

Example: F(x,y,z) = Σm(1, 2, 6, 7)

Page 26: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 26

Using an 2(n-1)-input Mux

Example: F(A,B,C,D) = Σm(1,3,4,11,12–15)

Page 27: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 27

Using a 2(n-2)-input Mux

A similar design approach can be implemented using a 2(n-2)-input multiplexer.

Page 28: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 28

Circuit Design using Decoders

Page 29: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 29

Using an n-output Decoder

● Use an n-output decoder to realize a logic circuit for a function with n minterms.

● Each minterm of the function can be mapped to an output of the decoder.

● For each row in the truth table, for the function, where the output is 1, sum (or “OR”) the corresponding outputs of the decoder.

– That is, for each minterm in the minterm expansion of the function, OR the corresponding outputs of the decoder.

● Leave remaining outputs of the decoder unconnected.

Page 30: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 30

Using an n-output Decoder

Example:

Using a 3-to-8 decoder, design a logic circuit to realize the following Boolean function

F(A,B,C) = Σm(2, 3, 5, 6, 7)

Page 31: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 31

Using an n-output Decoder

Example:

Using two 2-to-4 decoders, design a logic circuit to realize the following Boolean function

F(A,B,C) = Σm(0, 1, 4, 6, 7)

Page 32: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 32

Hierarchical Design

Page 33: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 33

Hierarchical Design

● Several issues arise when designing large multiplexers and decoders (as 2-level circuits).

– Number of logic gates gets prohibitively large

– Number of inputs to each logic gate (i.e. fan-in) gets prohibitively large

● Instead, design both hierarchically

– Use smaller elements as building blocks

– Interconnect building blocks in a multi-tier structure

Page 34: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 34

Hierarchical Design

Exercise:

Design an 8-to-1 multiplexer using 4-to-1 and 2-to-1 multiplexers only.

Page 35: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 35

Hierarchical Design

Exercise:

Design a 16-to-1 multiplexer using 4-to-1 multiplexers only.

Page 36: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 36

Hierarchical Design

Exercise:

Design a 4-to-16 decoder using2-to-4 decoders only.

Page 37: Lecture #16 - Multiplexers, Decoders and Encoders

Spring 2011 ECE 301 - Digital Electronics 37

Questions?