lecture 5 mod - physics · microsoft powerpoint - lecture_5_mod.pptx author: klaus created date:...

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General Information Individual Study Projects We have a few more slots to fill Muon Lifetime Experiment We can use the experiment until April 18 Monday, April 8 we will go over the setup and take a look at the equipment in Smith Lab We have time for three groups: Group 1 Setup Tuesday, April 10; Finish Friday morning (4/13) (Ian, Mark) Group 2 Setup Friday, April 13; Finish Monday morning (4/16) (Geoff, Christian, Nick Johnson) Group 3 Setup Monday April 16 (Andrea, Eric, Alex) Finish on April 18 Today’s Agenda Detector Electronics Today (Shane Smith) Walk to Smith Lab to look at the muon life time experiment Wednesday: Interactions of Particles with Matter

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Page 1: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

General Information

Individual Study Projects We have a few more slots to fill

Muon Lifetime Experiment We can use the experiment until April 18 Monday, April 8 we will go over the setup and take a look at the equipment in Smith Lab We have time for three groups:

Group 1 Setup Tuesday, April 10; Finish Friday morning (4/13) (Ian, Mark) Group 2 Setup Friday, April 13; Finish Monday morning (4/16) (Geoff, Christian, Nick Johnson) Group 3 Setup Monday April 16 (Andrea, Eric, Alex) Finish on April 18

Today’s Agenda Detector Electronics Today (Shane Smith) Walk to Smith Lab to look at the muon life time experiment

Wednesday: Interactions of Particles with Matter

Page 2: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

FPGAs and ASICs for Detector Physics Data

Acquisition

Dale Shane Smith4/9/2012

Page 3: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Outline

• What are FPGAs?• What are ASICs?• FPGAs / ASICs in Particle Detectors• Example of an OSU Physics ASIC

Page 4: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

What are FPGAs?• FPGA - field programmable gate arrays• Integrated circuits consisting of thousands of logic blocks (millions

of individual transistors) that may be interconnected as the user wishes

• User writes firmware (software) in a high level language (VHDL) and vendor software synthesizes / maps this into the correct functions on the chip

Page 5: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

FPGAs

• Chip may be reprogrammed / rewired thousands of times

• Allow highly specific logic operations to be composedo provides the possibility to perform operations much more

efficiently than with standard logic or microprocessors

• There are several vendors selling FPGA devices, configuration software, and evaluation boardso Xilinx, Altera, Actel, Lattice, etc.

Page 6: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

FPGAs

• Devices available with hundreds of I/O pins• Prices for individual parts start as low as $1,

evaluation boards start at $50• Highly functional Xilinx, Altera software free

Page 7: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

What are ASICs?• ASIC - application specific integrated circuit• Individual transistors drawn by IC designers to perform a highly

specific tasks• User purchases wafers (thousands of chips / hundreds of thousands

of dollars) or multi project run (tens of chips / tens of thousands of dollars)

• Once, submitted to IC foundry there isno turning back!

Page 8: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

A CMOS Inverter

The simplest example of a circuit within an ASIC

Feature size

Page 9: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

ASICs and FPGAs for Particle Detectors

• Because modern particle detectors are often thousands of channels and are read out at a high rate, this requires highly specific readout electronics

• Often times space / power budgets are limited so the electronics must be compact

• The only way to accomplish these requirements are with FPGAs / ASICs!

Page 10: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Why not use FPGAs for every System?

• Some particle physics applications require the electronics to be exposed to high doses of radiation (total ionizing dose - TID)

• Chips from standard vendors can not tolerate large TID because designing for TID resistance requires special techniques contrary to reducing costs / wafer area usedo Not profitable!

• FPGAs do not have analog circuitryo If a specialized amplifier, ADC, or DAC is required, it can only be

made using an ASIC

Page 11: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Example of an OSU Physics ASICThe ATLAS experiment at CERN

Page 12: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Example of an OSU Physics ASIC• Hit processor chip for the ATLAS DBM detector at CERN• Chip designed to provide a level 1 trigger for the DBM

detector

DBM

Page 13: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Hitbus Chip Purpose

Page 14: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

DBM Hitbus Chip• Chip designed in 0.13um CMOS

technology through the MOSIS service

• 4.59 mm x 1.06mmo $15,574 for 40 chips• Fabrication takes ~ 3 months at

foundryo Must wait a while to see if I made a

mistake!

Page 15: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

DBM Hitbus Chip Contents

15

Programmable delay cell

Hit processor logic core

Command decoder

Power on reset

Phased locked loop

LVDS RXLVDS TX

Page 16: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Hitbus Processor Block• Designed via VHDL / standard

logic cell library• Implemented the following

functionso Pass hit from module 1,2, or 3o AND all telescope hitso OR all telescope hitso Majority vote all telescope hitso Select which module to ignore in ANDo Select which modules to use in ORo Send time raw time sequence of hitso Send time sequence of bits with 1

selectable marker bito Send time sequence of bits with 2

selectable marker bits

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Page 17: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Wrap up

• ASICs / FPGAs are necessary to perform complex customized data acquisition

• FPGAs are easy to use and affordable• ASICs require high levels of expertise to

design and are expensive but can do things FPGAs cannot!

Page 18: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Muon Lifetime: Delay CurvesBefore you can use multiple signals in a coincidence circuit you need to study their relative timing.If necessary, faster signals need to be delayed

1 m of RG58 (BNC, Lemo) cable = 5 ns delay

Delay Curves:

Page 19: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Muon Lifetime: TAC CalibrationA time to amplitude converter (TAC) is used to measure the time between start and stop signals. You need to calibrate the TAC using a special TAC calibration module. Check the linearity of the response and the slope.

Page 20: Lecture 5 mod - Physics · Microsoft PowerPoint - Lecture_5_mod.pptx Author: klaus Created Date: 4/10/2012 9:20:23 PM

Muon Lifetime: AnalysisFit the measured distribution to an exponential function, for example with Matlab. Assume Poisson errors for each of the bins ( ) and interpret your result.n