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Lecture – 8 Interrupt 1

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Lecture – 8 Interrupt. Outline . Introduction Handling interrupt Interrupt sources Switching interrupt Peripheral interrupts Using two interrupts Conclusions. Interrupts. Interrupts are the most used I/O technique for many systems. - PowerPoint PPT Presentation

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Page 1: Lecture – 8 Interrupt

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Lecture – 8

Interrupt

Page 2: Lecture – 8 Interrupt

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Outline

• Introduction

• Handling interrupt

• Interrupt sources

• Switching interrupt

• Peripheral interrupts

• Using two interrupts

• Conclusions

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Interrupts• Interrupts are the most used I/O technique for many systems.

• One problem exists with interrupts the are difficult to troubleshoot.

• The ISR is the function called by an interrupt.

• Each interrupting source has three control bits, IF (interrupt flag), IE (interrupt enable), and IP (interrupt priority).

• The IF flag is set only if an interrupt takes effect and cleared by the program.

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Handling interrupts (1)• The mechanism is very similar to CALL:

1) the present instruction completes.

2) PC (the address of the next instruction) is saved to the hardware stack

3) ISR is called at a fixed (by PlC architecture) address.

4) ISR operates as a subroutine (MUST not corrupt any registers/flags/bank settings/W), return (RETFIE) on completion.

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Handling interrupts (2)• ISR starts at the specific address.

• PC of the interrupted program is saved by hardware in a hardware stack.

• STATUS register and any other registers used by ISR are to be saved by the programmer if necessary.

• ISR should

(1) polls status bits of valid interrupt sources;

(2) serve requested;

(3) clear their request bits.

• Restore registers and RETIF (programmer).

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Interrupt sources • Direct pin at PORT B (interrupt request)

• Change of signal at most pins of port B (interrupt on change)

• Generated by built-in peripherals (e.g., timers on overflow etc)

• Generated by internal watchdog timer - could be used to recover after a hardware malfunction.

• Generated when the supply voltage drops below a preset level, or just recover from a power loss.

Interrupts can be disabled in general, or any specific interrupt can be disabled.

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Why interrupt control is required• How it is possible to handle more than one interrupt? • What will happen if two interrupts occur at the same time? • What will happen if an interrupt occurs while the other one is being

served ?

• How to protect a critical code from being intrrupted (e.g. injecting a drug to a patient)?

BCF INTCON, GIEcritical codeBSF INTCON, GIE

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Interrupt control register

• Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON<7>).

Enable bits Flag bitsGIE - general N/A

PEIE- peripheral interrupts N/ATMR0IE - timer 0 TMR0IF - timer 0

INT0IE - Interrupt request (RB0) INT0IF - interrupt request (RB0)RABIE - interrupt on change port B RABIF - interrupt on change port B

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Switching interrupts

• General IE (GIE) - ensures that the ISR is not interrupted.• IE flags - allow to enable particular interrupts ONLY.• IF flags : indicate what interrupt actually happened.

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Example

• What event has happened?

1 0 0 1 1 1 0 1

GIE PEIE T0IE INTE RBIE T0IF INTF RBIF

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Example

• What event has happened?

1 0 1 1 0 1 0 1

GIE PEIE T0IE INTE RBIE T0IF INTF RBIF

Page 12: Lecture – 8 Interrupt

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Example

• What event has happened?

0 0 1 1 0 1 0 1

GIE PEIE T0IE INTE RBIE T0IF INTF RBIF

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ISR programming necessities

• Initialisation: enable required interrupt, set GIE. • ISR: Clear the IF associated (if not, the same interrupt will

occur straight on RETFIE).

• ISR: Return using RETFIE.

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Peripheral interrupts• Peripheral interrupts enable register (PIE1)

• Peripheral interrupts request register (PIR1)

• EE-EEPROM, A/D converter, EUSART receive buffer, comparator C2, comparator C1, oscillator fail, EUSART transmit buffer, timer 1 overflow.

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Example

• PIE1

• PIR1

• What event has happened?

0 0 1 1 0 1 0 1

EEIE ADIE RCIE C2IE C1IE OSFIE TXIE TMR1IE

0 0 1 0 0 0 0 0

EEIF ADIF RCIF C2IF C1IF OSFIF TXIF TMR1IF

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Example

• PIE1

• PIR1

• What event has happened?

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0 0 1 1 0 1 0 1

EEIE ADIE RCIE C2IE C1IE OSFIE TXIE TMR1IE

0 0 0 0 0 0 0 1

EEIF ADIF RCIF C2IF C1IF OSFIF TXIF TMR1IF

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Using two interrupts

• E.g., on change and RC(receive).

• Initialization of both required

BSF INTCON, RBIEBSF PIE1, RCIEBSF INTCON, PEIE BSF INTCON, GIE

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Summary• Interrupts allow putting away some background activities for something

more important.

• Microcontrollers deal with interrupts from free running peripherals and external stimuli.

• They need to be enabled using lE flags, and the interrupt source can be determined using the IF flags.

• The ISR is placed at a fixed address.

• It must not to change anything except its dedicated variables.

• Interrupts can be prioritised if more than one is enabled.