lecture a 2.fsm review
DESCRIPTION
for logic designTRANSCRIPT
Mealy Machine
xX1 X2S
S1 S2 S1
S2 S3 S2
S3 S2 S1
xX1 X2S
S1 Y1 Y2
S2 Y3 Y1
S3 Y2 Y3
XX1 X2S
S1
S2 S1
Y1 Y2
S2
S3 S2
Y3 Y1
S3
S2 S1
Y2 Y3
state outputs
State table of Mealy Machine
xX1 X2
S
S1 S2 S1
S2 S3 S2
S3 S2 S1
SS YY
S1 Y2
S2 Y1
S3 Y3
Mealy Machine Graph
XX1 X2S
S1
S2 S1
Y1 Y2
S2
S3 S2
Y3 Y1
S3
S2 S1
Y2 Y3
S1
S2
X1/Y1
X2/Y2
S3
X1/Y2X2/Y3
X1/Y3
X2/Y1
Moore Machine Graphx
X1 X2 YS
S1 S2 S1 Y2
S2 S3 S2 Y1
S3 S2 S1 Y3
S1/Y2
X1
X2
X1X2
X1
S2/Y1
S3/Y3
X2
Natural language formulation of a problem
Design a control unit for ligth signalization on the railway with car sensors in positions A, B, C. The cars can go BA, AB i AC.
In direction BA go only car sets of length larger than the distance between sensors B and A.
In directions AB and AC go only single cars of length smaller than distance between sensors A and B and A and C, respectively.
A
C
BZ
The designed circuit should light lamp z=1 if there are no cars between sensors
A and B or sensors A and C
Sensors A, B, C generate signals a=1, b=1 and c=1 respectively, when sets of cars or single cars occur to be in their close distance.
Timing Diagram Specification
A
B
C
Z
2 31 4 1 52 3 1 6 7 8 1
A
C
BZ
Transition and output table for light signalization circuit
ABC000 001 011 010 110 111 101 100 Z
SS1 S1 - - S6 - - - S2 0S2 S3 - - - - - - S2 1S3 S3 S5 - S4 - - - - 1S4 S1 - - S4 - - - - 1S5 S1 S5 - - - - - - 1S6 - - - S6 S7 - - - 1S7 - - - - S7 - - S8 1S8 S1 - - - - - - S8 1A
B
C
Z
2 31 4 1 52 3 1 6 7 8 1
Moore Machine graph for the analyzed device
1/0
4/1
2/1
3/15/1
6/1
7/1
8/1A
B
C
Z
2 31 4 1 52 3 1 6 7 8 1
100
000
001
010
000
100
110010
000 000
asynchronous flip-flop sr
s r Q(t+1)
0 0 Q(t)
0 1 0
1 0 1
1 1 -
Q(t)Q(t+1) s r
0 0 0 -
0 1 1 0
1 0 0 1
1 1 - 0
U5
SR_FF
Q
~Q
S
R
Asynchronous sr flip-flopU2
NOR2
U3
NOR2
r
s
Q
notQ
U3
NAND2
U2
NAND2
U1
NAND2
U4
NAND2
s
r
Q
notQ
Asynchronous flip-flop sr
s r Q(t+1)
0 0 Q(t)0 1 01 0 11 1 -
Negated sr FF
This version has negated inputs
This FF realizes the function:
Q(t+1)
0 0 -
0 1 1
1 0 0
1 1 Q(t)
Q(t)Q(t+1)
0 0 - 0
0 1 0 1
1 0 1 0
1 1 0 -
s r s r
s r
Negated sr FF
U2
NAND2
U3
NAND2
not_s
not_r
Q
notQ
U5
SR_FF
Q
~Q
~S
~R
Negated sr FF
Q(t+1)
0 0 -
0 1 1
1 0 0
1 1 Q(t)
s r