lockheed martin nanosystems - nsti · 8 copyright © 2010 lockheed martin corporation, all rights...
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1 Copyright © 2010 Lockheed Martin Corporation, All Rights Reserved
Lockheed Martin Nanosystems
National Nanotechnology Initiative at Ten: Nanotechnology Innovation Summit
December 2010Dr. Brent M. SegalDirector & Chief Technologist, LM [email protected] / (339) 927-0682
Copyright © 2010 Lockheed Martin Corporation, All Rights Reserved
2 Copyright © 2010 Lockheed Martin Corporation, All Rights ReservedCopyright © 2010 Lockheed Martin Corporation, All Rights Reserved
Lockheed Martin Nanosystems
12,000 sq. ft. R&D facility in Billerica, MA
Class 10K, Class 1K, and Class 100 cleanrooms
Dedicated labs for − Thin film deposition & etch− Photolithography− Electrical test / Metrology− SEM / Optics− Organic / Inorganic chemistry
4,000 sq. ft. R&D and prototyping center in Springfield, MO (at Missouri State Univ.)Focus on advanced CNT coating methods, rapid prototyping, and process optimizationState-of-the-art IC/wafer test systems (DC to 40GHz)
50,000 sq. ft. production IC foundry in Manassas, VA (ITAR/Secret Certified Trusted Foundry)Co-located with Lockheed Martin MS2 facilityFirst carbon nanotubetechnology integrated into CMOS production fabline; first shift tool operators
3 Copyright © 2010 Lockheed Martin Corporation, All Rights ReservedCopyright © 2010 Lockheed Martin Corporation, All Rights Reserved
NRAM® Technology Chronology
2001 • First Patterned CNT Fabric
2002 • First NRAM Switch
2003 • First CMOS Compatible CNT Solution
2004 • First CMOS Integration
2005 • First 22nm NRAM Switch
2006 • First CNT Integrated Circuit
2007 • Begin 4Mb RH CMOS Integration
2008 • 4Mb NRAM Fabricated
2009 • Packaged 4Mb NRAM part; Flown on shuttle mission
2010 • >99% Raw Bit Yield
2011 • 4Mb Product & 64Mb NRAM Design
2012 • 64Mb TCV
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Fabrication with Carbon Nanotube solutions
Dispense & Disperse Solution
Remove Edge-bead
Evaporate Solvent
Raw Nanotubes Aqueous Nanotube Solution
Purified Nanotubes
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CMOS-compatible CNT fabric coatingsQualified manufacturing process−Uses spin-coat application of CNTs in
water on CMOS wafers−Circumvents high temperature CNT
growth process −Produces no excess metallic contaminants
on wafers−No cross contamination of downstream
fabrication tools−Requires only existing CMOS tools and
techniques (standard CMOS infrastructure)
Now available at multiple production CMOS fab lines−All are based in U.S.− Includes “trusted” facilities
1 μm
100 μm
10 μm
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NRAM® − Non-volatile CNT Memory Flight
NRAM® evaluation board flown on STS-125−Launched 11 May 2009 (13-
day Hubble repair mission)−100+ chips exposed to space
conditions for mission duration−1st gen (2×8 K-bit) packaged
NRAM® parts mounted with Actel 54SX72 test controller
Preparations for next flight−2nd gen (4 M-bit) NRAM® part
uses the same 44-pin package and board layout
−New flight board will continually exercise over 200 M-bits of rad-hard non-volatile memory in space conditions
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4 M-bit radiation-hard NRAM® development
Unique architecture−Usable as “stand alone” or
embedded (cache) memoryPerformance characteristics for space−Low power; no standby current;
reduced heat generation−Non-volatile; long lifetime−Scalable to high densities
Compatible with existing rad-hard CMOS−Radiation / EMP Hardened−Next iteration part at 64 M-bit−Future part at 2 G-bit
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LM Nanosystems Core Competencies
Carbon Nanotube (CNT) Solutions and Chemistry− Carbon nanotube purification, functionalization, and treatment
− Production of CMOS-grade CNT solutions for use in nanoelectronics fabrication
− Wide variety of laboratory chemical and physical analysis techniques
− Application / coating of CNT fabrics on dielectrics, plastics, metals, etc.
CNT Electronics R&D (Design, Fabrication, Test, and Analysis)− Device/Circuit design using industry standard IC design tools (e.g. Cadence)
− Engineering fabrication team with expertise in Si wafer thin film electronics processing as well CNT device fabrication on substrates such Kapton®, Mylar®, glass, etc.
− Proven record of successfully installing new CNT fabrication process flows in production CMOS foundries
Electrical Test & Characterization− Device/Circuit measurement using automated DC and RF characterization equipment
− Semi-automatic test of integrated CNT/CMOS packaged parts as well as on-wafer die
− Evaluation of device photoresponse for sensors and energy harvesting
9 Copyright © 2010 Lockheed Martin Corporation, All Rights Reserved
Future Needs for Nanotechnology
Continued support for Nanomanufacturing−Encourage partnerships
−Encourage “NEW” types of metrology
Nanotechnology Standards [ISO TC 229/IEC TC 113/IEEE]− Standards are a catalyst for progress
− Global competition is intense.
− Standards are significant enablers for commercial success at all stages of innovation - from R&D to recycling/disposal
− Successful innovation in nanotechnologies requires standards based on the best of each nation’s science and engineering
− Documents for standards on consensus specifications advance the field
− Standards influence R&D and business models.
“Standards enable innovative products and new markets.”
– Patrick Gallagher, NIST Director, November 2009