low-crossover extended generalized shuffle network for photonic switching...

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Low-crossover Extended Generalized Shuffle Network for Photonic Switching Applications Luigi Savastano CoreCom, Milan, Italy (now with DVT Pirelli Broadband Solutions Milan, Italy) Email: [email protected] Guido Maier and Achille Pattavina Politecnico di Milano Milan, Italy Email: {maier, pattavina}@elet.polimi.it Abstract— A multistage network architecture is proposed for nonblocking photonic switching exploiting waveguide intercon- nections and integrated 2 × 2 optical switching elements. The proposed architecture Low Crossover EGS is topologically equiv- alent to the Extended Generalized Shuffle Network, but a different novel configuration drastically reduces the number of waveguide crossovers of the interconnection stages. Some properties (number of switch elements and drivers required, number of crossovers, system attenuation and signal-to-crosstalk ratio) are derived and analyzed. The proposed EGS network is then compared with other known strictly nonblocking photonic guided-wave switching architectures, showing its scalability. I. I NTRODUCTION In 1 recent years, the capacity of transport networks rapidly increased with the deployment of optical fibers and optical transmission systems based on Wavelength-Division Multi- plexing (WDM). Future space-switching architectures should be designed in order to be well matched to an all-optical implementation, facing problems that sometimes are absent in electronic implementation. This paper describes the work which has been carried out for reducing the number of waveguide crossovers in the switching fabric. The starting point, described in Sec. II, is the Extended Generalized Shuffle (EGS) network, a class of switching topologies well-known in electronic switching theory, particularly efficient in requiring a low amount of active switching elements. The outcome of this study is the proposal of an optical EGS architecture (Sec. III) having a reduced number of waveguide crossovers. In Sec. IV this architecture is dimensioned (in terms of number of stages) in order to minimize optical-signal impairments such as optical crosstalk and loss. The proposed architecture is finally compared to others previously known in literature. Many popular switching architectures are based on 2 × 2 Switching Elements (SEs) arranged in stages interconnected by interstage links arranged in specific, often complex pat- terns. A natural optical implementation of multistage switch- ing matrices exploits Directional Couplers (DCs) and optical waveguides to embody SEs and interstage links, respectively. DCs and waveguides are integrated on a common substrate (Planar Lightwave Circuit (PLC) technology). A DC has two 1 This work has been supported by the European Commission through the Network of Excellence e-Photon/ONe+ input and two output waveguides and, as a 2×2 SE, it is a two- state (bar and cross) device. The state of a DC is controlled by an electronic driver which is able to switch the DC by applying a suitable voltage to the coupler structure. If DC-based waveguide technology is not new for space- switching matrix implementation, a number of recent propos- als have appeared in literature [1], reviving this research area. This renewed interest is probably related to the evolution in both DC technology [2] and waveguide fabrication techniques, e.g. with the development of the silicon-based ultra-contrast and low-loss waveguide generation [3]. Compared to other even more recent optical-switching technologies (e.g. MEMS), DC-based switches main advantages are: switching speed in the micro-second range, relatively small size, compatibility with VLSI-CMOS fabrication techniques, absence of mechan- ical movements generating fatigue, reliability. The scalability of optical switches based on DCs, i.e. the feasibility of high port-count switching matrices, is constrained by several problems. The first of these problems appears in the implementation of the interconnection interstages of the architecture by means of optical waveguides. The intercon- nection patterns comprise many links which intersect each other in several points and at many different angles. The crossover between two links in an interconnection interstage of a DC-based photonic switch corresponds to the intersection between two waveguides fabricated on the same substrate. An intersection between two waveguides (alias waveguide crossover) can cause crosstalk and signal loss. Moreover, it has to be very carefully manufactured in order to limit the above impairments [4]. Thus the total number of crossovers in a DC-based architecture becomes a cost-related parameter, while the total number of crossovers along the path between any inlet-outlet is related to signal attenuation and crosstalk. In conclusion, the minimization of the number of crossovers in the interconnection interstages of a switching architecture becomes a very important issue for the feasibility of an optical guided-wave implementation. Other issues that can limit the scalability of DC-based switching matrices are: worst-case loss, crosstalk, number of SEs. These features will be discussed in detail later on in Sec. IV and taken into account while choosing the number of stages of the switching architecture which is most suited for 1-4244-1206-4/07/$25.00 ©2007 IEEE

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Page 1: Low-crossover Extended Generalized Shuffle Network for Photonic Switching Applicationshome.deib.polimi.it/pattavina/pub_archive/conf-HPSR07b.pdf · 2009-04-11 · Low-crossover Extended

Low-crossover Extended Generalized ShuffleNetwork for Photonic Switching Applications

Luigi SavastanoCoreCom, Milan, Italy

(now with DVT Pirelli Broadband SolutionsMilan, Italy)

Email: [email protected]

Guido Maierand Achille PattavinaPolitecnico di Milano

Milan, ItalyEmail: {maier, pattavina}@elet.polimi.it

Abstract— A multistage network architecture is proposed fornonblocking photonic switching exploiting waveguide intercon-nections and integrated 2 × 2 optical switching elements. Theproposed architecture Low Crossover EGS is topologically equiv-alent to the Extended Generalized Shuffle Network, but adifferent novel configuration drastically reduces the numberof waveguide crossovers of the interconnection stages. Someproperties (number of switch elements and drivers required,number of crossovers, system attenuation and signal-to-crosstalkratio) are derived and analyzed. The proposed EGS network isthen compared with other known strictly nonblocking photonicguided-wave switching architectures, showing its scalability.

I. INTRODUCTION

In1 recent years, the capacity of transport networks rapidlyincreased with the deployment of optical fibers and opticaltransmission systems based on Wavelength-Division Multi-plexing (WDM). Future space-switching architectures shouldbe designed in order to be well matched to an all-opticalimplementation, facing problems that sometimes are absentin electronic implementation. This paper describes the workwhich has been carried out for reducing the number ofwaveguide crossovers in the switching fabric. The startingpoint, described in Sec. II, is the Extended Generalized Shuffle(EGS) network, a class of switching topologies well-known inelectronic switching theory, particularly efficient in requiring alow amount of active switching elements. The outcome of thisstudy is the proposal of an optical EGS architecture (Sec. III)having a reduced number of waveguide crossovers. In Sec.IV this architecture is dimensioned (in terms of number ofstages) in order to minimize optical-signal impairments such asoptical crosstalk and loss. The proposed architecture is finallycompared to others previously known in literature.

Many popular switching architectures are based on 2 × 2Switching Elements (SEs) arranged in stages interconnectedby interstage links arranged in specific, often complex pat-terns. A natural optical implementation of multistage switch-ing matrices exploits Directional Couplers (DCs) and opticalwaveguides to embody SEs and interstage links, respectively.DCs and waveguides are integrated on a common substrate(Planar Lightwave Circuit (PLC) technology). A DC has two

1This work has been supported by the European Commission through theNetwork of Excellence e-Photon/ONe+

input and two output waveguides and, as a 2×2 SE, it is a two-state (bar and cross) device. The state of a DC is controlledby an electronic driver which is able to switch the DC byapplying a suitable voltage to the coupler structure.

If DC-based waveguide technology is not new for space-switching matrix implementation, a number of recent propos-als have appeared in literature [1], reviving this research area.This renewed interest is probably related to the evolution inboth DC technology [2] and waveguide fabrication techniques,e.g. with the development of the silicon-based ultra-contrastand low-loss waveguide generation [3]. Compared to othereven more recent optical-switching technologies (e.g. MEMS),DC-based switches main advantages are: switching speed inthe micro-second range, relatively small size, compatibilitywith VLSI-CMOS fabrication techniques, absence of mechan-ical movements generating fatigue, reliability.

The scalability of optical switches based on DCs, i.e. thefeasibility of high port-count switching matrices, is constrainedby several problems. The first of these problems appears inthe implementation of the interconnection interstages of thearchitecture by means of optical waveguides. The intercon-nection patterns comprise many links which intersect eachother in several points and at many different angles. Thecrossover between two links in an interconnection interstageof a DC-based photonic switch corresponds to the intersectionbetween two waveguides fabricated on the same substrate.An intersection between two waveguides (alias waveguidecrossover) can cause crosstalk and signal loss. Moreover, ithas to be very carefully manufactured in order to limit theabove impairments [4]. Thus the total number of crossoversin a DC-based architecture becomes a cost-related parameter,while the total number of crossovers along the path betweenany inlet-outlet is related to signal attenuation and crosstalk.In conclusion, the minimization of the number of crossoversin the interconnection interstages of a switching architecturebecomes a very important issue for the feasibility of an opticalguided-wave implementation.

Other issues that can limit the scalability of DC-basedswitching matrices are: worst-case loss, crosstalk, number ofSEs. These features will be discussed in detail later on inSec. IV and taken into account while choosing the number ofstages of the switching architecture which is most suited for

1-4244-1206-4/07/$25.00 ©2007 IEEE

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the optical implementation.

II. CLASSICAL EXTENDED GENERALIZED SHUFFLENETWORKS

The architecture we have considered in this paper for anoptical implementation is the Extended Generalized Shuffle(EGS) network: it is a strictly nonblocking multistage ar-chitecture proposed in the nineties by G. L. Richards [5].While our work studies an optical EGS based on waveguideinterconnections and DCs, other photonic implementations ofEGS have been proposed in the past exploiting free-spaceinterconnections and S-SEED switching devices [6] or, morerecently, liquid-crystal phase-holograms [7].

Let us describe the main features of the original architec-tures and how it can be adopted to the optical implementation.The name of the EGS [5] networks stems from the link-pattern employed in the interconnection interstages [8]. Thestructure of a general N × N EGS is represented in in Fig.1. It comprises N input splitters having fanout F (1 × Fswitching splitters), s stages of N ·F/2 SEs and N F×1 outputcombiners. The total number of stages is s + 2, and they arenumbered from stage 0 (splitters) to stage s + 1 (combiners).

EG

S p

atte

rn

# 2# 1

0

1

F-1

F

NF

2-1

EG

S p

atte

rn

# 3

EG

S p

atte

rn

0

1

# s

1

2

N

1

2

N

1xF Fx1

0

1

F-1

F

NF

2-1

0

1

F-1

F

NF

2-1

N

2-1

N

2

NF

2-1

Fig. 1. Structure of an EGS network.

Once N and s have been selected, the blocking feature ofthe network depends only upon the fanout F . Small valuesof F make the network to be blocking, while as F increasesthe network becomes first Rearrangeable Non-Blocking (RNB)and finally Strictly Non-Blocking (SNB). The value of Ffor which the EGS becomes SNB is given by the followingTheorem 1.

Theorem 1: An N ×N EGS network with fanout F and sstages (s ≥ 1) is SNB only if

F ≥

2n−s(

32 2

s2 − 1

)s even

(s ≤ n)2n−s

(2

s+12 − 1

)s odd

(1)

F ≥

32 2

2n−s2 + s− n− 1 s even

(s > n)2

2n−s+12 + s− n− 1 s odd

(2)

In which: n = log2 N .Proof: The proof is reported in Ref. [8]. It should

be noted that this is a sufficiency theorem. The necessarycondition has not yet been found and proved: therefore itwould be theoretically possible to reduce the fanout.

If s ≥ n, the fanout of the EGS splitters and combiners isequal to the number of planes of an SNB N ×N Vertically-Replicated and Horizontally Expanded (VR-HE) banyan net-work with s stages [8]. In this case the two networks havethe same number of SEs and splitters (combiners): the onlydifference is the type of interconnection patters.

In an electronic implementation the cost of the network isusually evaluated in terms of number of crosspoints xp. An SEconventionally corresponds to 4 crosspoints, while an 1 × Fsplitter (F × 1 combiner) accounts for F crosspoints. Theelectronic cost function is then:

xp = 4sNF

2+ 2NF = 2NF (s + 1)

In order to minimize xp the number of stages must be set tos = 2n−3. We are going to show further on that for an opticalDC-based EGS network the cost functions to be considered arevery different and consequently also the best number of stagesis different from the electronic case.

III. OPTICAL LOW-CROSSOVER EXTENDED GENERALIZEDSHUFFLE

A possible method to implement optical EGS matrices, theone we have considered in our work, is the already mentionedDC technology with integrated waveguides. We have alreadyintroduced the correspondence between 2 × 2 SEs and DCsand interstage links and waveguides. 1×F splitters and F ×1combiners, too, can be obtained by exploiting DCs. These canwork as 1×2 (2×1) devices by using only one of their input(output) and they can be connected forming tree structures.

If F is not a power of 2 there are two possible alterna-tives. The first is to use symmetrical structures 1 × 2dlog2 Fe

(2dlog2 Fe × 1). The advantage of this approach is that opticalpaths are balanced, always crossing the same number of DCs;the drawback is the under-utilization of the DCs. The secondalternative is the use of asymmetrical trees. In this case lessDCs can be employed, but the number of crossed DCs is nomore constant. However it can be proved that it is alwayspossible to arrange an asymmetrical splitter (combiner) insuch a way that the difference in the number of crossed DCsbetween any two paths is limited to one. The advantage interms of DC saving of the asymmetrical structure (F −1 DCsversus 2dlog2 Fe−1 of the symmetrical version) can be relevantin many cases, especially when F increases (e.g. 8 versus15 DCs for F = 9). In the rest of the paper we we alwaysassume that splitters and combiners are implemented with theasymmetrical approach.

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As already mentioned, waveguide crossover is a majorissue for an optical DC-based implementation of a multistageswitching architecture. EGS networks are particularly criticalunder this point of view. When the port-count increases thenumber of crossovers becomes so large that optical signalscrossing the switch begin to suffer unsustainable degradation,not to mention the difficulty of the fabrication process whichhas to guarantee an extremely high level of precision. Fig. 2allows to visually appreciate the complexity of the interstagepatters of a 16 × 16 classical EGS (with s = 7 switchingstages).

Fig. 2. Classical 16× 16 EGS network (with 7 switching stages).

Each input-output path crosses a different number ofcrossovers. We have computed the maximum number ofcrossovers crossed by the worst-case path in a classical EGSas a function of port-count N and number of stages s. Resultsshow that this number increases very rapidly with N , reachingthe order of 105 for N = 1000.

Clearly, some modification is needed to the classical ar-chitecture if we wish to exploit the EGS scheme for opticalswitching. For this reason, we have proposed an algorithmto transform a classical EGS architecture into a topologicallyequivalent network with a much lower number of crossovers.The algorithm is based on a sequence of position-switches ofthe SEs belonging to specific stages of the classical EGS ar-chitecture. The technique of switching the position of the SEsis a powerful topology transformation, useful in many cases toreduce complex architectures to known simpler configurations.It has been previously proposed in literature in a few papers,in one case applied to banyan networks [9], but never appliedbefore to EGS, to our knowledge.

Our EGS Transformation Algorithm (ETA) acts in orderto spatially group SEs of two adjacent stages which areinterconnected by interstage links, making the interconnectioninterstage pattern less entangled, thus reducing the occurrenceof link mutual crossing. In performing this function we alsopursue another result: SEs are arranged so that the entirenetwork is decomposed in a set of smaller subnetworks. Eachsubnetwork is connected to the other members of the set onlyby its inputs and outputs: it can therefore be regarded asa separate module. Modularity can be very important fromthe implementation point of view: the fabrication of complex

switching matrices occupying a large substrate area can bedifficult with PLC technology. A modular architecture caninstead be obtained by separated smaller PLC blocks whichare easier and less expensive to produce. The blocks can thenbe interconnected for example by optical fiber interstages tocompose the overall EGS network. We will show in Sec.IV that the implementation of some interstages by fiberand some others by waveguides is feasible from the signaldegradation point of view, despite the presence of extra lossdue to fiber-waveguide couplings. In particular, ETA is suchthat the modules resulting from the EGS-network topologicaltransformation are banyan-baseline type networks, having sizefrom 2× 2 to 32× 32.

Let us now describe ETA. The algorithm operates on theswitching stages (numbered from 1 to s) of an N×N classicalEGS network, without modifying splitters and combiners. TheSEs belonging to stage k (1 ≤ k ≤ s) are numbered by theirposition P form the top to the bottom (0 ≤ P ≤ NF/2− 1).The outlets of stage k are numbered by x(k) (0 ≤ x(k) ≤NF − 1), while the inlets of stage k + 1 are numbered byy(k) (0 ≤ y(k) ≤ NF − 1). The interconnection patternbetween k and k + 1 is univocally described by the functionfk(x), establishing the relation: y(k) = fk[x(k)]. In the EGS-network case fk = f ∀1 ≤ k ≤ s − 1 and f is the EGSpattern. Be ~qk the ordered list of SEs of stage k after thetransformation produced by the ETA. In the list each SE isidentified by its original position P it had in stage k in theclassical EGS network: if a certain value of P appears as i-th element of ~qk it means that the P -th SE of stage k ofthe EGS has to be moved to position i in the new network.Moving an SE in a stage from position P to i means moving itwithout disconnecting its inlets and outlets from the previousand subsequent interconnection stages. Thus the SE-movementoperation in a stage k modifies the topology of both theadjacent interconnection stages.

ETA has total 8 steps:1) START;2) k = s; l = 0;3) if k = 0 END else goto 4;4) if l = 0 goto 8, else goto 5;5) ~qk = {∅}, where ∅ indicates the empty set;6) for y(k) = 0 to NF − 1 do

a) x(k) = f−1(y(k));b) P = bx(k)/2c;c) if P is not yet included in the list ~qk (P /∈ ~qk) then

add P to ~qk (~qk = ~qk + {P});7) rearrange the SEs in stage k by moving each one of them

as indicated by ~qk;8) l = l + 1; l = (l mod 5) (where x mod y indicates the

remainder of the ratio x/y); k = k − 1; goto 3;We have named Low Crossover EGS (LCEGS) a network

resulting form the application of ETA. An LCEGS obtainedby an SNB classical EGS is still SNB, it is modular and it hasless crossover than the original one. A formal proof of theseproperties will be given in an extended version of this paper.

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The behavior of the algorithm can however be intuitivelyunderstood. Let us consider as an example the transformationof the classical EGS network represented Fig. 2. The resulting16×16 LCEGS with 7 stages is shown in Fig. 3. ETA reordersSEs when l 6= 0, i.e. starting from stage 6 to stage 3 and thenagain in stage 1. When step 3 is operated for a given k itclearly reduces the number of crossovers between stage k andk +1: in fact the set of SEs of k interconnected to a group ofadjacent SEs in k + 1 are “gathered together” and placed “asclose as possible” to their neighbors in k + 1. This operationon the other hand increases the number of crossovers in theinterstage between k and k − 1, but this interstage is soonreordered by a new iteration of step 3 with decremented k. Inthis way most crossovers are progressively “shifted” stage-by-stage from the last stages backward and they “accumulate” atthe interstage between stage 2 and 3: stage 2 in fact skips step3. The same happens for stage 1, disentangling the interstagebetween 1 and 2 and accumulating crossovers between theinput splitters and stage 1.

The strategy of accumulating crossovers in few selectedinterstages matches with modularity. Figure 3 clearly displaysthe modules created as side-effect of ETA, which are two32 × 32 5-stage baseline networks and 16 4 × 4 2-stagebaseline networks. The modules are mutually connected byone very-entangled interstage, as well as they are connectedto splitters and combiners by interstages with many crossovers.Given this features, the most natural final step of the designis to implement interstages inside the modules by opticalwaveguides and interstages between modules using fibers.Waveguide implementation, sensitive to crossovers, is thusreserved to well-ordered interstages with a small numberof crossovers, while highly-entangled interstages are in fibertechnology, for which crossover is not critical.

Fig. 3. 16× 16 LCEGS network (with 7 switching stages).

IV. ANALYSIS OF PERFORMANCE AND OPTIMIZATION OFTHE NUMBER OF STAGES OF THE LCEGS

In the previous section we have defined the LCEGS archi-tectures. A free design parameter is the number of stages s:for a given port count N several possible values of s can bechosen, each one guaranteeing the same functional behavior

(i.e. strictly non-blockingness). We can take profit of sucha variability to further optimize the networks. In order toproperly select a particular value of s for each port-count, weneed to analytically describe the main performance parametersof LCEGS as functions of s. We will consider the followingfeatures, commonly taken into account while designing anyoptical switching system: insertion loss, signal-crosstalk ratio,number of crossovers, total number of DCs. In the followingdiscussion, taking advantage of the modularity introduced bythe LCEGS construction, we will always assume that thearchitecture is implemented by connecting splitters, combinersand PLC modules by fiber interstages, as in Fig. 3. It shouldbe noted that all the properties of the LCEGS derived so farin this paper and in the following analysis are completelytraffic independent: this is because we are considering onlynon-blocking LCEGS. Thus, when evaluating each parameterwe implicitly assume that the switching network is fully loadedby circuit-switched connections and all the inlets and outletsare in use.

The total attenuation suffered by an optical signal propa-gating end-to-end through an LCEGS switch is mainly dueto loss in the crossed DCs and to fiber-waveguide couplingloss. Thus, the attenuation depends upon the end-to-end pathwe are considering. The insertion loss IL is by definition theloss experienced along the worst-case path. If L is the loss ineach DC and W is the coupling loss of each fiber-waveguide(waveguide-fiber) interface, we have

IL = 2Ldlog2 F e+ sL + 2Wk + 2W [dB] (3)

where k = ds/5e + 1 is the number of fiber interconnectioninterstages.

We have neglected the loss contribution due to the waveg-uide crossovers. This approximation is justified by the fact thatthe typical loss contribution of each crossover is quite low(≈ 10−2 dB [10]) and LCEGSs have a relatively low numberof crossovers. The approximation would not be applicable toa classical EGS network.

An issue peculiar to the DC-based implementation is opticalcrosstalk generated inside the DCs. The fraction of powerthat leaks to the unintended output of a DC is measuredby the extinction ratio m (or by its inverse (in dB) X =10 log10(1/m)), while optical-signal quality is expressed (indB) in terms of Signal-to-Crosstalk Ratio (SXR). SXR isusually measured at the output of the switching network andit depends on the path followed by a signal inside the switch.The lowest SXR, produced by the worst-case path, is regardedas one of the most interesting figures of merit of the switch.

For LCEGS networks we can consider only the first-ordercrosstalk and neglect the higher-order contributions, sincemost of the DCs may have both their inlets simultaneouslyactive. Splitters and combiners do not generate any first-ordercrosstalk, since each of their DCs is always crossed by a singleoptical signal. We have instead to analyze the s switchingstages, trying to find the connection that crosses the maximumnumber of DCs already crossed by another active signal. Thisis a very difficult task, since the worst-case path may vary

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according to the particular permutation operated at any giventime by the switching network.

An simple lower bound of SXR is obtained by assumingthat all the DCs along the path crossed by the worst-caseconnection are also crossed by another optical signal andthus all contribute to crosstalk. It is not sure that such aconnection actually occurs. Nevertheless, being conservative,we can approximate the actual SXR to its lower bound. Thetotal crosstalk power at the output port is then PXT = ms Ps,where m is the already mentioned DC extinction ratio and Ps

is the input power, and we neglect any loss and any possibleback-reflection. SXR is given by the ratio PXT /Ps. In dB wehave

SXR = X − 10 log10 s [dB] (4)

Eq. 4 shows that the crosstalk only depends on the numberof stages and on the DC extinction ratio X and not on thenetwork port-count.

In a modular LCECG the interstages that have to be consid-ered to evaluate the number of relevant crossovers are thoseimplemented with waveguides internal to the PLC modules.Crossover in the fiber interconnection stages are not relevant,since they do not produce any signal impairment and theydo not add complexity to the fabrication process. It has beenproved [9] that in a banyan baseline network with n SE stagesthe maximum number of waveguide crossovers encounteredby a signal along an end-to-end path is 2n − n − 1. Amongall the banyan networks, the baseline is also the one with thelowest number of crossovers. By applying this to the LCECGwe obtain a maximum number of crossovers C given by

C = 26⌊s

5

⌋+ 2(s mod 5) − (s mod 5)− 1

It should be noted that C depends only on the number ofstages s and not on the network size. Moreover, C increasesvery slowly with s. even with very large port-counts (such asN = 16384) C is in the order of 100, while in a classical EGSnetwork it would reach 106.

A very important complexity measure of an optical switch-ing matrix is provided by the number of active optical 2 × 2SEs. An N × N LCEGS has: s stages with NF/2 DCs and2N splitters/combiners with F − 1 DCs each (asymmetricalimplementation). Thus, the total number of DCs DC is givenby

DC = 2N(F − 1) +NF

2s

The equations above shows that the total number of DCsof the LCEGS improves by increasing s, while loss, signal-crosstalk ratio and number of crossovers tend to worsen. Thereis thus a trade-off between different design aspects that couldlead to find an optimal choice of s.

Given the inhomogeneous nature of the considered parame-ters, it would be very difficult to find a common objective func-tion and to solve the problem by mathematical programming.We thus propose a technical approach. The signal-to-crosstalkratio is likely to be the most stringent parameter concerningsignal degradation: while loss can be well compensated by

optical amplifiers, there is no efficient device yet able toimprove the BER in a transparent optical network. Let usassume that crosstalk is the dominant signal impairment. Inorder to have a Bit-Error-Rate (BER) no larger than 10−9 theSXR should be at least 11 dB [11]. Assuming a DC extinctionratio m = 0.01 (X = 20 dB) and substituting these valuesin Eq. 4 we discover that an LCEGS can not have more thans = 8 switching stages. This constraint however reduces tos ≤ 19 if we use DCs with a roughly doubled extinction ratio(X = 24 dB), according to current state-of-the-art DC devices.

Let us now consider loss. Fig. 4 shows the insertion lossas a function of the number of stages s in an LCEGS, fordifferent values of the port-count, from N = 32 to N =4096. Curves are plotted by assuming the following parametervalues: L = 1 dB, W = 2 dB [12]. We shall observe that each

20

24

28

32

36

40

44

48

52

0 2 4 6 8 10 12 14 16 18

N=32

N=64

N=128

N=256

N=512

N=1024

N=2048

Inse

rtio

n L

oss

[dB

]

s

Fig. 4. Insertion loss of an LCEGS as a function of the number of stages sfor different port-counts N .

curve displays a sequence of almost constant-loss plateauxseparated by brusque step increments when s hops from 5 to6, from 10 to 11, and so on. Such transitions are due to theintroduction of an additional fiber interconnection interstageinto the architecture, leading to two extra fiber-waveguidecoupling loss contribution.

In conclusion, based on the above observations on crosstalkand complexity parameters, and taking the maximum advan-tage from the insertion loss behavior, we propose the followingcriterion to choose the number of switching stages of an N×NLCEGS

s = 5⌊

log2 N

5

⌋for N = 32, 64, 128, . . .

In words, we propose to set the number of switchingstages to a multiple of 5. This choice brings another practicaladvantage. Any LCEGS network having a port-count whichis a power of 2 and greater than 32 can be obtained by usingalways the same type of optical PLC modules: M ×M withM ≤ 32 DC-based banyan baseline networks. Adopting anintermediate assumption on DC extinction ratio between the

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old-technology conservative value (X = 20 dB) and the state-of-the-art value (X = 24 dB), crosstalk can be assumed tobound the number of stages to s = 10. This, according to Eq.IV, allows our LCEGS to achieve a (theoretical) port-count upto N = 16384.

Finally, we are going to show some results of a featurecomparison of the LCEGS with other optical space-switchingarchitectures recently proposed in literature (the full compar-ison will be presented in an extended paper). Performanceparameters are evaluated in terms of the network size Nas independent variable. An ample range of values of N iscovered so to comprise all the possible switching-matrix sizesthat may be needed in the OXCs of a real OTN.

0

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0 500 1000 1500 2000

CrossbarClosType2Simplified treeDLNEBNLCEGS

Inse

rtio

n L

oss [

dB

]

N

(a)

0

1000

2000

3000

4000

5000

0 500 1000 1500 2000

CrossbarClosType2Simplified treeDLNEBNLCEGS

# C

rosso

ve

rs

N

(b)

Fig. 5. Comparison between LCEGS and other SNB optical switchingarchitectures.

LCEGS can be compared to: the Crossbar, the Clos networkand a set of architectures specifically developed for an opticalimplementation, such as the Type 2 [13], Simplified Tree [14],Double-Layer Network (DLN) [15] and Extended BaselineNetwork (EBN) [11].

Fig. 5 shows the plots that compare the above networkswith the LCEGS, in terms of: (a) insertion loss, (b) numberof crossovers. The graphs highlight a good performance ofLCEGS for each of the considered features. More specifically,only two architectures (EBN and DLN) display a better

extinction ratio. LCEGS also is among the best architecturesas concerning the crossovers.

V. CONCLUSIONS

In this paper we have proposed the optical implementationof the Extended Generalized Shuffle network architecture. Atopological transformation algorithm has been studied whichallows to reduce the number of waveguide crossovers and toimplement the network in a modular way by interconnectingintegrated banyan modules with optical fiber interconnectioninterstages, obtaining a new low-crossover EGS architecture.The quantitative analysis of cost and signal-quality parametersallowed us to optimally choose the number of switching stages.Finally, the proposed architectures have been compared interms of losss and number of crossovers with other opticalswitching matrices recently presented in literature, highlight-ing some advantages of the proposed optical EGS.

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