master thesis presentation

Design of Power Management for Autonomous Wireless Monitoring

Systems

Master Thesis Presentation

By Mayur Sarode

SupervisorsTU/e : P.G.M Baltus, Dusan Milosevicimec/Holst center :Valer Pop

/ MSM/ELECTRICAL ENGINEERING

RF ENERGY HARVESTING 2/33

Horn antennaMicrostrip patch

antenna , Diode based voltage

doubler

DC-DC converter

Ni-MH battery

e.g. EOG tracking based

Eye system

WATSEnergy StorageDevice

DC-DCconverter

RF-DC converter

RECTENNA

PMcircuit

PROJECT OUTLINE3/33

STATE-OF-THE-ART-PM*

HARVESTER MEASUREMENTS

PM CIRCUIT DESIGN

PM CIRCUIT MEASUREMENTS

RECOMMENDATIONS &CONCLUSIONS

*Power Management/ MSM/ELECTRICAL ENGINEERING

MOTIVATION

39%

4%

1%

31%

22%

PM 33μW(151μW)

MOTIVATION


Architectural level: Multi supply one-voltage domain system

<1%

78%

<1%

11%9%

Radio MCU

ADC Sensor&R-out

PM

Vdd[V] Component Vdd [V]

3 Radio 1.2

2.3 MCU 1.2

2.7 ADC 1.2

3 Sensor & R-out 1.2

2.9 Battery 1.5

PM 63μW(704 μW)

4/33


Efficiency

Size

Start-up voltage

Quiescent current

STATE-OF-THE-ART OF PM 5/33

Inductive vs Capacitive Converter topology

PWM/PFM control strategy

Converter specs Io(max),Vdc(max), fs and Vbatt

Open-loop resistor –emulation optimum control strategy


STATE-OF-THE-ART PM ; IMEC/HOLST CENTER 6/33

/

Inductive boost- converter

SpecificationsAdaptive MPP ControlInput voltage 1~2VDC

Output 10μW~5mWEnd to end efficiency 60~70%

Technology Indoor Photo Voltaic

Integrated capacitive DC-DC buck-boost converter

SpecificationsInput voltage 1~5VDC

Output 10~300 μWActive Efficiency 80~87%& up to100% in direct charge

Technology Indoor Photo Voltaic

SpecificationsIntegrated AC-DC rectifierInput voltage 4~42VRMS

Output 10μW~5mW @ 3VDC

DC-DC Efficiency 87 - 94%

Technology Vibrational Harvesting

AC-DC buck-converter


HARVESTER MEASUREMENTS; CHARACTERIZATION 7/33

Parameter Value Unit

Load No load, 10, 100, 10K, 100K Ω

RectennaTransmitted power 0 ,14 ,20 dBm

Distance 1, 10, 20, 30, 50 cmHeight 10 cm

Orientation of Rectenna Broadside /Vertical

Configuration Line of Sight, 45o ------

RectifierPinc -15 to 10 dBm

Harvester characterization Power management specifications

Find optimum load resistance


HARVESTER MEASUREMENTS; RESULTS 8/33

Parameter Value (EIRP: 100 mW) UnitDistance , R 1 10 20 30 50 cmVoltage , Vdc 1.2 0.6 0.3 0.2 0.12 mV

Power, Pdc 1886 292.6 82 44 15

μW


HARVESTER MEASUREMENTS; LOSSES9/33

Impedance matching losses ZS [Ω] Pinc [dBm] ZL [Ω] Г

35+40j Ω -15 2.5-55j Ω 0.78

0 35-40 j Ω 0

ZL - Load ImpedanceZS – Source Impedance

2*Z ZL s

Z ZL s

Rectenna efficiency varies with available power


HARVESTER MEASUREMENTS; CONCLUSIONS 10/33

Input power to the converter < 500 μW

Maximum input voltage to converter Vdc(max) ~ 0.4 V

Rectenna A Rectenna B


HARVESTER MEASUREMENTS; CONCLUSIONS11/33

Optimum load resistance varies with input power MPPT

Approximated to a constant resistance (Rdc) for resistor emulation

Rectenna A Rectenna B


HARVESTER MEASUREMENTS;DERIVED SPECS. 12/33

Parameter Value/ Functionality Unit Harvester

Distance 0.2 – 0.6 mRectenna Broadside in LOS* ---

EIRP (max) 4 W, 50% Duty Cycled WPower management Circuit

Input voltage Vdc 0.1 – 0.5 V

Output voltage Vbatt Dependent on the battery (~1) V

Input impedance Rdc 220 (reconfigurable) Ω

Input power Pdc 1 - 500 μW

Choice of a lower Rdc rectenna for resistor emulation

Choice of optimum PM circuit components *LOS- Line of Sight


13/33

RF MEASUREMENTS; RECTENNA MODELING

Friis model Rectifier measurements

PT(14dBm) ~ EIRP(80.64 mW)

Parameter Value Unit

PT 0.004 – 1.24 W

GT 3.2 ---

GR 3.1 ---

λ 0.1244 m

R 0.16 – 0.60 m

GT – Gain of the transmitter antenna GR – Gain of the receiver antennaλ – wavelength R - Distance from the transmitterEIRP - Effective Isotropic Radiated Power

Based on Spline interpolation

Used for predicting autonomy


14/33

PM CIRCUIT DESIGN; DEFINING VARIABLES

14

Variable DetailsPin( Vin) Incident power(voltage)on the rectennaPdc(Vdc) Input power(Input voltage) to the

converter Pout Harvested Power

ηconverter(Pout/Pdc)

ηharvester(Pout/Pin)

Harvester Terminology


15 /33

PM CIRCUIT DESIGN; SPECIFICATIONS

15

Specifications Comments Unit

Input impedance (Rdc) 220 (rectenna B) Ω

Switching frequency, fs ----- kHz

Input voltage, Vdc 0.1 - 1 V

Output voltage, Vbatt 1 – 1.3 V

Output current , Io(max) 1 mA

Under Lock-out voltage ----- V

Over lock-out voltage 1.3 V

Input Ripple voltage 20% Vdc V

output Ripple voltage ,ΔVo 1 mV


PM CIRCUIT DESIGN; POWER STAGE 16/33

Buck-Boost converter topology

2dcs

L

DVbatt V

L

R Ts

2Lston f Rs dc

On-time is calculated by

Relating input/output voltage

M1

Ds

Cout

Vin

Cin

VbattLs

Rin

RECT

ENNA

Vdc

D

RL

ton

Rdc


17/33

PM CIRCUIT DESIGN; SELECTION OF M1

Choice dependant on Ron , tr , tf and Cgs of the MOSFET

Verified with measurement results17

MOSFET power loss modeling

MODELED MEASURED


18/33

PM CIRCUIT DESIGN; SELECTION OF Ds

Power losses at Vin 0.3 V (model)

Schottky Diode forward voltage drop (Vf ) & Continuous Reverse Current( Is)

Verified with SPICE simulations


40

50

60

70

80

68 220

1000

1500

1800

2200

COnv

erter

Efficie

ncy [

%]

Inductance [μH]

900uW

180uW

100uW

19/33

PM CIRCUIT DESIGN; SELECTION OF Ls

Sweeping Ls for Rdc of 220Ω

Ls between 1 – 1.5mH is optimal

Conduction losses DCR

Trade off between inductor and diode conduction time


20/33

PM CIRCUIT DESIGN; SELECTION OF Cin

Cin Reduce ripple voltage

Input capacitance was selected to be 10 μF(ESR 5 mΩ)

BEFORE AFTER


PM CIRCUIT DESIGN; SELECTION OF COUT 21/33

Cout Charge battery when M1 is ON Reduce output voltage ripple

10μF low ESR selected

BEFORE AFTER


22/33

Optimum switching frequency increases with input power

PWM designed to reduce losses at low input power levels

PM CIRCUIT DESIGN; SELECTION OF fS

Selected for minimum converter loss


23/33

PM CIRCUIT DESIGN; OSCILLATOR DESIGN

Cosc

RhD1

Rl

D2

R2

R1

R3

Vdc

Vdd, Vss

+ -

RC relaxation oscillator Low voltage comparator

Observed oscillation frequency at Vin :0.9 volt

Duty cycle scales with step-up ratio


PM CIRCUIT DESIGN; PROTECTION CIRUCIT 24/33

Vin1

Vin2V1V2

Vref

+

-R8

R9

Vd

c

Vba

tt

R7

Vref

R6

Vb

att

+

-

R10

Dc

Comp_U Comp_H

Under-lock out 150 mV , Vdc

Over-charging protection 1.3 V, Vbatt

Overcharging protection MAX9064

Under lock out protection MAX9063


PM CIRCUIT DESIGN; LOSS ANALYSIS 25/33

0

50

100

150

200

250

102 410.58 924

Plo

ss [μW

]

Pin [μW]

Leakge

Oscillator

Switch

Diode

Inductor

Modeling Converter losses at different power levels

Diode major contributor

Leakage losses dominate at lower power levels


PM CIRCUIT DESIGN; HARDWARE DEVELOPMENT 26/33

Circuit Verification on Breadboard

Schematic Design Capture tool*

Layout Expedition PCB tool*

PCB testing

Mentor Graphics™


PM MEASUREMENTS27/33


PM MEASUREMENT; RESULTS 28/33

Efficiency and output power for Vbatt 1.030 and 3.5 volt for 220 Ω rectenna

Comparing Efficiency present & new generation PM

Higher efficiency at lower rectenna voltages Vin


PM MEASUREMENTS; WITH RECTENNA29/33

Comparing Autonomy

0

20

40

60

80

converter harvester

Eff

icie

ncy

[%]

0

20

40

60

80

converter harvester

Eff

icie

ncy

[%] Present generation

New generation

10 cm 20 cm

Measured efficiency at distance of 10 and 20 cm

Increase in Autonomy of the harvester EIRP:100 mW


PM MEASUREMENT; RESULTS 30/33

Start-up voltage varies with battery voltage

Start-up voltage of 210 mV Vin for Vbatt of 1.03 volt


31/33

PM CIRCUIT ; OVERVIEW

DCM, non synchronous buck-boost converter

Over-Charging protection / under lockout protection

Quiescent current of 27 μA

Compact Design (2X2 cm 2 layer PCB board )31


RECOMMENDATIONS32/33

Quiescent Current Distribution

TPS22902 load switch, Ron 146 mΩ

Reducing Quiescent current at under-lockout voltage levels


RECOMMENDATIONS33/33

Higher ηconverter PWM-PFM control strategy

Higher ηconverter with adaptive PWM


SUMMARY 34/33

1 V battery charging lowest among commercial solutions

ηconverter ~ 68% @ 900 mV available voltage

Start-up voltage ~ 0.210 V

Quiescent current ~~ 1 V IC solutions

Protection circuits

Reconfigurable for any arbitrary rectenna ( Rmpp 800Ω, 2.6 kΩ)


THANKS ….

Valer Pop , Prof. Peter Baltus , Dusan Milosevic

My family and friends

Audience present today

/ MSM/ELECTRICAL ENGINEERING PAGE 36

CIRCUIT VERIFICATION


WATS ARCHITECTURE

PAGE 37

Energy storage

- Battery- Super capacitor

Sensor ADC Processor Radio

PM

RF-DC converter

DC-DC converter

Power transfer

Data transfer

DC-DC converter

Energy Harvester

Rectenna

Application electronics


SCHEMATIC DESIGN

PAGE 38


LAYOUT

PAGE 39


PCB TESTING

PAGE 40

master thesis presentation

Education

nimh batteryeye systemdiode

multi supply

valer pop

motivation architectural

voltage domain system