max2851 5ghz, 5-channel mimo receiver

General DescriptionThe MAX2851 is a single-chip, 5-channel RF receiver IC designed for 5GHz wireless HDMI™ applications. The IC includes all circuitry required to implement the com-plete 5-channel MIMO RF receiver function and crystal oscillator, providing a fully integrated receive path, VCO, frequency synthesis, and baseband/control interface. It includes a fast-settling sigma-delta RF fractional synthe-sizer with 76Hz frequency programming step size. The IC also integrates on-chip I/Q amplitude and phase-error calibration circuits. The receiver includes both an in-channel RSSI and also an RF RSSI.On-chip monolithic filters are included for receiver I/Q baseband signal channel selection, for supporting both 20MHz and 40MHz RF channels. The baseband filtering and Rx signal paths are optimized to meet stringent WHDI requirements. The downconverter local oscillator is coher-ent among all the receiver channels.The reverse-link control channel uses an on-chip 5GHz OFDM transmitter. It shares the RF synthesizer and LO generation circuit with the MIMO receivers. Dynamic on/off control of the external PA is implemented with programmable precision voltage. An analog mux routes external PA power-detect voltage to the RSSI pin.The MIMO receiver chip is housed in a small 68-pin TQFN leadless plastic package with exposed paddle.

Applications 5GHz Wireless HDMI (WHDI™) 5GHz FDD Backhaul and WiMAX™ 5GHz MIMO Receiver Up to Five Spatial Streams 5GHz Beam Steering Receiver

Features 5GHz, 5x MIMO Downlink Receivers, Single-Uplink

IEEE 802.11a Transmitter 4900MHz to 5900MHz Frequency Range Coherent LO Among Receivers 4.5dB Rx Noise Figure 70dB Rx Gain Control Range with 2dB Step Size,

Digitally Controlled 60dB Dynamic Range Receiver RSSI RF Wideband Receiver RSSI Programmable 20MHz/40MHz Rx I/Q Lowpass

Channel Filters -5dBm Transmit Power (54Mbps OFDM) 31dB Tx Gain Control Range with 0.5dB Step Size,

Digitally Controlled Tx/Rx I/Q Error and LO Leakage Detection and

Adjustment Programmable 20MHz/40MHz Tx I/Q Lowpass

Anti-Aliasing Filter Analog Mux for PA Power Detect PA On/Off Control Sigma-Delta Fractional-N PLL with 76Hz Resolution Monolithic Low-Noise VCO with -35dBc Integrated

Phase Noise 4-Wire SPI Digital Interface I/Q Analog Baseband Interface Digital Tx/Rx Mode Control On-Chip Digital Temperature Sensor Readout Complete Baseband Interface Digital Tx/Rx Mode Control +2.7V to +3.6V Supply Voltage Small 68-Pin TQFN Package (10mm x 10mm)

Typical Operating Circuit appears at end of data sheet.

HDMI is a trademark of HDMI Licensing, LLC.WHDI is a trademark of WHDI Special Interest Group.WiMAX is a trademark of the WiMAX Forum.

19-5121; Rev 1; 3/10

+Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed paddle.

MAX2851 5GHz, 5-Channel MIMO Receiver

Ordering InformationPART TEMP RANGE PIN-PACKAGE

MAX2851ITK+ -25°C to +85°C 68 TQFN-EP*

EVALUATION KIT AVAILABLE

VCC_ Pins to GND ...............................................-0.3V to +3.9VRF Inputs Max Current: RXRF1+, RXRF1-, RXRF2+,

RXRF2-, RXRF3+, RXRF3-, RXRF4+, RXRF4-, RXRF5+, RXRF5- to GND................................ -1mA to +1mA

RF Outputs: TXRF+, TXRF- to GND ....................-0.3V to +3.9VAnalog Inputs: TXBBI+, TXBBI-, TXBBQ+, TXBBQ-, PA_DET,

XTAL, XTAL_CAP to GND ................................-0.3V to +3.9VAnalog Outputs: RXBBI1+, RXBBI1-, RXBBQ1+, RXBBQ1-,

RXBBI2+, RXBBI2-, RXBBQ2+, RXBBQ2-, RXBBI3+, RXBBI3-, RXBBQ3+, RXBBQ3-, RXBBI4+, RXBBI4-, RXBBQ4+, RXBBQ4-, RXBBI5+, RXBBI5-, RXBBQ5+, RXBBQ5-, RSSI, CLKOUT2, BYP_VCO, CPOUT+, CPOUT-, PA_BIAS to GND ..............................................-0.3V to +3.9V

Digital Inputs: ENABLE, CS, SCLK, DIN to GND ......................................................-0.3V to +3.9V

Digital Outputs: DOUT, CLKOUT to GND ............-0.3V to +3.9VShort-Circuit Duration Analog Outputs .................................................................. 10s Digital Outputs ................................................................... 10sRF Input Power ..............................................................+10dBmRF Output Differential Load VSWR ........................................ 6:1Continuous Power Dissipation (TA = +85°C) 68-Pin TQFN (derate 29.4mW/°C above +70°C) ......2352mWOperating Temperature Range ........................... -25°C to +85°CJunction Temperature ......................................................+150°CStorage Temperature Range ............................ -65°C to +160°CLead Temperature (soldering, 10s) .................................+300°CSoldering Temperature (reflow) .......................................+260°C

(Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25°C to +85°C, ENABLE set according to operating mode, CS = high, SCLK = DIN = low, transmitter in maximum gain. Power matching and termination for the differential RF output pins using the Typical Operating Circuit; 100mVRMS differential I and Q signals applied to I and Q baseband inputs of transmitters in transmit mode. Typical values measured at VCC = 2.85V, TA = +25°C, LO freq = 5.35GHz. Channel bandwidth is set to 40MHz. PA control pins open circuit, VCC_PA_BIAS is disconnected.) (Note 1)


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Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

DC Electrical Characteristics

CAUTION! ESD SENSITIVE DEVICE

PARAMETER CONDITIONS MIN TYP MAX UNITS

Supply Voltage 2.7 3.6 V

Supply Current

Shutdown mode TA = +25°C 10 µA

Clockout only mode with load = 10pF at CLKOUT pin

XTAL oscillator, CLKOUT2 is off 3.7

mA

XTAL oscillator, CLKOUT2 is on 4.6

TCXO input, CLKOUT2 is off 4.8 7.0

TCXO input, CLKOUT2 is on 6.1

Standby mode 60

Transmit mode 183 212

Receive modeOne receiver is on 144 184

Five receivers are on 367 458

Receive calibration mode

One receiver is on 248

Five receivers are on 435 517

Transmit calibration mode 256

Rx I/Q Output Common-Mode Voltage

0.88 1.1 1.34 V

Tx Baseband Input Common-Mode Voltage Operating Range 0.5 1.1 V

Tx Baseband Input Bias Current Source current 10 20 µA

(Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25°C to +85°C, RF freq = 5.351GHz, LO freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low, with power matching at RXRF_+ and RXRF_- differential ports using the Typical Operating Circuit. Receiver I/Q output at 100mVRMS loaded with 10kΩ differential load resistance and 10pF load capacitance. RSSI pin is loaded with 10kΩ load resistance to ground. Typical values measured at VCC = 2.85V, TA = +25°C, channel bandwidths of 40MHz.) (Note 1)

(Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25°C to +85°C, ENABLE set according to operating mode, CS = high, SCLK = DIN = low, transmitter in maximum gain. Power matching and termination for the differential RF output pins using the Typical Operating Circuit; 100mVRMS differential I and Q signals applied to I and Q baseband inputs of transmitters in transmit mode. Typical values measured at VCC = 2.85V, TA = +25°C, LO freq = 5.35GHz. Channel bandwidth is set to 40MHz. PA control pins open circuit, VCC_PA_BIAS is disconnected.) (Note 1)



AC Electrical Characteristics—Rx Mode

DC Electrical Characteristics (continued)


LOGIC INPUTS: ENABLE, SCLK, DIN, CSDigital Input-Voltage High, VIH VCC - 0.4 V

Digital Input-Voltage Low, VIL (Note 2) 0.3 V

Digital Input-Current High, IIH -1 +1 µA

Digital Input-Current Low, IIL -1 +1 µA

LOGIC OUTPUTS: DOUT, CLKOUT

Digital Output-Voltage High, VOH Sourcing 1mA VCC - 0.4 V

Digital Output-Voltage Low, VOL Sinking 1mA 0.4 V

Digital Output Voltage in Shutdown Mode Sinking 1mA VOL V

PARAMETER CONDITIONS MIN TYP MAX UNITSRECEIVER SECTION: RF INPUT TO I/Q BASEBAND LOADED OUTPUTIncludes 50Ω to 100Ω RF Balun and MatchingRF Input Frequency Range 4.9 5.9 GHz

Peak-to-Peak Gain VariationOver RF Frequency Range at One Temperature

4.9GHz to 5.9GHz 1.8 4.2 dB

RF Input Return Loss All LNA settings -6 dB

Total Voltage GainMaximum gain, Main address 1 D[7:0] = 11111111 61.8 68

dBMinimum gain, Main address 1 D[7:0] = 00000000 -2 +6.9

RF Gain Steps Relative to Maximum Gain

Main address 1 D[7:5] = 110 -8

dBMain address 1 D[7:5] = 101 -16

Main address 1 D[7:5] = 001 -32

Main address 1 D[7:5] = 000 -40

Baseband Gain RangeFrom maximum baseband gain (Main address 1 D[3:0] = 1111) to minimum baseband gain (Main address 1 D[3:0] = 0000)

28 30 32 dB

Baseband Gain Step 2 dB

RF Gain Change Settling Time Gain settling to within ±0.5dB of steady state, RXHP = 1 400 ns




PARAMETER CONDITIONS MIN TYP MAX UNITSBaseband Gain Change Settling Time Gain settling to within ±0.5dB of steady state, RXHP = 1 200 ns

DSB Noise Figure

Balun input referred, integrated from 10kHz to 9.5MHz at I/Q baseband output for 20MHz RF bandwidth

Maximum RF gain (Main address 1 D[7:5] = 111) 4.5

dB

Maximum RF gain - 16dB (Main address 1 D[7:5] = 101) 15

Balun input referred, integrated from 10kHz to 19MHz at I/Q base-band output for 40MHz RF bandwidth

Maximum RF gain (Main address 1 D[7:5] = 111) 4.5

Maximum RF gain - 16dB (Main address 1 D[7:5] = 101) 15

Out-of-Band Input IP3

20MHz RF channel, two-tone jammers at +25MHz and +48MHz frequency offset with -39dBm/tone

-65dBm wanted signal, RF gain = max (Main address 1 D[7:0] = 11101001)

-13

dBm

-49dBm wanted signal, RF gain = max - 16dB (Main address 1 D[7:0] = 10101001)

-5


11

40MHz RF channel, two-tone jammers at +50MHz and +96MHz frequency offset with -39dBm/tone

-65dBm wanted signal, RF gain = max (Main address 1 D[7:0] = 11101001)

-13


-5


11

1dB Gain Desensitization by Alternate Channel Blocker

Blocker at ±40MHz offset frequency for 20MHz RF channel -24

dBmBlocker at ±80MHz offset frequency for 40MHz RF channel -24

Input 1dB Gain Compression

Max RF gain (Main address 1 D[7:5] = 111) -34

dBmMax RF gain - 8dB (Main address 1 D[7:5] = 110) -25

Max RF gain - 16dB (Main address 1 D[7:5] = 101) -18

Max RF gain - 32dB (Main address 1 D[7:5] = 001) -1

AC Electrical Characteristics—Rx Mode (continued)




AC Electrical Characteristics—Rx Mode (continued)


Output 1dB Gain Compression Over passband frequency range, at any gain setting, 1dB compression point 0.63 VP-P

Baseband -3dB Lowpass Corner Frequency

Main address 0 D1 = 0 9.5MHz

Main address 0 D1 = 1 19

Baseband Filter Stopband Rejection

Rejection at 30MHz offset frequency for 20MHz channel 74dB

Rejection at 60MHz offset frequency for 40MHz channel 69

Baseband -3dB Highpass Corner Frequency

Main address 5 D1 = 1 600

kHzMain address 5 D1 = 0, Main address 4 D3 = 1 10

Main address 5 D1 = 0, Main address 4 D3 = 0 (Note 3) 0.1

Steady-State I/Q Output DC Error with AC-Coupling

50µs after enabling receive mode and togging RXHP from 1 to 0, averaged over many measurements if I/Q noise voltage exceeds 1mVRMS, at any given gain setting, no input signal, 1-sigma value

2 mV

I/Q Gain Imbalance 1MHz baseband output, 1-sigma value 0.1 dB

I/Q Phase Imbalance 1MHz baseband output, 1-sigma value 0.2 deg

Sideband Suppression 1MHz baseband output 40 dB

Receiver Spurious Signal Emissions

LO frequency -75

dBm/ MHz

2O LO frequency -62

3O LO frequency -75

4O LO frequency -54

RF RSSI Output Voltage -25dBm input power 1.6 V

Baseband RSSI Slope 18 26.5 37 mV/dB

Baseband RSSI Maximum Output Voltage 2.3 V

Baseband RSSI Minimum Output Voltage 0.5 V

RF Loopback Conversion Gain Tx VGA gain at max (Main address 9 D[9:4] = 111111), Rx VGA gain at max - 24dB (Main address 1 D[3:0] = 0101) -17.1 -10 -1.7 dB

(Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25°C to +85°C, RF freq = 5.351GHz, LO freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low, with power matching at TXRF+ and TXRF- differential ports using the Typical Operating Circuit; 100mVRMS sine and cosine signal applied to I/Q baseband inputs of transmitter (differential DC-coupled). Typical values measured at VCC = 2.85V, TA = +25°C, channel bandwidths of 40MHz.) (Note 1)



AC Electrical Characteristics—Tx Mode


TRANSMIT SECTION: Tx BASEBAND I/Q INPUTS TO RF OUTPUTSIncludes Matching and Balun Loss

RF Output Frequency Range 4.9 5.9 GHz

Peak-to-Peak Gain Variation Over RF Band At one temperature 0.7 1.55 dB

Maximum Output Power

20MHz OFDM signal conforming to spectral emission mask and -34dB EVM -3

dBm40MHz OFDM signal confirming to spectral emission mask and -34dB EVM -3

Output 1dB Gain Compression Relative to typical maximum output power at 9.5MHz input frequency 11 dBc

Input 1dB Gain Compression At 19MHz input frequency, over input common-mode voltage between 0.5V and 1.1V 380 mVRMS

Gain Control Range 24 31.5 34 dB

Gain Control Step 0.5 dB

RF Output Return Loss -3 dB

Unwanted Sideband Over RF channel, RF frequency, baseband frequency, and gain settings (Note 4) -40 dBc

Carrier Leakage Over RF channel, RF frequency, and gain settings (Note 4) -29 -15 dBc

Tx I/Q Input Impedance (R || C)Minimum differential resistance 60 kΩ

Maximum differential capacitance 2 pF

Baseband Filter Stopband Rejection

At 30MHz frequency offset for 20MHz RF channel 86dB

At 60MHz frequency offset for 40MHz RF channel 67

Tx Calibration Ftone LevelAt Tx gain code (Main address 9 D[9:4]) = 100010 and -15dBc carrier leakage (Local address 27 D[2:0] = 110 and Main address 1 D[3:0] = 0000)

-24 dBVRMS

Tx Calibration RF Gain Step Relative to Maximum Gain

Local address 27 D[1:0] = 01 -14dB

Local address 27 D[1:0] = 00 -28

Tx Calibration Baseband Gain Step Relative to Maximum Gain Local address 27 D2 = 0 -5 dB

(Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25°C to +85°C, freq = 5.35GHz. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low. Typical values measured at VCC = 2.85V, TA = +25°C, LO freq = 5.35GHz.) (Note 1)

(Operating conditions unless otherwise specified: VCC = 2.7V to 3.6V, TA = -25°C to +85°C. Reference freq = 40MHz, ENABLE = high, CS = high, SCLK = DIN = low. Typical values measured at VCC = 2.85V, TA = +25°C.) (Note 1)



AC Electrical Characteristics—Frequency Synthesis

AC Electrical Characteristics—Miscellaneous Blocks


FREQUENCY SYNTHESIZER

RF Channel Center Frequency 4.9 5.9 GHz

Channel Center Frequency Programming Step 76.294 Hz

Closed-Loop Integrated Phase Noise

Loop BW = 200kHz, integrate phase noise from 1kHz to 10MHz -35 dBc

Charge-Pump Output Current 0.8 mA

Spur LevelfOFFSET = 0 to 19MHz -42

dBcfOFFSET = 40MHz -66

Reference Frequency 40 MHz

Reference Frequency Input Levels AC-coupled to XTAL pin 800 mVP-P

Maximum Crystal Motional Resistance 50 Ω

Crystal Capacitance Tuning Range Base-to-ground capacitance 30 pF

Crystal Capacitance Tuning Step 140 fF

CLKOUT Signal Level 10pF load capacitance VCC - 0.8

VCC - 0.1 VP-P

CLKOUT2 Signal Level 4pF load capacitance 0.3 VP-P

PARAMETER CONDITIONS MIN TYP MAX UNITSPA POWER-DETECTOR MUXOutput Voltage Drop VIN = 2.0V, load resistance = 10kΩ to ground 15 32 mV

PA ON/OFF CONTROLVCC_PA_BIAS Input Voltage Range 3.1 3.6 V

VCC_PA_BIAS Supply Current With 10mA load at PA_BIAS 10.5 mA

Output High Level 10mA load current, Main address 11 D[7:5] = 011 2.8 V

Output Low Level 1mA load current, Main address 11 D[7:5] = 011 25 mV

Turn-On Time Measured from CS rising edge 0.3 µs

ON-CHIP TEMPERATURE SENSOR

Digital Output CodeReadout at DOUT pin through Main address 3 D[4:0]

TA = +25°C 13

TA = +85°C 22

TA = -25°C 2




AC Electrical Characteristics—Timing

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

SYSTEM TIMING

Shutdown Time 2 µs

Maximum Channel Switching Time

Loop bandwidth = 200kHz, settling to within ±1kHz from steady state 2 ms

Maximum Channel Switching Time with Preselected VCOSub-Band

Loop bandwidth = 200kHz, settling to within ±1kHz from steady state 56 µs

Rx/Tx Turnaround TimeMeasured from CS rising edge

Rx to Tx mode, Tx gain settles to within 0.2dB of steady state

2

µsTx to Rx mode with RXHP = 1, Rx gain settles to within 0.5dB of steady state

2

Tx Turn-On Time (from Standby Mode)

Measured from CS rising edge, Tx gain settles to within 0.2dB of steady state 2 µs

Tx Turn-Off Time (to Standby Mode) From CS rising edge 0.1 µs

Rx Turn-On Time (from Standby Mode)

Measured from CS rising edge, Rx gain settles to within 0.5dB of steady state 2 µs

Rx Turn-Off Time (to Standby Mode) From CS rising edge 0.1 µs

Note 1: The MAX2851 is production tested at TA = +25°C, minimum/maximum limits at TA = +25°C are guaranteed by test unless otherwise specified. Minimum/maximum limits at TA = -25°C and +85°C are guaranteed by design and characterization. There is no power-on register settings self-reset; recommended register settings must be loaded after VCC is applied.

Note 2: Minimum/maximum limit is guaranteed by design and characterization.Note 3: It is currently not recommended and not tested. For test coverage support, contact manufacturer.Note 4: For optimal Rx and Tx quadrature accuracy over temperature, the user can utilize the Rx calibration and Tx calibration

circuit to assist quadrature calibration.




AC Electrical Characteristics—Timing (continued)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

4-WIRE SERIAL INTERFACE TIMING (Figure 1)

SCLK Rising Edge to CS Falling Edge Wait Time tCSO 6 ns

Falling Edge of CS to Rising Edge of First SCLK Time tCSS 6 ns

DIN to SCLK Setup Time tDS 6 ns

DIN to SCLK Hold Time tDH 6 ns

SCLK Pulse-Width High tCH 6 ns

SCLK Pulse-Width Low tCL 6 ns

Last Rising Edge of SCLK to Rising Edge of CS or Clock to Load Enable Setup Time

tCSH 6 ns

CS High Pulse Width tCSW 50 ns

Time Between Rising Edge of CS and the Next Rising Edge of SCLK

tCS1 6 ns

SCLK Frequency fCLK 40 MHz

Rise Time tR 2.5 ns

Fall Time tF 2.5 ns

(VCC = 2.8V, TA = +25°C, fLO = 5.35GHz, fREF = 40MHz, CS = high, SCLK = DIN = low, RF BW = 20MHz, Tx output at 50Ω unbalanced output of balun, using the MAX2851 Evaluation Kit, unless otherwise noted.)


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Typical Operating Characteristics

RECEIVER

Rx MAXIMUM GAIN vs. FREQUENCY

MAX

2851

toc0

7

GAIN

(dB)

65

66

67

68

69

70

71

64

FREQUENCY (GHz)5.85.75.5 5.65.1 5.2 5.3 5.45.04.9 5.9

Rx3 Rx2Rx4

Rx1Rx5

Rx GAIN vs. BASEBAND VGA GAIN

BASEBAND VGA GAIN CODE

GAIN

(dB)

14128 104 62

0

10

20

30

40

50

60

70

80

-100 16

MAX

2851

toc0

8

LNA = MAXLNA = MAX - 8dB

LNA = MAX - 24dB

LNA = MAX - 32dB

LNA = MAX - 40dB

LNA = MAX - 16dB

Rx OUTPUT V1dB vs. GAIN SETTINGM

AX28

51 to

c09

BASEBAND VGA GAIN CODE

OUTP

UT V

1dB (

V RMS

)

1412108642

0.2

0.4

0.6

0.8

1.0

1.2

1.4

00 16

FBB = 1MHz

FBB = 19MHz

TA = +25°C

TA = -20°CTA = -20°C

TA = +25°CTA = +85°C

TA = +85°C

Rx3 MAXIMUM GAIN vs. FREQUENCY

MAX

2851

toc0

4

FREQUENCY (GHz)

GAIN

(dB)

5.85.75.5 5.65.1 5.2 5.3 5.45.0

2530354045505560657075

204.9 5.9

LNA = MAX GAIN

LNA = MAX - 8dB

LNA = MAX - 16dB

LNA = MAX - 24dB

LNA = MAX - 32dB

LNA = MAX - 40dB

Rx3 MAXIMUM GAINvs. TEMPERATURE AND FREQUENCY

MAX

2851

toc0

5

GAIN

(dB)

65

66

67

68

69

70

71

72

73

74

64

FREQUENCY (GHz)5.85.75.5 5.65.1 5.2 5.3 5.45.04.9 5.9

TA = -20°C

TA = +25°C

TA = +85°C

Rx2 MAXIMUM GAIN WITH FIXEDLNA SUB-BAND (MAIN ADDRESS 2 D[6:5])

MAX

2851

toc0

6

GAIN

(dB)

57

59

61

63

65

67

69

71

73

75

55

FREQUENCY (GHz)5.85.75.5 5.65.1 5.2 5.3 5.45.04.9 5.9

BAND 0 BAND 1BAND 2

BAND 3

Rx MODE SINGLE-CHANNELSUPPLY CURRENT

MAX

2851

toc0

1

VCC (V)

I CC

(mA)

3.53.43.33.23.13.02.92.82.7

140

142

144

146

148

150

152

1382.6 3.6

TA = +25°C

TA = +85°C

TA = -40°C

Rx MODE 5-CHANNEL SUPPLY CURRENT

MAX

2851

toc0

2

VCC (V)

I CC

(mA)

3.53.43.33.23.13.02.92.82.7

360

365

370

375

380

385

390

3552.6 3.6

TA = +25°C

TA = +85°C

TA = -40°C

Rx NOISE FIGURE vs. VGA GAINSETTINGS (BALUN INPUT REFERRED)

MAX

2851

toc0

3

Rx VGA GAIN SETTINGS

NOIS

E FI

GURE

(dB)

131210 113 4 5 6 7 8 91 2

5

10

15

20

25

30

35

40

45

00 14 15

MAX - 40dB

MAX - 32dB

MAX - 24dB

MAX - 16dB

MAX - 8dB

MAX




Typical Operating Characteristics (continued)

Rx INPUT RETURN LOSS

MAX

2851

toc1

6

FREQUENCY (GHz)

S11 (

dB)

5.85.65.45.25.0

-18

-16

-14

-12

-10

-8

-6

-4

-2

0

-204.8 6.0

Rx3Rx5

Rx1, 2, 4

Rx RF RSSI OUTPUT

MAX

2851

toc1

7

RF INPUT POWER (dBm)

RF R

SSI O

UTPU

T VO

LTAG

E (V

)

-5-10-15-20-25-30-35-40-45

0.5

1.0

1.5

2.0

2.5

0-50 0

LOW GAIN,TA = -20°C

LOW GAIN,TA = +25°C

HIGH GAIN,TA = +25°C

HIGH GAIN,TA = +85°C

LOW GAIN, TA = +85°C

HIGH GAIN, TA = -20°C

Rx RF RSSI ATTACK TIME(+40dB SIGNAL STEP)

MAX2851 toc18

1.0V/div

1.0V/div

0V

0V

400ns/div

∆: 280ns@: 192ns

∆: 1.32V@: 1.84V

GAIN CONTROL

VRSSI

Rx4 EMISSION SPECTRUM AT LNA INPUT (LNA MAX GAIN)

MAX

2851

toc1

3

OUTP

UT P

OWER

(dBm

)

2.65GHz/div

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-1000Hz 2.65GHz

4 LO2 LO

RF FREQUENCY

Rx INPUT IMPEDANCEAT MAX LNA GAIN

MAX2851 toc14

RF FREQUENCY (GHz)

IMAGINARY PART (Ω)

REAL

PAR

T (Ω

)

5.85.75.0 5.1 5.2 5.4 5.55.3 5.6

-10

0

10

20

30

40

50

60

-20

-30

-10

-20

0

10

20

30

40

-404.9 5.9

Rx5

Rx5

Rx1Rx2, 3, 4

Rx2, 3, 4 Rx1

Rx3 INPUT RETURN LOSS

MAX

2851

toc1

5

FREQUENCY (GHz)

S11 (

dB)

5.85.65.45.25.0

-18

-16

-14

-12

-10

-8

-6

-4

-2

0

-204.8 6.0

TA = +85°C

TA = +25°CTA = -40°C

Rx EVM vs. INPUT POWER(CHANNEL BANDWIDTH = 20MHz)

INPUT POWER (dBm)

Rx E

VM (d

B)

-10-30-50-70

-35

-30

-25

-20

-15

-40-90 10

MAX

2851

toc1

0

LNA = MAX

LNA = MAX = -8dB

LNA = MAX = -16dB

LNA = MAX = -24dB LNA = MAX = -32dB

LNA = MAX = -40dB

Rx EVM vs. Rx BASEBANDOUTPUT LEVEL

MAX

2851

toc1

1

Rx BASEBAND OUTPUT LEVEL (dBVRMS)

Rx E

VM (%

)

-5-10-15-20-25

2

4

6

8

10

12

0-30 0

VGA GAIN = 0

VGA GAIN = 2/4/6/8/10/12/14

VGA GAIN = 3/5/7/9/11/13/15

Rx EVM vs. OFDM JAMMER POWER AT20MHz AND 40MHz OFFSET FREQUENCY

WITH WANTED SIGNAL AT -66dBm

MAX

2851

toc1

2

INPUT POWER (dBm)

Rx E

VM (%

)

50-5-10-15-20-25-30-35

2

4

6

8

10

12

14

0-40 10

20MHz OFFSET

40MHz OFFSET




Rx LPF 20MHz CHANNELBANDWIDTH GROUP DELAY

MAX2851 toc25

GROU

P DE

LAY

(ns)

010k 100M

100

FREQUENCY (Hz)

Rx LPF 40MHz CHANNELBANDWIDTH GROUP DELAY

MAX2851 toc26

GROU

P DE

LAY

(ns)

010k 100M

100

FREQUENCY (Hz)

Rx DC OFFSET SETTLING RESPONSE(-30dB Rx VGA GAIN STEP)

MAX2851 toc27

50mV/div

0VRx BASEBAND

I/Q OUTPUT

200ns/div

CH1 PEAK TOPEAK: 81.9mV

GAIN-CONTROLTOGGLE

Rx BASEBAND RSSI-32dB STEP RESPONSE

MAX2851 toc22

2.7V

0.6V

0V2.0V

1µs/div

∆: 1.18µs@: 1.16µs

∆: 1.62V@: 480mV

LNA GAIN CONTROL

RSSI OUTPUT

MAX

2851

toc2

3

BASEBAND FREQUENCY (Hz)

RESP

ONSE

(dB)

-35

-13510k 100M

Rx LPF 20MHz CHANNEL BANDWIDTHRESPONSE

MAX

2851

toc2

4

FREQUENCY (Hz)

RESP

ONSE

(dB)

-35

-13510k 100M

Rx LPF 40MHz CHANNEL BANDWIDTHRESPONSE

Rx RF RSSI DELAY TIME(-40dB SIGNAL STEP)

MAX2851 toc19

1.0V/div

1.0V/div

0V

0V

400ns/div

∆: 216ns@: 128ns

∆: 1.30V@: 460mV

GAIN CONTROL

VRSSI

BASEBAND RSSI VOLTAGEvs. INPUT POWER

MAX

2851

toc2

0

RF INPUT POWER (dBm)

BASE

BAND

RSS

I OUT

PUT

VOLT

AGE

(V)

0-20-40-60-80

0.5

1.0

1.5

2.0

2.5

3.0

0-100 20

LNA = MAX - 16dB

LNA = MAX - 8dB

LNA = MAX - 32dB

LNA =MAX - 24dB

LNA = MAX LNA = MAX - 40dB

Rx BASEBAND RSSI+40dB STEP RESPONSE

MAX2851 toc21

2.7V

0.8V

0V2.4V

1µs/div

∆: 460ns@: 440ns

∆: 1.50V@: 2.30V

LNA GAIN CONTROL

RSSI OUTPUT





Rx BASEBAND DC OFFSET SETTLINGRESPONSE WITH RxHP = 0

(MAX - 40dB TO MAX LNA GAIN STEP)MAX2851 toc34

50mV/div0V

10µs/div

GAIN-CONTROLTOGGLERx BASEBAND

I/Q OUTPUT

Rx BASEBAND VGA SETTLINGRESPONSE (-30dB BASEBAND

VGA GAIN STEP)MAX2851 toc35

0.1V/div0V

100ns/div

GAIN-CONTROLTOGGLE

Rx BASEBANDI/Q OUTPUT

CH1 PEAK TOPEAK: 652mV

Rx BASEBAND VGA SETTLINGRESPONSE (+4dB BASEBAND


0.1V/div0V

100ns/div

GAIN-CONTROLTOGGLE

Rx BASEBANDOUTPUT




10mV/div0V

10µs/div

GAIN-CONTROLTOGGLE



(MAX TO MAX - 40dB LNA GAIN STEP)MAX2851 toc32

50mV/div0V

10µs/div

GAIN-CONTROLTOGGLE




10mV/div0V

10µs/div

GAIN-CONTROLTOGGLE


Rx DC OFFSET SETTLING RESPONSE(+8dB Rx VGA GAIN STEP)

MAX2851 toc28

10mV/div

0V

200ns/div


GAIN-CONTROLTOGGLE



MAX2851 toc29

10mV/div

0V

200ns/div


GAIN-CONTROLTOGGLE



MAX2851 toc30

50mV/div

0V

200ns/div


GAIN-CONTROL TOGGLE







Rx LNA SETTLING RESPONSE(MAX - 32dB TO MAX GAIN STEP)

MAX2851 toc43

0.1V/div0V

200ns/div

Rx BASEBANDOUTPUT

∆: 130mv@: 132mv

CH1 RMS: 155mV

GAIN-CONTROLTOGGLE


MAX2851 toc44

0.1V/div0V

200ns/div

Rx BASEBANDOUTPUT

∆: 130mv@: 132mv

CH1 RMS: 154mV

GAIN-CONTROLTOGGLE

HISTOGRAM: Rx I/Q GAIN IMBALANCE

SAMPLES = 3413, AVG = -0.015dB,STDEV = 0.042dB

MAX2851 toc45

-800.00m 800.00m0

648

540

432

324

216

108

0


MAX2851 toc40

0.1V/div0V

100ns/div

GAIN-CONTROLTOGGLE

Rx BASEBANDOUTPUT

∆: 130mv@: 132mvCH1 RMS:188mV


MAX2851 toc41

0.1V/div0V

100ns/div

Rx BASEBANDOUTPUT

∆: 130mv@: 132mv

GAIN-CONTROLTOGGLE

CH1 RMS: 176mV


MAX2851 toc42

0.1V/div0V

100ns/div

Rx BASEBANDOUTPUT

∆: 130mv@: 132mv

CH1 RMS: 174mV

GAIN-CONTROLTOGGLE



0.1V/div0V

100ns/div

GAIN-CONTROLTOGGLERx BASEBAND

OUTPUT




0.1V/div0V

100ns/div

GAIN-CONTROLTOGGLE

Rx BASEBANDOUTPUT

CH1 PEAK TOPEAK: 800mVCLIPPING NEGATIVE

Rx LNA SETTLING RESPONSE(MAX TO MAX - 40dB GAIN STEP)

MAX2851 toc39

0.1V/div0V

100ns/div

GAIN-CONTROLTOGGLE

Rx BASEBANDOUTPUT

∆: 130mv@: 132mvCH1 RMS:168mV





POWER-ON DC OFFSET CANCELLATIONWITHOUT INPUT SIGNAL

MAX2851 toc49

50mV/div

RXBBI_

500mV/div

RXBBQ_

400ns/div

Rx ENABLE

TURN-ONTRANSIENT

Rx CHANNEL ISOLATION

MAX

2851

toc5

0

fLO (MHz)

ISOL

ATIO

N (d

B)

10

20

30

40

50

60

70

80

0

4900

5000

5100

5200

5300

5400

5500

5600

5700

5800

5900

Rx3 TO Rx4

Rx4 TO Rx5Rx1 TO Rx2 Rx2 TO Rx3

Rx5 TO Rx4

HISTOGRAM: Rx I/Q PHASE IMBALANCE

SAMPLES = 3413, AVG = -0.15deg,STDEV = 0.18deg

MAX2851 toc46180

150

120

90

60

30

0-2.0000 0 2.0000

HISTOGRAM: Rx STATIC DC OFFSET

SAMPLES = 3413, AVG = -0.5mV,STDEV = 2.14mV

MAX2851 toc47132

110

88

66

44

0

22

-15.000m 0 15.000m

POWER-ON DC OFFSET CANCELLATIONWITH INPUT SIGNAL

MAX2851 toc48

2V/div

0.1V/div

0V

0V

1µs/div

Rx ENABLE

ENGAGE 600kHzHIGHPASS CORNER

∆: 2.14µs@: 2.12µs

∆: 112mV@: 104mV

Rx BASEBAND OUTPUT





Tx EVM vs. OUTPUT POWER(100mVRMS 54Mbps WLAN SIGNAL)

MAX

2851

toc5

7

OUTPUT POWER (dBm)

Tx E

VM (d

B)

-5-10-15-20-25-30-35

-36

-34

-32

-30

-28

-38-40 0

TA = +25°C

TA = -20°C

TA = +85°C

Tx MAX OUTPUT POWER MEETING-33dBc EVM AND 802.11a

SPECTRAL MASK

FREQUENCY (MHz)

OUTP

UT P

OWER

(dBm

)

5700550053005100

-6

-4

-2

0

2

-84900 5900

MAX

2851

toc5

8

TA = +85°C

TA = -20°C

TA = +25°C

MAX

2851

toc5

9

RF FREQUENCY (MHz)

-18

-28

-38

-48

-5810dB/div

-68

-78

-88

-985300 5350 5400

Tx2 OUTPUT SPECTRUM AT -5dBM(20MHz CHANNEL BANDWIDTH,

802.11a 54Mbps)

0dBr

-40dBr

Tx OUTPUT POWERvs. FREQUENCY AT MAXIMUM GAIN

MAX

2851

toc5

4

FREQUENCY (MHz)

OUTP

UT P

OWER

(dBm

)

5700550053005100

-4

-3

-2

-1

0

1

-54900 5900

TA = +85°C

TA = -20°C

TA = +25°C

Tx OUTPUT POWER vs. GAIN SETTINGM

AX28

51 to

c55

Tx GAIN CODE

OUTP

UT P

OWER

(dBm

)

605010 20 30 40

-35

-30

-25

-20

-15

-10

-5

0

-400 70

TA = -20°C

TA = +25°C

TA = +85°C

Tx GAIN STEP vs. GAIN SETTING

MAX

2851

toc5

6

Tx GAIN CODE

GAIN

STE

P (d

B)

605040302010

-0.7

-0.6

-0.5

-0.4

-0.3

-0.2

-0.80 70

TA = +85°C

TA = -20°CTA = +25°C

Tx MODE SUPPLY CURRENTM

AX28

51 to

c51

VCC (V)

I CC

(mA)

3.53.43.33.23.13.02.92.82.7

174

176

178

180

182

184

1722.6 3.6

TA = +85°C

TA = +25°C

TA = -40°C

OUTPUT RETURN LOSS ATTA = +25°C vs. Tx CHANNELS

MAX

2851

toc5

2

FREQUENCY (MHz)

RETU

RN LO

SS (d

B)

5800

5700

5600

5500

5400

5300

5200

5100

5000

-20

-15

-10

-5

0

-25

4900

5900

Tx4

Tx2

Tx1

Tx3

Tx OUTPUT RETURN LOSSvs. FREQUENCY

MAX

2851

toc5

3

FREQUENCY (GHz)

RETU

RN LO

SS (d

B)

-8

-7

-6

-5

-4

-3

-2

-1

0

-95.75.55.35.14.9 5.9

TA = -20°C

TA = +85°C

TA = +25°C

TRANSMITTER





Tx UNWANTED SIDEBANDvs. GAIN SETTING

MAX

2851

toc6

3

Tx GAIN CODE

UNW

ANTE

D SI

DEBA

ND (d

Bc)

605040302010

-45

-40

-35

-30

-25

-500 70

TA = +85°C

TA = +25°C

TA = -20°C

HISTOGRAM: CARRIER SUPPRESSION

SAMPLES = 3413, AVG = -34.9dBc,STDEV = 3.61dB

MAX2851 toc65102

85

68

51

34

17

0-50.000 -18.000-34.000

Tx6 OUTPUT EMISSION SPECTRUMAT MAX GAIN AND COLD

(100mVRMS 802.11A 54Mbps SIGNAL)

MAX

2851

toc6

4

OUTP

UT P

OWER

(dBm

/MHz

)

2.65GHz/divRF FREQUENCY (GHz)

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-1000Hz 26.5

LO

2 LO

4 LO

3 LO

HISTOGRAM: SIDEBAND SUPPRESSION

SAMPLES = 3413, AVG = -44.6dBc,STDEV = 2.58dB

MAX2851 toc66156

130

104

78

52

26

0-62.000 -26.000-44.000

Tx CARRIER LEAKAGEvs. RF FREQUENCY

MAX

2851

toc6

0

RF FREQUENCY (MHz)

CARR

IER

LEAK

AGE

(dBc

)

-60

-55

-50

-45

-40

-35

-65

5800

5700

5600

5500

5400

5300

5200

5100

5000

4900

5900

TA = -20°C

TA = +85°CTA = +25°C

Tx CARRIER LEAKAGE vs. GAIN SETTING

MAX

2859

toc6

1

Tx GAIN CODE

CARR

IER

LEAK

AGE

(dBc

)

605010 20 30 40

-60

-55

-50

-45

-40

-35

-30

-25

-650 70

TA = +85°C

TA = -20°C

TA = +25°C

Tx UNWANTED SIDEBANDvs. RF FREQUENCY

RF FREQUENCY (MHz)

UNW

ANTE

D SI

DEBA

ND (d

Bc)

-60

-55

-50

-45

-40

-35

-65

MAX

2851

toc6

2

5800

5700

5600

5500

5400

5300

5200

5100

5000

4900

5900

TA = -20°CTA = +25°C

TA = +85°C





CLKOUT MODE SUPPLY CURRENTM

AX28

51 to

c67

VCC (V)

I CC

(mA)

3.53.43.33.23.13.02.92.82.7

3.5

4.0

4.5

5.0

5.5

6.0

3.02.6 3.6

TA = +85°C

TA = +25°C

TA = -40°C

CLKOUT2 MODE SUPPLY CURRENT

MAX

2851

toc6

8

VCC (V)

I CC

(mA)

3.53.43.33.23.13.02.92.82.7

4.5

5.0

5.5

6.0

6.5

7.0

4.02.6 3.6

TA = +85°C

TA = +25°C

TA = -40°C

LO FREQUENCY vs. DIFFERENTIALTUNE VOLTAGE AT TA = +25°C

MAX

2851

toc6

9

DIFFERENTIAL TUNE VOLTAGE (V)

LO F

REQU

ENCY

(GHz

)

2.01.51.00.5

4.5

5.0

5.5

6.0

6.5

7.0

4.00 2.5

SYNTHESIZER

LO GAIN vs. DIFFERENTIALTUNE VOLTAGE AT TA = +25°C

MAX

2851

toc7

0

DIFFERENTIAL TUNE VOLTAGE (V)

LO G

AIN

(MHz

/V)

2.01.51.00.5

100

200

300

400

500

600

00 2.5

LO PHASE NOISE AT 5900MHz AND HOTTEMPERATURE

MAX

2851

toc7

2

OFFSET FREQUENCY (Hz)

PHAS

E NO

ISE

(dBc

/Hz)

-140

-130

-120

-110

-100

-90

-80

-70

-60

-50

-1501k 10M

LO PHASE NOISE AT 5350MHz AND ROOMTEMPERATURE

MAX

2851

toc7

1

OFFSET FREQUENCY (Hz)

PHAS

E NO

ISE

(dBc

/Hz)

-140

-130

-120

-110

-100

-90

-80

-70

-60

-50

-1501k 10M

MAX

2851

toc7

3

400µs/div

25kHz

-25kHz0s 3.99ms

CHANNEL SWITCHING FREQUENCYSETTLING (4900MHz TO 5900MHz,

AUTOMATIC VCO SUB-BAND SELECTION)

FREQ

UENC

Y (5

kHz/d

iv)





CRYSTAL OSCILLATOR TUNING STEPWITH KYOCERA 2520 40MHz CRYSTAL

MAX

2851

toc8

0

CRYSTAL TUNING CODE

CRYS

TAL O

SCILL

ATOR

FRE

QUEN

CY T

UNIN

G ST

EP(p

pm)

25020015010050

0

0.5

1.0

1.5

2.0

2.5

-0.50 300

CRYSTAL OSCILLATOR TUNINGCAPACITANCE AT BASE AND EMITTER

(INCLUDE EV KIT COMPONENTS)

MAX

2851

toc8

1

CRYSTAL TUNING CODE

CAPA

CITA

NCE

AT B

ASE

AND

EMIT

TER

(pF)

25020015010050

20

40

60

80

100

120

140

00 300

EMITTER-TO-GROUNDCAPACITANCE

BASE-TO-GROUNDCAPACITANCE

MAX

2851

toc7

4

400µs/div

25kHz

-25kHz0s 3.99ms


AUTOMATIC VCO SUB-BAND SELECTION)

FREQ

UENC

Y (5

kHz/d

iv)

MAX

2851

toc7

7

5µs/div

50kHz

-50kHz0s 49.84µs

Tx-TO-Rx TURNAROUND FREQUENCYSETTLING AT MAX Tx POWER

FREQ

UENC

Y ER

ROR

(10k

Hz/di

v)

MAX

2851

toc7

5

10µs/div

25kHz

-25kHz0s 99.22µs


MANUAL VCO SUB-BAND SELECTION)

FREQ

UENC

Y (5

kHz/d

iv)

MAX

2851

toc7

8

5µs/div

50kHz

-50kHz0s 49.84µs

Rx-TO-Tx TURNAROUND FREQUENCYSETTLING AT MAX Tx POWER

FREQ

UENC

Y ER

ROR

(10k

Hz/di

v)

MAX

2851

toc7

6

10µs/div

25kHz

-25kHz0s 99.22µs


MANUAL VCO SUB-BAND SELECTION)

FREQ

UENC

Y (5

kHz/d

iv)

CRYSTAL OSCILLATOR TUNING RANGEWITH KYOCERA 40MHz 2520 CRYSTAL

MAX

2851

toc7

9

CRYSTAL TUNING CODE

FREQ

UENC

Y DE

VIAT

ION

FROM

40MH

z (pp

m)

25020015010050

-80

-60

-40

-20

0

20

40

60

80

100

-1000 300

TA = +85°C

TA = -20°C

TA = +25°C



Pin Configuration

TOP VIEW

TQFN

VCC_DIG

DOUT

CLKOUT2

CLKOUT

68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52

18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

RXBB

I5-

RXBB

I5+

V CC_

BB2

GND

RXRF

5+

RXRF

5-

V CC_

LNA5

V CC_

UCX

RXBB

Q5+

RXBB

Q4+

RXBB

I4-

RXBB

I4+

TXBB

Q-TX

BBQ+

TXBB

I-

TXBB

I+

RXBB

Q5-

RXBB

I1+

RXBB

I1-

RXBB

Q1+

RXBB

Q1-

V CC_

LNA1

RXRF

1+

RXRF

1-

ENAB

LE

V CC_

BB1

V CC_

XTAL

XTAL

XTAL

_CAP

RSSI

RXBB

I2+

RXBB

I2-

RXBB

2Q+

RXBB

2Q-

GND_VCO

CPOUT+

CPOUT-

RXBBQ3-

VCC_VCO

BYP_VCO

RXBBQ3+

RXBBI3+

RXBBI3-

DIN

CS

RXBBQ4-

SCLK

RXRF2+

RXRF2-

VCC_LNA2

GND

RXRF3-

VCC_LNA3

VCC_MXR1

PA_DET

VCC_MXR2

RXRF3+

RXRF4-

VCC_LNA4

RXRF4+

PA_BIAS

*EP

*EXPOSED PAD.

TXRF-

VCC_PA_BIAS

TXRF+

MAX2851



Pin DescriptionPIN NAME FUNCTION

1, 22 GND Ground

2 VCC_LNA2 Receiver 2 LNA Supply Voltage. Bypass with a capacitor as close as possible to the pin.

3 RXRF2-Receiver 2 LNA Differential Input. Input is DC-coupled and biased internally at 1.2V.

4 RXRF2+

5 VCC_MXR1 Receiver Downconverter Supply Voltage 1. Bypass with a capacitor as close as possible to the pin.



8 RXRF3+

9 VCC_MXR2 Receiver Downconverter Supply Voltage 2. Bypass with a capacitor as close as possible to the pin.

10 PA_DET External Power-Amplifier Detector Mux Input


12 RXRF4+


14 PA_BIAS External Power-Amplifier Voltage Bias Output

15 TXRF+ Transmitter Differential Output. These pins are in open-collector configuration. These pins should be biased at the supply voltage with differential impedance terminated at 300Ω.16 TXRF-

17 VCC_PA_BIASExternal Power-Amplifier Voltage Bias and Detector Mux Supply Voltage. Bypass with a capacitor as close as possible to the pin.

18 VCC_UCX Transmitter Upconverter Supply Voltage. Bypass with a capacitor as close as possible to the pin.



21 RXRF5+

23 VCC_BB2 Receiver Baseband Supply Voltage 2. Bypass with a capacitor as close as possible to the pin.

24 RXBBI5+Receiver 5 Baseband I-Channel Differential Output

25 RXBBI5-

26 RXBBQ5+Receiver 5 Baseband Q-Channel Differential Output

27 RXBBQ5-

28 TXBBI+Transmitter Baseband I-Channel Differential Input

29 TXBBI-

30 TXBBQ+Transmitter Baseband Q-Channel Differential Input

31 TXBBQ-


33 RXBBI4-


35 RXBBQ4-

36 CS Active-Low Chip-Select Logic Input of 4-Wire Serial Interface

37 SCLK Serial-Clock Logic Input of 4-Wire Serial Interface

38 DIN Data Logic Input of 4-Wire Serial Interface


40 RXBBI3-



Pin Description (continued)PIN NAME FUNCTION41 RXBBQ3+

Receiver 3 Baseband Q-Channel Differential Output42 RXBBQ3-

43 VCC_VCO VCO Supply Voltage. Bypass with a capacitor as close as possible to the pin.

44 BYP_VCO On-Chip VCO Regulator Output Bypass. Bypass with an external 1µF capacitor to GND_VCO with minimum PCB trace. Do not connect other circuitry to this pin.

45 GND_VCO VCO Ground46 CPOUT+ Differential Charge-Pump Output. Connect the frequency synthesizer’s loop filter between CPOUT+

and CPOUT- (see the Typical Operating Circuit).47 CPOUT-48 VCC_DIG Digital Block Supply Voltage. Bypass with a capacitor as close as possible to the pin.

49 DOUT Data Logic Output of 4-Wire Serial Interface

50 CLKOUT2 Reference Clock Buffer Output 2

51 CLKOUT Reference Clock Buffer Output

52 VCC_XTAL Crystal Oscillator Supply Voltage. Bypass with a capacitor as close as possible to the pin.

53 XTAL Crystal Oscillator Base Input. AC-couple crystal unit to this pin.

54 XTAL_CAP Crystal Oscillator Emitter Node

55 RSSI Receiver Signal Strength Indicator Output


57 RXBBI2-


59 RXBBQ2-

60 VCC_BB1 Receiver Baseband Supply Voltage 1. Bypass with a capacitor as close as possible to the pin.


62 RXBBI1-


64 RXBBQ1-


66 RXRF1+Receiver 1 LNA Differential Input. Input is DC-coupled and biased internally at 1.2V.

67 RXRF1-

68 ENABLE Enable Logic Input

— EP Exposed Paddle. Connect to the ground plane with multiple vias for proper operation and heat dissipation. Do not share with any other pin grounds and bypass capacitors’ ground.

Note 1: PA_BIAS pin can be kept active in nontransmit mode(s) by SPI programming.Note 2: CLKOUT signal is active independent of SPI, and is only dependent on the ENABLE pin.Note 3: CLKOUT2 signal can be enabled/disabled through SPI in all operating modes except shutdown mode.

Detailed DescriptionModes of OperationThe MAX2851 modes of operation are shutdown, clock-out, standby, receive, transmit, transmitter calibration, RF loopback, and baseband loopback. See Table 1 for a summary of the modes of operation. The logic input pin ENABLE (pin 68) and SPI Main address 0 D[4:2] control the various modes.

Shutdown ModeThe MAX2851 features a low-power shutdown mode. All circuit blocks are powered down, except the 4-wire serial bus and its internal programmable registers.

Clockout ModeIn clockout mode, only the crystal oscillator signal is active at the CLKOUT pin. The rest of the transceiver is powered down.

Standby ModeIn standby mode, PLL, VCO, and LO generation are on. Tx or Rx modes can be quickly enabled from this mode. Other blocks can be selectively enabled in this mode

Receive (Rx) ModeIn receive mode, all Rx circuit blocks are powered on and active. The antenna signal is applied; RF is down- converted, filtered, and buffered at the RXBB I and Q outputs.

Transmit (Tx) ModeIn transmit mode, all Tx circuit blocks are powered on and active. The external PA can be powered on through the PA_BIAS pin after a programmable delay.

Transmit Calibration ModeIn transmit calibration mode, all Tx circuit blocks are powered on and active. The AM detector and receiver I/Q channel buffers are also on. Output signals are routed to RXBB I and Q outputs.The AM detector multiplies the Tx RF output signal with itself. The self-mixing product of the wanted sideband becomes DC voltage and is filtered on-chip. The mixing product between wanted sideband and the carrier leak-age forms Ftone at the Rx baseband output. The mixing product between the wanted sideband and the unwanted sideband forms 2Ftone at the Rx baseband output.As the Tx RF output is self-mixed at the AM detector, the AM detector output responds differently to different gain settings and power levels. When the Tx RF output power changes by 1dB through Tx gain control, the AM detec-tor output changes by 2dB as both the wanted sideband and carrier leakage (or unwanted sideband) change by 1dB. When Tx RF output carrier leakage (or unwanted sideband) changes by 1dB while the wanted sideband output power is constant, the AM detector output changes by 1dB only.

Table 1. Operating Modes



MODE

MODE CONTROLLOGIC INPUTS CIRCUIT BLOCK STATES

ENABLE PIN

SPI MAIN ADDRESS 0,

D[4:2]Rx PATH Tx PATH

(NOTE 1) LO PATH CLKOUT (NOTES 2, 3)

CALIBRATION SECTIONS ON

SHUTDOWN 0 XXX Off Off Off Off None

CLOCKOUT 1 000 Off Off Off On None

STANDBY 1 001 Off Off On On None

Rx 1 010 On Off On On None

Tx 1 011 Off On On On None

Tx CALIBRATION 1 100 Off On On On AM detector + Rx5 I/Q buffers

RF LOOPBACK 1 101 On (except LNA) On On On RF loopback

BASEBAND LOOPBACK 1 11X On (except RXRF) Off On On Tx baseband buffer

RF Loopback ModeIn RF loopback mode, part of the Rx and Tx circuit blocks except the LNA are powered on and active. The transmit-ter I/Q input signal is upconverted to RF, and the output of the transmitter is fed to the receiver downconverter input. Output signals are delivered to all receiver baseband I/Q outputs. The I/Q lowpass filters in the transmitter signal path are bypassed.

Baseband Loopback ModeIn baseband loopback mode, part of the Rx and Tx baseband circuit blocks are powered and active. The transmitter I/Q input signal is routed to the receiver lowpass filter input. Output signals are delivered to receiver 5 baseband I/Q outputs.

Power-On SequenceSet the ENABLE pin to VCC for 2ms to start the crystal oscillator. Program all SPI addresses according to recom-mended values. Set SPI Main address 0 D[4:2] from 000 to 001 to engage standby mode. To lock the LO frequen-cy, the user can set SPI in order of Main address 15, Main address 16, and then Main address 17 to trigger VCO sub-band autoacquisition; the acquisition takes 2ms. After the LO frequency is locked, set SPI Main address 0 D[4:2] = 010 and 011 for Rx and Tx operating modes, respec-tively. Before engaging to Rx mode, set Main address 5 D1 = 1 to allow fast DC-offset settling. After engaging to Rx mode and the Rx baseband DC offset settles, the user

can set Main address 5 D1 = 0 to complete Rx DC-offset cancellation.

Programmable Registers and 4-Wire SPI InterfaceThe MAX2851 includes 60 programmable 16-bit registers. The most significant bit (MSB) is the read/write selection bit (R/W in Figure 1). The next 5 bits are register address (A[4:0] in Figure 1). The 10 least significant bits (LSBs) are register data (D[9:0] in Figure 1). Register data is loaded through the 4-wire SPI/MICROWIRE compatible serial interface. MSB of data at the DIN pin is shifted in first and is framed by CS. When CS is low, the clock is active and input data is shifted at the rising edge of the clock at the SCLK pin. At CS rising edge, the 10-bit data bits are latched into the register selected by the address bits. See Figure 1. To support more than a 32-register address using a 5-bit-wide address word, the bit 0 of address 0 is used to select whether the 5-bit address word is applied to the main address or local address. There is no power-on SPI register self-reset functionality in the MAX2851; the user must program all register val-ues after power-up. During the read mode, register data selected by address bits is shifted out to the DOUT pin at the falling edges of the clock.

Figure 1. 4-Wire SPI Serial-Interface Timing Diagram



SCLK

tCSO

tCSS

tDS tDHtCH

tCL

tCSW

tCSH

tCS1

A4R/W A0 D9 D0 DON’T CARE

A0 D9 D0A4R/W DIN(SPI WRITE) DON’T CARE

DON’T CARE D9DOUT(SPI READ)

DIN(SPI READ)

D0 DON’T CARE

tD

CS

SPI Register DefinitionAll values in the register definition table are typical numbers. The MAX2851 SPI does not have a power-

on-default self-reset feature; the user must program all SPI addresses for normal operation. Prior to use of any untested settings, contact the factory.

Table 2. Register Summary



REGISTER

READ/WRITE AND ADDRESS DATA

MAIN0_D0 A[4:0] WRITE (W)/

READ (R) D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Main 0 0 00000W/R RESERVED MODE[2:0] RFBW M/L_SEL

Default 0 0 0 0 1 0 0 0 1 0

Main 1 0 00001W/R RESERVED LNA_GAIN[2:0] VGA_GAIN[4:0]

Default 0 0 1 1 1 1 1 1 1 1

Main 2 0 00010W/R RESERVED LNA_BAND[1:0] RESERVED

Default 0 1 1 0 1 0 0 0 0 0

Main 3 0 00011

WRESERVED TS_EN

TS_ TRIG

RESERVEDRESERVED

R TS_READ[4:0]

Default 0 0 0 0 0 0 0 0 0 0

Main 4 0 00100 Reserved 1 1 0 0 0 1 1 1 0 0

Main 5 0 00101W/R RESERVED RSSI_MUX_SEL[2:0] RSSI_RX_SEL[2:0] RESERVED RXHP RESERVED

Default 0 0 0 0 0 0 0 0 0 0

Main 6 0 00110W/R RX_GAIN_PROG_SEL[5:1] E_RX[5:1]

Reserved 1 1 1 1 1 1 1 1 1 1

Main 7 0 00111 Reserved 0 0 0 0 1 0 0 1 0 0

Main 8 0 01000 W/R 0 0 0 0 0 0 0 0 0 0

Main 9 0 01001W/R TX_GAIN[5:0] RESERVED

Default 0 0 0 0 0 0 1 1 1 1

Main 10 0 01010 Reserved 0 0 0 0 0 0 0 0 0 0

Main 11 0 01011W/R RESERVED

Default 0 0 0 1 1 0 0 0 0 0

Main 13 0 01101 Reserved 0 0 0 0 0 0 0 0 0 0

Main 14 0 01110W/R E_CLKOUT2 RESERVED DOUT_SEL RESERVED

Default 1 1 0 1 1 0 0 0 0 0

Main 15 0 01111W/R

VAS_ TRIG_EN

RESERVED SYN_CONFIG_N[6:0]

Default 1 0 0 1 0 0 0 0 1 0

Main 16 0 10000W/R SYN_CONFIG_F[19:10]

Default 1 1 1 0 0 0 0 0 0 0

Main 17 0 10001W/R SYN_CONFIG_F[9:0]

Default 0 0 0 0 0 0 0 0 0 0

Main 18 0 10010W/R RESERVED XTAL_TUNE[7:0]

Default 0 0 1 0 0 0 0 0 0 0

Table 2. Register Summary (continued)



REGISTER




Main 19 0 10011

W/R RESERVEDVAS_

RELOCK_ SEL

VAS_ MODE

VAS_SPI[5:0]

Read RESERVED VAS_ADC[2:0] VCO_BAND[5:0]

Default 0 0 0 1 0 1 1 1 1 1

Main 20 0 10100 Reserved 0 1 1 1 1 0 1 0 1 0

Main 21 0 10101Read RESERVED DIE_ID[2:0] RESERVED

Default 0 0 1 0 1 1 1 1 1 1

Main 22 0 10110 Reserved 0 1 1 0 1 1 1 0 0 0

Main 23 0 10111 Reserved 0 0 0 1 1 0 0 1 0 1

Main 24 0 11000 Reserved 1 0 0 1 0 0 1 1 1 1

Main 25 0 11001 Reserved 1 1 1 0 1 0 1 0 0 0

Main 26 0 11010 Reserved 0 0 0 0 0 1 0 1 0 1

Main 27 0 11011W/R

DIE_ID_ READ

RESERVEDVAS_ VCO_ READ

RESERVED

Default 0 1 1 0 0 0 0 0 0 0

Main 28 0 11100W/R RESERVED PA_BIAS_DLY[3:0]

Default 0 0 0 1 1 0 0 0 1 1

Main 29 0 11101 Reserved 0 0 0 0 0 0 0 0 0 0

Main 30 0 11110 Reserved 0 0 0 0 0 0 0 0 0 0

Main 31 0 11111 Reserved 0 0 0 0 0 0 0 0 0 0

Local 1 1 00001 Reserved 0 0 0 0 0 0 0 0 0 0

Local 2 1 00010 Reserved 0 0 0 0 0 0 0 0 0 0

Local 3 1 00011 Reserved 0 0 0 0 0 0 0 0 0 0

Local 4 1 00100W/R RFDET_MUX_SEL[2:0] RESERVED

Reserved 1 1 1 0 0 0 0 0 0 0

Local 5 1 00101 Reserved 0 0 0 0 0 0 0 0 0 0

Local 6 1 00110 Reserved 0 0 0 0 0 0 0 0 0 0

Local 7 1 00111 Reserved 0 0 0 0 0 0 0 0 0 0

Local 8 1 01000 Reserved 0 1 1 0 1 0 1 0 1 0

Local 9 1 01001 Reserved 0 1 0 0 0 1 0 1 0 0

Local 10 1 01010 Reserved 1 1 0 1 0 1 0 1 0 0

Local 11 1 01011 Reserved 0 0 0 1 1 1 0 0 1 1

Local 12 1 01100 Reserved 0 0 0 0 0 0 0 0 0 0

Local 13 1 01101 Reserved 0 0 0 0 0 0 0 0 0 0

Local 14 1 01110 Reserved 0 0 0 0 0 0 0 0 0 0

Local 15 1 01111 Reserved 0 0 0 0 0 0 0 0 0 0

Local 16 1 10000 Reserved 0 0 0 0 0 0 0 0 0 0

Local 17 1 10001 Reserved 0 0 0 0 0 0 0 0 0 0

Table 2. Register Summary (continued)



REGISTER




Local 18 1 10010 Reserved 0 0 0 0 0 0 0 0 0 0

Local 19 1 10011 Reserved 0 0 0 0 0 0 0 0 0 0

Local 20 1 10100 Reserved 0 0 0 0 0 0 0 0 0 0

Local 21 1 10101 Reserved 0 0 0 0 0 0 0 0 0 0

Local 22 1 10110 Reserved 0 0 0 0 0 0 0 0 0 0

Local 23 1 10111 Reserved 0 0 0 0 0 0 0 0 0 0

Local 24 1 11000 Reserved 0 0 1 1 0 0 0 1 0 0

Local 25 1 11001 Reserved 0 1 0 0 1 0 1 0 1 1

Local 26 1 11010 Reserved 0 1 0 1 1 0 0 1 0 1

Local 27 1 11011W/R RESERVED

TX_AMD_ BB_GAIN

TX_AMD_ RF_GAIN

Default 0 0 0 0 0 0 0 0 0 0

Local 28 1 11100 Reserved 0 0 0 0 0 0 0 1 0 0

Local 31 1 11111 Reserved 0 0 0 0 0 0 0 0 0 0

Table 3. Main Address 0 (A[4:0] = 00000)

Table 4. Main Address 1 (A[4:0] = 00001, Main Address 0 D0 = 0)



BIT NAME BIT LOCATION(D0 = LSB) DESCRIPTION

RESERVED D[9:5] Reserved bits—set to default.

MODE[2:0] D[4:2]

IC operating mode select.000 = Clockout (default)001 = Standby010 = Rx011 = Tx100 = Tx calibration101 = RF loopback11x = Baseband loopback

RFBW D1RF bandwidth.0 = 20MHz1 = 40MHz (default)

M/L_SEL D0Main or local address select.0 = Main registers (default)1 = Local registers



LNA_GAIN[2:0] D[7:5]

LNA gain control. Active when Rx channel is selected by corresponding RX_GAIN_PROG_SEL[5:1] bits in Main address 6 D[9:5].000 = Max - 40dB001 = Max - 32dB100 = Max - 24dB (not tested, contact factory for coverage)101 = Max - 16dB110 = Max - 8dB111 = Max gain (default)

VGA_GAIN[4:0] D[4:0]

Rx VGA gain control. Active when Rx channel is selected by corresponding RX_GAIN_PROG_SEL[5:1] bits in Main address 6 D[9:5].00000 = Min gain00001 = Min + 2dB…01110 = Min + 28dB01111 = Min + 30dB…1xxxx = Min + 30dB (default)







RESERVED D[9:7], D[4:0] Reserved bits—set to default.

LNA_BAND[1:0] D[6:5]

LNA frequency band switch.00 = 4.9GHz~5.2GHz01 = 5.2GHz~5.5GHz (default)10 = 5.5GHz~5.8GHz11 = 5.8GHz~5.9GHz


RESERVED D[9:8], D5 Reserved bits—set to default.

TS_EN D7Temperature sensor enable.0 = Disable (default)1 = Enable except shutdown or clockout mode

TS_TRIG D6Temperature sensor reading trigger.0 = Not trigger (default)1 = Trigger temperature reading

TS_READ[4:0](Readback Only) D[4:0] SPI readback only. Temperature sensor reading.


RESERVED D9, D2, D0 Reserved bits—set to default.

RSSI_MUX_SEL[2:0] D[8:6]

RSSI output select.000 = Baseband RSSI (default)001 = Do not use010 = Do not use011 = Do not use100 = Rx RF detector101 = Do not use110 = PA power-detector mux output111 = Do not use

Table 7. Main Address 5 (A[4:0] = 00101, Main Address 0 D0 = 0) (continued)






RSSI_RX_SEL[2:0] D[5:3]

Baseband RSSI Rx channel select.000 = Not select (default)001 = Rx1010 = Rx2011 = Rx3100 = Rx4101 = Rx5110 = Do not use111 = Do not use

RXHP D1

Rx VGA highpass corner select after Rx turn-on. RXHP starts at 1 during Rx gain adjustment and set 0 after gain is adjusted.0 = 10kHz highpass corner after Rx gain is adjusted (default)1 = 600kHz highpass corner during Rx gain adjustment


RX_GAIN_PROG_SEL [5:1] D[9:5]

Rx channel gain programming select. Select which Rx channels are to be changed; gain is then determined by programming Main address 1 D[7:0].D9 selects Rx5, D8 selects Rx4, etc.0 = Not selected1 = Selected1111 = Default

E_RX[5:1] D[4:0]

Rx MIMO channel select. Enable Rx channels independently.D4 selects Rx5, D3 selects Rx4, etc.0 = Not selected1 = Select in Rx, RF loopback, or Tx calibration mode11111 = Default


TX_GAIN[5:0] D[9:4]

Tx VGA gain control. Tx channel is selected by Main address 9 D[3:0].000000 = Min gain (default)…111111 = Min gain + 31.5dB


Table 10. Main Address 14 (A[4:0] = 01110, Main Address 0 D0 = 0








E_CLKOUT2 D9CLKOUT2 enable.0 = Disable1 = Enable except during shutdown mode (default)

RESERVED D[8:2], D1 Reserved bits—set to default.

DOUT_SEL D1DOUT pin output select.0 = PLL lock detect (default)1 = SPI readback


VAS_TRIG_EN D9

Enable VCO sub-band acquisition triggerred by SYN_CONFIG_F[9:0] (Main address 17) programming.0 = Disable for small frequency adjustment (i.e., ~100kHz).1 = Enable for channel switching (default)


SYN_CONFIG_N[6:0] D[6:0] Integer divide ratio.1000010 = Default


SYN_CONFIG_F[19:10] D[9:0] Fractional divide ratio MSBs.1110000000 = Default


SYN_CONFIG_F[9:0] D[9:0] Fractional divide ratio LSBs.0000000000 = Default



XTAL_TUNE[7:0] D[7:0]

Crystal oscillator frequency tuning.00000000 = Min frequency10000000 = Default11111111 = Max frequency







VAS_RELOCK_SEL D7

VAS relock select.0 = Start at sub-band selected by VAS_SPI[5:0] (Main address 19 D5:D0) (default)1 = Start at current sub-band

VAS_MODE D6VCO sub-band select.0 = By VAS_SPI[5:0] (Main address 19 D[5:0])1 = By on-chip VCO autoselect (VAS) (default)

VAS_SPI[5:0] D[5:0]

VCO autoselect sub-band input. Select VCO subband when VAS_MODE (Main address 19 D6) = 0. Select initial VCO sub-band for autoacquisition when VAS_MODE = 1.000000 = Min frequency sub-band…011111 = Default…111111 = Max frequency sub-band

VAS_ADC[2:0](Readback Only) D[8:6]

Read VCO autoselect tune voltage ADC output. Active when VAS_VCO_READ (Main address 27 D5) = 1.000 = Lower than lock range and at risk of unlock001 = Lower than acquisition range and maintain lock010 or 101 = Within acquisition range and maintain lock110 = Higher than acquisition range and maintain lock111 = Higher than lock range and at risk of unlock

VCO_BAND[5:0](Readback Only) D[5:0] Read the current acquired VCO sub-band by VCO autoselect. Active

when VAS_VCO_READ (Main address 27 D5) = 1.



DIE_ID[2:0](Readback Only) D[7:5]

Read revision ID at Main address 21 D[7:5].Active when DIE_ID_READ (Main address 27 D9) = 1.000 = Pass1001 = Pass2…






DIE_ID_READ D9Die ID readback select.0 = Main address 21 D[9:0] reads its own values (default)1 = Main address 21 D[7:5] reads revision ID


VAS_VCO_READ D5

VAS ADC and VCO sub-band readback select.0 = Main address 19 D[9:0] reads its own values (default)1 = Main address 19 D[8:6] reads VAS_ADC[2:0]; Main address 19 D[5:0] reads VCO_BAND[5:0]



PA_BIAS_DLY[3:0] D[3:0]

PA_BIAS turn-on delay.0000 = 0µs0001 = 0µs0010 = 0.5µs0011 = 1.0µs (default)…1111 = 7.0µsOnly default is tested; contact factory for test coverage.

Table 19. Local Address 4 (A[4:0] = 00100, Main Address 0 D0 = 1)

Table 20. Local Address 27 (A[4:0] = 11011, Main Address 0 D0 = 1)




RFDET_MUX_SEL[2:0] D[9:7]

RF RSSI channel selection.000 = Rx1001 = Rx2010 = Rx3011 = Rx4100 = Rx5101 = Do not use110 = Do not use111 = Not selected (default)




TX_AMD_BB_GAIN D2Tx calibration AM detector baseband gain.0 = Minimum gain (default)1 = Minimum gain + 5dB

TX_AMD_RF_GAIN D[1:0]

Tx calibration AM detector RF gain.00 = Minimum gain (default)01 = Minimum gain + 14dB rise at output1x = Minimum gain + 28dB rise at output



CRYSTALOSCILLATOR/

BUFFER

PHASE-LOCKEDLOOP

1nF

V CC_

UCX

GND_VCO

BYP_VCO

VCC_VCO

1nF

0.1µF

1µF

CPOUT-

CPOUT+33pF

2.2nF

380Ω

PLL LOOP FILTER380Ω

ENAB

LE

RXBB

Q1-

RXBB

Q1+

RXBB

Q2-

RXBB

Q2+

RXBB

I2-

RXBB

I2+

RSSI

RXBB

I1-

RXBB

I1+

RXRF

1-

RXRF

1+

6.6pF39pF

1nF

40MHzXTAL

XTAL

_CAP

XTAL

1nF

1:2

V CC_

LNA1

0.1µF

V CC_

BB1

1.0µF

V CC_

XTAL

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34

68 67

LNA1

TXRF±

LNA2

TXRF±

LNA3

TXRF±

LNA4

TXRF±

TXRF±

AM DETECTOR

AMD

66 65 64 63 62 61 60 59 58 57 56 55 54 53 52

CLKOUTGND

+

1nF

VCC_MXR1

1nF

VCC_LNA3

1nF

VCC_MXR2

47pF

PA_DET

1nF

VCC_LNA4

1nF

VCC_PA_BIAS

PA_BIAS

RXRF2-

RXRF2+

22pF

1:2

1:2

1:2

1:2

1:2

RXRF2INPUT

RXRF3-

RXRF3+

22pF

RXRF3INPUT

RXRF4INPUT RXRF4-

RXRF4+

22pF

RXRF5INPUT

RXRF

5-

RXRF

5+

GND

22pF

RXRF1INPUT

22pF

TXRF+

TXRF-

1nF

2.2nH

0.75pFTXRF

OUTPUT

VCC_UCX

1nF

VCC_LNA2

0.1µF

V CC_

BB2

RXBB

I5+

RXBB

I5-

RXBB

Q5+

RXBB

Q5-

TXBB

I+

TXBB

I-

TXBB

Q+

TXBB

Q-

RXBB

I4+

RXBB

I4-

RXBBQ3-

RXBBQ3+

RXBBI3-

RXBBI3+

DIN

SCLK

CS

RXBBQ4-

CLKOUT2

DOUT

VCC_DIG

RXBB

Q4+

1nF

V CC_

LNA5

LPF1/Q1

LPF1/Q3

LNA5

TXRF±

LPF1/Q5AMD

LPF1/Q4

LPF1/Q2

90˚

0˚

SERIALINTERFACE

DOUT

0˚

90˚

RSSI MAX

RFRSSI

PA_DET

LNA1-5 LPF1/Q1-5

BBRSSI

MAX2851

Typical Operating Circuit



Package InformationFor the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.

Chip InformationPROCESS: BiCMOS

PACKAGE TYPE PACKAGE CODE OUTLINE NO.

68 TQFN-EP T6800+2 21-0142

http://www.maximintegrated.com/packages

http://pdfserv.maximintegrated.com/package_dwgs/21-0142.PDF

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.


© 2010 Maxim Integrated Products, Inc. 37

Revision HistoryREVISIONNUMBER

REVISION DATE DESCRIPTION PAGES

CHANGED

0 1/10 Initial release —

1 3/10 Modified EC table to support single-pass room test flow 2, 3, 5, 6–9

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

max2851 5ghz, 5-channel mimo receiver

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