may 11, 2010 freescale's high-performance starcore- based...

TMFreescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.

EUF-NET-T0783

Freescale's High-Performance StarCore-Based DSPs for the Baseband Market

May 11, 2010

Barry Stern - Baseband DSP Product Line Marketing ManagerAdam Segal - Video DSP Marketing Manager

TM

2Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc.

Agenda►Freescale DSP Roadmap►MSC8156/4 Multicore Baseband DSPs

• Broadband Wireless Access - Focus Markets• MSC8156 Multicore DSP – Highlights• MSC8156/4 DSP Enablement• MSC8156/4 DSP Typical Baseband Systems

►MSC825X Family• Starcore Core Highlights• MSC825X General Purpose DSP Family• MSC825X Target Markets• Development Tools• Application Examples

2

TM

3Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 3

StarCore DSP Devices Roadmap

2010

• 6/4 SC3850 1GHz+ Cores

• MAPLE-B Coprocessor• SRIO, PCIe

• 6/4 SC3850 1GHz+ Cores

• SRIO, PCIe

• 2/1 SC3850 1GHz+ Cores• SRIO, PCIe

Available Now

- Basestation- Medical

- Aerospace & Defense- Test & Measurement

- Medical- General Purpose

MSC8156MSC8156

MSC8154MSC8154

MSC8256MSC8256

MSC8254MSC8254

MSC8252MSC8252

MSC8251MSC8251

2011 2012

MSC8144MSC8144

MSC812xMSC812x

MSC8113/2MSC8113/2

• 4 SC3400 1GHz Cores

• 4 SC140 300-500MHz Cores

• 3/2 SC140 300-400MHz Cores

Next GenNext Gen

Next GenNext Gen

MSC711xMSC711x• 1 SC1400 266-

300MHz Core

Planning Execution ProductionProposal

Sample

Production

Pin for pin compatible Families:

Next GenNext Gen


MSC8156/4 Multicore Baseband DSPs

TM


Rysavy research

5

Mobile Broadband Standards – Timelines & Challenges

More Spectrum (5MHz to 60MHz)

Greater Spectral Efficiency

More Sites (Macro, Micro, Pico, Femto)

Latency requirements by different Technology => Better QoS

EDGEDL: 474 KbpsUL: 474 Kbps

Evolved EDGEDL: 1.89 MbpsUL: 947 Kbps

HSPADL: 14.4 MbpsUL: 5.76 Mbps

in 5MHz

Rel 7 HSPA+DL: 28 Mbps

UL: 5.76 Mbpsin 5MHz

LTEDL: 326 MbpsUL: 86 Mbps

In 20MHz

Rel 8 HSPA+DL: 42 Mbps

UL: 11.5 Mbpsin 5MHz

LTE(Rel 9)

in 20MHz

2008 2009 2010 2011 2012 2013

GSM

HSPA

LTEWave 2

DL: 46 MbpsUL: 4 Mbps

in 10MHz TDD

Rel. 1.5 IEEE 802.16mWiMAX

LTE Advanced(Rel 10)

in 60-100MHz

TM


Focus Market Segments

WiMAXMacrocell

MultimodeMicrocell

TD-SCDMAMacrocell

MultimodePicocell

3G-LTEMacrocell

WCDMA/HSPAMacrocell

SDR

MobileInfrastructure

High Performance

MultiStandard

► Multi-standard Wireless Basestations

► FDD-LTE (4G)► HSPA+ (3.5G)► TDD-LTE (4G China)► TD-SCDMA (3G China)► WiMAX

► Multiple Basestation Form Factors► Macro► Micro► Pico

► SDR – Software Definable Radio► Deploying different standard base

stations by using same hardware design enabled by different underlying software

Drive for optimal programmable DSP performance density

(Cost, Power)

http://www.3g.co.uk/PR/Feb2007/RRU8840.jpg

http://images.google.com/imgres?imgurl=http://www.streakwave.com/mmSWAVE1/Images/TR-WMX-35-pBS-1_100x100.jpg&imgrefurl=http://www.streakwave.com/Product-Wimax.asp&usg=__846Ktg8xMYJNIsu9mFAgsZPRixg=&h=100&w=100&sz=5&hl=en&start=45&tbnid=OyaLspO03zL9EM:&tbnh=82&tbnw=82&prev=/images?q=pico+base+station&gbv=2&ndsp=21&hl=en&rls=com.microsoft:en-us&sa=N&start=42

http://images.google.com/imgres?imgurl=http://blog.kievukraine.info/uploaded_images/5897-704886.jpg&imgrefurl=http://blog.kievukraine.info/2008/05/ukraine-approves-aperto-wimax.html&usg=__qYPIuwBs_hgySg-pOoJObXY27y4=&h=318&w=450&sz=39&hl=en&start=11&tbnid=-JRs756f0w_Y6M:&tbnh=90&tbnw=127&prev=/images?q=wimax+base+station&gbv=2&hl=en&rls=com.microsoft:en-us

http://images.google.com/imgres?imgurl=http://gallery.techarena.in/data/500/medium/LTE-Base-station.jpg&imgrefurl=http://forums.techarena.in/networking-security/1122448.htm&usg=__qA9yLbhrNYEB4l9KNv734UFWA2A=&h=671&w=700&sz=236&hl=en&start=1&tbnid=pbxXLcKEEGUhcM:&tbnh=134&tbnw=140&prev=/images?q=LTE+base+station&gbv=2&hl=en&rls=com.microsoft:en-us

http://images.google.com/imgres?imgurl=http://www.chinesemol.com/member/upload/product/83780066/200781315174787741.jpg&imgrefurl=http://www.chinesemol.com/companies/c33768.html&usg=__mvw_SaZGBwrID2eXCer-oO43ofw=&h=692&w=423&sz=86&hl=en&start=74&tbnid=bKFoCYcrliAUoM:&tbnh=139&tbnw=85&prev=/images?q=TD-SCDMA+base+station&gbv=2&ndsp=21&hl=en&rls=com.microsoft:en-us&sa=N&start=63


MSC8156 Multicore DSP – HighlightsWireless Infrastructure Baseband Processor

TM


MSC8156 Industry Awards► Industry’s highest

performing programmable DSP

►Six fully-programmable DSP cores deliver 6GHz + Baseband Acceleration

► Industry's First 45nm DSP

8

EN-Genius Announces 2008's Product of the Year Winners January 12 ,2009

“Freescale has correctly identified the need for a high-capacity DSP that’s been specially tweaked for 3G wireless applications, the raw processing power and low solution cost that this new multi-core monster brings to the game should win them a fair share of business in the next generation, or two, for wireless infrastructure equipment.”

Announced the Winner in InfoVision/IEC Consortium Awards program Sep-2009

Best LTE Chip AwardMay-2009

“Electron d’Or 2009” in the “Processors category” by Electronique Magazine

June-2009

Freescale SC3850 DSP core earns highest BDTImark2000™ score to dateFreescale StarCore® SC3850 core technology used in theMSC8156 multicore DSP has garnered leading benchmarkresults from independent signal-processing technologyanalysis firm, Berkeley Design Technology, Inc. (BDTI)

TM


MSC8156 Highlights ► Target Wireless Basestation Systems

• 3G-LTE, TDD-LTE, WiMAX, HSPA+ and TD-SCDMA

• Meets all leading future wireless technologies

► Multi-Standard Technology• Single Sector 3G-LTE• Multi-sector WIMAX• Multi-carrier TD-SCDMA• Multi-sector HSPA along with external chip rate

acceleration

► Highly Efficient Internal Memory • Large on die low latency memory:

6x512KB of L2/M2 + 1MB M3 = 4Mbyte

► MAPLE-B Accelerator • High throughput, multi-standard compliant,

re-programmable

MSC8156 Device Performance • Optimized Programmable Performance

•Based on next generation SC3850 DSP core, delivers up to 48 GMACS

• 6GHz effective performance

• Embedded with Innovative Baseband accelerators• High-speed standard interfaces

•2xsRIO, 2xSGMII, 2xDDR-3, PCI-Express

• Highly optimized multilevel memory• High speed DDR interface

TM


MSC8156/E – Broadband Wireless DSP

10

QEEthernet

DMA

8-Lanes 3.125G SerDes

sRIO

sRIO

CLASS Fabric

PCIe

1024 KBShared

M3 memory

64-bitDDR-2/3

Memory Controller

1GE

x4x4x4

Clocks/Reset

I2C

SPI

GPIO

DUART

1GE

MAPLE-BBaseband Accelerator

HSSI

Starcore™SC3850 DSP Core

D-Cache I-Cache

512 KBBacksideL2 Cache 32 KB 32 KB

DMA SecurityEngine

• Target applications• PHY layer processing for FDD-

LTE, TDD-LTE, HSPA+, TD-SCDMA, CDMA2K and WiMAXchannel cards in NodeB BTS

• Key advantages• Industry’s highest performance

DSP, outperforms competitors’highest performing multi core DSP by more than x2

• Featuring six fully-programmable 1GHz DSP cores delivering 6GHz of DSP processing power plus innovative, multi-standard application specific accelerators

• Supports at least 3G-LTE 10Mhz sector, UL+DL including MIMO in a single device

• The MSC8156 DSP has been qualified on advanced 45nm process technology

• Industrial qualification for operation at -40°C - 105°C

TM


MSC8154/E – Broadband Wireless DSP

11

QEEthernet

DMA


sRIO

sRIO

CLASS Fabric

PCIe

1024 KBShared

M3 memory

64-bitDDR-2/3

Memory Controller

1GE

x4x4x4

Clocks/Reset

I2C

SPI

GPIO

DUART

1GE

MAPLE-BBaseband Accelerator

HSSI


D-Cache I-Cache


DMA SecurityEngine

• Target applications• PHY layer processing for FDD-

LTE, TDD-LTE, HSPA+, TD-SCDMA, CDMA2K and WiMAXchannel cards in NodeB BTS

• Key advantages• Industry’s highest performance

DSP, outperforms competitors’highest performing multi core DSP by more than x2

• Featuring six fully-programmable 1GHz DSP cores delivering 4GHz of DSP processing power plus innovative, multi-standard application specific accelerators

• Enables Pico/Micro basestations

• The MSC8154 DSP has been qualified on advanced 45nm process technology

• Industrial qualification for operation at -40°C - 105°C

TM


MSC8156/E Block Diagram

VirtualInterrupts &Hardware

Semaphores

BootROM

JTAG/SAP

DDR 2/3Controller

64-bit @ DDR800

I2C

UAR

T

200Mbps

TDM1024Ch.

MAPLE-B

TVPE

RISC RISC

FFTPE

DFTPE

M3Memory1056 KB

8GB/s

1 Gbps

SecurityEngine

QUICCEngineTM

1GbpsEthernet

1GbpsEthernet

1 Gbps

RISC RISC

SPI

32 ch.DMA

8 GB/s8 GB/s

8 GB/s

SC3850DSP Core

800MHz-1GHzStarCore SC3850

Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

<8GB/s

Non-blocking Switching Matrix 12 masters x 8 slaves each with 128 bit i/f

4GB/s

8 GB/s

SRIO1x/4x

SRIO1x/4x

OCN8

LYNX LYNX

High Speed Serial Interfaces (HSSI)

PCI-EX

DDR 2/3Controller

64-bit @ DDR800

<8GB/s

Two 1x/4x 3.125GbaudPCIe 1x/4x, two SGMII

RGMIIRGMII

8 GB/s

Baseband Accelerators

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

8 GB/s

SC3850DSP Core


Subsystem

32 KBI-Cache

32 KBD-Cache

MMU

512 KBL2/M2

4GB/s

TM


MAPLE-B Baseband Acceleration - Positioning

Flexibility

Cost

Hardware/ASIC

MAPLE

Flexibility:• Technologies/standards modifications• Algorithmic modifications• Architecture options• Solution scalability

Cost:• Power dissipation• Silicon area

Programmable System Interface (PSIF)• 1-4 RISC controllers• 1-12 Processing Elements• 1-4 System DMA’s & internal DMA’s

PE PE PEPEPE

• Multistandard support• High throughputs• From Macro to Femto• Adaptable to multiple standards• Mix and match different PE’s for various solution scalability & derivatives

FPGA

Processing Engines

TM


MAPLE-B Block Diagram

PSIF : Programmable System InterfaceTVPE : Turbo/Viterbi Processing EngineFFTPE : FFT Processing EngineDFTPE : DFT Processing EngineCRCPE: CRC processing Engine

PSIF

CESlave

Rou

ting

and

Con

fig

I/O Data Buffer

FFTPE

TwiddlesMemory SBIF

Radix 8Cells

Radix 4Cells

Radix 2Cells

SIF

TwiddlesMemory

I/O Data Buffer

DFTPE

Rou

ting

and

Con

fig

Radix 4Cells

Radix 5Cells

Radix 3Cells

Radix 2Cells

SBIF

SIF

DATASRAM16kB

DATASRAM16kB

CD , NII, HO MEM

CTL

CDLEXTL

EXT MEM

TVPE

NIILHOL

SIFSIF

Interrupts

DRE0 DRE1 DRE2 DRE3VRE

Arbitration and switching

SystemDMA Engine MAG2DRAM IRAM

16kBRISC 1

CoreIRAM 16kB

RISC 0 Core PIC

DRAM

2x 64b 450MHz

64b 450MHz

Local DMA/CRC PE x2

PSIF config

TM


MAPLE-B Accelerator - Performance and Standards Compliance WiMAX Systems MAPLE-B (MSC8156)Turbo DecodingOptional support for sub-block de-interleaving

> 195 Mbps (6 iterations)

Viterbi DecodingOptional support for periodic de-puncturing

> 100 Mbps (Tail-biting multi-iteration)

FFT/IFFTOptional support for guard bands insertion

> 350 Msps using 2 units (FFTPE, DFTPE)

CRC, Insertion for DL and check for UL > 10 Gbps , CRC16 (PDU)

IEEE802.16 Rev23GLTE FDD/TDD Systems MAPLE-B (MSC8156)Turbo DecodingOptional support for sub-block de-interleaving

> 200 Mbps (6 iterations)


> 100 Mbps (Tail-biting multi-iteration)

FFT/IFFT/DFT/IDFTOptional support for guard bands insertion

> 280 Msps FFT using FFTPE> 175 Msps DFT using DFTPE

CRC, Insertion for downlink and check for uplink > 10 Gbps , CRC24A, CRC24B

3GPP TS 36.212 FEC & CRC

UMTS – WCDMA, HSPA+ MAPLE-B (MSC8156)Turbo Decoding > 165 Mbps (6 iterations)


> 115 Mbps (Zero tail, K=9)

FFT/IFFT > 350 Msps FFT using FFTPE and DFTPE

CRC, Insertion for DL and check for UL > 10 Gbps , CRC24

3GPP TS 25.212 (FDD) FEC & CRC3GPP TS 25.222 (TDD) FEC & CRC

TM


MSC8156 Other Building Blocks

► Security Engine Acceleration – Enabling Data protection for MAC/L2 processing

► Dual Serial RapidIO – x4 @3.125G => 20Gbps, High throughput interfaces connecting to antenna, L2/MAC Processor and other DSPs on channel card

► Dual Gigabit Ethernet – control path

► PCI-Express – x4 @ 2.5G, High throughput interface connecting to L2/MAC Processor or ASIC/FPGA

►Dual DDR 2/3 64b 800MHz – High throughout memory interfaces


MSC8156/4 DSP Enablement

TM


CodeWarrior Development Studio for StarCore v10.0A complete development environment under Eclipse

►Eclipse IDE• Configuration Wizards• Plug-In Architecture• 3rd party community

►StarCore Build Tools• C/C++ Optimizer Compilers

►Software Simulators• Multicore Functional accurate simulator• Core Platform Cycle accurate simulator• MAPLE integrated into multicore simulator

►SmartDSP - Operating Systems

• Pre-emptive, High performance, Field deployed, Networking stacks

• Royalty-free

►Starcore Debugger• Multicore and multi-DSP• 8144, 8156, 8154 targets

►Trace & Profile• Trace data offload via Ethernet using

SmartDSP HEAT technology

TM


MSC8156 ADS – Development System

• DSP - MSC8156 Multicore DSP

• Memories – DDR2&3 1GByte each• Ethernet Switches – SGMII & RGMII• SGMII/RGMII PHY• TDM – 2x E1/T1 Framers & PTMC• AMC connector

•Dual 1000BaseX•Dual sRIO x4 / PCI-Ex x4•TDM

• Board form factor – Dual-width AMC

• Availability – Now

• Price - $3900

TM


MSC8156AMC – Reference Development System

MMC

I2C

Port 8:11

Port 4:7

Port 1

Port 0

Port 12:15

Port 17:20

FPGA

SRIO SWITCH[IDT 80KSW0005]

4x4x

4x4x

4x4x

EthernetRGMII Switch

[VSC7384]

4x4x

RJ45

4x4x 4x

4x

JTAG

JTAG

4x4x

JTAG Conn.

EEPROM

2:1 2:1

SRIO

PCIeSRIO/PCIe

EEPROM

EthernetTrans

[VSC8224]DD

R III

64 – bit

DD

R III

64 – bit

MSC8154GigE

I2CsRIOsRIO

JTAG

Mezzanine

GigE

MDIO

MDIO

JTAG

DD

R III

64 –bitD

DR

III

64 –bit

MSC8154GigE

I2CsRIOsRIO

JTAG

Mezzanine

GigE

MDIOD

DR

III

64 – bit

DD

R III

64 – bit

MSC8154GigE

I2CsRIOsRIO

JTAG

Mezzanine

GigEMDIO

RJ45

SPI Flash

SPI

SPI

SPI

4x4x

4x

I2C

EEPROM

Mini- USB

Mini- USB

USB

UART FT2232

EthernetEthernet

SRIO/PCIeSRIOSRIOSRIO

SPI

{USB]

High Density DSP Platform3x MSC8156 Multicore DSP – each with:

6x SC3850 StarCore® DSP cores at 1GHz + MAPLE-B baseband accelerator2x 512MByte of 64-bit DDR3 memory

ConnectivityFour 3.125Gbaud SRIO (x4) interfaces from backplane to DSP farm via SRIO switch Two 1000 Base-X Gigabit Ethernet interfaces from backplane to DSP farm via Ethernet switch

Module Management Controller (MMC)Hot swappingBoard Control

Target Applications3G-LTE, WCDMA, WiMAX Basestations and Media Gateway systemsDesign reference and enablement platform for customers and third parties

Form FactorSingle Width AMC

Availability - Now

Price - $6000

TM


3G-LTE Reference Software/Hardware

8154AMCBoard Reference

Item Standard Description

L1Software 3GPP TS

36.211/ 36.212/ 36.213/36.214

Software kernels sources for MSC8156:- ANSI-C Source for Channel estimation SISO/MIMO- UL MU-MIMO- DL MIMO- MMSE modulation demapping- UL / DL HARQ- Turbo Encoder- RACH- PDSCH, PUSCH- ULSCH, DLSCH

L2/L1 Interworking

3GPP TS 36.300

- Well defined L2/L1 Interface- Reuse possible across devices

Board AMC Multi-Standard Baseband AMC Platform

- Sample quantities as Development Reference- Cards available to decrease time-to-market

Platform 3GPP TS 36.201

Quick Start integrated reference platform- Running L1/L2 multi-core system software

TM


DDR

DDR2/DDR3

GbE

P2020GbE

LBsRIO

Bac

k Pl

ane

MSC8154 Picocell Solution

4xDD

R

DD

R2/3 GbE

sRIO

MSC8154sRIO

L1 - PHY

3G-LTE FDD -• Single Sector 10MHz•100 Mbps DL, Up to 50 Mbps UL• 2x2 MiMO• 150Mbps DL, 50 UL

L2/L3 - MAC/RLC/Transport

TM


MSC8156+P2020 AMC Reference Development System

23

TM


DDR

DDR2/DDR3

GbE

Multicore QorIQ

GbEGbE

GbE

LBsRIO

Ant.

Bac

k Pl

ane

MSC8156 Solution - Delivering Low BOM Costsfor 20MHz Sector Channel Card

4x

4x

4x

sRIOSwitch

DD

R

DD

R2/3

GbEGbE

sRIO

DD

R

DD

R2/3

GbEGbE

sRIO

MSC8156

DSP

MSC8156

DSP

sRIO

sRIO

3G-LTE FDD: • Single Sector 20 MHz, 2x4 MIMO UL, 4x4 MIMO DL• Up to 300 Mbps DL, Up to 150 Mbps UL

WiMAX TDD:• 3 Sectors 10 MHz 2x4 MIMO UL, 4x4 MIMO DL• Up to 100 Mbps/Sector DL• Up to 14 Mbps/Sector UL

PHY MAC

TM


3G-LTE eNodeB – Capacity & Software Processes Mapping

25

3G-LTE FDD/TDD: • Single Sector 20 MHz, 2x4 MIMO UL, 4x4 MIMO DL• Up to 300 Mbps DL, Up to 150 Mbps UL

WiMAX TDD:• 3 Sectors 10 MHz• Up to 50 Mbps/Sector DL• Up to13 Mbps/Sector UL


MSC815x/MSC825x High Performance StarCore DSPs

Adam Segal - DSP Video Marketing Manager

TM


►SC3850 Core advantages• 1 GHz @ 45nm SOI• High performance for deep pipeline architecture – Advanced Branch prediction• Control code efficiency - HW support for Stack, many control-oriented instr.• Easy Programming - interlocked pipeline, bwd compatible with all SC devices• Intrinsic MAC functionality (Vs. MPY + ADD) – 8GMAC per core• Multi Core support - Semaphore support (read-modify-write)

►SC3850 Subsystem advantages• Memory management unit

Flexible memory protection - Easier debug, faster time to marketAddress translation

• L1 data and instr. caches – 2*32KB, 8 way, HW and SW pre-fetch• Private L2 Cache – 512 KB, Unified Data/Instr., dynamically defined as M2• Debug and profiling - Smart breakpoints, non intrusive profiling capabilities

Introducing IndustryIntroducing Industry’’s highest performing programmable DSP s highest performing programmable DSP Up to Six fullyUp to Six fully--programmable 1 GHz DSP coresprogrammable 1 GHz DSP cores

TM


BDTI Scores Update to Feb 2010

Source “http://www.freescale.com/webapp/sps/site/homepage.jsp?code=DSP_HOME&tid=vandsp”

http://www.freescale.com/webapp/sps/site/homepage.jsp?code=DSP_HOME&tid=vandsp

TM

29Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, C-Ware, mobileGT, PowerQUICC, StarCore, and Symphony are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. BeeKit, BeeStack, CoreNet, the Energy Efficient Solutions logo, Flexis, MXC, Platform in a Package, Processor Expert, QorIQ, QUICC Engine, SMARTMOS, TurboLinkand VortiQa are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © 2010 Freescale Semiconductor, Inc. 29 29

MSC815x DSP Family

CLASS Fabric

1024 KBShared

M3 memory

64-bitDDR-2/3

Memory Controller

Clocks/Reset

I2C

SPI

GPIO

DUART


D-Cache I-Cache


Target applications• Baseband• Medical Imaging

Key advantages• Industry’s highest performance

DSP, outperforms competitors’highest performing multicoreDSP by more than x2

• Featuring up to six fully-programmable 1GHz DSP cores delivering up to 6GHz of DSP processing power with high speed peripheral interfaces

• MAPLE Hardware Accelerators

Status• Available Now

QEEthernet

DMA


sRIO

sRIO

PCIe1GE

x4x4x4

1GE

MAPLE-BAccelerator

HSSI SecurityEngine

DMA TDM

TM


MSC825x DSP Family

CLASS Fabric

1024 KBShared

M3 memory

64-bitDDR-2/3

Memory Controller

Clocks/Reset

I2C

SPI

GPIO

DUART


D-Cache I-Cache


Target applications• Military, Test and

Measurement, Medical

Key advantages• Industry’s highest performance

DSP, outperforms competitors’highest performing multicoreDSP by more than x2

• Featuring up to six fully-programmable 1GHz DSP cores delivering up to 6GHz of DSP processing power with high speed peripheral interfaces

Status• Samples 2Q10

QEEthernet

DMA


sRIO

sRIO

PCIe1GE

x4x4x4

1GE

HSSIDMA TDM

TM


MSC8256 Block Diagram

QEEthernet

DMA


sRIO

sRIO

CLASS Fabric

PCIe

1056 KBShared

M3 memory

64-bitDDR-2/3

Memory Controller

1GE

x4x4x4

Clocks/Reset

I2C

SPI

GPIO

DUART

1GE

HSSI


D-Cache I-Cache


DMA

6x SC3850 Cores Subsystems (6GHz/48GMACS) each with:• SC3850 DSP core at up to 1GHz (8GMACs 16b or 8b)• 512 Kbyte unified L2 cache / M2 memory. • 32 Kbyte I-cache, 32Kbyte D-cache, WBB, WTB, MMU, PIC• Fully Programmable

Internal/External Memories/Caches• 1056 KByte M3 shared memory (SRAM)• Two DDR 2/3 64-bit SDRAM interfaces at up to 800 MHzCLASS – Chip-Level Arbitration & Switching Fabric• Non-Blocking, fully pipelined, low latency• Full fabric 12 masters to 8 slaves, up to 512 Gbpsthroughput

High Speed Interconnects• Dual 4x/1x Serial RapidIO at 1.25/2.5/3.125 Gbaud• PCI-e 4x/1x Dual RISC QUICCEngine® supporting• Dual SGMII/RGMII Gigabit Ethernet ports• Eth. Protocols, Talitos control and sRIO offload

Ethernet• Dual Gigabit Ethernet ports (SGMII/RGMII)

TDM Highway• 1024 ch., 400Mbps, divided into 4 ports of 256

DMA Engine 16 bi-directional channels Other Peripheral Interfaces

• SPI, UART, I2C, 32 GPIO, 16 Timers, 96KB boot ROM, JTAG/SAP, 8WDT

Technology• Process: 45nm SOI• Voltage: 1V core, 2.5, 1.8/1.5V I/O• Package: FCBPGA (29x29) 1mm pitch, RoHS

TM



QEEthernet

DMA


sRIO

sRIO

CLASS Fabric

PCIe

1056 KBShared

M3 memory

64-bitDDR-2/3

Memory Controller

1GE

x4x4x4

Clocks/Reset

I2C

SPI

GPIO

DUART

1GE

HSSI


D-Cache I-Cache


DMA









TM



QEEthernet

DMA


sRIO

sRIO

CLASS Fabric

PCIe

1056 KBShared

M3 memory

64-bitDDR-2/3

Memory Controller

1GE

x4x4x4

Clocks/Reset

I2C

SPI

GPIO

DUART

1GE

HSSI


D-Cache I-Cache


DMA

1x SC3850 Core Subsystem (1GHz/8GMACS) with:• SC3850 DSP core at up to 1GHz (8GMACs 16b or 8b)• 512 Kbyte unified L2 cache / M2 memory. • 32 Kbyte I-cache, 32Kbyte D-cache, WBB, WTB, MMU, PIC• Fully Programmable








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Target Markets

Market End Application MSC8151 MSC8152 MSC8154 MSC8156 MSC8251 MSC8252 MSC8254 MSC8256

Medical Imaging X‐ray: Medical/Dental

CT Scanner

MRI: Magnetic Resonance Imaging

Ultrasound System

Ultrasound System: Portable

Aerospace & Defense Military and Avionics Imaging

Military: Radar/Sonar

TETRA Base Station

Test & Measurement High‐Speed Data Acquisition and Generation

Power Line Communication Modem

Signal/Waveform Generator

Vector Signal Generator

Vector Signal Analyzer

Wireless Communications Tester

Wireless Repeater

X‐ray: Baggage Scanner

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MSC825x High Performance DSPs - Rack and Stack

Device 8156 8154 8256 8254 8252 8251 SC8350 DSP Cores 6 4 6 4 2 1

MHz 1GHz 1GHz 1GHz 1GHz 1GHz 1GHzMMACs Up to 48000 Up to 32000 Up to 48000 Up to 32000 Up to 16000 Up to 8000Int. Memory 1MB 1MB 1MB 1MB 1MB 1MB

L1I 4 x 32KB 4 x 32KB 4 x 32KB 4 x 32KB 4 x 32KB 4 x 32KB

L1D 4 x 32KB 4 x 32KB 4 x 32KB 4 x 32KB 4 x 32KB 4 x 32KB

L2 512KB 512KB 512KB 512KB 512KB 512KB

M3 1MB 1MB 1MB 1MB 1MB 1MB

DDR2/3 1 (800MHz) 2 (800MHz) 1 (800MHz) 2 (800MHz) 2 (800MHz) 2 (800MHz)

PCIe 1 1 1 1 1 1

GEMAC (RGMII, SGMII) 2 2 2 2 2 2

SRIO 2 1 2 1 1 1

TDM 4 4 4 4 4 4

SPI 1 1 1 1 1 1

UART 1 1 1 1 1 1

I2C 1 1 1 1 1 1

FFT/DFT Accelerators 1 1

Security AES, SHA, RC-4, Kasumi, SNOW

AES, SHA, RC-4, Kasumi, SNOW





Proc. Tech. 45nm SOI 45nm SOI 45nm SOI 45nm SOI 45nm SOI 45nm SOI

Package 783 BallFC-PBGA

783 BallFC-PBGA

783 BallFC-PBGA

783 BallFC-PBGA

783 BallFC-PBGA

783 BallFC-PBGA

Pin for Pin compatible

TM


Tools

MSC8156EVMMSC8156EVM

Q3’ 2010

ADS Dev ToolADS Dev Tool

$3900 $6000

MSC8156AMCMSC8156AMC

$500

MSC815xMSC825x

►New Eclipse IDE►Build Tools

•Performance C/C++ Compiler►Trace & Profile►SmartDSP OS►Debugger

Hardware Tools

Software Tools

TM


CodeWarrior for StarCore

CodeWarrior Developer Studio is a highly integrated

tool chain providing the most comprehensive support of Freescale StarCore DSPs.

►Complete build & debug environment united in Eclipse IDE ►Robust platform for development ►Performance optimized StarCore DSP compiler►Multi-core capabilities in every component

• SmartDSP OS, IDE, SA, Debugger, Simulator


Application Examples

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Radar Application on MSC825x/MSC815x

► Radar applications traditionally rely on floating points mathematics► Freescale design team has worked with customers to understand algorithms,

data flows, format and precision required for radar systems.► Conclusions showed that 32-bit precision was rarely required. In the cases

when 32-bit precision was required, fixed-point calculation had minimal impact.

► Consequently, Radar applications were implemented on Freescale’s fixed-point DSP devices - MSC8144, MSC8156 and MSC8256

*Due to security levels with current customers we do not have access to radar system source code for benchmarking.

►Current opportunities with military customers using the MSC8156 or MSC8144 include:

RadarWeapons SystemsCommunication SystemsObstacle IdentificationVideo Imaging

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Medical Imaging

►The complexities of medical imaging require extraordinary processing capabilities, majority of which can be efficiently implemented on DSP

►Applications, such as magnetic resonance imaging (MRI), computed tomography (CT) scans and ultrasound, all push the performance limits for advanced integrated I/O, rigorous data processing and high levels of connectivity.

►All of these needs are addressed by Freescale’s DSP multicore processors combined with other FSL devise families

TM


Computer Tomography (CT)

► Image reconstruction of the CT scan data to create the cross section views involves performing FFT operations on a large number of x-ray samples.

► FFT is a computationally complex operation than can easily become the bottleneck of the CT data processing elements.

► By use of the dedicated FFT accelerators in the MAPLE-B block, this operation can be offloaded from the main processor leaving it free to perform other activities required in the system.

► In addition, performing FFT operations on the MAPLE-B accelerator reduces power and achieves higher precision than 16bit implementation available in common DSP processors.

may 11, 2010 freescale's high-performance starcore- based...

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