Measurement and Analysis of Weather Phenomena with K-Band Rain Radar

Jun-Hyeong Park Dept. of Electrical Engineering

KAIST DaeJeon, Republic of Korea

bdsfh0820@kaist.ac.kr

Ki-Bok Kong Development team Kukdong Telecom

Nonsan, Republic of Korea Kbkong@kdtinc.co.kr

Seong-Ook Park Dept. of Electrical Engineering

KAIST DaeJeon, Republic of Korea

soparky@kaist.ac.kr

Abstract—To overcome blind spots of an ordinary weather radar which scans horizontally at a high altitude, a weather radar which operates vertically, so called an atmospheric profiler, is needed. In this paper, a K-band radar for observing rainfall vertically is introduced, and measurement results of rainfall are shown and discussed. For better performance of the atmospheric profiler, the radar which has high resolution even with low transmitted power is designed. With this radar, a melting layer is detected and some results that show characteristics of the meting layer are measured well.

Keywords—K-band; FMCW; rain radar; low transmitted power; high resolution; rainfall; melting layer

I. INTRODUCTION A weather radar usually measures meteorological

conditions of over a wide area at a high altitude. Because it observes weather phenomena in the area, it is mainly used for weather forecasting. However, blind spots exist because an ordinary weather radar scans horizontally, which results in difficulties in obtaining information on rainfall at higher and lower altitudes than the specific altitude. Therefore, a weather radar that covers the blind spots is required.

A weather radar that scans vertically could solve the problem. This kind of weather radar, so called an atmospheric profiler, points towards the sky and observes meteorological conditions according to the height [1]. Also, because the atmospheric profiler usually operates continuously at a fixed position, it could catch the sudden change of weather in the specific area.

In this paper, K-band rain radar which has low transmitted power and high resolutions of the range and the velocity is introduced. The frequency modulated continuous wave (FMCW) technique is used to achieve high sensitivity and reduce the cost of the system. In addition, meteorological results are discussed. Reflectivity, a fall speed of raindrops and Doppler spectrum measured when it rained are described, and characteristics of the melting layer are analyzed as well.

II. DEVELOPMENT OF K-BAND RAIN RADAR SYSTEM

A. Antenna To suppress side-lobe levels and increase an antenna gain,

offset dual reflector antennas are used [2]. Also, separation

wall exists between the transmitter (Tx) and receiver (Rx) antennas to improve isolation between them. With these methods, leakage power between Tx and Rx could be reduced. Fig. 1 shows manufactured antennas and the separation wall.

B. Design of Tranceiver Fig. 2 shows a block diagram of the K-band rain radar.

Reference signals for all PLLs in the system and clock signals for every digital chip in baseband are generated by four frequency synthesizers. In the Tx baseband module, a field programmable gate array (FPGA) controls a direct digital synthesizer (DDS) to generate an FMCW signal which decreases with time (down-chirp) and has a center frequency of 670 MHz. The sweep bandwidth is 50 MHz which gives the high range resolution of 3 m. Considering the cost, 2.4 GHz signal used as a reference clock input of the DDS is split and used for a local oscillator (LO). the FMCW signal is transmitted toward raindrops with the power of only 100 mW. Beat frequency which has data of the range and the radial velocity of raindrops is carried by 60 MHz and applied to the input of the Rx baseband module. In the Rx baseband module, quadrature demodulation is performed by a digital down converter (DDC). Thus, detectable range can be doubled than usual. Two Dimensional-Fast Fourier Transform (2D-FFT) is performed by two FPGAs. Because the 2D FFT is performed with 1024 beat signals, the radar can have high resolution of the radial velocity. Finally, data of raindrops are transferred to a PC with local LAN via the an UDP protocol. TABLE I. shows main specification of the system.

Fig. 1. Manufactured antenna and separation wall.

2016 URSI Asia-Pacific Radio Science Conference August 21-25, 2016 / Seoul, Korea

1

Measurement and Modeling of System-level ESD

Noise Voltages in Real Mobile Products

Myungjoon Park, Junsik Park, Jingook Kim

Electrical and Computer Engineering

Ulsan National Institute of Science and Technology

Ulsan, South Korea

highjoon87@unist.ac.kr, jingook@unist.ac.kr

Manho Seung, Joungcheul Choi, Seokkiu Lee

DMR Team, R&D Division

SK Hynix Inc.

Icheon, South Korea

Abstract—To understand the ESD noise phenomena and

improve the system-level ESD noise immunity for devices, the

accurate ESD noise measurement is necessary. In this paper, the

measurement and modeling method for accurate ESD analysis is

introduced and validated.

Keywords—Electrostatic discharge(ESD); system level;

common mode noise; ferrite; decoupling capacitor

I. INTRODUCTION

Electrostatic discharge (ESD) noise can cause shutting down or malfunctions of the system and devices, since the ESD event contains high voltage and high current with fast rise time, as depicted in Fig. 1. It is difficult to define the noise source and the reason of malfunction in the complex system such as the mobile device and laptop. To analyze the ESD noise in the system-level, the accurate system-level measurement technique is necessary as the first step. However, there is two kind of difficulty in the ESD measurement; one is the common mode (CM) noise and the other one is the unexpected electric field coupling. In this paper, we will introduce the measurement technique to handle the CM noise and the unexpected electric field. For the realistic application, a real commercial motherboard was used in the measurement. Also, to analyze and validate the measured system-level ESD noise, a simplified printed circuit board (PCB) which resembles the complex real motherboard is designed. Using the circuit simulator, the equivalent circuit model of the simplified PCB is built and validated with measurements

Fig. 1. System level noise due to an ESD event

II. MEASUREMENT AND MODELING METHOD

For easier understanding and validation of measurements,

a four-layer PCB simplified from the real motherboard and

DRAM module in a laptop are designed as shown in Fig.2 (a).

The top two layers represent power and ground layers in the

motherboard, while the bottom two layers represent the power

and ground layers in the DRAM module. The voltage

fluctuation between power and ground layers caused by the

ESD event is measured and validated. Two measurement

points are located at the front side of the PCB to measure the

power-ground fluctuation in the motherboard and the other

measurement point is located at the back side to measure the

power-ground fluctuation in the DRAM module, as shown in

Fig. 2 (b).

(a)

(b)

Fig. 2 (a) The fabricated PCB simplified from the real motherboard and

DRAM module (b) Measurement points of power-ground voltages

fluctuations

Fig. 3 shows the measurement setup of power-ground

noise induced by ESD event. The 9µF decoupling capacitor is

connected between the power and ground planes. In the

several kilovolt ESD event, the ground plane in the PCB can

fluctuate up to a few hundreds or thousands voltage with

reference to the ideal zero potential. The strong common-

mode (CM) noise voltage is also captured in the instruments,

which makes the accurate measurement of the differential

power-ground noises very difficult. To block the strong

common-mode noise from the ground plane, a lot of high

frequency ferrite cores should be used in the semi-rigid cable.

After great reduction of the strong common-mode noises using

many ferrite cores, the relatively small power-ground

fluctuation in the differential mode (DM) can be measured in

the oscilloscope. However, there is another obstacle for

accurate measurement of power-ground noise. While the

electric field coupling at the ground of probe is prevented

using the ferrite cores, the strong electric field can be still

directly coupled to the signal pin of rigid cable. Hence, the

919

signal pin was covered with a piece of copper tape in the

measurement, as shown in Fig. 3.

Fig. 3. Measurement method of power-ground noise voltage

The copper tape is soldered to the ground of the rigid cable and the ground plane of the PCB at several positions, which makes the potential of copper tape and the PCB ground plane electrically same removing electric field inside the copper tape. With applying the aforementioned two techniques, the differential-mode power-ground fluctuation can be accurately measured. Also, to make the high impedance probe, a 470 Ω SMT resistor is connected in series at the signal pin of rigid cable [1]. With the cable characteristic impedance of 50Ω, the total input impedance is 520ohm, resulting that the measured

voltage is a tenth of the real one. (Vmeas=Vreal 50/520)

III. EXPERIMENTAL VALIDATION AND ANALYSIS

For efficient analysis and validation of the measured

results, the power-ground noise caused by ESD events was

modeled in the equivalent circuit, as shown in Fig. 4 (a). The

equivalent circuit models of the ESD gun and the PCB

geometry were built based on [2]-[3]. And the element values

were extracted using the commercial solver, Ansys Q3D. The

equivalent circuit of the SMT decap was also extracted from

measurements using vector network analyzer (VNA). The

parasitic inductance (ESL), parasitic resistance (ESR), and the

capacitance of decap is measured by shunt through technique

used for low impedance passive electronic component [4]. The

voltage fluctuation between power and ground of the PCB at

the position ‘p1’ in Fig. 2 (b) due to 4kV ESD event is

measured and simulated using the equivalent circuit. As

shown in Fig. 4 (b), the measurement and simulation results

shows good agreement. The resonance frequency 0.17GHz is

due to the capacitance between power-ground planes of PCB,

716pF, and the ESL of decap, 1.2nH. The ESR has significant

effect on damping of the voltage. The ESL has effect on the

resonance frequency and damping factor. If the number of

decap increases, the inductance decreases and both resonance

frequency and damping factor increases.

(a)

(b) Fig. 4. Validation of measurement method. (a) Circuit modeling of ESD

generator and PCB (b) Plot of power-ground noise voltage

The power-ground voltage fluctuations in the real

operating DRAM module were also measured using the

proposed measurement techniques, as shown in Fig. 5. It is

found that the voltage between power and ground of DRAM

module fluctuates from 1.2V to 1.7V, which may cause

malfunctions of the DRAM.

Fig. 5. Power-ground noise Measurement at DRAM

IV. CONCLUSION

System-level ESD measurement is very difficult due to the

strong common mode noise and electric field coupling

problems. In this paper, the accurate measurement techniques

for ESD noise are introduced and applied to the motherboard

and DRAM module in a real operating laptop system. For the

efficient analysis and validation, the equivalent circuit model

for the system-level ESD event is developed and the effects of

the circuit parameters on the ESD noise are investigated.

References [1] Jayong Koo, et. al, “Frequency-domain measurement method for the

analysis of ESD generators and coupling”, IEEE Trans. on EMC, vol. 49, no. 3, Aug. 2007.J. Clerk Maxwell, A Treatise on Electricity and Magnetism, 3rd ed., vol. 2. Oxford: Clarendon, 1892, pp.68-73.

[2] K. Wang, D. Pommerenke, R. Chundru, T. Van Doren, J. Drewniak, A.Shashindranath, “Numerical Modeling of Electrostatic Discharge Generators“, IEEE Trans. on EMC, vol.45, no.2, May 2003K. Elissa, “Title of paper if known,” unpublished.

[3] IEC61000-4-2. Electromagnetic Compatibility. Electrostatic discharge immunity test – Basic EMC Publication. 1995.

[4] Deniss Stepins, Gundars Asmanis, and Aivis Asmanis, “Measuring Capacitor Parameters Using Vector Network Analyzers” Electronics, vol. 18, NO. 1, June 2014.

920