memory basic concept hierarchy and cache memory 1

21
MEMORY UNIT-3 Mohammad Asif Iqbal Assistant Professor, Deptt of ECE,

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Page 1: Memory basic concept hierarchy and cache memory 1

MEMORY

UNIT-3

Mohammad Asif IqbalAssistant Professor, Deptt of ECE,JETGI, Barabanki

Page 2: Memory basic concept hierarchy and cache memory 1

BRAIN vs. MEMORY

Page 3: Memory basic concept hierarchy and cache memory 1

WHAT WE WILL LEARN IN THIS LECTURE

Memory technologiesHierarchal organization Principle of locality Analysis of hierarchy Simple case organizations

Page 4: Memory basic concept hierarchy and cache memory 1

TYPICAL SPECIFICATIONS OF COMPUTERS TODAY

Page 5: Memory basic concept hierarchy and cache memory 1

MEMORY TECHNOLOGIES

SEMICONDUCTORRegisterSRAMDRAMFLASH

MAGNETICFDDHDD

OPTICALCDDVD

Random access

Random + sequentional

Page 6: Memory basic concept hierarchy and cache memory 1

HIERARCHAL STRUCTURE

SPEED CPU

SIZE COST/ BIT

FastestMemory

Slowest

HighestFastest

Memory

Memory

Biggest Lowest

Page 7: Memory basic concept hierarchy and cache memory 1

DATA TRANSFER BETWEEN LEVELS

Page 8: Memory basic concept hierarchy and cache memory 1

PRINCIPLE OF LOCALITY

Temporal localityReferences repeated in timeThe concept that a resource that is referenced at one point in time will be referenced again sometime in the near future.

Spatial locality Reference repeated in spaceSpecial case: sequential localityThe concept that likelihood of referencing a resource is higher if a resource near it was just referenced.

Page 9: Memory basic concept hierarchy and cache memory 1

MEMORY HIERARCHY ANALYSIS

Page 10: Memory basic concept hierarchy and cache memory 1

CACHE ACCESS EXAMPLE.

Before the reference to Xn After the reference to Xn

X4 X4

X1 X1

Xn-2 Xn-2

Xn-1 Xn-1

X2 X2

Xn

X3 X3

Page 11: Memory basic concept hierarchy and cache memory 1

DIRECT MAPPED CACHE

Page 12: Memory basic concept hierarchy and cache memory 1

CACHE ACCESS MECHANISM

Page 13: Memory basic concept hierarchy and cache memory 1

CACHE WITH 4 WORD BLOCKS

Page 14: Memory basic concept hierarchy and cache memory 1

QUESTIONS

MM SIZE CACHE SIZE

BLOCK SIZE

TAG BITS TAG DIRECTORY

128 KB 16KB 256 B ------- -------

32 GB 32KB 1KB ------- -------

------- 512 KB 1 KB 7 -------

Page 15: Memory basic concept hierarchy and cache memory 1

MORE FLEXIBLE BLOCK ARRANGEMENT

Page 16: Memory basic concept hierarchy and cache memory 1

FULLY ASSOCIATIVE CACHE

Question:-MM:- 32 GBBLOCK:- 32 KBTAG= ?Propagation Delay Of Comparator=10 K nsPD of OR Gate= 10 nsHL=?

Page 17: Memory basic concept hierarchy and cache memory 1

SET ASSOCIATIVE CACHE

MM SIZE CACHE SIZE BLOCK SIZE TAG BITS TAG DIRESTORY

SET ASSOCIATIVE

128 KB 16KB 256B ----- ----- 2-WAY

32GB 32KB 1KB ----- ----- 4-WAY

----- 512KB 1KB 7 ------ 8-WAY

Page 18: Memory basic concept hierarchy and cache memory 1

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MORE EXAMPLE OF DIRECT MAPPING

TAG LINE BO

Page 19: Memory basic concept hierarchy and cache memory 1

MORE EXAMPLE OF SET ASSOCIATIVE MAPPING

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01234567

0,41,52,63,7

TAG SET BO

Page 20: Memory basic concept hierarchy and cache memory 1

MORE EXAMPLE OF FULLY ASSOCIATIVE MAPPING

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TAG BO

Page 21: Memory basic concept hierarchy and cache memory 1

THANK YOU!