1

Memory Devices An Assignment of Sequential Circuit Design

11ES10

4(GL)

Submitt

ed To

;

Res. E

NGR KEHKASHAN A

SMA M

EMON

Submitt

ed B

y;

Burhan

Asl

am A

rain

11ES10

4

2

Group Members:

Burhan Arain (11ES104) Group Leader… Agha Shehbaz (11ES136) Muddasir Arain (11ES112) Juma Boy (11ES143) Zeeshan Samoo (11ES138) Ayaz Khan Mari (11ES97) Arshad Ali Dahri (11ES68)

“The human brain must continue to frame the problems for the electronic machine to solve.”

3

An Introduction: A major advantage of digital over analogue is the ability to stores easily large amount of digital information (Binary form) and data for short or long duration. This memory capability makes digital system versatile and adoptable in many situations. For example, A digital computer the internal main memory stores the instructions that tell the computers what to do under all possible circumstances so that the computer will do its job with a minimum amount of human intervention. In electronics criteria the Flips Flops are used to store the information in the form of registers (groups of FFs). The registers are very fast storing device which is extensively used in digital computers where the information is continuously transferred from one location to another. Digital data can also stored as charges on capacitors, and a very important type of semiconductor memory uses this principle to

4

very important type of semiconductor memory uses this principle to Obtain high storage density at low power.In computer terminology the memory usually refers to as RAM and ROM and storage refers to as Hard disk, Floppy disk, CD -Rom etc.

Memory Terminology: To study memory devices and memory is fulfilled with memory terminology that can sometimes overwhelming us. Before we go to any comprehensive discussion of memories, it would be helpful for us, if we known the some common terms of memories or memories devices. Memory Cell: A portion of device or an electrical

system used to stores a single bit data ( 0 or 1). Ex: a Flip-flops, a charged capacitors, and a single spot on magnetic disk.

Memory Word: A group of bits (cells) in a memory devices that instruction or data of some type. Ex: a register consists of 8-bit FFs considered to be a memory that is storing 8-bit word. In digital computer word range from 4 to 64 bit, depending on computer size.

5

Byte: A special term used for group of 8-bits. A byte always consists of 8-bits. Word size can be expressed in bytes as well as in bits. Ex: a word size of 8-bit is also a word size of one byte, a word size of 16-bits is 2 bytes and so on.

Capacity: A way of specifying how many bits can be stored in a particular memory device or complete memory system. To illustrate, suppose that we have a memory that can stores 4096 20-bits words. This represent a total capacity of 81,920 bits. We could also expressed this memory as 4096 * 20. when expressed way the first No. indicates stores words and second indicate No. of bits in one word (word size).

Density: Another term for capacity. When we say that one memory device has a greater density than another, we mean that it can store bits in the same amount space. It is more dense.

Address: A number that identifies the location of a word in memory. Each word stored in a memory device or system has a unique address. Addresses always exist in a digital system as a binary number, although octal, hexadecimal, and a decimal numbers are often used to represent the address for convenience. Whenever we locate any memory address

6

we used its address code to identify it. Read Operation: The operation where by the binary

word in a specific memory location (address) is sensed and then transferred to another device. Example, if we want to use word 4 of the memory shown in figure for some purpose, we must perform a read operation on address 100. the read operation is often called a fetch operation, since a word is being fetched from memory. We will use both terms interchangeably.

Figure. 01

7

Write Operation: The operation whereby a new word is placed into a particular memory location. It is also referred to as a store operation. Whenever a new word is written into a memory location, it replaces the word that was previously stored there.

Access Time: A measure of a memory device’s operating speed. It is the amount of the required to perform a read operation. More specifically, it is the time between the memory receiving a new address input and the data becoming available at he memory output. The symbol tACC is used for access time.

Volatile Memory: Any type of memory that requires the application of electrical power in order to store information. If the electrical power is removed, all information stored in the memory will be lost. Many semiconductor memories are volatile, while all magnetic memories are nonvolatile, which means that they can store information with out electrical power.

Random-Access Memory (RAM): Memory in which the actual physical location of a memory word has no effect on how long it takes to read from or write into that location. In other words, the

8

The access time is same for any address in memory. Most semiconductor memories are RAMs. Sequential-Access Memory (SAM): A type of memory

in which the access time is not constant but varies depending on the address location. A particular stored word is found by sequencing through all address locations until the desired address is reached this produces access times that are much greater than those of RAM.

Read-Only-Memory (ROM): A broad class of semiconductor memories signed for applications where the ratio of read operation to write operations is very high. Technically, a ROM can be written into (programmed) only once, and this operation is normally performed at the factory. There after information can only be read from the memory. Other types of ROM are actually read-mostly memories (RMM), which can be written into more than once, but the write operation is more complicated than read operation, and it is not performed very often. All ROMs are non-volatile.

9

Static Memory Devices: Semiconductor memory devices in which the stored data will remain permanently stored as long as power is applied, without the need for periodically rewriting the data into memory.

Dynamic Memory Devices: Semiconductor memory devices in which the data will not remain permanently stored, even with power applied, unless the data are periodically rewritten into memory. The latter operation is called a refresh operation.

Main Memory: Also referred to as the computer’s working memory. It stores instruction and data the CPU is currently working on. It is the highest-speed memory in the computer and is always a semiconductor memory.

Auxiliary Memory: Also referred to as mass storage because it stores massive amounts of information external to the main memory. It is slower in speed than main memory and is always non-volatile. Magnetic disks and CDs are common auxiliary memory devices.

10

Class Works + Home Works:

Semiconductor Memory: Memory is the portion of a

of a system for storing binary data in large quantities, Semiconductor memories consist of arrays of storage elements that are generally either latches or capacitors. In a computer, memory is accessed millions of times per seconds, so the requirement for speed and accuracy is paramount. Today very fast semiconductors memory are available over 1GB of capacity.

Binary Data Units: The data stores in memories in units that have from one to eight bits. The bit is smallest unit of binary data. The data are handle in group of 8 bit called byte and group of 4 bit called nibble. (1 Byte = 2 nibbles or 8-bits). Bytes can also be represents in words. In memory the word is a group of bits or bytes that acts as a single entity.

11

Memory Array: Memories are made up of combination of cells known as arrays, For example 64 cells array as shown in given figure 02. Each block in the memory array represents on storage cell, and its location is specifying by a row and a column.

1

2

3

4

5

6

7

8

1 2 3 4 5 6 7 8

(a) 8 * 8 array

(b) 16 * 8 array

12

The 64-cell array can be organized in several ways based on units of data. Fig (a) shows an 8 * 8 array, which can be viewed as either a 64 bit memory it can stores 8 words of 8-bit or an 8-byte memory, part (b) shows a 16*4 array, which is a 8 byte or 16 nibbles memory it can stores 16 words of 4 bits size. The actual numbers of words is always a power of 2, in this case, is 24=16.

Memory Address & Capacity: The location of a unit of data in a memory array is called its address. For example the address of a bit by the row and column numbers and the address of byte is specified only by the row as shown in figure (a) for bit & (b) for byte. In 3-dimension the address of 4-bit word is specified by the row and column, as shown figure (c) . In this case, the smallest groups of bits that can accessed is eight.The address depends upon how the memory is organized in bytes. This means that the smallest group of bits that can be addressed is eight. PC have RAM organized in bytes.

13

(c) The address of a 4-bit word in 3-D is row 5, column 8

1

2

3

4

5

6

7

8

1 2 3 4 5 6 7 8

(b) The address of a byte in 2-D is row 4.

(a) The address of a bit is row 2 and column 2

1

2

3

4

1 2 3 4

Figure. 03

14

The capacity of memory is the total number of data units that can be stored. From the previous example of fig. 03 (a) the capacity is 16 bits. The byte organized memory in fig. 03 (b) has capacity of 8 bytes ( 8 bytes = 64 bits). In fig. 03 (c) the capacity is 32 bytes. Computer memories typically have 256 MB (megabyte is one million bytes) or more of internal memory.

Example: A certain semiconductor memory chip is specified

as 2K*8. How many words can be stored on this chip? What is the word size? How many total nits can this store?

Solution:

2K = 2 1024 = 2048 words

Each word is 8 bits (one byte). The total number of bits

is therefore

2048 8=16,384 bits

15

Basic Memory Operation: Although each of memory is differentin its internal operation, certain basic operation principles are the same for all memory systems. Every memory system requires several different types of input and output lines to perform the following operation.

1. select the address in memory that is being accessed for a read or write operation.

2. select either a read or a write operation to be performed.

3. Supply the input data to be stored in memory during a write operation.

4. Hold the output data coming from memory during a read operation.

5. Enable the memory so that it will respond to the address inputs and read/write command.

Figure 04 shows these basic functions in a simplified diagram of a 32 4 memory that stores thirty-two 4-bit words. Since the word

16

size is 4-bits, there are 4 data input lines (Io to I3) and 4 data output lines (Oo to O3). During the write operation the data to be stored in memory and the read operation the data read from the memory and appears at the data output lines.

Figure 04 (a) Diagram of a 32 * 4 memory, (b) virtual arrangement of cells into 32 4-bits words.

17

18

Read-only-Memory (ROM): The ROM is a type of semiconductor memory that is designed to hold data that either are permanent or will not change frequently. During normal operation, no new data can be written into ROM, but data can be read from ROM. For some ROMs the data that are stored must be built in manufacturing process other ROMs data can be entered electrically. The process of data entering called programming or burning in ROM. Some ROMs can't have their data changed once they have been programmed, others can be erased and re-programmed as often as desired.

ROMs are used to store data and information that are not to change during normal operation of a system. A major use of ROMs is in the storage of programs in microcomputers. All the ROMs are nonvolatile, the programs remain in the ROM after the electrical poor is turned off. When the power is turned on all the programs are executing the program stored in the ROM. ROMs are also used for program and data storage in microprocessor-controller equipment such as electronic, cash registers and security systems.

19Figure -07 (a) Typical ROM block symbol (b) table showing the binary data at each

address.

20

21

Masked ROM:

• Permanently program during manufacturing process to provide widely use standard function, such as popular conversion or user define function.

• It can not be change once program.• It can be design using either Bi-polar or Mosfet

transistors.• Most ROM ICs utilize the presence or absent of

transistor connection at row/column junction to represent binary one or zero.

22

The given figure 05 shows the presence of connection of row line to the base of transistor represent binary 1, because row line taking high & this will connect a high value on the column line at row/column junction where there is no base connection, the column line remains zero or low when the low is address.

Example: Design a Mask Rom using bipolar technology from the equation.

Solution: A B X

0 0 1

0 1 0

1 0 0

1 1 1

23

Example: Design a Mask Rom of full adder using By-polar technology ?

Solution:

Cin A B ∑ Co

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

24

Programmable ROM (PROM):

• It is purchased un-programmed.• It is also know as OTP/ONE time program because once

programmed you can’t change the content again.• Programmable ROM have fusible links at emitter of

transistor.• Address is applied to address i/p to select a particular row.• All the transistor in the selected row are turned on.• Those column which have zero voltage they will provide

high current path to fusible link burning it open & permanently storing 0.

• Those column which have 1 or 5V they will draw mush less amount of current leaving the fuse interact. This process actually done by PROM program.

25

Erasable ROM (UV EPROM:

• It is erase using UV light & program electrically.• It can not be manufacture using bi-polar technology.• The EPROM cell consist of control gate, insulator,

floating gate by a silicon substrate.• When voltage is applies on the control gate from the

top the floating gate start to charge. The voltage is so high that it cross the upper dielectric when the programming voltage is remove the charge remain intact in the floating gate for a very long period of time because it is surrounding by insulator.

• The floating gate acts like a capacitor. When a capacitor is charge it is surrounding by a lines of electric field that electric field causes the silicon substrate to electrically conduct by make a complete part it mean source and drain other wise if is like

• Once program the charge on a floating gate can’t be remove.

26

5V

27

• UV rays make di-electrics to conduct & make the silicon substrate completely insulator. There fore source and drain are disconnected and charge is released from the floating gate through drain UV photon cause the electron to because slightly conductive allowing the floating gate charge to gradually drain array to it programmed state.

ROM Access Time: The time access ta of a ROM is the time from the application of the valid address code on the i/p until the appearance of valid o/p data.

28

Internal ROM Architecture:

• Every ROM IC has a chip selected pin which is used to make it able or disable in a ckt.

• The ship select pin E0 and E1 are shown in figure.

A 1024-bit ROM with a 256 * 4organization based on 32 * 32 array.

29

Example: Design suitable organization of 32 * 8 ROM IC ?

(it is also a Past Paper Question 2010 Exam.)

Solution:

32 * 8= 256 bits25 = 32, 5 address lines

16 * 16 = 256 bits (break into arrays)24 = 16, 4 rows decoder

remaining 1 add.. line is column decoder

30

Example: Design suitable organization of 32 K * 8 ROM IC ?

Solution:

32 * 1024 * 8= 262,144 bits25 . 210= 32,768, 15 address lines

512 * 512 = 268,144 bits (break into arrays)

29= 512 bits, 4 rows decoderremaining 6 add.. line for column decoder

26 = 64 bits, column decoder multiple of 8.

31

Example: Design suitable organization of 1K * 8 ROM IC ?

Solution: 1K * 8 = 8192 (break it into two parts) 4096 + 4096 = 8192

32

Example: Design suitable organization of 16K * 8 ROM IC ?

Solution: 16K * 8 = 131072 (break it into two parts) 131072 = 65536 (13 add.. Decoder)+ 65536

(13 add.. Dec.)

33

Random Access Memory (RAM): RAM is for temporary data storage. It is read/write memory and can store data only when power is applied, hence it is volatile. Two categories are static RAM (SRAM) and dynamic RAM (DRAM).

StaticRAM

(SRAM)

DynamicRAM

(DRAM)

AsynchronousSRAM

(ASRAM)

SynchronousSRAM withburst feature(SB SRAM)

ExtendedData OutDRAM

(EDO DRAM)

BurstEDO DRAM

(BEDODRAM)

Fast PageMode

DRAM(FPM DRAM)

SynchronousDRAM

(SDRAM)

Random-Access

Memory(RAM)

34

Static RAM (SRAM):

• It is volatile.• It is also known as read / write memory, Basic cells is

made up of latches or flip-flops.• It is faster in speed but costly.

SRAM Latch memory Cell

35

Internal Architecture of SRAM:

Chip Select: Most memory chips have one or more CS inputs which are used to enable the entire chip or disable it completely. In the disable neither a read nor a write can take place because data in data out are all disable. In this mode the contents of memory are unaffected. When the inputs CS or CE are in their inputs are in their active state, the memory chip is said to be selected. In large memory systems, for a given memory operation , one or more memory chips will be selected while all others are deselected.The internal organization is given In the next page.

36

Internal Architecture of SRAM:

37

Dynamic RAM (DRAM):

• Basic cell of DRAM is made up of capacitor in state of latches.

• They are slower but have greater capacity than SRAM.

• They need to be refresh again & again.• They have low cost.• Memory refreshing require additional circuit shows

figure a, Basic DRAM cell made of transistor and capacitor.

• Figure b shows basic DRAM cell along with necessary buffers, MOS transistors, capacitor.

38

o Write binary 1.

• R/W = 0, C/R = 1• Refresh = 0, Din = 1• R/W = 0 is zero which will input will input buffer & dis

able o/p buffer.• C/R = 1• Din = 1 and transistor must be turn only high value

of Row line.• Transistor acts as a switch connecting capacitor to

row. This capacitor will start charge to a +ve voltage.

o Write Binary = 0

• R/W = 0, R/C 1, • Ref = 0, Din = 0, the capacitor will start to discharge.• Read R/W = 1, Ref = 1 turning on the transistor &

connect the capacitor on column line & therefore Data appears on the data out.

39

o Reading.

• R/W, which will enable o/p buffers and disable i/p buffer.

• R = 1, turning on the transistor & connects the capacitor to the column line & therefore data appears on the data out line.

o Refreshing.

• R/W = 1, Ref= 1• R= 1, The transistor turns on connecting the

capacitor to the column the o/p buffer is enable & the stored charged is to the i/p of the Refresh buffer which is enabled by the high on Refresh i/p. This process produces a voltage on the bit line are column line therefore Replenishing the capacitor.

40

Internal DRAM Architecture:

• The DRAM internal architecture can be visualized as an array of single bit cells as shown in figure.

• Here 16,384 cells are arranged in a 128 * 128 array.• Each cell occupies a unique row and column position

with in array.• Fourteen address inputs are needed to select one of

the cell.

41

Memory Expansion:

• The memory can be expanded in two ways.• Word Expansion.• Size Expansion.

Size Expansion: To increase the word size, the numbers of bits in the data bus must be increased. For Example an 8-bit word size can be achieved by using two memories, each with 4 bit words as shown in figure.

42

Problem: Expand 256 * 4 into 256* 8 ?

Solution:

43

Word Expansion: to increase the word capacity, the numbers of bits in the address input bus must be increased.

For Example an 1M * 8 are expanded to form a 2M * 8 memory.

44

Previous Papers Questions

Paper of 2010 Exam 09-Batch Telecom…

Q3(a)# Using the block diagram given in figure below, show how 64K*4 ROMIC can be expanded to build 64K*16 ROM?

45

Solution: Expansion of 64K*4 ROM into 64K*16 ROM.

46

Q3(c)# see in first example of ROM Architecture.

Q3(d)# What is the bit capacity of a DRAM wit a 212*8 organization?

Solution: The total capacity is found by, 212*8 = 4096*8 212*8 = 32,768 bits

Paper of 2011 Exam 10-Batch Electronics.

Q4(a)# Explain the difference between SRAM & DRAM memory technology with the help of basic diagram?

Static RAM: Dynamic RAM• It is made up of Latches. It is made of

Capacitors.• It is bigger in size has high cost. It is small in size

has low cost.• It has less capacity b/c it is made It has more

capacity to store of latches. Data b/c it is made of capacitor.

47

• SRAM has faster Access time DRAM has slowest Access time. SRAM cell

DRAM cell

Q4(d)# Construct a internal structure of ROM 4K*8 IC ?

Design is in next slides…

48

Internal structure of ROM 4K*8 IC…