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A Laboratory Manual for

Microprocessor Interfacing Laboratory

(210254)

Semester – IV

(Computer Engineering)

Bachelor Degree in Engineering

UNIVERSITY OF PUNE, GANESHKHIND

SNJB’s KBJ College Of Engineering, Chandwad

DEPARTMENT OF COMPUTER ENGINEERING

LABORATORY MANUAL DEVELOPMENT PROJECT

Designations Team for

Design

Project Institution Shri Neminath Jain Bramhacharyashram’s

SNJB’s KBJ College of Engineering,

Neminagar, Chandwad -423101.

Project Commencement Dec 2012

Head Of Institution Prof.M.M Rathore,

SNJB’s KBJ College of Engineering,


Chief Project Coordinator Dr. M .R Sanghavi

Associate Professor, Department Of Computer

Engineering, SNJB’s KBJ College of

Engineering,


Project Coordinator Ms. K. S. Kotecha

Associate Professor, Department Of Computer Engineering, SNJB’s KBJ College of

Engineering, Neminagar, Chandwad -

423101.

Subject Experts 1. Mr.V.V Agrawal

SNJB’s KBJ College of Engineering, Neminagar, Chandwad -423101

2. Mr.Bhandari R.R


3. Ms.Chopra K.D


JB’s KBJ College Of Engineering, Chandwad

DEPARTMENT OF COMPUTER ENGINEERING

Certificate

This is Certify that Mr/Ms. __________________Roll No _of

Fourth Semester of Bachelor Engineering in Computer has completed the term

work satisfactorily in Microprocessor Interfacing Laboratory in the Academic

Year 20_ to 20_ as prescribed i n the curriculum.

Place

Date: Exam Seat No.

Subject Teacher Head of Department Principal

Stamp of

Institution

List of Experiment and Record of Progressive Assessment

Sr.

No

Name of Experiment Page

No

Date of

Performance

Date of

Submission

Assessment

Marks

Sign of

Teacher 1 Write X86 Assembly language

program (ALP) to add array of

N hexadecimal numbers

stored in the memory. Accept

input from the user.

2 Write X86 ALP to perform non-overlapped and overlapped

block transfer (with and

without string specific

instructions). Block containing

data can be defined in the

data segment.

3 Write X86 ALP to convert 4-digit Hex number into its

equivalent BCD number and 5-

digit BCD number into its

equivalent HEX number. Make

your program user friendly to

accept the choice from user for: (a)HEX to BCD b) BCD to HEX (c) EXIT. Display proper strings to prompt the user while accepting the input and displaying the result.

4 Write X86 ALP for the following operations on the string entered

by the user.

a) Calculate Length of the string

b) Reverse the string c) Check whether the string is palindrome OR Make your program user friendly

by providing MENU like:

(a) Enter the string b) Calculate

length of string c) Reverse string

d) Check palindrome e) Exit

Display appropriate messages to

prompt the user while accepting

the input and displaying the

result.

5 Write X86 ALP to perform string manipulation. The strings to be

accepted from the user is to be

stored in data segment of

program_l and write FAR

PROCEDURES in code segment

program_2 for following

operations on the string:

(a) Concatenation of two strings

(b) Number of occurrences of a

sub-string in the given string

Use PUBLIC and EXTERN

directive. Create .OBJ files of

both the modules and link

them to create an EXE file.

6 Write X86 ALP to perform multiplication of two 8-bit

hexadecimal numbers. Use

successive addition and add and

shift method. Accept input from

the user.

7 Write 8087ALP to obtain: i) Mean ii) Variance iii) Standard

Deviation

For a given set of data elements

defined in data segment. Also

display result.

8 Write X86 ALP to convert an analog signal in the range of 0V

to 5V to its corresponding digital

signal using successive

approximation ADC and dual

slope ADC. Find resolution used

in both the ADC's and compare

the results.

9 Write X86 ALP to interface DAC and generate following

waveforms on oscilloscope, (i)

Square wave - Variable Duty

Cycle and Frequency.

(ii) Ramp wave - Variable

direction, (iii) Trapezoidal wave

(iv) Stair case wave

10.

Write X86 ALP to program 8253

in Mode 0, modify the program

for hardware retriggerable

Monoshot mode. Generate a

square wave with a pulse of 1 ms.

Comment on the difference

between Hardware Triggered and

software triggered strobe mode.

Observe the waveform at GATE

& out pin of 1C 8254 on CRO

11 Perform an experiment to establish communication between

two 8251 systems A and B.

Program 8251 system A in

asynchronous transmitter mode

and 8251 system B in

asynchronous receiver mode.

Write an ALP to transmit the data

from system A and receive the

data at system B. The

requirements are as follows:

Transmission:

• message is stored as ASCII

characters in the memory.

• message specifies the number of

characters to be transmitted as the

first byte.

Reception:

• Message is retrieved and stored

in the memory.

• Successful reception should be

indicated.

12 Write a TSR program in X86 ALP to implement Real Time

Clock (RTC). Read the Real

Time from CMOS chip by

suitable INT and FUNCTION

and display the RTC at the

bottom right corner on the screen.

Access the video RAM directly in

your routine.

13 Write a TSR program in X86 ALP to implement Screen Saver.

Screen Saver should get activated

if the keyboard is idle for 7

seconds. Access the video RAM

directly in your routine.

Microprocessor and Interfacing Laboratory Second Year Computer Engineering

SNJB’s Late Sau. KBJ COLLEGE OF ENGINEERING Page 7

Assignment 1

Problem Definition:

Write X86/64 Assembly language program (ALP) to add array of N hexadecimal numbers stored in the memory. Accept input from the user.

1.1 Prerequisites: Concepts of

Program

Algorithm

Registers

Assembly language

Assembler

Array & its scope

1.2 Learning Objectives:

Understand the implementation

Understand the implementation of the arithmetic instruction of 80386.

1.3 New concepts:-

1.3.1 What is ALP?

Assembly language Program is mnemonic representation of machine code.

1.3.2 Which assembler used in execution of ALP?

Three assemblers available for assembling the programs for IBM-PC are:

1. Microsoft Micro Assembler(MASM)

2. Borland Turbo Assembler (TASM)

3. Net wide Assembler (NASM)

1.4 Theory

1.4.1 Assembly Basic Syntax

An assembly program can be divided into three sections:

1. The data section

2. The bss section

3. The text section

Att (2)

Perm(5

)

Oral(3)

Total(10)

Sign with Date



The data Section

The data section is used for declaring initialized data or constants. This data does not change at

runtime. Youcan declare various constant values, file names or buffer size etc. in this section.

The syntax for declaring data section is:

section .data

The bss Section

The bss section is used for declaring variables. The syntax for declaring bss section is:

section .bss

The text section

The text section is used for keeping the actual code. This section must begin with the

declarationglobal main,

which tells the kernel where the program execution begins.

The syntax for declaring text section is:

section .text

global main

main:

Assembly Language Statements

Assembly language programs consist of three types of statements:

1. Executable instructions or instructions

2. Assembler directives or pseudo-ops

3. Macros

The executable instructions or simply instructions tell the processor what to do. Each

instruction consists of an operation code (opcode). Each executable instruction generates one

machine language instruction.

The assembler directives or pseudo-ops tell the assembler about the various aspects of the

assembly process.

These are non-executable and do not generate machine language instructions.

Macros are basically a text substitution mechanism.

Assembly System Calls

System calls are APIs for the interface between user space and kernel space. We are using the

system calls sys_write and sys_exit for writing into the screen and exiting from the program

respectively.

Linux System Calls

You can make use of Linux system calls in your assembly programs. You need to take the

following steps for using Linux system calls in your program:

Put the system call number in the EAX register. Store the arguments to the system call in the registers EBX, ECX, etc.



Call the relevant interrupt (80h) The result is usually returned in the EAX register

There are six registers that stores the arguments of the system call used. These are the EBX, ECX,

EDX, ESI, EDI, and EBP. These registers take the consecutive arguments, starting with the EBX

register. If there are more than six arguments then the memory location of the first argument is

stored in the EBX register.

The following code snippet shows the use of the system call sys_exit:

MOV EAX, 1 ; system call number (sys_exit)

INT 0x80 ; call kernel

The following code snippet shows the use of the system call sys_write:

MOV EDX, 4 ; message length

MOV ECX, MSG ; message to write

MOV EBX,1 ; file descriptor (stdout)

MOV EAX,4 ; system call number (sys_write)

INT 0x80 ; call kernel

The following table shows some of the system calls:

Assembly Variables

NASM provides various define directives for reserving storage space for variables. The define

Assembler directive is used for allocation of storage space. It can be used to reserve as well as

initialize one or more bytes.



Allocating Storage Space for Initialized Data

There are five basic forms of the define directive:

Allocating Storage Space for Uninitialized Data

The reserve directives are used for reserving space for uninitialized data. The reserve directives

take a single operand that specifies the number of units of space to be reserved. Each define

directive has a related reserve directive.

There are five basic forms of the reserve directive:

1.6 Instructions needed:

1. MOV-Copies byte or word from specified source to specified destination

2. ROR-Rotates bits of byte or word right, LSB to MSB and to CF

3. AND-AND each bit in a byte or word with corresponding bit in another byte or word

4. INC-Increments specified byte/word by 1

5. DEC-Decrements specified byte/word by 1

6. JNZ-Jumps if not equal to Zero

7. JNC-Jumps if no carry is generated

8. CMP-Compares to specified bytes or words

9. JBE-Jumps if below of equal

10. ADD-Adds specified byte to byte or word to word

11. CALL-Transfers the control from calling program to procedure



of elements for addition

ay of numbers in a pointer registe

sult-high to 00H

and convert it to hex

ter register

1.7 Algorithm:

1. Start

2. Initialize data section

3. Load counter with number

4. Locate first location of arr r

5. Initialize result-low and re

6. Scan the number from user

7. Increment location of poin

8. Decrement counter

9. Jump to step 6 if counter is not zero

10. Locate first location of array of numbers in a pointer register

11. Initialize counter with number of elements for addition

12. Add the element of array pointed by pointer register

13. Check the carry of addition. If carry is generated then go to step 14 else go to step15

14. Increment result-high register

15. Increment pointer register to array

16. Decrement counter

17. Jump to step 12 if counter is not equal to zero

18. Display the content of Result-High as carry of addition by converting hex to ASCII

19. Display the content of Result-Low as result of addition by converting hex to ASCII

20. Stop

1.5 Working with ALP in NASM

NASM - The Netwide Assembler

1. an 80x86 and x86-64 assembler designed for portability and modularity 2. Supports a range of object file formats - a.out, ELF, COFF, OBJ, WIN32, WIN64, etc. 3. Default format - binary can read, combine and write object files in many different formats such

as COFF, ELF, etc

4. Different formats may be linked together to produce any available kind of object file. 5. Elf – executable & linkable file format of object file & executable file – supported by Linux

Commands

• To assemble

nasm –f elf64 hello.asm -o hello.o

• To link

ld –o hello hello.o

• To execute -

./hello



1.8 Theory Questions:

1. Explain in detail address calculation of 16 bit and 32 bit architecture?

2. Explain in detail register model of 16 bit, 32 bit and 64 bit architecture?

3. Describe execution of CALL instruction

4. What do you mean by is assembler directives? Explain assembler directives.

5. Explain Macro and Procedure?

6. Explain advance features of i7 processor?

7. What is multi core Architecture?

1.9 Oral Questions:

1. Explain sys_exit,sys_write,sys_read? 2. Explain .data,.bss,.text ?

3. Explain how to run a program in NASM?

4. Explain RESD,RESW,RESB,RESQ ?



y addressing

ation of data in memory.

Att (2)

Perm(5)

Oral(3)

Total(10)

Sign with Date

Assignment 2

Problem Definition:

Write 8086 ALP to perform non-overlapped and overlapped block transfer

(with and without string specific instructions). Block containing data can be

defined in the data segment

2.1 Prerequisites: Concepts of

Memory

Block operations


Understand the memor

Understand the localiz

2.3 Theory

2.3.1Registers

Registers are places in the CPU where a number can be stored and manipulated. There are

three sizes of registers: 8-bit, 16-bit and on 386 and above 32-bit. There are four different

types of registers:

1. General Purpose Registers,

2. Segment Registers,

3. Index Registers,

4. Stack Registers.

2.3.1.1 General Registers – Following are the registers that are used for general purposes

in 8086

AX accumulator (16 bit)

AH accumulator high-order byte (8 bit)

AL accumulator low-order byte (8 bit)

BX accumulator (16 bit)

BH accumulator high-order byte (8 bit)

BL accumulator low-order byte (8 bit)



t)

ers are used with the segment reg

CX count and accumulator (16 bit)

CH count high order byte (8 bit)

CL count low order byte (8 bit)

DX data and I/O address (16 bit)

DH data high order byte (8 bit)

DL data low order byte (8 bit)

2.3.1.2 Segment Registers - These registers are used to calculate 20 bit address from 16 bit

registers.

CS code segment (16 bit)

DS data segment (16 bit)

SS stack segment (16 bit)

ES extra segment (16 bit)

2.3.1.3 Index Registers - These registers are used with the string instructions.

DI destination index (16 bi

SI source index (16 bit)

2.3.1.4 Pointers - These regist ister to obtain 20 bit

addresses

SP stack pointer (16 bit)

BP base pointer (16 bit)

IP instruction pointer (16 bit)

CS, Code Segment

Used to ―point‖ to Instructions

Determines a Memory Address (along with IP)

Segmented Address written as CS:IP

DS, Data Segment

Used to ―point‖ to Data

Determines Memory Address (along with other registers)

ES, Extra Segment allows 2 Data Address Registers

SS, Stack Segment

Used to ―point‖ to Data in Stack Structure (LIFO)



mented Addresses

ations

s bus but the registers are only s

s two registers are combined. E

isters plus an offset and/or a b

Used with SP or BP

SS:SP or SS:BP are valid Segmented Addresses

IP, Instruction Pointer

Used to ―point‖ to Instructions

Determines a Memory Address (along with CS)

Segmented Address written as CS:IP

SI, Source Index; DI, Destination Index

Used to ―point‖ to Data

Determines Memory Address (along with other registers)

DS, ES commonly used

SP, Stack Pointer; BP, Base Pointer

Used to ―point‖ to Data in Stack Structure (LIFO)

Used with SS

SS:SP or SS:BP are valid Seg

2.3.2 Memory address calcul

The 8086 uses a 20 bit addres ixteen bit. To derive twenty

bit addresses from the register very memory reference uses

one of the four segment reg ase pointer and/or a index

register. The segment register is multiplied by sixteen (shifted to the left four bits) and

added to the sixteen bit result of the offset calculation.

Figure 1Diagrammatic Representation of Address calculation

The 8086 provides four segment registers for address calculations. Each segment register is

assigned a different task. The code segment register is always used with the instruction



lated using the assembler directi

the distant from the start of the s

pointer (also called the program counter) to point to the instruction that is to be executed

next. The stack segment register is always used with the stack pointer to point to the last

value pushed onto the stack. The extra segment is general purpose segment register. The

data segment register is the default register to calculate data operations, this can be over

ridden by specifying the segment register. For example mov ax,var1 would use the offset

var1 and the data segment to calculate the memory reference but mov ax,ss:var1 would use

the offset var1 and the stack segment register to calculate the memory reference.

The offset can be calculated in a number of ways. Their are three elements that can make

up an offset. The first element is a base register, this can be one of the BX of BP registers

(the BP register defaults to the stack segment). The second element is one of the index

register, SI or DI. The third element is a displacement. A displacement can be a numerical

value or an offset to a label. An offset can contain one to three of these elements, making a

total of sixteen possibilities.

BX SI

or + or + Displacement

BP DI

(base) (index)

The offset to a label in calcu ve OFFSET. This directive

makes the assembler calculate egment that the label resides

in to the label.

2.3.3 Memory Segmentation

x86 Memory Partitioned into Segments

– 8086: maximum size is 64K (16-bit index reg.)

– 8086: can have 4 active segments (CS, SS, DS, ES)

– 8086: 2-data; 1-code; 1-stack

– x386: maximum size is 4GB (32-bit index reg.)

– x386: can have 6 active segments (4-data; FS, GS)

Why have segmented memory?

Other microprocessors could only address 64K since they only had a single 16-bit MAR (or

smaller). Segments allowed computers to be built that could use more than 64K memory

(but not all at the same time).



System

apped segment d

segment c

nt a segment b

Code

Extra

Stack

Data

Segment

CS

ES SS

DS

FFFFFh

• Segment Registers:

– Point to Base Address

Fragmentation

• Index Registers:

– Contain Offset Value

• Notation (Segmented Address):

Logical

Segments

partially overl fully overlapped contiguous

segme segment e

Physical

Memory

0h 10000h 20000h 30000h

Note that segments can overlap. This means that two different logical addresses can refer

to the same physical address (aliasing).

In non-overlapping method, address of source is totally different from address of

destination. Therefore, we can directly transfer the data using MOVSB/MOVSW

instruction for transferring the data.

The blocks are said to be overlapped if some of the memory locations are common for

both the blocks.

Case I: If address in SI is greater than address in DI then start the data transfer from last

memory location keeping DF=1.



e

pointed by source and destination

by source register [si+count] to a

e register.

iable into location pointed by dest

Case II: If address in SI is less than address in DI, then start the data transfer from first

memory location by keeping DF=0.

2.3.4 Algorithm:

2.3.4.1 Non-overlapped mode

1. Initialize 2 memory blocks pointed by source and destination registers.

2. Initialize counter.

3. Move the contents pointed by source register to a register.

4. Increment address of source register.

5. Move the contents from register into location pointed by destination register.

6. Increment destination registers.

7. Decrement counter.

8. Repeat from steps 3 to step 6 until counter is 0.

9. End.

2.3.4.2 Non-overlapped mod

1. Initialize 2 memory blocks registers.

2. Initialize counter.

3. Move the contents pointed variable.

4. Decrement address of sourc

5. Move the contents from var ination register [di+count]

6. Decrement destination registers.

7. Decrement counter.

8. Repeat from steps 3 to step 6 until counter is 0.

9. End.

Input:

Array of number stored in location pointed by source and destination register Example:

Array 1 db 10h, 20h, 30h, 40h, 33h, 0ffh, 44,55h, 23h, 45h

Array2 db 00h, 00h, 00h, 00h, 00h, 00h, 00,00h, 00h, 00h

Output:

NON OVER LAPPED BLOCK TRANSFER

Array2 db 10h, 20h, 30h, 40h, 33h, 0ffh, 44,55h, 23h, 45h

OVER LAPPED BLOCK TRANSFER

Array2 db 00h, 00h, 00h, 00h, 00h,10h, 20h, 30h, 40h, 33h, 0ffh, 44,55h, 23h, 45h



2.4 Theory Questions:

1. Memory: Even and odd banks

2. Address decoding techniques.

3. Comparison between memory mapped I/O and I/O mapped I/O.

4. Diagrammatic representation of the overlapped and non-overlapped block transfer

5. Comparison of overlapped and non-overlapped block transfer

2.5 Oral Questions:

1. Specify all the memory addressing instruction

2. What is the use of Direction flag in Block transfer?

3. What is use of Source and Destination Index in above program

4. What is the change in the contents of memory locations in overlapped and non-

overlapped mode?

5. Which interrupt is used to terminate the program in 8086 kit?



Att (2)

Perm(5)

Oral(3)

Total(10)

Sign with Date

Assignment 3

Problem Definition: Write 8086 ALP to convert 4-digit Hex number into its equivalent BCD number and 4-digit BCD number into its equivalent HEX number .Make your program user friendly to accept the choice from user for:

HEX to BCD

BCD to HEX

EXIT

Display appropriate messages to prompt the user while accepting the input and

displaying the result.

3.1 Prerequisites:

Concept of number system


Understand the implementation stack for its conversion of number

3.3 New concept:-

1.3.1 Memory model directives.

1.3.2 Segment directives.

1.3.3 Data type declaration

3.4 Theory

3.4.1 Memory model directives

These directives instruct the assembler as to how large the various segment (code, data,

stack, etc) can and what sort of segmentation register will be required (see sect.2.4.1).



xt directives is encounter). .data

ssed, data can be of several diff

.MODEL

Where is one of the following options:

Tiny- code and data fit into single 64k and accessed via near pointers.

Small- code and segment both less than 64k and accessed via near pointers.

Compact –Code segment is



3.5 Instruction Used:

1. PUSH:-Push word onto stack.

2. POP:-Pop word off stack.

3. DIV:-Divide byte/word

4. XOR: - Exclusive or byte/word

5. JA/JNBE:-Jump if above/not below or equal

6. JB/JNAE:-Jump if below /not above or equal

7. JG/JNLE:-Jump if /not less nor equal

8. JL/JNGE:-Jump if less /not greater nor equal

9. INT:-It allows ISR to be activated by programmer & external H\W device

3.6 New interrupt used:

1 INT 21h, function 0AH:- Read from keyboard and place into a memory buffer a row of

character, untilis pressed.

3.7 New directives used:

1. .MODEL

2. .STACK

3. .DATA

4. .CODE

5. .OFFSET: - It informs the assembler to determine the offset/displacement of a named

data item.

6. .PTR: - assign a specific type to variable/label

3.8 Algorithm:

3.8.1 HEX to BCD

1. Define variable on data segment.

2. Display message on screen ENTER 4-DIGIT HEX NO.

3. Accept BCD NO from user.

4. Transfer 0AH as a divisor in one of the register.

5. Divide the no by 0AH

6. PUSH reminder in one of the register

7. Increment Count _1.



git by multiplier & add it to RES

ser

git by multiplier & add it to RES

ser

8. Repeat Till BCD NO is not zero go to step 5.

9. Pop the content of Reminder.

10. Display result by calling display procedure.

11. Decrement Count _1, till Count is not zero repeat step 9 else go to step 12.

12. Stop

3.8.2 BCD to HEX

1. Define variables in data segment

2. Display message on screen ENTER 5-DIGIT BCD NO.

3. Accept single digit from user

4. Transfer 10000 to multiplier

5. Multiply accepted BCD digit by multiplier & add it to RESULT variable.



8. Multiply accepted BCD di ULT variable.

9. Accept single digit from u


11. Multiply accepted BCD di ULT variable.

12. Accept single digit from u






18. Display result by calling display procedure

19. Stop.

3.8.3 Procedure for accept numbers: (ASCII to HEX)

1. Read a single character/digit from keyboard using function 0AH of INT 21H

2. Convert ASCII to HEX as per following:

a. Compare its ASCII with 30H if No is less than 0 (i.e case of -ve no given) then go to

step f else go to step c.

b. Compare its ASCII with 39H if No is greater than 9 (i.e case of character A – F given)

then go to step f else go to step c .

c. Store the resultant bit in NUM Variable.



modes of 8086 microprocessor u

er directives used in this program

ystems used in Digital Electronic

plain the steps to convert HEX

plain the steps to convert BCD N

d. Check whether four digits (16-bit number) or two digits (8-bit number) are read; if yes

then go to display procedure else go to step 1 for next bit

e. Till counter is zero go to accept procedure.

f. Display massage ―I/P is invalid BCD number‖ & go to step 17.

3. End of accept procedure.

3.8.4 Procedure for display Result: (HEX to ASCII)

1. Compare 4 bits (one digit) of number with 9

2. If it is



Att (2)

Perm(5)

Oral(3)

Total(10)

Sign with Date

Assignment 4

Problem Definition:

Write 8086 ALP for the following operation on the string entered by the user

a. Calculate Length if the string b.

Reverse the string

c. Check whether the string is palindrome or not

Make your program friendly by providing MENU like:

Enter String

Calculate Length Of String

Reverse The String

Check Palindrome

Exit

Display appropriate messages to prompt the user while accepting the input and

displaying the result.

4.1 Prerequisite:

Concept of string &its operation.

4.2 Learning objectives :

Implementation of string of 8086

4.3. New concept:

String manipulations in 8086.

4.4 Theory

4.4.1 The 80x86 String Instructions

All members of the 80 x 86 families support five different string instructions: MOVS,

CMPS, SCAS, LODS and STOS. They are the string primitives since you can build most

other string operations from these five instructions.



r

e FLAGS register. e MOVS (move string) instructi

S:SI to the destination address s

4.4.2 How the String Instructions Operate

The string instructions operate on blocks (contiguous linear arrays) of memory. For

example the MOVS instruction moves a sequence of bytes from one memory location to

another. The CMPS instruction compares two blocks of memory. The SCAS instruction

scans a block of memory for a particular value. These string instructions often require three

operands a destination block address a source block address and (optionally) an element

count. For example when using the MOVS instruction to copy a string you need a source

address a destination address and a count (the number of string elements to move).

Unlike other instructions which operate on memory the string instructions are single-byte

instructions which don't have any explicit operands. The operands for the string

instructions include

The SI (source index) register

The DI (destination index) register

The CX (count) registe

The AX register and

The direction flag in t For example one variant of th on copies a string from the

source address specified by D pecified by ES:DI of length

CX. Likewise the CMPS instruction compares the string pointed at by DS:SI of length CX

to the string pointed at by ES:DI.

Not all instructions have source and destination operands (only MOVS and CMPS support

them). For example the SCAS instruction (scan a string) compares the value in the

accumulator to values in memory. Despite their differences the 80x86's string instructions

all have one thing in common - using them requires that you deal with two segments the

data segment and the extra segment.

4.4.3 The REP/REPE/REPZ and REPNZ/REPNE Prefixes The string instructions by themselves do not operate on strings of data. The MOVS

instruction for example will move a single byte word or double word. When executed by

itself the MOVS instruction ignores the value in the CX register. The repeat prefixes tell

the 80x86 to do a multi-byte string operation. The syntax for the repeat prefix is:

Field: Label repeat mnemonic operand ; comment



eat prefixes with the LODS instr

f the repeat prefixes introduces a

For MOVS: REP MOVS {operands}

For CMPS:

REPE CMPS {operands}

REPZ CMPS {operands}

REPNE CMPS {operands}

REPNZ CMPS {operands}

For SCAS:

REPE SCAS {operands}

REPZ SCAS {operands}

REPNE SCAS {operands}

REPNZ SCAS {operands}

For STOS:

REP STOS {operands} You don't normally use the rep uction.

As you can see the presence o new field in the source line

- the repeat prefix field. This field appears only on source lines containing string

instructions. In your source file:

The label field should always begin in column one

The repeat field should begin at the first tab stop and

The mnemonic field should begin at the second tab stop. When specifying the repeat prefix before a string instruction the string instruction repeats

CX times. Without the repeat prefix the instruction operates only on a single byte word or

double word.

You can use repeat prefixes to process entire strings with a single instruction. You can use

the string instructions without the repeat prefix as string primitive operations to synthesize

more powerful string operations.



fix before this instruction the CP

completion the SI and DI register

the 80x86 decrements si and di

g operation the si and di register

if the direction flag was set.

The operand field is optional. If present MASM simply uses it to determine the size of the

string to operate on. If the operand field is the name of a byte variable the string instruction

operates on bytes. If the operand is a word address the instruction operates on words.

Likewise for double words. If the operand field is not present you must append a "B" "W"

or "D" to the end of the string instruction to denote the size e.g. MOVSB MOVSW or

MOVSD.

4.4 The Direction Flag Besides the SI, DI and ax registers one other register controls the 80x86's string

instructions - the flags register. Specifically the direction flag in the flags register controls

how the CPU processes strings.

If the direction flag is clear the CPU increments SI and DI after operating upon each string

element. For example if the direction flag is clear then executing MOVS will move the byte

word or double word at DS:SI to ES:DI and will increment SI and DI by one two or four.

When specifying the REP pre U increments SI and DI for

each element in the string. At s will be pointing at the first

item beyond the string.

If the direction flag is set then after processing each string

element. After a repeated strin s will be pointing at the first

byte or word before the strings

The direction flag may be set or cleared using the cld (clear direction flag) and std (set

direction flag) instructions. When using these instructions inside a procedure keep in mind

that they modify the machine state. Therefore you may need to save the direction flag

during the execution of that procedure.

4.5 Algorithm 1. Start

2. Display message to enter string

3. Enter the string

4. Display menu as

1. Calculate length of string

2. Reverse the string

3. Check palindrome

4. Exit

5. Read choice



, decrement counter

alindrome and jump to step 4

hen Display message string is not

If choice =1 go to step6




6. Display message for length

7. Display the length of string and jump to step 4

8. Display message for reverse string

9. Set the counter to length of string

10. Decrement the pointer to source string

11. Move the byte from source to destination

12. Increment the destination pointer

13. Decrement counter of length

14. Repeat step10 to13 until counter of length of string becomes zero and jump to step 4

15. Compare each location of source and destination of the source string and reversed

string

16. If equal increment pointers

17. Display message string is p

18. If step 15 gives not equal t palindrome and jump to

step 4

19. Terminate the program 4.6 Assignment Questions

1. Write a program in 8086 assembly language to move string of 16 characters from

7000h: 2000h to 9000h: 0300h using string instructions.

2. Explain with example string instructions of 8086 Microprocessor.

4.7 Oral Questions

1. What is maximum size of the instruction in 8086?

2. Which are string instructions?

3. In string operations which is by default string source pointer?

4. In string operations which is by default string destination pointer?

5. What is LEA? What is its use in our program?



Att (2)

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Assignment 5

Problem Definition:

Write 8086 ALP to perform string manipulation. The strings to be accepted from

the user is to be stores code segment Module 1 and write FAR PROCEDURES in

code segment Module_2 for following operations on the string:

a) Concatenation of two strings

b)Number of occurrences of a sub-string in the given string

Note: Use PUBLIC and EXTERN directive. Create .OBJ files of both the modules

and link them to create an EXE file.

5.1 Prerequisite:

a) Concept of String Operation.

b) Concept of lntersegment CALL.


Understand the working of Far Procedure

Implementation Far Procedure For string operation.

5.3 New Concepts:

a. Far procedure

b. PUBLIC & EXTERN Directives

5.4 Theory

5.4.1 EXTERN: Importing Symbols from Other Modules

It tells assembler that named item is defined in another assembly.

It is used to declare a symbol which is not defined anywhere in the module being

assembled, but is assumed to be beaded in some other module and needs to be

referred to by this one.

It can take only one argument at a timed the support for multiple arguments is

implemented at the preprocessor level.



n][combine]

Syntax: EXTRN a day item or procedure name: type

Example of a procedure i.e. far

EXTRN SUB1: FAR

MAINPROGRAM START

.

.

.

CALL SUBI

MAINPROGRAM END

5.4.2 PUBLIC: It tells assembler that the address of a named item in current

Assembly is available to other modules.

Syntax: PUBLIC a label/variable/procedure name

* Example of procedure

PUBLIC SUB1

SUBl PROC FAR

Jr



ead function

sourcestring & destindex = zero,

ENDP: The ENDFUNCdirective Darks the end of a function. ENDP

is a synonym for ENDFUNC. 5.5 Algorithm:

1. Start

2. Display Menu as

a. Concatenation of 2 string

b. Equal or not

c. Exit

3. Read choice, if choice =a go to step4, if choice = b go to step5, if choice = c go to step6

4. Call Concat Far procedure for concatenation of two strings

5. Call Comp Far procedure to compare two strings

6. End

Concat procedure

1. Start

2. Read 2 strings using string r

3. Assign srcindex = length of reset Direction flag

4. Use string transfer function.

5. Print string

6. Ret

Comp procedure

1. Read 2 slings using string read function

2. Assign sourceindex=o & destindex=0 reset direction flag

3. Use string compare function

4. Print result

5. Ret

5.6 Assignment Questions:

1. Explain difference between NEAR and FAR procedure of 8086 microprocessor.

2. What is EA? In how many ways EA is specified in the instruction?

3. Explain the use of POP and PUSH instruction in 8086.



5.7 Oral Questions:

1. Why we indicate FF as 0FF in program?

2. What do you mean by 20 dup (0)?

3. Explain assembler directives used in program



rotate instruction

t and Rotation Instructions for pe

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Sign with Date

Assignment 6

Problem Definition:

Write 8086 ALP to perform multiplication of two 8-bit numbers. Use

Successive Addition and add and shift method.

6.1 Prerequisites:

Concept of multiplication method

6.2 Learning objectives:

Understanding shift &

6.3 New Concept

Implementation of Shif rforming multiplication

6.4 Theory

Multiplying unsigned numbers

Multiplying unsigned numbers in binary is quite easy. Recall that with 4 bit numbers we

can represent numbers from 0 to 15. Multiplication can be performed done exactly as with

decimal numbers, except that you have only two digits (0 and 1). The only number facts to

remember are that 0*1=0, and 1*1=1 (this is the same as a logical "and").

Multiplication is different than addition in that multiplication of an n bit number by an m

bit number results in an n+m bit number. Let's take a look at an example where n=m=4 and

the result is 8 bits

Decimal Binary

10

x6

60

1010

x0110

0000

1010

1010

+0000

0111100

In this case the result was 7 bit, which can be extended to 8 bits by adding a 0 at the left. When multiplying larger numbers, the result will be 8 bits, with the leftmost set to 1, as

shown.



on and division instructions does

ending on the size of the source

elow

o row:

0 1 1 0

× 1 1 0 1 Sum:

0 1 1 0 00000110

Decimal

Binary

13

x14

182

1101

x1110

0000

1101

1101

+1101

10110110

As long as there are n+m bits for the result, there is no chance of overflow. For 2 four bit multiplicands, the largest possible product is 15*15=225, which can be represented in 8

bits.

Multiplying signed numbers There are many methods to multiply 2's complement numbers. The easiest is to simply find the magnitude of the two multiplicands, multiply these together, and then use the original

sign bits to determine the sign of the result. If the multiplicands had the same sign, the

result must be positive, if they had different signs, the result is negative. Multiplication by

zero is a special case (the result is always zero, with no sign bit).

Multiplication and division can be performed on signed or unsigned numbers. For unsigned

numbers, MUL and DIV instructions are used, while for signed numbers IMUL and IDIV

are used.

The format of the multiplicati not specify the multiplicand

as it is implicitly specified dep

Consider the example given b

6 × 13 = 78

Sequential addition from row t

0 0 0 0 00000110 0 1 1 0 00011110

+ 0 1 1 0 01001110

0 1 0 0 1 1 1 0 Product 6.4.2 Sequential Shift/Add-Method Method to avoid adder arrays • shift register for partial product and multiplier with each cycle,

1. Partial product increases by one digit

2. Multiplier is reduced by one digit

• MSBs of partial product and multiplicand are aligned in each cycle

• not the multiplicand is shifted

⇒ Partial product and multiplier are



for 8-bit numbers

present in the AL register and sec

e in AL with the byte in BL

Successive Addition Method

Consider that a byte is ond byte is present in BL

Register.

We have to multiply th

Multiply the number using Successive Addition Method.

In this method, one number is accepted and other number is taken as a counter.

The first number is added with itself, till the counter decrements to zero.

Result is stored in DX register, Display the result, using display routine



& Multiplier for multiplication

15 x 13 =195

6.5 Algorithm: 1. Start 2. Read multiplication

3. Display menu

a. Successive Addition

b.Add & shift method

c.Exit

4. Read choice .if choice =a go to next step, if choice = b go to

Sep 9, if choice =c go to step 15

5. Assign sum =0 count= Multiplier

6. Sum =sum Multiplicand

7. Decrement count .if count >0 go to step 8

8. Print sum & go to step 3

9. Assign count =no of digit in multiplier, sum=0, shiftvar=0

10. Shift right Multiplier by 1

11. If carry flag set, sum =sum+ (Left shifted multiplicand by shiftvar)

12. Shitvar =shitvar+1

13. If count> 0 go to step 14

14. Print sum & go to step 3

15. Exit

6.6 Instructions needed:

1. MUL-Multiplication specified byte or word to word 2. SHR- Shift logical right byte or word, MSB to LSB and to CF



instructions for JE/JZ (Logic of p

ation by MUL and IMUL

3. SHL-Shift logical left byte or word, LSB to MSB and to CF

4. JMP-Unconditional jump to the specified location counter

5. JC-Jumps if carry is generated

6. JE/JZ-Jumps if equal or zero.

Directive Recommended:

1) MACRO- Start of MACRO statement 2) ENDM-end

6.7 Assignment Question:

1. Explain MACRO with example. Justify where macro is suitable than procedure. 2. Differentiate between PROC& MACRO

3. What is the difference between a rotate & a shift instruction? Explain with an

appropriate diagram.

4. Explain the difference between arithmetic shift & logical shift.

5. Describe execution of CALL instruction.

6.8 Oral Question:

1. Explain the Instruction used in the program 2. With example explain Add and Shift Multiplication

3. With example explain Successive Addition Multiplication

4. Suggest the alternative rogram should not change)

5. Difference in multiplic



ions of 8087

87 Instructions for computing Mea

Assignment 7

Problem Definition:

Write 8087ALP to obtain:

i) Mean ii) Variance iii) Standard Deviation

For a given set of data elements defined in data segment. Also display result

7.1 Prerequisites:

Concept of Mean, Variance and Standard Deviation

7.2 Learning objectives:

Understanding instruct

7.3 New Concept

Implementation of 80 n, Variance and Standard

Deviation

7.4 Theory:

7.4.1 80X87 Architecture The 80X87 is designed to operate concurrently with microprocessor. The 80X87 executes 68 different instructions. The microprocessor executes all normal instruction & 80X87

arithmetic coprocessor instructions. Both the microprocessor & coprocessor can execute

their respective instructions simultaneously or concurrently. The numeric or arithmetic

coprocessor is a special-purpose microprocessor i.e. especially designed to efficiently

execute arithmetic & transcendental operations.

The microprocessor intercepts & executes the normal instruction set, & coprocessor

intercepts & executes only the co-processor instructions. The ESC instruction used by

microprocessor, to generate a memory address for coprocessor so that coprocessor can

execute a coprocessor instruction.

7.4.2 Internal Structure of The 80X87:

Figure shows internal structure of arithmetic coprocessor. It is divided into two major

sections; control unit & numeric execution unit.

Att (2) Perm(5) Oral(3) Total(10) Sign with Date



80-bit

cessor to microprocessor system

m. If instruction is an Escape (c

the microprocessor executes it.

Control unit (CU) Numeric Execution Unit (NEU)

Control register

Status Register

Exponent Module

Shifter

Data

Buffer

Instruction Decoder

Operand Queue

Arithmetic

Module

Temporary

Registers

TA 7

G 6 Bus Tracking RE

5 Exceptions G

I 4

S 3

TE 2

R 1

0

wide stack

1. Control Unit:

It interfaces the copro data bus. Both the devices

monitor the instruction strea oprocessor) instruction, the

coprocessor executes it; if not,

2. Numeric Execution Unit (NEU): It is responsible for executing all coprocessor instructions. The NEU has an 8-

register stack that holds operands for arithmetic instructions & the result of arithmetic

instructions. Instructions either address data in specific stack data register or use a push &

pop mechanism to store & retrieve data on the top of stack. Other registers in the NEU are

status, control, tag & exception pointers. A few instructions transfer data between the

coprocessor & the AX register in microprocessor. The FSTSW AX instruction is the only

instruction available to coprocessor that allows direct communications to microprocessor

through the AX register. 8087 does not contain FSTSW AX instruction.

The stack within the coprocessor contains eight registers that are each 80 bits wide. These

stack registers always contains an 80 bit extended precision floating pt. number. The only

time that data appear as any other form is when they reside in the memory system. The

coprocessor converts from signed integer, BCD, single precision, or double precision form

as data are moved between the memory & coprocessor register stack.

3. Instruction Set: The arithmetic coprocessor executes over 68 different instructions. Whenever a coprocessor instruction references memory, the microprocessor automatically generates

memory address for the instruction. The coprocessor uses the data bus for data transfer



struction exchanges the top of sta

r Instructions: e integer data transfer instructions

& pop).

s did FLD, FST, FSTP, except

during coprocessor instructions and the microprocessor uses it during normal instruction.

Each time that assembler encountered one of the coprocessor mnemonic opcode to

coprocessor.

Data Transfer Instruction: There are three basic data transfers: floating pt., signed –integer & BCD. The only time that data ever appear in the signed integer or BCD form is in memory. Inside the coprocessor,

data always stored as an 80-bit extended –precision floating –pt number.

Floating point Data Transfer:

There are four traditional floating pt data transfer instructions are: FLD (load real), FST (store real), FSTP (store real & pop), FXCH (exchange). A new instruction added in

Pentium Pro through Pentium 4 is a conditional floating pt. move instruction that uses

opcode FCMOV with a floating pt. condition.

The FLD instruction loads floating-point memory data to top of internal stack, referred to

as ST (stack top). This instruction stores the data on top of stack & then decrements the

stack pointer by one.

The FST instruction stores a copy of top of stack into memory location or coprocessor

register indicated by the operand.

The FSTP (floating pt. store & pop) instruction stores a copy of top of stack into memory

or any coprocessor register & then pops data from top of stack.

The FXCH instruction exchanges the register indicated by the operand with the top of the

stack. For Ex. FXCH ST (2) in ck with register 2.

Integer Data Transfe The coprocessor supports thre :

1. FILD (load register),

2. FIST (store integer)

3. & FISTP (store integer

These instructions functions a that the data transferred are

integer data. The coprocessor automatically converts the internal extended –precision

floating-point data to integer data.

BCD Data Transfer Instructions: Two instructions load or stores BCD signed –integer data. The FBLD instruction Loads the top stack with BCD memory data & FBSTP stores top of stack & does a pop.

Arithmetic Instructions: Arithmetic instructions for coprocessor include addition, subtraction, multiplication, division & calculating square roots. The arithmetic related instructions are scaling,

rounding, absolute value, & changing the sign.

a) Addition:

FADD destination, source Adds real numbers from specified source to real number at destination source can be stack element or memory location. Destination must be a stack element.

Ex. FADD ; ST+ST (1) ,pop stack result at ST

FADDP destination, source Adds ST to specified stack elements and increments stack pointer by one. Ex. FADDP ST (2) ; Add ST (2) to ST. increment Stack pointer so ;ST(20) becomes

ST.

FIADD source Adds integer from memory to ST stores result in ST.



: specified source by real number ement, and incremented stack poi

ly ST(2) to ST. incremented Stac

ST & put result in ST.

BX] ; integer no. from memor

Ex. FIADD PRICE ; Integer number from memory + ST.

b) Subtraction:

FSUB destination, source Subtracts the real number at specified source from the real number at specified destination & puts the results in the specified destination.

Ex. FSUB ; ST ST (1)-ST

FSUBP destination, source Subtracts ST from specified stack elements & puts result in specified stack element. Then increments stack pointer by one.

Ex. FSUBP ST (2) ; ST(2) ST. ST(1) becomes new ST.

FISUB source Subtracts integer number stored in memory from ST & stores result in ST. Ex. FISUB DIFF ; ST ST – integer from memory.

c) Multiplication:

FMUL destination, source: Multiply real number from source by real number from specified destination, & put result in specified stack element.

Ex. FMUL

FMUL ST, ST (5) ; multiply ST(5) to ST, result in ST.

FMULP destination, source Multiplies real number from from specified destination, puts result in specified stack el nter by one.

Ex.

FMULP ST(2) ; multip k pointer so ST 1 becomes

ST .

FIMUL source : Multiply integer from memory Ex.FIMUL DWORD PTR[ y pointed by BX * ST and

result in ST.

d) Division :

FDIV destination, source: Divides destination real by source real, stores result in destination. Ex. FDIV

FDIV ST(2), ST ;divides ST by ST(2) stores result in ST.

FDIVP destination, source: Same as FDIV, but also increments stack pointer by one after DIV. Ex. FDIVP ST (2), ST ;divides ST by ST(2) result in ST & increments stack

;pointer.

FIDIV source Divides ST by integer from memory stores result in ST. Ex. FIDIV PERCENTAGE ; ST ST /integer number.

e) Other arithmetic operations: FSQRT: Contents of ST are replaced with its square root. FABS: Replaces ST by its absolute value. Instruction simply makes sign positive.

FCHS: Complements the sign of the number in ST.



dressing mode of coprocessor to

oprocessor is also operated in th

de can only be exited by a h/w re

to control register.

gister with word addressed by op

the control register into word-siz

f) Compare Instructions: Compares the contents of ST with contents of specified or default source. The source may be another stack element or real number in memory.

FCOM source: Compares ST with real number in another stack element or memory

FCOMP source: Identical to FCOM except that stack pointer is incremented by one after

the compare operation.

g) Instructions which Loads Constants These instructions simply push the indicated constant onto the Stack. FLDZ : Push 0.0 onto stack.

FLD1 : Push +1.0 onto stack.

FLDPI : Push the value of onto stack.

FLD2T : Push log of 10 to the base 2 onto stack(log2 10)

FLD2E : Push log of e to the base 2 onto stack(log2 e)

FLDG2 : Push log of 2 to the base 10 onto stack(log10 2)

h) Coprocessor Control Instructions: The coprocessor has to control instructions for initialization, exception handling, task switching. The control instructions have two forms.

FINIT/FNINIT: Performs a reset operation on the arithmetic coprocessor. It sets

register 0 as the top of the stack.

FSETPM: Changes the ad protected addressing mode.

This mode is used when mic e protected mode. As with

microprocessor, protected mo set or, in the case of 80386

thro‘ Pentium 4, with changes

FLDCW: Loads the control re erand.

FSTCW / FNSTCW: Stores ed memory operand.

7.5 Algorithm

1. Initialize 8087 2. Make stack top zero

3. Load and add each no to stack top

4. Divide the total by n no of elements

5. Store the average in mean

6. Make stack top zero

7. Load each no. To stack top, Subtract mean from the no.(xi-mean), Square the (xi-

mean) and add the contents

8. Store the addition in temp1

9. Load 1 on stack top

10. Load n on stack top

11. Find n-1

12. Store n-1 in temp2

13. Load n-1 on stack top

14. Load sum of (xi-mean)2 on stack top

15. Divide sum by n-1

16. Store as variance

17. Find the square root

18. Store as standard deviation

19. Display mean, variance and standard deviation

20. Stop



7.6 Theory Questions 1. Explain Status and Control Word of 8087 2. State and Explain data types supported by 8087

3. Explain the type of instructions supported by 8087. Give one example of each.

7.7 Oral Question:

1. Explain in Detail math Co-Processor? 2. Explain in detail

a. FADD

b. FSQRT

c. FDIV

d. FMUL

3. Explain long form of NDP?



cing of ADC to 8086. cing of peripheral ICs like 8255.

55 PPI with 8086

55 PPI with 0809 ADC

er:

igital ADC converter is to produc


Assignment 8

Problem Definition:

Write 8086 ALP to convert an analog signal in the range of 0V to 5V to its

corresponding digital signal using successive approximation ADC and dual

slope ADC. Find resolution used in both the ADC’s and compare the results.

8.1 Prerequisite: Concept of: 1. 8255 working 2. Data conversion from analog to digital

8.2 Learning Objectives: 1. Understand the interfa

2. Understand the interfa

8.3 New Concepts:

o Interfacing of 82 o Interfacing of 82

8.4 Theory

An analog to Digital Convert The function of an analog to d e a digital word which represents magnitude of some analog voltage or current

8.4.1 The important specifications of an ADC are:

Resolution

Accuracy

Linearity

Speed

Conversion Time

8.4.2 Types of ADC

Parallel Comparator ADC or Flash ADC

Dual Slope ADC

Successive-Approximation ADC

8.4.2.1 Parallel Comparator ADC or Flash ADC:

Major advantage is its high speed. It has least conversion time compared to other

converters

The opcode from the comparators is not a binary code(std), but it can be converted

to any desired code with some simple logic



mparator will go low and this wil

DC 0809: on the successive approxima

8-analog inputs, an 8 channel mul

, it includes a 256 register voltag

The disadvantage of flash logic ADC is that more numbers of A comparators are

required for a reasonable amount of resolution

2n-1 comparators are required for n-bit resolution. Hence for an 8-bit conversion

255 comparators are needed.

The cost of flash ADC is relatively high.

8.4.2.2 Dual slope ADC

It is used in digital voltmeter

This type of converter can give a no. of bits of resolution

The cost of ADC is low

The accuracy of converter is high as it is not affected by temperature

Disadvantage: slow type speed

It may take 300ms to do a conversion

8.4.2.3 Successive-approximation ADC:

On the other hand 1st

clock pulse at start of conversion cycle successive

approximation register (S.A.R.) makes MSB 1

DAC applies its equivalent voltage inverting input of the converter

Comparator compares both the inputs and if the inverting input is higher than the

other voltage the output of co l tell S.A.R. to make MSB 0

otherwise it will set.

8.4.3 Working Principle of A 1 The ADC 0809 operates tion technique of A to D conversion.

2 It is a CMOS device with tiplexer and microprocessor

compatible control logic.

3 As the number of bits n=8 e divider, a group of analog

switches and a successive approximation register (SAR).

4 As there are 8-analog channels, we can connect up to 8 analog inputs to this IC.

5 However due to the use of a multiplexer, at a time only one analog input will be

converted into an equivalent 8-bit digital output. The analog input channels can be selected

using the three address lines A, B and C.

8.4.4 Features of ADC: 1 Inbuilt 8 analog channels with multiplexer. 2 Zero or full scale adjustment is not required.

3 0 to 5 V input voltage range with single polarity 5 V supply.

4 Output is TTL compatible.

5 High speed.

6 Low conversion time

7 High accuracy.

8 8-bit resolution.

9 Low power consumption (less than 15 mW).

10 Easy to interface with all microprocessors.

11 Minimum temperature dependence

1 Analog Inputs (I/P 0 to I/P 7):



to begin the A to D conversion

: to these pins.

0809 t successive approximation AD hannel select has address lines A,

Pin numbers 1 to 5 and 26 and 28, designated as I/P0 to I/P7 are the eight analog input of

this IC. We can connect signals coming from eight different transudes to these inputs. Each

one of these inputs will be converted to an 8-bit equivalent digital from one by one and not

all at a time. So one of these eight inputs should be selected for conversion. This selection

is done by means of these address pins A, B and C.

2 Address Pins A,B ,C(Pin 23,24,25) : These pins will decide or select one out of eight analog inputs, for conversion into digital form. For example if CBA= 010 then the ―IN2‖ is selected and the analog signal at this

input is converted to equivalent digital form.

3 Reference Voltage [VREF(+) and VREF (-) ] :

Depending on the desired polarity of the reference voltage, we can connect a positive or negative reference voltage externally to these pins.

4 ALE and Output Enable:

The address latch enable (ALE) input is useful in enabling the address latch which stores

the address on lines A, B and C. The output enable pin, when activated will make the digital output available on the output pins.

5 Start and EOC: We have to enable the start . The end of conversion is indicated by EOC output.

6 Digital Output [2-1

to 2-8

] The digital output is available

8.5 Interfacing of 8255 with

ADC 0809 is an 8-bi C. This chip has 8-channel along with multiplexer. The c B, C. We can use channel 0

as input thus, address lines A, B, C will be grounded for channel 0.

The ALE pin is connected to the clock input. At the time of power on the valid channel

address is latched at the rising edge of the ALE signal. ADC 0809 has an START on

Conversion pin. A positive going pulse of short duration, is applied to this pin this pin

starts the A/D conversion process. The OE should always be high, when data is to be read.

After the conversion, EOC is given through PC, indicating end of conversion. The port A

and C are defined in the input mode, whereas port B of 8255 is configured in output mode.

The data is read through port A of 8255. Positive (DC) and negative (DC) or (ac) voltage is

applied as the analog input at channel 0. Hence decoupling capacitors are used to maintain

minimum noise level.

Internal oscillator can be enabled only when A/D conversion is to be done. The oscillator

oscillates till the SOC enables pin PB2 of the 8255.



D3 D2 D1 D0 1 0 0 1

ows

D7 D6 D5 D4

1 0 0 1

8255PPI ADC0809

PA0-PA7

PC0

PB0

PB1

PB2

D0-D7

EOC

SOC

OE

CLK

Analog

Input

Figure 2 Interfacing of 0809 ADC with 8255

8.6 For analog to digital conversion we require 1. Port A, as input port in mode‘0‘ 2. Port B, as input port in mode‘0‘

3. Port C, as input port

Hence, control word format is as follows

Control word in hex is 99H

In 8255, addresses are as foll PA- 0011 0000 = 30H PB- 0011 0001 = 31H

PC- 0011 0010 = 32H

CWR-0011 0011 = 33H

8.7 I/O mapping of 8255

A7 A6 A5 A4 A3 A2 A1 A0

Port A 0 1 1 0 0 0 0 1 61H

Port B 0 1 1 0 0 0 1 1 63H

Port C 0 1 1 0 0 1 0 1 65H

CWR 0 1 1 0 0 1 1 1 67H

8.8 Instructions needed: 1. IN-Copy a byte or word from specified port to accumulator 2. OUT- Copy a byte or word from accumulator to specified port

3. JZ-Jumps if equal to Zero

4. TEST-Logical AND between all bits of two operands for flags only.



8.9 Algorithm: 1. Write control word to CWR of the 8255 2. Issue SOC signal by setting PB0 High

3. Enable CLK & ALE by setting PB2 High

4. Check for EOC by polling PC0 bit

PC0 = 1 means conversion still in progress

PC0 = 0 means EOC

5. Latch the output by setting PB1 High

6. Read port A for obtaining converted data

7. Display output using display routine

8.10 Program:



8255

de word format of 8255

8255

8.11 Hardware Connections: PA0-PA7 (input) – digital data from ADC

PB0 (output) – Start of Conversion

PB1 (output) – Output Enable

PB2 (output) – Enable Oscillator

PC0 (input) – End of Conversion

8.12 Input and Output:-

Observation Table –

8.13 Assignment Questions: 1. Block diagram of 8255 2. Modes of operation of

3. BSR mode and I/O mo

4. Modes of I/O mode of

5. Explain instructions used in program

8.14 Oral Questions: 1. How the Resolution of ADC is defined as? 2. Which conversion is high speed conversion?

3. What is the CWR?

4. What is the address of Port A and Port B?

5. From which location does the source code starts on 86-Kit?



cing of DAC 0808 with 8086.

cing of peripheral ICs like 8255..

or al-to-analog converter (DAC o

nary) code to an analog signal (


Assignment 9

Problem Definition:

Write 8086 ALP to interface DAC and generate following

waveforms on oscilloscope, (i)Square wave - Variable Duty Cycle and

frequency. (ii)Ramp wave - Variable direction, (iii)Trapezoidal wave

(iv)Stair case wave

9.1 Prerequisites:

Concepts of Digital Data.


Understand the interfa

Understand the interfa

9.3 New concepts: Applications of 8255

9.4 Theory

9.4.1 Digital-Analog Convert In electronics, a digit r D-to-A) is a device that

converts a digital (usually bi current, voltage, or electric

charge). An analog-to-digital converter (ADC) performs the reverse operation. Signals are

easily stored and transmitted in digital form, but a DAC is needed for the signal to be

recognized by human senses or other non-digital systems. A common use of digital-to-

analog converters is generation of audio signals from digital information in music players.

Digital video signals are converted to analog in televisions and cell phones to display

colors and shades. Digital-to-analog conversion can degrade a signal, so conversion details

are normally chosen so that the errors are negligible. Due to cost and the need for matched

components, DACs are almost exclusively manufactured on integrated circuits (ICs). There

are many DAC architectures which have different advantages and disadvantages. The

suitability of a particular DAC for an application is determined by a variety of

measurements including speed and resolution.

9.4.2 Types of DAC’s: The most common types of electronic DACs are:

Pulse-Width Modulator DAC

Oversampling commonly known as Delta sigma DAC

Binary Weighted DAC

R-2R Ladder DAC

Thermometer Coded DAC

Segmented DAC



ed resistors (or current sources)

ngly large RC-constants for each

ation or Cyclic DAC, which

vidual bits of the digital input ar

r.

DAC, which contains an equal

ue of DAC output. An 8-bit the

thermometer DAC would have

t precision DAC architecture but

Hybrid DAC

The pulse-width modulator, the simplest DAC type. A stable current or voltage is

switched into a low-pass analog filter with a duration determined by the digital input code.

This technique is often used for electric motor speed control, but has many other

applications as well.

Oversampling DACs or interpolating DACs such as the delta-sigma DAC, use a pulse

density conversion technique. The oversampling technique allows for the use of a lower

resolution DAC internally.

The binary-weighted DAC, which contains individual electrical components for each

bit of the DAC connected to a summing point. These precise voltages or currents sum to

the correct output value. This is one of the fastest conversion methods but suffers from

poor accuracy because of the high precision required for each individual voltage or current.

Switched resistor DAC contains of a parallel resistor network. Individual resistors

are enabled or bypassed in the network based on the digital input.

Switched current source DAC, from which different current sources are selected

based on the digital input.

Switched capacitor DAC contains a parallel capacitor network. Individual capacitors

are connected or disconnected with switches based on the input.

The R-2R ladder DAC which is a binary-weighted DAC that uses a repeating cascaded

structure of resistor values R and 2R. This improves the precision due to the relative ease of

producing equal valued-match . However, wide converters

perform slowly due to increasi added R-2R link.

The Successive-Approxim successively constructs the

output during each cycle. Indi e processed each cycle until

the entire input is accounted fo

The thermometer-coded resistor or current-source

segment for each possible val rmometer DAC would have

255 segments, and a 16-bit 65,535 segments. This is

perhaps the fastest and highes at the expense of high cost.

Conversion speeds of >1 billion samples per second have been reached with this type of

DAC.

Hybrid DACs, which use a combination of the above techniques in a single converter.

Most DAC integrated circuits are of this type due to the difficulty of getting low cost, high

speed and high precision in one device.

The segmented DAC, which combines the thermometer-coded principle for the most

significant bits and the binary-weighted principle for the least significant bits. In this way, a

compromise is obtained between precision (by the use of the thermometer-coded principle)

and number of resistors or current sources (by the use of the binary-weighted principle).

The full binary-weighted design means 0% segmentation, the full thermometer-coded

design means 100% segmentation.

9.4.3 Performance DACs are very important to system performance. The most important characteristics of these devices are:

Resolution: This is the number of possible output levels the DAC is designed to

reproduce. This is usually stated as the number of bits it uses, which is the base two

logarithm of the number of levels. For instance a 1 bit DAC is designed to

reproduce 2 (21) levels while an 8 bit DAC is designed for 256 (2

8) levels.

Resolution is related to the Effective number of bits which is a measurement of the



om specified port to accumulator

d from accumulator to specified p

byte/word by 1

d byte/word by 1

ecution, call service procedure

to byte or word to word

actual resolution attained by the DAC. Resolution determines color depth in video

applications and audio bit depth in audio applications.

Maximum sampling rate: This is a measurement of the maximum speed at which

the DACs circuitry can operate and still produce the correct output. As stated in the

Nyquist–Shannon sampling theorem defines a relationship between the sampling

frequency and bandwidth of the sampled signal.

Monotonicity: This refers to the ability of a DAC's analog output to move only in

the direction that the digital input moves (i.e., if the input increases, the output

doesn't dip before asserting the correct output.) This characteristic is very important

for DACs used as a low frequency signal source or as a digitally programmable trim

element.

THD+N: This is a measurement of the distortion and noise introduced to the signal

by the DAC. It is expressed as a percentage of the total power of unwanted

harmonic distortion and noise that accompany the desired signal. This is a very

important DAC characteristic for dynamic and small signal DAC applications.

Dynamic range: This is a measurement of the difference between the largest and

smallest signals the DAC can reproduce expressed in decibels. This is usually

related to resolution and noise floor

9.5 Instructions needed: 1. MOV-Copies byte or word from specified source to specified destination 2. IN-Copy a byte or word fr

3. OUT- Copy a byte or wor ort

4. INC-Increments specified

5. DEC-Decrements specifie

6. JZ-Jumps if equal to Zero

7. INT-Interrupt program ex

8. ADD- Adds specified byte

9.6 Algorithm: 8255 Port Addresses: Port A = 61h

Port B = 63h

Port C = 65h

CWR = 67h

Control Word: Mode 0, port A & B as an output port and Port C as an input port

1 0 0 0 1 0 0 1 = 89h

9.6.1 Algorithm: Triangular Wave

1. Write control word to CWR 2. Enable latch by setting PB0 =1

3. Write 00 through AL to port A

4. Increment AL

5. Write value of AL to port A

6. Compare with FFh

7. Repeat if AL is not equal to FFh then go to step 5

8. Write value of AL to port A

9. Decrement AL

10. Compare with 00h

11. Repeat if AL is not equal to 00h then go to step 8

http://en.wikipedia.org/wiki/Color_depthhttp://en.wikipedia.org/wiki/Audio_bit_depthhttp://en.wikipedia.org/wiki/Sampling_ratehttp://en.wikipedia.org/wiki/Nyquist%E2%80%93Shannon_sampling_theoremhttp://en.wikipedia.org/wiki/Nyquist%E2%80%93Shannon_sampling_theoremhttp://en.wikipedia.org/wiki/Nyquist%E2%80%93Shannon_sampling_theoremhttp://en.wikipedia.org/wiki/Bandwidth_%28signal_processing%29http://en.wikipedia.org/wiki/Monotonic_functionhttp://en.wikipedia.org/wiki/Total_harmonic_distortionhttp://en.wikipedia.org/wiki/Harmonichttp://en.wikipedia.org/wiki/Harmonichttp://en.wikipedia.org/wiki/Harmonichttp://en.wikipedia.org/wiki/Dynamic_rangehttp://en.wikipedia.org/wiki/Decibelhttp://en.wikipedia.org/wiki/Noise_floor



12. Go to step 3

13. Observe Triangular wave on CRO

9.6.2 Algorithm: Square W ave

1. Write control word to CWR 2. Enable latch by setting PB0 =1


4. Call delay

5. Write FF to port A

6. Go to step 3 for continuous wave

7. Observe square wave on CRO



uous wave

e on CRO

9.6.3 Algorithm: Staircase Wave 1. Write control word to CWR 2. Enable latch by setting PB0 =1


4. Write Contents of Port A to CRO

5. Call delay

6. Add 33H to port A

7. Go to step 3 for contin

8. Observe Staircase wav



9.6.4 Algorithm: Ramp Wave

1. Write control word to CWR

2. Enable latch by setting PB0 =1


4. Write Contents of Port A to CRO

5. Call delay

6. Increment contents of port A by one

7. Go to step 3 for continuous wave

8. Observe Staircase wave on CRO

9.7 Assignment Questions: 1. Define the following terms for D/A converters:

1. Resolution 2. Accuracy 3. Monotonicity 4. Conversion time. 5. Linearity

2. Explain the R/2R ladder technique of D/A conversion. What are the different

sources of error in DAC?

9.8 Oral Questions:

1. How the Resolution of DAC is defined as? 2. What is D/A converter?

3. Name the type of D/A converting techniques with brief example

4. What are the disadvantages of DAC?

5. Give applications of DAC

6. What are sources of errors in DAC?



cing of 8254 to 8086.

of 8254

of 8254

al Timer/Counter


Assignment 10

Problem Definition:

Write 8086 ALP to program 8254 in Mode 0, modify the program for

hardware re-triggerable Mono shot mode.

Generate a square wave with a pulse o

microprocessor interfacing laboratory · 2018. 4. 3. · jb’s kbj college of engineering,...

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