microprocessor interfacing laboratory - mr.rajiv bhandari · a laboratory manual for microprocessor...

A Laboratory Manual for

Microprocessor Interfacing Laboratory

(210254)

Semester – IV

(Computer Engineering)

Bachelor Degree in Engineering

UNIVERSITY OF PUNE, GANESHKHIND

SNJB’s KBJ College Of Engineering, Chandwad

DEPARTMENT OF COMPUTER ENGINEERING

LABORATORY MANUAL DEVELOPMENT PROJECT

Designations Team for design

Project Institution Shri Neminath Jain Bramhacharyashram’sSNJB’s KBJ College ofEngineering, Neminagar,Chandwad -423101.

Project Commencement Dec 2012

Head Of Institution Prof. J. J. ChopadeSNJB’s KBJ College ofEngineering, Neminagar,Chandwad -423101.

Chief Project Coordinator Mr. M .R SanghaviHead,DepartmentOfComputerEngineering,SNJB’s KBJ College of Engineering,Neminagar, Chandwad -423101.

Project Coordinator Ms. K. S. KotechaAssociateProfessor,DepartmentOfComputerEngineering,KBJ College of Engineering,Neminagar, Chandwad -423101.

Subject Experts 1. Mr.V.V AgrawalSNJB’s KBJ College ofEngineering, Neminagar,Chandwad -423101

2. Mr.R.R.BhandariSNJB’s KBJ College ofEngineering, Neminagar,Chandwad -423101

JB’s KBJ College Of Engineering, Chandwad

DEPARTMENT OF COMPUTERENGINEERING

Certificate

This is Certify that Mr/Ms. __________________Roll No _ofFourth Semester of Bachelor Engineering in Computer has completed the termwork satisfactorily in Microprocessor Interfacing Laboratory in the AcademicYear 20_ to 20_ as prescribed in the curriculum.PlaceDate: Exam Seat No.

Subject Teacher Head of Department PrincipalStamp of

Institution

List of Experiment and Record of Progressive Assessment

Sr.

No

Name of Experiment Page

No

Date of

Performance

Date of

Submission

Assessment

Marks

Sign of

Teacher1 Write X86 Assembly languageprogram (ALP) to add array ofN hexadecimal numbersstored in the memory. Acceptinput from the user.2 Write 8086 ALP to perform

non-overlapped and overlappedblock transfer (with andwithout string specificinstructions). Block containingdata can be defined in thedata segment.3 Write X86 ALP to convert 4-digit Hex number into itsequivalent BCD number and 5-digit BCD number into itsequivalent HEX number. Makeyour program user friendly toaccept the choice from user for:(a)HEX to BCD b) BCD toHEX (c) EXIT. Display properstrings to prompt the userwhile accepting the input anddisplaying the result.4 Write 8086 ALP for thefollowing operations on the stringentered by the user.a) Calculate Length of the stringb) Reverse the stringc) Check whether the string ispalindrome ORMake your program user friendlyby providing MENU like:(a) Enter the string b) Calculatelength of string c) Reverse stringd) Check palindrome e) ExitDisplay appropriate messages toprompt the user while acceptingthe input and displaying theresult.

5 Write 8086 ALP to performstring manipulation. The stringsto be accepted from the user is tobe stored in data segment ofprogram_l and write FARPROCEDURES in code segmentprogram_2 for followingoperations on the string:(a) Concatenation of two strings(b) Number of occurrences of asub-string in the given stringUse PUBLIC and EXTERNdirective. Create .OBJ files ofboth the modules and linkthem to create an EXE file.6 Write X86 ALP to performmultiplication of two 8-bithexadecimal numbers. Usesuccessive addition and add andshift method. Accept input fromthe user.7 Write 8087ALP to obtain:i) Mean ii) Variance iii) StandardDeviationFor a given set of data elementsdefined in data segment. Alsodisplay result.8 Write 8086 ALP to convert an

analog signal in the range of 0Vto 5V to its corresponding digitalsignal using successiveapproximation ADC and dualslope ADC. Find resolution usedin both the ADC's and comparethe results.9 Write 8086 ALP to interfaceDAC and generate followingwaveforms on oscilloscope, (i)Square wave - Variable DutyCycle and Frequency.(ii) Ramp wave - Variabledirection, (iii) Trapezoidal wave(iv) Stair case wave10.Write 8086 ALP to program 8253in Mode 0, modify the programfor hardware retriggerableMonoshot mode. Generate asquare wave with a pulse of 1 ms.Comment on the differencebetween Hardware Triggered andsoftware triggered strobe mode.Observe the waveform at GATE& out pin of 1C 8254 on CRO

11 Perform an experiment toestablish communication betweentwo 8251 systems A and B.Program 8251 system A inasynchronous transmitter modeand 8251 system B inasynchronous receiver mode.Write an ALP to transmit the datafrom system A and receive thedata at system B. Therequirements are as follows:Transmission:• message is stored as ASCIIcharacters in the memory.• message specifies the number ofcharacters to be transmitted as thefirst byte.Reception:• Message is retrieved and storedin the memory.• Successful reception should beindicated.

12 Write a TSR program in 8086ALP to implement Real TimeClock (RTC). Read the RealTime from CMOS chip bysuitable INT and FUNCTIONand display the RTC at thebottom right corner on the screen.Access the video RAM directly inyour routine.

13 Study Assignment

Microprocessor and Interfacing Laboratory Second Year Computer Engineering

SNJB’s Late Sau. KBJ COLLEGE OF ENGINEERING

Assignment 1

Problem Definition:Write X86/64 Assembly language program (ALP) to add array of N hexadecimal numbers storedin the memory. Accept input from the user.1.1 Prerequisites: Concepts of

Program

Algorithm

Registers

Assembly language

Assembler

Array & its scope

1.2 Learning Objectives:

Understand the implementation

Understand the implementation of the arithmetic instruction of 80386.

1.3 New concepts:-1.3.1 What is ALP?

Assembly language Program is mnemonic representation of machine code.

1.3.2 Which assembler used in execution of ALP?

Three assemblers available for assembling the programs for IBM-PC are:1. Microsoft Micro Assembler(MASM)

2. Borland Turbo Assembler (TASM)

3. Net wide Assembler (NASM)

1.4 Theory1.4.1 Assembly Basic SyntaxAn assembly program can be divided into three sections:1. The data section2. The bss section3. The text section

Att (2) Perm(5) Oral(3) Total(10) Sign with Date



The data SectionThe data section is used for declaring initialized data or constants. This data does not change atruntime. Youcan declare various constant values, file names or buffer size etc. in this section.The syntax for declaring data section is:section .data

The bss SectionThe bss section is used for declaring variables. The syntax for declaring bss section is:section .bss

The text sectionThe text section is used for keeping the actual code. This section must begin with thedeclarationglobal main,which tells the kernel where the program execution begins.The syntax for declaring text section is:section .text

global mainmain:

Assembly Language StatementsAssembly language programs consist of three types of statements:1. Executable instructions or instructions2. Assembler directives or pseudo-ops3. MacrosThe executable instructions or simply instructions tell the processor what to do. Eachinstruction consists of an operation code (opcode). Each executable instruction generates onemachine language instruction.The assembler directives or pseudo-ops tell the assembler about the various aspects of theassembly process.These are non-executable and do not generate machine language instructions.Macros are basically a text substitution mechanism.Assembly System CallsSystem calls are APIs for the interface between user space and kernel space. We are using thesystem calls sys_write and sys_exit for writing into the screen and exiting from the programrespectively.Linux System CallsYou can make use of Linux system calls in your assembly programs. You need to take thefollowing steps for using Linux system calls in your program: Put the system call number in the EAX register. Store the arguments to the system call in the registers EBX, ECX, etc.



Call the relevant interrupt (80h) The result is usually returned in the EAX registerThere are six registers that stores the arguments of the system call used. These are the EBX, ECX,EDX, ESI, EDI, and EBP. These registers take the consecutive arguments, starting with the EBXregister. If there are more than six arguments then the memory location of the first argument isstored in the EBX register.

The following code snippet shows the use of the system call sys_exit:MOV EAX, 1 ; system call number (sys_exit)INT 0x80 ; call kernelThe following code snippet shows the use of the system call sys_write:MOV EDX, 4 ; message lengthMOV ECX, MSG ; message to writeMOV EBX,1 ; file descriptor (stdout)MOV EAX,4 ; system call number (sys_write)INT 0x80 ; call kernelThe following table shows some of the system calls:

Assembly VariablesNASM provides various define directives for reserving storage space for variables. The defineAssembler directive is used for allocation of storage space. It can be used to reserve as well asinitialize one or more bytes.


SNJB’s Late Sau. KBJ COLLEGE OF ENGINEERING Page10

Allocating Storage Space for Initialized DataThere are five basic forms of the define directive:

Allocating Storage Space for Uninitialized DataThe reserve directives are used for reserving space for uninitialized data. The reserve directivestake a single operand that specifies the number of units of space to be reserved. Each definedirective has a related reserve directive.There are five basic forms of the reserve directive:

1.6 Instructions needed:1. MOV-Copies byte or word from specified source to specified destination

2. ROR-Rotates bits of byte or word right, LSB to MSB and to CF

3. AND-AND each bit in a byte or word with corresponding bit in another byte or word

4. INC-Increments specified byte/word by 1

5. DEC-Decrements specified byte/word by 1

6. JNZ-Jumps if not equal to Zero

7. JNC-Jumps if no carry is generated

8. CMP-Compares to specified bytes or words

9. JBE-Jumps if below of equal

10. ADD-Adds specified byte to byte or word to word

11. CALL-Transfers the control from calling program to procedure



of elements for additionay of numbers in a pointer registe

sult-high to 00H

and convert it to hex

ter register

1.7 Algorithm:1. Start

2. Initialize data section

3. Load counter with number4. Locate first location of arr r

5. Initialize result-low and re

6. Scan the number from user

7. Increment location of poin

8. Decrement counter

9. Jump to step 6 if counter is not zero

10. Locate first location of array of numbers in a pointer register

11. Initialize counter with number of elements for addition

12. Add the element of array pointed by pointer register

13. Check the carry of addition. If carry is generated then go to step 14 else go to step15

14. Increment result-high register

15. Increment pointer register to array

16. Decrement counter

17. Jump to step 12 if counter is not equal to zero

18. Display the content of Result-High as carry of addition by converting hex to ASCII

19. Display the content of Result-Low as result of addition by converting hex to ASCII

20. Stop

1.5 Working with ALP in NASM

NASM - The Netwide Assembler

1. an 80x86 and x86-64 assembler designed for portability and modularity2. Supports a range of object file formats - a.out, ELF, COFF, OBJ, WIN32, WIN64, etc.3. Default format - binary can read, combine and write object files in many different formats such

as COFF, ELF, etc4. Different formats may be linked together to produce any available kind of object file.5. Elf – executable & linkable file format of object file & executable file – supported by Linux

Commands

• To assemble

nasm –f elf64 hello.asm -o hello.o

• To link

ld –o hello hello.o

• To execute -

./hello



1.8 Theory Questions:1. Explain in detail address calculation of 16 bit and 32 bit architecture?

2. Explain in detail register model of 16 bit, 32 bit and 64 bit architecture?

3. Describe execution of CALL instruction

4. What do you mean by is assembler directives? Explain assembler directives.

5. Explain Macro and Procedure?6. Explain advance features of i7 processor?7. What is multi core Architecture?

1.9 Oral Questions:1. Explain sys_exit,sys_write,sys_read?

2. Explain .data,.bss,.text ?

3. Explain how to run a program in NASM?

4. Explain RESD,RESW,RESB,RESQ ?



y addressing

ation of data in memory.


Assignment 2

Problem Definition:Write 8086 ALP to perform non-overlapped and overlapped block transfer(with and without string specific instructions). Block containing data can bedefined in the data segment

2.1 Prerequisites: Concepts of

Memory

Block operations


Understand the memor

Understand the localiz

2.3 Theory2.3.1RegistersRegisters are places in the CPU where a number can be stored and manipulated. There arethree sizes of registers: 8-bit, 16-bit and on 386 and above 32-bit. There are four differenttypes of registers:

1. General Purpose Registers,2. Segment Registers,3. Index Registers,4. Stack Registers.2.3.1.1 General Registers – Following are the registers that are used for general purposesin 8086

AX accumulator (16 bit)

AH accumulator high-order byte (8 bit)

AL accumulator low-order byte (8 bit)

BX accumulator (16 bit)

BH accumulator high-order byte (8 bit)

BL accumulator low-order byte (8 bit)



t)

ers are used with the segment reg

CX count and accumulator (16 bit)

CH count high order byte (8 bit)

CL count low order byte (8 bit)

DX data and I/O address (16 bit)

DH data high order byte (8 bit)

DL data low order byte (8 bit)

2.3.1.2 Segment Registers - These registers are used to calculate 20 bit address from 16 bitregisters.

CS code segment (16 bit)

DS data segment (16 bit)

SS stack segment (16 bit)

ES extra segment (16 bit)

2.3.1.3 Index Registers - These registers are used with the string instructions.

DI destination index (16 bi

SI source index (16 bit)

2.3.1.4 Pointers - These regist ister to obtain 20 bitaddresses

SP stack pointer (16 bit)BP base pointer (16 bit)

IP instruction pointer (16 bit)

CS, Code SegmentUsed to “point” to Instructions

Determines a Memory Address (along with IP)

Segmented Address written as CS:IP

DS, Data SegmentUsed to “point” to Data

Determines Memory Address (along with other registers)

ES, Extra Segment allows 2 Data Address Registers

SS, Stack SegmentUsed to “point” to Data in Stack Structure (LIFO)



mented Addresses

ationss bus but the registers are only s

s two registers are combined. E

isters plus an offset and/or a b

Used with SP or BP

SS:SP or SS:BP are valid Segmented AddressesIP, Instruction PointerUsed to “point” to Instructions

Determines a Memory Address (along with CS)

Segmented Address written as CS:IP

SI, Source Index; DI, Destination IndexUsed to “point” to Data

Determines Memory Address (along with other registers)

DS, ES commonly used

SP, Stack Pointer; BP, Base PointerUsed to “point” to Data in Stack Structure (LIFO)

Used with SS

SS:SP or SS:BP are valid Seg

2.3.2 Memory address calculThe 8086 uses a 20 bit addres ixteen bit. To derive twenty

bit addresses from the register very memory reference uses

one of the four segment reg ase pointer and/or a index

register. The segment register is multiplied by sixteen (shifted to the left four bits) and

added to the sixteen bit result of the offset calculation.

Figure 1Diagrammatic Representation of Address calculation

The 8086 provides four segment registers for address calculations. Each segment register is

assigned a different task. The code segment register is always used with the instruction



lated using the assembler directi

the distant from the start of the s

pointer (also called the program counter) to point to the instruction that is to be executed

next. The stack segment register is always used with the stack pointer to point to the last

value pushed onto the stack. The extra segment is general purpose segment register. The

data segment register is the default register to calculate data operations, this can be over

ridden by specifying the segment register. For example mov ax,var1 would use the offset

var1 and the data segment to calculate the memory reference but mov ax,ss:var1 would use

the offset var1 and the stack segment register to calculate the memory reference.

The offset can be calculated in a number of ways. Their are three elements that can make

up an offset. The first element is a base register, this can be one of the BX of BP registers

(the BP register defaults to the stack segment). The second element is one of the index

register, SI or DI. The third element is a displacement. A displacement can be a numerical

value or an offset to a label. An offset can contain one to three of these elements, making a

total of sixteen possibilities.

BX SI

or + or + Displacement

BP DI

(base) (index)

The offset to a label in calcu ve OFFSET. This directive

makes the assembler calculate egment that the label resides

in to the label.

2.3.3 Memory Segmentationx86 Memory Partitioned into Segments

– 8086: maximum size is 64K (16-bit index reg.)

– 8086: can have 4 active segments (CS, SS, DS, ES)

– 8086: 2-data; 1-code; 1-stack

– x386: maximum size is 4GB (32-bit index reg.)

– x386: can have 6 active segments (4-data; FS, GS)

Why have segmented memory?Other microprocessors could only address 64K since they only had a single 16-bit MAR (or

smaller). Segments allowed computers to be built that could use more than 64K memory

(but not all at the same time).



System

apped segment d

segment c

nt a segment b

Code

Extra

Stack

Data

Segment

CSESSSDS

FFFFFh

• Segment Registers:

– Point to Base Address

Fragmentation

• Index Registers:

– Contain Offset Value

• Notation (Segmented Address):

LogicalSegments

partially overl fully overlappedcontiguous

segme segment e

PhysicalMemory

0h 10000h 20000h 30000h

Note that segments can overlap. This means that two different logical addresses can referto the same physical address (aliasing).

In non-overlapping method, address of source is totally different from address of

destination. Therefore, we can directly transfer the data using MOVSB/MOVSW

instruction for transferring the data.

The blocks are said to be overlapped if some of the memory locations are common for

both the blocks.

Case I: If address in SI is greater than address in DI then start the data transfer from last

memory location keeping DF=1.



epointed by source and destination

by source register [si+count] to ae register.

iable into location pointed by dest

Case II: If address in SI is less than address in DI, then start the data transfer from first

memory location by keeping DF=0.

2.3.4 Algorithm:2.3.4.1 Non-overlapped mode1. Initialize 2 memory blocks pointed by source and destination registers.

2. Initialize counter.

3. Move the contents pointed by source register to a register.

4. Increment address of source register.

5. Move the contents from register into location pointed by destination register.

6. Increment destination registers.

7. Decrement counter.8. Repeat from steps 3 to step 6 until counter is 0.

9. End.

2.3.4.2 Non-overlapped mod1. Initialize 2 memory blocks registers.

2. Initialize counter.

3. Move the contents pointed variable.

4. Decrement address of sourc

5. Move the contents from var ination register [di+count]

6. Decrement destination registers.

7. Decrement counter.

8. Repeat from steps 3 to step 6 until counter is 0.

9. End.

Input:Array of number stored in location pointed by source and destination register Example:Array 1 db 10h, 20h, 30h, 40h, 33h, 0ffh, 44,55h, 23h, 45h

Array2 db 00h, 00h, 00h, 00h, 00h, 00h, 00,00h, 00h, 00h

Output:NON OVER LAPPED BLOCK TRANSFER

Array2 db 10h, 20h, 30h, 40h, 33h, 0ffh, 44,55h, 23h, 45h

OVER LAPPED BLOCK TRANSFER

Array2 db 00h, 00h, 00h, 00h, 00h,10h, 20h, 30h, 40h, 33h, 0ffh, 44,55h, 23h, 45h



2.4 Theory Questions:1. Memory: Even and odd banks

2. Address decoding techniques.

3. Comparison between memory mapped I/O and I/O mapped I/O.

4. Diagrammatic representation of the overlapped and non-overlapped block transfer

5. Comparison of overlapped and non-overlapped block transfer

2.5 Oral Questions:1. Specify all the memory addressing instruction

2. What is the use of Direction flag in Block transfer?

3. What is use of Source and Destination Index in above program

4. What is the change in the contents of memory locations in overlapped and non-overlapped mode?

5. Which interrupt is used to terminate the program in 8086 kit?




Assignment 3

Problem Definition:Write 8086 ALP to convert 4-digit Hex number into its equivalent BCD numberand 4-digit BCD number into its equivalent HEX number .Make your programuser friendly to accept the choice from user for:

HEX to BCD

BCD to HEX

EXIT

Display appropriate messages to prompt the user while accepting the input anddisplaying the result.

3.1 Prerequisites:

Concept of number system


Understand the implementation stack for its conversion of number

3.3 New concept:-

1.3.1 Memory model directives.

1.3.2 Segment directives.

1.3.3 Data type declaration

3.4 Theory

3.4.1 Memory model directivesThese directives instruct the assembler as to how large the various segment (code, data,stack, etc) can and what sort of segmentation register will be required (see sect.2.4.1).



xt directives is encounter).

.data

ssed, data can be of several diff

.MODEL<model >

Where <model>is one of the following options:

Tiny- code and data fit into single 64k and accessed via near pointers.

Small- code and segment both less than 64k and accessed via near pointers.

Compact –Code segment is <64K (near ptr) and data segment is <1MB (far ptr )Medium- Code segment is <1Mb (far ptr) and data segment is <64K (near ptr)

Large- code and data segment both less than 1MB and accessed via far pointers.

Huge- Like “large” model, but also permits arrays larger then 64K

3.4.2 Segment directivesThese directives indicate to assembler the order in which to load segment. When it

encounter one of these directives, it interprets all subsequent instructor as belonging to the

indicated segment (until the ne

.stack <size>; specified .code

3.4.3 Data type declaration

As has been previously discu erent lengths and assembler

must be able to decide what length a specific constant (or variable) is. This can be down

using data type declaration in conjunction with a constant declaration or variable

assignment .this is akin to strong typing of variable in high level language .the data types

are:

Byte (8 bit quantity)—synonyms are byte and db

Word (16) -- synonyms are word dw

Dword (32bit) -- synonyms are dword and dd

Qword (64bit) -- synonyms with dq

Tword (128bit) -- synonyms with dt

An example of their use is:

MOV AX, word VAR; moves a 16-bit Variable VAR into AX



3.5 Instruction Used:1. PUSH:-Push word onto stack.

2. POP:-Pop word off stack.

3. DIV:-Divide byte/word

4. XOR: - Exclusive or byte/word

5. JA/JNBE:-Jump if above/not below or equal

6. JB/JNAE:-Jump if below /not above or equal

7. JG/JNLE:-Jump if /not less nor equal

8. JL/JNGE:-Jump if less /not greater nor equal

9. INT:-It allows ISR to be activated by programmer & external H\W device

3.6 New interrupt used:1 INT 21h, function 0AH:- Read from keyboard and place into a memory buffer a row of

character, until<CR>is pressed.

3.7 New directives used:1. .MODEL

2. .STACK

3. .DATA

4. .CODE

5. .OFFSET: - It informs the assembler to determine the offset/displacement of a nameddata item.

6. .PTR: - assign a specific type to variable/label

3.8 Algorithm:

3.8.1 HEX to BCD

1. Define variable on data segment.

2. Display message on screen ENTER 4-DIGIT HEX NO.

3. Accept BCD NO from user.

4. Transfer 0AH as a divisor in one of the register.

5. Divide the no by 0AH

6. PUSH reminder in one of the register

7. Increment Count _1.



git by multiplier & add it to RES

ser

git by multiplier & add it to RES

ser

8. Repeat Till BCD NO is not zero go to step 5.9. Pop the content of Reminder.

10. Display result by calling display procedure.

11. Decrement Count _1, till Count is not zero repeat step 9 else go to step 12.

12. Stop

3.8.2 BCD to HEX

1. Define variables in data segment

2. Display message on screen ENTER 5-DIGIT BCD NO.

3. Accept single digit from user

4. Transfer 10000 to multiplier

5. Multiply accepted BCD digit by multiplier & add it to RESULT variable.



8. Multiply accepted BCD di ULT variable.

9. Accept single digit from u


11. Multiply accepted BCD di ULT variable.

12. Accept single digit from u






18. Display result by calling display procedure

19. Stop.

3.8.3 Procedure for accept numbers: (ASCII to HEX)1. Read a single character/digit from keyboard using function 0AH of INT 21H

2. Convert ASCII to HEX as per following:

a. Compare its ASCII with 30H if No is less than 0 (i.e case of -ve no given) then go tostep f else go to step c.

b. Compare its ASCII with 39H if No is greater than 9 (i.e case of character A – F given)then go to step f else go to step c .

c. Store the resultant bit in NUM Variable.



modes of 8086 microprocessor uer directives used in this programystems used in Digital Electronic

plain the steps to convert HEX

plain the steps to convert BCD N

d. Check whether four digits (16-bit number) or two digits (8-bit number) are read; if yesthen go to display procedure else go to step 1 for next bit

e. Till counter is zero go to accept procedure.

f. Display massage “I/P is invalid BCD number” & go to step 17.

3. End of accept procedure.

3.8.4 Procedure for display Result: (HEX to ASCII)1. Compare 4 bits (one digit) of number with 9

2. If it is <= 9 then go to step 4 else go to step 3

3. Add 07 to that number

4. Add 30 to it

5. Display character on screen using function 02 of INT 21H

6. Return to main routine

7. End of display procedure.

3.9 Assignment Questions:1. Explain various addressing sed in this program.

2. Explain Different assembl .

3. Explain various Number S s.

4. What is HEX Number? Ex No to BCD No

5. What is BCD Number? Ex o to HEX No

3.10 Oral Questions:1. Differentiate between 01H and 0AH of INT 21H.

2. Explain the use of SI register in the program.

3. Explain the use of DI register in the program.

4. In above program which Procedure U used.

5. Is there any difference between Rotate Bit & Shift Bit Instruction?




Assignment 4

Problem Definition:Write 8086 ALP for the following operation on the string entered by the usera. Calculate Length if the string b.Reverse the stringc. Check whether the string is palindrome or notMake your program friendly by providing MENU like: Enter String Calculate Length Of String Reverse The String Check Palindrome Exit

Display appropriate messages to prompt the user while accepting the input anddisplaying the result.

4.1 Prerequisite:

Concept of string &its operation.

4.2 Learning objectives :

Implementation of string of 8086

4.3. New concept:String manipulations in 8086.

4.4 Theory4.4.1 The 80x86 String InstructionsAll members of the 80 x 86 families support five different string instructions: MOVS,

CMPS, SCAS, LODS and STOS. They are the string primitives since you can build most

other string operations from these five instructions.



r

e FLAGS register.

e MOVS (move string) instructi

S:SI to the destination address s

4.4.2 How the String Instructions OperateThe string instructions operate on blocks (contiguous linear arrays) of memory. For

example the MOVS instruction moves a sequence of bytes from one memory location to

another. The CMPS instruction compares two blocks of memory. The SCAS instruction

scans a block of memory for a particular value. These string instructions often require three

operands a destination block address a source block address and (optionally) an element

count. For example when using the MOVS instruction to copy a string you need a source

address a destination address and a count (the number of string elements to move).

Unlike other instructions which operate on memory the string instructions are single-byte

instructions which don't have any explicit operands. The operands for the string

instructions include

The SI (source index) register

The DI (destination index) register

The CX (count) registe

The AX register and

The direction flag in t

For example one variant of th on copies a string from the

source address specified by D pecified by ES:DI of length

CX. Likewise the CMPS instruction compares the string pointed at by DS:SI of length CX

to the string pointed at by ES:DI.

Not all instructions have source and destination operands (only MOVS and CMPS support

them). For example the SCAS instruction (scan a string) compares the value in the

accumulator to values in memory. Despite their differences the 80x86's string instructions

all have one thing in common - using them requires that you deal with two segments the

data segment and the extra segment.

4.4.3 The REP/REPE/REPZ and REPNZ/REPNE Prefixes

The string instructions by themselves do not operate on strings of data. The MOVS

instruction for example will move a single byte word or double word. When executed by

itself the MOVS instruction ignores the value in the CX register. The repeat prefixes tell

the 80x86 to do a multi-byte string operation. The syntax for the repeat prefix is:

Field: Label repeat mnemonic operand ; comment



eat prefixes with the LODS instr

f the repeat prefixes introduces a

For MOVS:

REP MOVS {operands}

For CMPS:

REPE CMPS {operands}

REPZ CMPS {operands}

REPNE CMPS {operands}

REPNZ CMPS {operands}

For SCAS:

REPE SCAS {operands}

REPZ SCAS {operands}

REPNE SCAS {operands}

REPNZ SCAS {operands}

For STOS:

REP STOS {operands}

You don't normally use the rep uction.

As you can see the presence o new field in the source line

- the repeat prefix field. This field appears only on source lines containing string

instructions. In your source file:

The label field should always begin in column one

The repeat field should begin at the first tab stop and

The mnemonic field should begin at the second tab stop.

When specifying the repeat prefix before a string instruction the string instruction repeats

CX times. Without the repeat prefix the instruction operates only on a single byte word or

double word.

You can use repeat prefixes to process entire strings with a single instruction. You can use

the string instructions without the repeat prefix as string primitive operations to synthesize

more powerful string operations.



fix before this instruction the CP

completion the SI and DI register

the 80x86 decrements si and di

g operation the si and di register

if the direction flag was set.

The operand field is optional. If present MASM simply uses it to determine the size of the

string to operate on. If the operand field is the name of a byte variable the string instruction

operates on bytes. If the operand is a word address the instruction operates on words.

Likewise for double words. If the operand field is not present you must append a "B" "W"

or "D" to the end of the string instruction to denote the size e.g. MOVSB MOVSW or

MOVSD.

4.4 The Direction Flag

Besides the SI, DI and ax registers one other register controls the 80x86's string

instructions - the flags register. Specifically the direction flag in the flags register controls

how the CPU processes strings.

If the direction flag is clear the CPU increments SI and DI after operating upon each string

element. For example if the direction flag is clear then executing MOVS will move the byte

word or double word at DS:SI to ES:DI and will increment SI and DI by one two or four.

When specifying the REP pre U increments SI and DI for

each element in the string. At s will be pointing at the first

item beyond the string.

If the direction flag is set then after processing each string

element. After a repeated strin s will be pointing at the first

byte or word before the strings

The direction flag may be set or cleared using the cld (clear direction flag) and std (set

direction flag) instructions. When using these instructions inside a procedure keep in mind

that they modify the machine state. Therefore you may need to save the direction flag

during the execution of that procedure.

4.5 Algorithm

1. Start

2. Display message to enter string

3. Enter the string

4. Display menu as

1. Calculate length of string2. Reverse the string3. Check palindrome4. Exit

5. Read choice



, decrement counter

alindrome and jump to step 4

hen Display message string is not

If choice =1 go to step6If choice =2 go to step8If choice =3 go to step15If choice =4 go to step19

6. Display message for length

7. Display the length of string and jump to step 4

8. Display message for reverse string

9. Set the counter to length of string

10. Decrement the pointer to source string

11. Move the byte from source to destination

12. Increment the destination pointer

13. Decrement counter of length

14. Repeat step10 to13 until counter of length of string becomes zero and jump to step 4

15. Compare each location of source and destination of the source string and reversed

string

16. If equal increment pointers

17. Display message string is p

18. If step 15 gives not equal t palindrome and jump to

step 4

19. Terminate the program

4.6 Assignment Questions1. Write a program in 8086 assembly language to move string of 16 characters from

7000h: 2000h to 9000h: 0300h using string instructions.

2. Explain with example string instructions of 8086 Microprocessor.

4.7 Oral Questions1. What is maximum size of the instruction in 8086?

2. Which are string instructions?

3. In string operations which is by default string source pointer?

4. In string operations which is by default string destination pointer?

5. What is LEA? What is its use in our program?




Assignment 5

Problem Definition:Write 8086 ALP to perform string manipulation. The strings to be accepted fromthe user is to be stores code segment Module 1 and write FAR PROCEDURES incode segment Module_2 for following operations on the string:a) Concatenation of two stringsb)Number of occurrences of a sub-string in the given stringNote: Use PUBLIC and EXTERN directive. Create .OBJ files of both the modules

and link them to create an EXE file.

5.1 Prerequisite:a) Concept of String Operation.b) Concept of lntersegment CALL.


Understand the working of Far Procedure

Implementation Far Procedure For string operation.

5.3 New Concepts:a. Far procedure

b. PUBLIC & EXTERN Directives

5.4 Theory5.4.1 EXTERN: Importing Symbols from Other Modules

It tells assembler that named item is defined in another assembly.

It is used to declare a symbol which is not defined anywhere in the module beingassembled, but is assumed to be beaded in some other module and needs to bereferred to by this one.

It can take only one argument at a timed the support for multiple arguments isimplemented at the preprocessor level.



n][combine]

Syntax: EXTRN a day item or procedure name: typeExample of a procedure i.e. far

EXTRN SUB1: FAR

MAINPROGRAM START

.

.

.

CALL SUBI

MAINPROGRAM END

5.4.2 PUBLIC: It tells assembler that the address of a named item in currentAssembly is available to other modules.Syntax: PUBLIC a label/variable/procedure name

* Example of procedure

PUBLIC SUB1

SUBl PROC FAR

Jr <RETF

SUBl ENDP

5.4.3 Name SEGMENT [aligalign = BYTE align on byte address (no alignment)

= WORD align on even address

= DWORD align on DWORD address = PARA align on next 16 byte

Paragraph

= PAGE align on next 256 byte boundary

Combine =PUBLIC similar named segments are concatenated (CS)

= STACK similar named segments are concatenated (SS)

= COMMON similar named segment are overlapped

= MEMORY similar names segments are concatenated

= AT addr segment relative to absolute address

= nothing segment is private and loaded independent

5.4.4 GLOBAL: Exporting Symbols to Other ModulesPROC: mark start and end of a procedure block called label. The statements in the blockcan be called with the CALL instruction or INVOKE directive.



ead function

sourcestring & destindex = zero,

ENDP: The ENDFUNCdirective Darks the end of a function. ENDP

is a synonym for ENDFUNC.

5.5 Algorithm:1. Start

2. Display Menu as

a. Concatenation of 2 stringb. Equal or not

c. Exit

3. Read choice, if choice =a go to step4, if choice = b go to step5, if choice = c go to step6

4. Call Concat Far procedure for concatenation of two strings

5. Call Comp Far procedure to compare two strings

6. End

Concat procedure1. Start

2. Read 2 strings using string r

3. Assign srcindex = length of reset Direction flag

4. Use string transfer function.

5. Print string

6. Ret

Comp procedure1. Read 2 slings using string read function

2. Assign sourceindex=o & destindex=0 reset direction flag

3. Use string compare function

4. Print result

5. Ret

5.6 Assignment Questions:1. Explain difference between NEAR and FAR procedure of 8086 microprocessor.

2. What is EA? In how many ways EA is specified in the instruction?

3. Explain the use of POP and PUSH instruction in 8086.



5.7 Oral Questions:1. Why we indicate FF as 0FF in program?

2. What do you mean by 20 dup (0)?

3. Explain assembler directives used in program



rotate instruction

t and Rotation Instructions for pe


Assignment 6

Problem Definition:Write 8086 ALP to perform multiplication of two 8-bit numbers. UseSuccessive Addition and add and shift method.

6.1 Prerequisites:

Concept of multiplication method

6.2 Learning objectives:

Understanding shift &

6.3 New Concept

Implementation of Shif rforming multiplication

6.4 TheoryMultiplying unsigned numbersMultiplying unsigned numbers in binary is quite easy. Recall that with 4 bit numbers wecan represent numbers from 0 to 15. Multiplication can be performed done exactly as withdecimal numbers, except that you have only two digits (0 and 1). The only number facts toremember are that 0*1=0, and 1*1=1 (this is the same as a logical "and").Multiplication is different than addition in that multiplication of an n bit number by an mbit number results in an n+m bit number. Let's take a look at an example where n=m=4 andthe result is 8 bits

Decimal Binary

10x660

1010x011000001010

1010+00000111100

In this case the result was 7 bit, which can be extended to 8 bits by adding a 0 at the left.When multiplying larger numbers, the result will be 8 bits, with the leftmost set to 1, asshown.



on and division instructions doesending on the size of the sourceelow

o row:0 1 1 0

× 1 1 0 1 Sum:0 1 1 0 00000110

Decimal Binary

13x14182

1101x1110000011011101

+110110110110

As long as there are n+m bits for the result, there is no chance of overflow. For 2 four bitmultiplicands, the largest possible product is 15*15=225, which can be represented in 8bits.Multiplying signed numbersThere are many methods to multiply 2's complement numbers. The easiest is to simply findthe magnitude of the two multiplicands, multiply these together, and then use the originalsign bits to determine the sign of the result. If the multiplicands had the same sign, theresult must be positive, if they had different signs, the result is negative. Multiplication byzero is a special case (the result is always zero, with no sign bit).Multiplication and division can be performed on signed or unsigned numbers. For unsignednumbers, MUL and DIV instructions are used, while for signed numbers IMUL and IDIVare used.The format of the multiplicati not specify the multiplicandas it is implicitly specified depConsider the example given b6 × 13 = 78Sequential addition from row t

0 0 0 0 000001100 1 1 0 00011110

+ 0 1 1 0 010011100 1 0 0 1 1 1 0 Product

6.4.2 Sequential Shift/Add-MethodMethod to avoid adder arrays• shift register for partial product and multiplier with each cycle,1. Partial product increases by one digit2. Multiplier is reduced by one digit• MSBs of partial product and multiplicand are aligned in each cycle• not the multiplicand is shifted⇒ Partial product and multiplier are



for 8-bit numberspresent in the AL register and sec

e in AL with the byte in BL

Successive Addition Method Consider that a byte is ond byte is present in BL

Register. We have to multiply th Multiply the number using Successive Addition Method. In this method, one number is accepted and other number is taken as a counter. The first number is added with itself, till the counter decrements to zero.

Result is stored in DX register, Display the result, using display routine



& Multiplier for multiplication

15 x 13 =195

6.5 Algorithm:1. Start2. Read multiplication3. Display menu

a. Successive Additionb.Add & shift methodc.Exit

4. Read choice .if choice =a go to next step, if choice = b go toSep 9, if choice =c go to step 15

5. Assign sum =0 count= Multiplier6. Sum =sum Multiplicand7. Decrement count .if count >0 go to step 88. Print sum & go to step 39. Assign count =no of digit in multiplier, sum=0, shiftvar=010. Shift right Multiplier by 111. If carry flag set, sum =sum+ (Left shifted multiplicand by shiftvar)12. Shitvar =shitvar+113. If count> 0 go to step 1414. Print sum & go to step 315. Exit

6.6 Instructions needed:1. MUL-Multiplication specified byte or word to word2. SHR- Shift logical right byte or word, MSB to LSB and to CF



instructions for JE/JZ (Logic of pation by MUL and IMUL

3. SHL-Shift logical left byte or word, LSB to MSB and to CF4. JMP-Unconditional jump to the specified location counter5. JC-Jumps if carry is generated6. JE/JZ-Jumps if equal or zero.

Directive Recommended:1) MACRO- Start of MACRO statement2) ENDM-end

6.7 Assignment Question:1. Explain MACRO with example. Justify where macro is suitable than procedure.2. Differentiate between PROC& MACRO3. What is the difference between a rotate & a shift instruction? Explain with an

appropriate diagram.4. Explain the difference between arithmetic shift & logical shift.5. Describe execution of CALL instruction.

6.8 Oral Question:1. Explain the Instruction used in the program2. With example explain Add and Shift Multiplication3. With example explain Successive Addition Multiplication4. Suggest the alternative rogram should not change)5. Difference in multiplic



ions of 8087

87 Instructions for computing Mea

Assignment 7

Problem Definition:Write 8087ALP to obtain:

i) Mean ii) Variance iii) Standard DeviationFor a given set of data elements defined in data segment. Also display result

7.1 Prerequisites:

Concept of Mean, Variance and Standard Deviation

7.2 Learning objectives:

Understanding instruct

7.3 New Concept

Implementation of 80 n, Variance and StandardDeviation

7.4 Theory:

7.4.1 80X87 ArchitectureThe 80X87 is designed to operate concurrently with microprocessor. The 80X87 executes68 different instructions. The microprocessor executes all normal instruction & 80X87arithmetic coprocessor instructions. Both the microprocessor & coprocessor can executetheir respective instructions simultaneously or concurrently. The numeric or arithmeticcoprocessor is a special-purpose microprocessor i.e. especially designed to efficientlyexecute arithmetic & transcendental operations.The microprocessor intercepts & executes the normal instruction set, & coprocessorintercepts & executes only the co-processor instructions. The ESC instruction used bymicroprocessor, to generate a memory address for coprocessor so that coprocessor canexecute a coprocessor instruction.

7.4.2 Internal Structure of The 80X87:Figure shows internal structure of arithmetic coprocessor. It is divided into two majorsections; control unit & numeric execution unit.




80-bit

cessor to microprocessor systemm. If instruction is an Escape (c

the microprocessor executes it.

Control unit (CU) Numeric Execution Unit (NEU)

Control register

Status Register Exponent Module Shifter

DataBuffer

Instruction Decoder

Operand Queue

ArithmeticModule

TemporaryRegisters

TA 7G 6Bus Tracking RE

5Exceptions G

I 4

S 3

TE 2R 1

0

wide stack

1. Control Unit:

It interfaces the copro data bus. Both the devicesmonitor the instruction strea oprocessor) instruction, thecoprocessor executes it; if not,

2. Numeric Execution Unit (NEU):It is responsible for executing all coprocessor instructions. The NEU has an 8-

register stack that holds operands for arithmetic instructions & the result of arithmeticinstructions. Instructions either address data in specific stack data register or use a push &pop mechanism to store & retrieve data on the top of stack. Other registers in the NEU arestatus, control, tag & exception pointers. A few instructions transfer data between thecoprocessor & the AX register in microprocessor. The FSTSW AX instruction is the onlyinstruction available to coprocessor that allows direct communications to microprocessorthrough the AX register. 8087 does not contain FSTSW AX instruction.The stack within the coprocessor contains eight registers that are each 80 bits wide. Thesestack registers always contains an 80 bit extended precision floating pt. number. The onlytime that data appear as any other form is when they reside in the memory system. Thecoprocessor converts from signed integer, BCD, single precision, or double precision formas data are moved between the memory & coprocessor register stack.

3. Instruction Set:The arithmetic coprocessor executes over 68 different instructions. Whenever acoprocessor instruction references memory, the microprocessor automatically generatesmemory address for the instruction. The coprocessor uses the data bus for data transfer



struction exchanges the top of sta

r Instructions:e integer data transfer instructions

& pop).s did FLD, FST, FSTP, except

during coprocessor instructions and the microprocessor uses it during normal instruction.Each time that assembler encountered one of the coprocessor mnemonic opcode to

coprocessor. Data Transfer Instruction:There are three basic data transfers: floating pt., signed –integer & BCD. The only time thatdata ever appear in the signed integer or BCD form is in memory. Inside the coprocessor,data always stored as an 80-bit extended –precision floating –pt number.

Floating point Data Transfer:There are four traditional floating pt data transfer instructions are: FLD (load real), FST(store real), FSTP (store real & pop), FXCH (exchange). A new instruction added inPentium Pro through Pentium 4 is a conditional floating pt. move instruction that usesopcode FCMOV with a floating pt. condition.The FLD instruction loads floating-point memory data to top of internal stack, referred toas ST (stack top). This instruction stores the data on top of stack & then decrements thestack pointer by one.The FST instruction stores a copy of top of stack into memory location or coprocessorregister indicated by the operand.The FSTP (floating pt. store & pop) instruction stores a copy of top of stack into memoryor any coprocessor register & then pops data from top of stack.The FXCH instruction exchanges the register indicated by the operand with the top of thestack. For Ex. FXCH ST (2) in ck with register 2.

Integer Data TransfeThe coprocessor supports thre :

1. FILD (load register),2. FIST (store integer)3. & FISTP (store integer

These instructions functions a that the data transferred areinteger data. The coprocessor automatically converts the internal extended –precisionfloating-point data to integer data. BCD Data Transfer Instructions:Two instructions load or stores BCD signed –integer data. The FBLD instruction Loads thetop stack with BCD memory data & FBSTP stores top of stack & does a pop. Arithmetic Instructions:Arithmetic instructions for coprocessor include addition, subtraction, multiplication,division & calculating square roots. The arithmetic related instructions are scaling,rounding, absolute value, & changing the sign.a) Addition:FADD destination, sourceAdds real numbers from specified source to real number at destination source can be stackelement or memory location. Destination must be a stack element.Ex. FADD ; ST+ST (1) ,pop stack result at STFADDP destination, sourceAdds ST to specified stack elements and increments stack pointer by one.Ex. FADDP ST (2) ; Add ST (2) to ST. increment Stack pointer so ;ST(20) becomesST.FIADD sourceAdds integer from memory to ST stores result in ST.



:specified source by real numberement, and incremented stack poi

ly ST(2) to ST. incremented Stac

ST & put result in ST.BX] ; integer no. from memor

Ex. FIADD PRICE ; Integer number from memory + ST.

b) Subtraction:FSUB destination, sourceSubtracts the real number at specified source from the real number at specified destination& puts the results in the specified destination.Ex. FSUB ; ST ST (1)-STFSUBP destination, sourceSubtracts ST from specified stack elements & puts result in specified stack element. Thenincrements stack pointer by one.Ex. FSUBP ST (2) ; ST(2) ST. ST(1) becomes new ST.FISUB sourceSubtracts integer number stored in memory from ST & stores result in ST.Ex. FISUB DIFF ; ST ST – integer from memory.

c) Multiplication:FMUL destination, source:Multiply real number from source by real number from specified destination, & put resultin specified stack element.Ex. FMUL

FMUL ST, ST (5) ; multiply ST(5) to ST, result in ST.FMULP destination, sourceMultiplies real number from from specified destination,puts result in specified stack el nter by one.Ex.FMULP ST(2) ; multip k pointer so ST 1 becomesST .FIMUL source :Multiply integer from memoryEx.FIMUL DWORD PTR[ y pointed by BX * ST andresult in ST.

d) Division :FDIV destination, source:Divides destination real by source real, stores result in destination.Ex. FDIVFDIV ST(2), ST ;divides ST by ST(2) stores result in ST.FDIVP destination, source:Same as FDIV, but also increments stack pointer by one after DIV.Ex. FDIVP ST (2), ST ;divides ST by ST(2) result in ST & increments stack;pointer.FIDIV sourceDivides ST by integer from memory stores result in ST.Ex. FIDIV PERCENTAGE ; ST ST /integer number.

e) Other arithmetic operations:FSQRT: Contents of ST are replaced with its square root.FABS: Replaces ST by its absolute value. Instruction simply makes sign positive.FCHS: Complements the sign of the number in ST.



dressing mode of coprocessor tooprocessor is also operated in thde can only be exited by a h/w reto control register.gister with word addressed by opthe control register into word-siz

f) Compare Instructions:Compares the contents of ST with contents of specified or default source. The source maybe another stack element or real number in memory.FCOM source: Compares ST with real number in another stack element or memoryFCOMP source: Identical to FCOM except that stack pointer is incremented by one afterthe compare operation.

g) Instructions which Loads ConstantsThese instructions simply push the indicated constant onto the Stack.FLDZ : Push 0.0 onto stack.FLD1 : Push +1.0 onto stack.FLDPI : Push the value of onto stack.FLD2T : Push log of 10 to the base 2 onto stack(log2 10)FLD2E : Push log of e to the base 2 onto stack(log2 e)FLDG2 : Push log of 2 to the base 10 onto stack(log10 2)

h) Coprocessor Control Instructions:The coprocessor has to control instructions for initialization, exception handling, taskswitching. The control instructions have two forms.FINIT/FNINIT: Performs a reset operation on the arithmetic coprocessor. It setsregister 0 as the top of the stack.FSETPM: Changes the ad protected addressing mode.This mode is used when mic e protected mode. As withmicroprocessor, protected mo set or, in the case of 80386thro’ Pentium 4, with changesFLDCW: Loads the control re erand.FSTCW / FNSTCW: Stores ed memory operand.

7.5 Algorithm1. Initialize 80872. Make stack top zero3. Load and add each no to stack top4. Divide the total by n no of elements5. Store the average in mean6. Make stack top zero7. Load each no. To stack top, Subtract mean from the no.(xi-mean), Square the (xi-

mean) and add the contents8. Store the addition in temp19. Load 1 on stack top10. Load n on stack top11. Find n-112. Store n-1 in temp213. Load n-1 on stack top14. Load sum of (xi-mean)2 on stack top15. Divide sum by n-116. Store as variance17. Find the square root18. Store as standard deviation19. Display mean, variance and standard deviation20. Stop



7.6 Theory Questions1. Explain Status and Control Word of 80872. State and Explain data types supported by 80873. Explain the type of instructions supported by 8087. Give one example of each.

7.7 Oral Question:1. Explain in Detail math Co-Processor?2. Explain in detail

a. FADDb. FSQRTc. FDIVd. FMUL

3. Explain long form of NDP?



cing of ADC to 8086.cing of peripheral ICs like 8255.

55 PPI with 808655 PPI with 0809 ADC

er:igital ADC converter is to produc


Assignment 8

Problem Definition:Write 8086 ALP to convert an analog signal in the range of 0V to 5V to itscorresponding digital signal using successive approximation ADC and dualslope ADC. Find resolution used in both the ADC’s and compare the results.

8.1 Prerequisite: Concept of:1. 8255 working2. Data conversion from analog to digital

8.2 Learning Objectives:1. Understand the interfa2. Understand the interfa

8.3 New Concepts:o Interfacing of 82o Interfacing of 82

8.4 TheoryAn analog to Digital ConvertThe function of an analog to d e a digital word whichrepresents magnitude of some analog voltage or current

8.4.1 The important specifications of an ADC are: Resolution Accuracy Linearity Speed Conversion Time

8.4.2 Types of ADC Parallel Comparator ADC or Flash ADC Dual Slope ADC Successive-Approximation ADC

8.4.2.1 Parallel Comparator ADC or Flash ADC: Major advantage is its high speed. It has least conversion time compared to otherconverters The opcode from the comparators is not a binary code(std), but it can be convertedto any desired code with some simple logic



mparator will go low and this wil

DC 0809:on the successive approxima

8-analog inputs, an 8 channel mul

, it includes a 256 register voltag

The disadvantage of flash logic ADC is that more numbers of A comparators arerequired for a reasonable amount of resolution 2n-1 comparators are required for n-bit resolution. Hence for an 8-bit conversion255 comparators are needed. The cost of flash ADC is relatively high.

8.4.2.2 Dual slope ADC It is used in digital voltmeter This type of converter can give a no. of bits of resolution The cost of ADC is low The accuracy of converter is high as it is not affected by temperature Disadvantage: slow type speed It may take 300ms to do a conversion

8.4.2.3 Successive-approximation ADC: On the other hand 1st clock pulse at start of conversion cycle successiveapproximation register (S.A.R.) makes MSB 1 DAC applies its equivalent voltage inverting input of the converter Comparator compares both the inputs and if the inverting input is higher than theother voltage the output of co l tell S.A.R. to make MSB 0otherwise it will set.

8.4.3 Working Principle of A1 The ADC 0809 operates tion technique of A to Dconversion.2 It is a CMOS device with tiplexer and microprocessorcompatible control logic.3 As the number of bits n=8 e divider, a group of analogswitches and a successive approximation register (SAR).4 As there are 8-analog channels, we can connect up to 8 analog inputs to this IC.5 However due to the use of a multiplexer, at a time only one analog input will beconverted into an equivalent 8-bit digital output. The analog input channels can be selectedusing the three address lines A, B and C.

8.4.4 Features of ADC:1 Inbuilt 8 analog channels with multiplexer.2 Zero or full scale adjustment is not required.3 0 to 5 V input voltage range with single polarity 5 V supply.4 Output is TTL compatible.5 High speed.6 Low conversion time7 High accuracy.8 8-bit resolution.9 Low power consumption (less than 15 mW).10 Easy to interface with all microprocessors.11 Minimum temperature dependence

1 Analog Inputs (I/P 0 to I/P 7):



to begin the A to D conversion

:to these pins.

0809t successive approximation ADhannel select has address lines A,

Pin numbers 1 to 5 and 26 and 28, designated as I/P0 to I/P7 are the eight analog input ofthis IC. We can connect signals coming from eight different transudes to these inputs. Eachone of these inputs will be converted to an 8-bit equivalent digital from one by one and notall at a time. So one of these eight inputs should be selected for conversion. This selectionis done by means of these address pins A, B and C.

2 Address Pins A,B ,C(Pin 23,24,25) :These pins will decide or select one out of eight analog inputs, for conversion into digitalform. For example if CBA= 010 then the “IN2” is selected and the analog signal at thisinput is converted to equivalent digital form.

3 Reference Voltage [VREF(+) and VREF (-) ] :Depending on the desired polarity of the reference voltage, we can connect a positive ornegative reference voltage externally to these pins.

4 ALE and Output Enable:The address latch enable (ALE) input is useful in enabling the address latch which storesthe address on lines A, B and C. The output enable pin, when activated will make thedigital output available on the output pins.

5 Start and EOC:We have to enable the start . The end of conversion isindicated by EOC output.

6 Digital Output [2-1 to 2-8]The digital output is available

8.5 Interfacing of 8255 withADC 0809 is an 8-bi C. This chip has 8-channel

along with multiplexer. The c B, C. We can use channel 0as input thus, address lines A, B, C will be grounded for channel 0.The ALE pin is connected to the clock input. At the time of power on the valid channeladdress is latched at the rising edge of the ALE signal. ADC 0809 has an START onConversion pin. A positive going pulse of short duration, is applied to this pin this pinstarts the A/D conversion process. The OE should always be high, when data is to be read.After the conversion, EOC is given through PC, indicating end of conversion. The port Aand C are defined in the input mode, whereas port B of 8255 is configured in output mode.The data is read through port A of 8255. Positive (DC) and negative (DC) or (ac) voltage isapplied as the analog input at channel 0. Hence decoupling capacitors are used to maintainminimum noise level.Internal oscillator can be enabled only when A/D conversion is to be done. The oscillatoroscillates till the SOC enables pin PB2 of the 8255.



D3 D2 D1 D01 0 0 1

ows

D7 D6 D5 D41 0 0 1

8255PPI ADC0809

PA0-PA7

PC0PB0

PB1PB2

D0-D7

EOCSOC

OECLK

AnalogInput

Figure 2 Interfacing of 0809 ADC with 8255

8.6 For analog to digital conversion we require1. Port A, as input port in mode’0’2. Port B, as input port in mode’0’3. Port C, as input portHence, control word format is as follows

Control word in hex is 99H

In 8255, addresses are as follPA- 0011 0000 = 30HPB- 0011 0001 = 31HPC- 0011 0010 = 32HCWR-0011 0011 = 33H

8.7 I/O mapping of 8255A7 A6 A5 A4 A3 A2 A1 A0

Port A 0 1 1 0 0 0 0 1 61HPort B 0 1 1 0 0 0 1 1 63HPort C 0 1 1 0 0 1 0 1 65HCWR 0 1 1 0 0 1 1 1 67H

8.8 Instructions needed:1. IN-Copy a byte or word from specified port to accumulator2. OUT- Copy a byte or word from accumulator to specified port3. JZ-Jumps if equal to Zero4. TEST-Logical AND between all bits of two operands for flags only.



8.9 Algorithm:1. Write control word to CWR of the 82552. Issue SOC signal by setting PB0 High3. Enable CLK & ALE by setting PB2 High4. Check for EOC by polling PC0 bit

PC0 = 1 means conversion still in progressPC0 = 0 means EOC

5. Latch the output by setting PB1 High6. Read port A for obtaining converted data

7. Display output using display routine

8.10 Program:



8255de word format of 82558255

8.11 Hardware Connections:

PA0-PA7 (input) – digital data from ADCPB0 (output) – Start of ConversionPB1 (output) – Output EnablePB2 (output) – Enable OscillatorPC0 (input) – End of Conversion

8.12 Input and Output:-

Observation Table –

8.13 Assignment Questions:1. Block diagram of 82552. Modes of operation of3. BSR mode and I/O mo4. Modes of I/O mode of5. Explain instructions used in program

8.14 Oral Questions:1. How the Resolution of ADC is defined as?2. Which conversion is high speed conversion?3. What is the CWR?4. What is the address of Port A and Port B?5. From which location does the source code starts on 86-Kit?



cing of DAC 0808 with 8086.cing of peripheral ICs like 8255..

oral-to-analog converter (DAC o

nary) code to an analog signal (


Assignment 9

Problem Definition:Write 8086 ALP to interface DAC and generate followingwaveforms on oscilloscope, (i)Square wave - Variable Duty Cycle andfrequency. (ii)Ramp wave - Variable direction, (iii)Trapezoidal wave(iv)Stair case wave

9.1 Prerequisites: Concepts of Digital Data.

9.2 Learning Objectives: Understand the interfa Understand the interfa

9.3 New concepts:Applications of 8255

9.4 Theory9.4.1 Digital-Analog Convert

In electronics, a digit r D-to-A) is a device thatconverts a digital (usually bi current, voltage, or electriccharge). An analog-to-digital converter (ADC) performs the reverse operation. Signals areeasily stored and transmitted in digital form, but a DAC is needed for the signal to berecognized by human senses or other non-digital systems. A common use of digital-to-analog converters is generation of audio signals from digital information in music players.Digital video signals are converted to analog in televisions and cell phones to displaycolors and shades. Digital-to-analog conversion can degrade a signal, so conversion detailsare normally chosen so that the errors are negligible. Due to cost and the need for matchedcomponents, DACs are almost exclusively manufactured on integrated circuits (ICs). Thereare many DAC architectures which have different advantages and disadvantages. Thesuitability of a particular DAC for an application is determined by a variety ofmeasurements including speed and resolution.

9.4.2 Types of DAC’s:The most common types of electronic DACs are: Pulse-Width Modulator DAC Oversampling commonly known as Delta sigma DAC Binary Weighted DAC R-2R Ladder DAC Thermometer Coded DAC Segmented DAC



ed resistors (or current sources)ngly large RC-constants for eachation or Cyclic DAC, whichvidual bits of the digital input arr.DAC, which contains an equalue of DAC output. An 8-bit thethermometer DAC would havet precision DAC architecture but

Hybrid DAC

The pulse-width modulator, the simplest DAC type. A stable current or voltage isswitched into a low-pass analog filter with a duration determined by the digital input code.This technique is often used for electric motor speed control, but has many otherapplications as well.

Oversampling DACs or interpolating DACs such as the delta-sigma DAC, use a pulsedensity conversion technique. The oversampling technique allows for the use of a lowerresolution DAC internally.

The binary-weighted DAC, which contains individual electrical components for eachbit of the DAC connected to a summing point. These precise voltages or currents sum tothe correct output value. This is one of the fastest conversion methods but suffers frompoor accuracy because of the high precision required for each individual voltage or current.

Switched resistor DAC contains of a parallel resistor network. Individual resistorsare enabled or bypassed in the network based on the digital input.

Switched current source DAC, from which different current sources are selectedbased on the digital input.

Switched capacitor DAC contains a parallel capacitor network. Individual capacitorsare connected or disconnected with switches based on the input.

The R-2R ladder DAC which is a binary-weighted DAC that uses a repeating cascadedstructure of resistor values R and 2R. This improves the precision due to the relative ease ofproducing equal valued-match . However, wide convertersperform slowly due to increasi added R-2R link.

The Successive-Approxim successively constructs theoutput during each cycle. Indi e processed each cycle untilthe entire input is accounted fo

The thermometer-coded resistor or current-sourcesegment for each possible val rmometer DAC would have255 segments, and a 16-bit 65,535 segments. This isperhaps the fastest and highes at the expense of high cost.Conversion speeds of >1 billion samples per second have been reached with this type ofDAC.

Hybrid DACs, which use a combination of the above techniques in a single converter.Most DAC integrated circuits are of this type due to the difficulty of getting low cost, highspeed and high precision in one device.

The segmented DAC, which combines the thermometer-coded principle for the mostsignificant bits and the binary-weighted principle for the least significant bits. In this way, acompromise is obtained between precision (by the use of the thermometer-coded principle)and number of resistors or current sources (by the use of the binary-weighted principle).The full binary-weighted design means 0% segmentation, the full thermometer-codeddesign means 100% segmentation.

9.4.3 PerformanceDACs are very important to system performance. The most important characteristics ofthese devices are: Resolution: This is the number of possible output levels the DAC is designed to

reproduce. This is usually stated as the number of bits it uses, which is the base twologarithm of the number of levels. For instance a 1 bit DAC is designed toreproduce 2 (21) levels while an 8 bit DAC is designed for 256 (28) levels.Resolution is related to the Effective number of bits which is a measurement of the



om specified port to accumulatord from accumulator to specified pbyte/word by 1d byte/word by 1

ecution, call service procedureto byte or word to word

actual resolution attained by the DAC. Resolution determines color depth in videoapplications and audio bit depth in audio applications.

Maximum sampling rate: This is a measurement of the maximum speed at whichthe DACs circuitry can operate and still produce the correct output. As stated in theNyquist–Shannon sampling theorem defines a relationship between the samplingfrequency and bandwidth of the sampled signal.

Monotonicity: This refers to the ability of a DAC's analog output to move only inthe direction that the digital input moves (i.e., if the input increases, the outputdoesn't dip before asserting the correct output.) This characteristic is very importantfor DACs used as a low frequency signal source or as a digitally programmable trimelement.

THD+N: This is a measurement of the distortion and noise introduced to the signalby the DAC. It is expressed as a percentage of the total power of unwantedharmonic distortion and noise that accompany the desired signal. This is a veryimportant DAC characteristic for dynamic and small signal DAC applications.

Dynamic range: This is a measurement of the difference between the largest andsmallest signals the DAC can reproduce expressed in decibels. This is usuallyrelated to resolution and noise floor

9.5 Instructions needed:1. MOV-Copies byte or word from specified source to specified destination2. IN-Copy a byte or word fr3. OUT- Copy a byte or wor ort4. INC-Increments specified5. DEC-Decrements specifie6. JZ-Jumps if equal to Zero7. INT-Interrupt program ex8. ADD- Adds specified byte

9.6 Algorithm:8255 Port Addresses:Port A = 61hPort B = 63hPort C = 65hCWR = 67hControl Word: Mode 0, port A & B as an output port and Port C as an input port1 0 0 0 1 0 0 1 = 89h

9.6.1 Algorithm: Triangular Wave1. Write control word to CWR2. Enable latch by setting PB0 =13. Write 00 through AL to port A4. Increment AL5. Write value of AL to port A6. Compare with FFh7. Repeat if AL is not equal to FFh then go to step 58. Write value of AL to port A9. Decrement AL10. Compare with 00h11. Repeat if AL is not equal to 00h then go to step 8

http://en.wikipedia.org/wiki/Color_depth

http://en.wikipedia.org/wiki/Audio_bit_depth

http://en.wikipedia.org/wiki/Sampling_rate

http://en.wikipedia.org/wiki/Nyquist%E2%80%93Shannon_sampling_theorem

http://en.wikipedia.org/wiki/Nyquist%E2%80%93Shannon_sampling_theorem

http://en.wikipedia.org/wiki/Bandwidth_%28signal_processing%29

http://en.wikipedia.org/wiki/Monotonic_function

http://en.wikipedia.org/wiki/Total_harmonic_distortion

http://en.wikipedia.org/wiki/Harmonic

http://en.wikipedia.org/wiki/Harmonic

http://en.wikipedia.org/wiki/Dynamic_range

http://en.wikipedia.org/wiki/Decibel

http://en.wikipedia.org/wiki/Noise_floor



12. Go to step 313. Observe Triangular wave on CRO

9.6.2 Algorithm: Square W ave

1. Write control word to CWR2. Enable latch by setting PB0 =13. Write 00 through AL to port A4. Call delay5. Write FF to port A6. Go to step 3 for continuous wave7. Observe square wave on CRO



uous wavee on CRO

9.6.3 Algorithm: Staircase Wave1. Write control word to CWR2. Enable latch by setting PB0 =13. Write 00 through AL to port A4. Write Contents of Port A to CRO5. Call delay6. Add 33H to port A7. Go to step 3 for contin8. Observe Staircase wav



9.6.4 Algorithm: Ramp Wave

1. Write control word to CWR2. Enable latch by setting PB0 =13. Write 00 through AL to port A4. Write Contents of Port A to CRO5. Call delay6. Increment contents of port A by one7. Go to step 3 for continuous wave8. Observe Staircase wave on CRO

9.7 Assignment Questions:1. Define the following terms for D/A converters:

1. Resolution 2. Accuracy 3. Monotonicity 4. Conversion time. 5. Linearity2. Explain the R/2R ladder technique of D/A conversion. What are the different

sources of error in DAC?

9.8 Oral Questions:1. How the Resolution of DAC is defined as?2. What is D/A converter?3. Name the type of D/A converting techniques with brief example4. What are the disadvantages of DAC?5. Give applications of DAC6. What are sources of errors in DAC?



cing of 8254 to 8086.

of 8254of 8254

al Timer/Counter


Assignment 10

Problem Definition:Write 8086 ALP to program 8254 in Mode 0, modify the program forhardware re-triggerable Mono shot mode.Generate a square wave with a pulse of 1 mS. Comment on the differencebetween Hardware Triggered and software triggered strobe mode. Observethe waveform at GATE & out pin of IC 8254 on CRO.

10.1 Prerequisite: Concept of Timer

10.2 Learning Objectives: Understand the interfa

10.3 New Concepts: Understand the mode 0 Understand the mode 3

10.4 Theory8254: Programmable Interv10.4.1 Features of 8254 Compatible with All Intel and Most other Microprocessors Handles Inputs from DC to 10 MHz 8 MHz 8254 MHz 8254-2 Status Read-Back Command Six Programmable Counter Modes Three Independent 16-Bit Counters Binary or BCD Counting Single a 5V Supply Standard Temperature Range

The Intel 8254 is a counter/timer device designed to solve the common timing controlproblems in microcomputer system design. It provides three independent 16-bit counters,each capable of handling clock inputs up to 10 MHz. All modes are softwareprogrammable. The 8254 is a superset of the 8253.The 8254 uses HMOS technology andcomes in a 24-pin plastic or CERDIP package. It is a general purpose, multi-timing elementthat can be treated as an array of I/O ports in the system software. The 8254 solves one ofthe most common problems in any microcomputer system, the generation of accurate timedelays under software control. Instead of setting up timing loops in software, theprogrammer configures the 8254 to match his requirements and programs one of the



counters for the desired delay. After the desired delay, the 8254 will interrupt the CPU.Software overhead is minimal and variable length delays can easily be accommodated.Some of the other counter/timer functions common to microcomputers which can beimplemented with the 8254 are: Real time clock Event-counter Digital one-shot Programmable rate generator Square wave generator Binary rate multiplier Complex waveform generator Complex motor controller

10.4.2 Block Diagram of 8254

Figure 1Block Diagram of 8254

Data Bus Buffer:This 3-state, bi-directional, 8-bit buffer is used to interface the 8254 to the system busRead/Write Logic:The Read/Write Logic accepts inputs from the system bus and generates control signals forthe other functional blocks of the 8254. A1 and A0 select one of the three counters or theControl Word Register to be read from/written into.A ``low'' on the RD input tells the 8254 that the CPU is reading one of the counters.A ``low'' on the WR input tells the 8254 that the CPU is writing either a Control Word oran initial count.Both RD and WR are qualified by CS; RD and WR are ignored unless the 8254 has been



selected by holding CS low.Control Word Register:The Control Word Register is selected by the Read/Write Logic when A1,A0 = 11.If the CPU then does a write operation to the 8254, the data is stored in the Control WordRegister and is interpreted as a Control Word used to define the operation of the Counters.The Control Word Register can only be written to; status information is available with theRead-Back Command.Counter 0, Counter 1, Counter 2:The Counters are fully independent. Each Counter may operate in a different Mode.

10.4.3 8254 SYSTEM INTERFACE:The 8254 is a component of the Intel Microcomputer Systems and interfaces in the samemanner as all other peripherals of the family.It is treated by the system's software as an array of peripheral I/O ports; three are countersand the fourth is a control register for MODE programming.Basically, the select inputs A0,A1 connect to the A0,A1 address bus signals of the CPU.The CS can be derived directly from the address bus using a linear select method. Or it canbe connected to the output of a decoder, such as an Intel 8205 for larger systems.

Figure 2 Interfacing of 8254 with 8086

10.4.4 Programming the 8254:Counters are programmed by writing a Control Word and then an initial count.The Control Words are written into the Control Word Register, which is selected whenA1,A0 = 11. The Control Word itself specifies which Counter is being programmed.

Control Word Format: A1,A0 = 11, CS = 0, RD = 1, WR = 0. By contrast, initial counts are written into the Counters, not the Control Word

Register. The A1,A0 inputs are used to select the Counter to be written into. Theformat of the initial count is determined by the Control Word used.

Write Operations: The programming procedure for the 8254 is very flexible. Only twoconventions need to be remembered: For each Counter, the Control Word must be written before the initial count is

written. The initial count must follow the count format specified in the Control Word (least

significant byte only, most significant byte only, or least significant byte and thenmost significant byte).



trol word Format with valid coay be written to a Counter at anMode in any way. Counting wilhe new count must follow the pr

mmed to read/write two-byte counust not transfer control betweene which also writes into that sa

Since the Control Word Register and the three Counters have separate addresses(selected by the A1,A0 inputs), and each Control Word specifies the Counter itapplies to (SC0,SC1 bits), no special instruction sequence is required.

Figure 3 Con

A new initial count mmbinationsy time without affecting the

Counter's programmed l be affected as described inthe Mode definitions. T ogrammed count format.

If a Counter is prograapplies: A program m

ts, the following precautionwriting the first and second

byte to another routin me Counter. Otherwise, theCounter will be loaded with an incorrect count.

10.4.5 Modes of 8254Mode 0: Interrupt On Terminal Count :Mode 1: Hardware Retriggerable One-Shot:Mode 2: Rate Generator:Mode 3: Square Wave Mode:Mode 3: Even Counts:Mode 4: Software Triggered Strobe:Mode 5: Hardware Triggered Strobe (Retriggerable):

10.4.6 Operation Common to All Modes:Programming: When a Control Word is written to a Counter, all Control Logic is immediately

reset and OUT goes to a known initial state; no CLK pulses are required for this.Gate: The GATE input is always sampled on the rising edge of CLK. In Modes 0, 2, 3,

and 4 the GATE input is level sensitive, and the logic level is sampled on the risingedge of CLK. In Modes 1, 2, 3, and 5 the GATE input is rising-edge sensitive.

In these Modes, a rising edge of GATE (trigger) sets an edge-sensitive flip-flop in



follow the count format specifiemost significant byte only, or lea

rd Register and the three Count0 inputs), and each Control Wots), no special instruction sequenc

read the value of a Counter witdone in the 8254.

Since the Control Wo ers have separate addresses(selected by the A1,Aapplies to (SC0,SC1 bi

rd specifies the Counter ite is required.

the Counter. This flip-flop is then sampled on the next rising edge of CLK; the flip-flop is reset immediately after it is sampled. In this way, a trigger will be detectedno matter when it occurs-a high logic level does not have to be maintained until thenext rising edge of CLK.

Note that in Modes 2 and 3, the GATE input is both edge- and level-sensitive. InModes 2 and 3, if a CLK source other than the system clock is used, GATE shouldbe pulsed immediately following WR of a new count value.

Counter: New counts are loaded and Counters are decremented on the falling edge of CLK. The largest possible initial count is 0, this is equivalent to 216 for binary counting

and 104 for BCD counting. The Counter does not stop when it reaches zero. In Modes 0, 1, 4, and 5 the Counter ``wraps around'' to the highest count, either

FFFF hex for binary counting or 9999 for BCD counting, and continues counting. Modes 2 and 3 are periodic; the Counter reloads itself with the initial count and

continues counting from there.Write Operations: The programming procedure for the 8254 is very flexible. Only two conventions

need to be remembered: For each Counter, the Control Word must be written before the initial count is

written. The initial count must d in the Control Word (least

significant byte only, st significant byte and thenmost significant byte).

Read Operations: It is often desirable to hout disturbing the count in

progress. This is easily There are three possible methods for reading the counters: a simple read operation,

the Counter Latch Command, and the Read-Back Command.

10.5 Instructions needed:12. MOV-Copies byte or word from specified source to specified destination13. INC-Increments specified byte/word by 114. DEC-Decrements specified byte/word by 115. JNZ-Jumps if not equal to Zero16. CMP-Compares to specified bytes or words17. ADD-Adds specified byte to byte or word to word

10.6 8254 Addresses:Counter0 = 30hCounter1 = 31hCounter2 = 32hCWR = 33h



10.7 MODE '0' Program: Interrupt on terminal countControl Word: Mode 0, binary counter, counter0, LSB & MSB count

Algorithm:1. Write CW to CWR2. Load LSB count3. Load MSB count4. Stop.Procedure:

0 0 1 1 0 0 0 0 = 30h

1) Connect pulse Clk to Clk 0.2) Connect Gate 0 to Vcc.3) Execute Program4) Press pulsar key 7 Times.5) Connect (Active Low) out0 to IRQ7 (RST7.5)

Connections:1) Connect pulsar clock to clock2) Gate to Vcc3) Connect IRQ7 to out after executing of the program & then press the pulsar Key.

Program:Dyna-86>



10.8 MODE ‘3’: Square wave GeneratorControl Word: Mode 3, binary counter, counter0, LSB & MSB count

Algorithm:1. Write CW to CWR2. Load LSB count3. Load MSB count4. Execute program5. Observe waveforms4. Stop.Procedure:

0 0 1 1 0 1 1 0 = 36h

1) Connect pulse Clk to Clk 0.2) Connect Gate 0 to Vcc.3) Execute Program4) After pressing the Pulsar key 5 Times LED will glow low

& after 2 Pulse, It will go high.Program



10.9 Theory Questions1. Control Word Format2. Write operation of 82543. Read operation of 82544. Counter Latch Command and Read Back Command

10.10 Oral Questions1 What are the applications of 8254?2 Specify the various modes of 82543 What is the control word used in mode0 and mode3?4 List the steps performed for the connections for interfacing of 8254 with 80865 Give the components of 8254




Assignment 11

11.1 Prerequisite: Concept of Synchronous and Asynchronous Transmission

11.2 Learning Objectives: Understand the interfacing of 8251 to 8086.

11.3 New Concepts: Understand the Synchronous and Asynchronous Transmission of 8251

11.4 Theory8251 Universal Synchronous Asynchronous Receiver Transmitter (USART) USART stands for Universal Synchronous Asynchronous Receiver Transmitter.

It is sometimes called the Serial Communications Interface or SCI. Synchronous operation uses a clock and data line while there is no separate clock

accompanying the data for Asynchronous transmission. Since there is no clock signal in asynchronous operation, one pin can be used for

transmission and another pin can be used for reception. Both transmission and reception can occur at the same time — this is known as full

duplex operation. Transmission and reception can be independently enabled. However, when the

Problem Definition:Perform an experiment to establish communication between two 8251 systems A and B.Program 8251 system A in asynchronous transmitter mode and 8251 system B inasynchronous receiver mode. Write an ALP to transmit the data from system A andreceive the data at system B. The requirements are as follows:Transmission:• message is stored as ASCII characters in the memory.• message specifies the number of characters to be transmitted as the first byte.Reception:• Message is retrieved and stored in the memory.• Successful reception should be indicated.



s a peripheral device of a microCPU and transmits serial data a

m the outside and transmits par

serial port is enabled, the USART will control both pins and one cannot be used forgeneral purpose I/O when the other is being used for transmission or reception.

The USART is most commonly used in the asynchronous mode. The mostcommon use of the USART in asynchronous mode is to communicate to a PC serialport using the RS-232 protocol.

The USART can both transmit and receive, and we will now briefly look at howthis is implemented in the USART.

The USART can be configured to transmit eight or nine data bits by the TX9 bit inthe TXSTA register. If nine bits are to be transmitted, the ninth data bit must beplaced in the TX9D bit of the TXSTA register before writing the other eight bits tothe TXREG register.

Once data has been written to TXREG, the eight or nine bits are moved into thetransmit shift register. From there they are clocked out onto the TX pin preceded bya start bit and followed by a stop bit.

The use of a separate transmit shift register allows new data to be written to theTXREG register while the previous data is still being transmitted. This allows themaximum throughput to be achieved.

11.5 Block diagram of the 8251 USARTThe 8251 is a USART (Universal Synchronous Asynchronous Receiver Transmitter) forserial data communication. A computer system, the 8251receives parallel data from the fter conversion. This devicealso receives serial data fro allel data to the CPU afterconversion.

Figure 1Block diagram of the 8251 USART

The 8251 functional configuration is programmed by software. Operation between the8251 and a CPU is executed by program control. Table 1 shows the operation between aCPU and the device.



hronous mode)ronization (synchronous mode)

us characters (Synchronous mode)de instruction is shown in Figuressary to write one-or two bynction will be set because thection.

Table 1Operation between a CPU and 8251

Control WordsThere are two types of control word.1. Mode instruction (setting of function)2. Command (setting of operation)

1) Mode InstructionMode instruction is used for setting the function of the 8251. Mode instruction will be in"wait for write" at either internal reset or external reset. That is, the writing of a controlword after resetting will be recognized as a "mode instruction."Items set by mode instruction are as follows:

• Synchronous/asynchronous mode• Stop bit length (asynchronous mode)• Character length• Parity bit• Baud rate factor (async• Internal/external synch• Number of synchrono

The bit configuration of mo es 2 and 3. In the case ofsynchronous mode, it is nec te sync characters. If synccharacters were written, a fu writing of sync charactersconstitutes part of mode instru



he operation of the 8251. It is posng a mode instruction and sync c

2) CommandCommand is used for setting t sible to write a commandwhenever necessary after writi haracters.

Items to be set by command are as follows:• Transmit Enable/Disable• Receive Enable/Disable• DTR, RTS Output of data.• Resetting of error flag.• Sending to break characters



word from specified source to speyte or word right, LSB to MSB ana byte or word with correspondin

• Internal resetting• Hunt mode (synchronous mode)

Status WordIt is possible to see the internal status of the 8251 by reading a status word. The bitconfiguration of status word is shown in Fig. 5.

11.6 Instructions needed:1 MOV-Copies byte or cified destination2 ROR-Rotates bits of b d to CF3 AND-AND each bit in g bit in another byte or

word4 INC-Increments specified byte/word by 15 DEC-Decrements specified byte/word by 16 JNZ-Jumps if not equal to Zero7 JNC-Jumps if no carry is generated8 CMP-Compares to specified bytes or words9 JBE-Jumps if below of equal10 ADD-Adds specified byte to byte or word to word11 CALL-Transfers the control from calling program to procedure

11.7 8251 AddressesData = 9000h

CWR = 9002ha. Mode word:Async mode, Baud rate 1/16, Character length 8-bits, odd parity, and one stop bit

0 1 0 1 1 1 1 0 = 5Ehb. Command word:

Transmit enable & reset error flags 0 0 0 1 0 0 0 1 = 11h



11.8 Algorithm:1 Send mode word to both 82512 Write command word to both 82513 Initialize memory pointers4 Set counter equal to number of bytes to be transferred5 Check TxRDY status for transmission to begin6 Write data for transmission using SI7 Check RxRDY status for reception of data8 Read received data9 Save using DI10 Increment both pointers11 Decrement the counter12 Repeat steps 6 to 11 till counter becomes zero.13 Stop

11.9 Connections:1. DSRA AND CTSA CONNECTED TO GND2. RTS B AND DTRB CONNECTED TO GND3. TXDA TO RXDB4. CLK TO AUTO CKL

11.10 Program



11.11Theory Questions1 Asynchronous Serial Communication with Synchronous Communication.2 Interfacing diagram of 8251 USART with 8086

11.12 Oral Questions1 What is the control word used?2 What is the port address of CWR?3 What is USART?4 What is the difference between 8250 and 8251?5 Write the connections of 8251?6 After data transfer how to see the contents that are transferred?



ne (ISR).

TSRoading of TSRle to a.COM file

Memory Resident program


Assignment 12

Problem Definition:Write a TSR program in 8086 ALP to Implement Real Time Clock (RTC).Read the Real Time from CMOS chip by suitable INT and FUNCTION and displaythe RTC at the bottom right corner on the screen! Access the video RAM directlyin your routine.

12.1 Prerequisite: Interrupt Vector table (IVT) Program Segment Prefix (PSP) COM program Interrupt Service Routi

12.2 Learning Objectives: Implementation of the Structure of TSR & L Conversion of .EXE fi

12.3 New concepts: What is TSR / Working of TSR with DOS

12.4 Theory12.4.1 TSR: Terminate but stay resident programsIt is Terminate but stay resident programs.These programs begin when we run program and stay in memory ready for use, even ifthey are not active on your screen.TSR is divided into resident routine & initializationroutine. Objective of initialization routine is to make resident program routine stay residentin memory. It executes only once. Here we modify interrupt vector table (IVD entries sothat New addresses point to resident program. When TSR is activated by any interrupt,program control is first transferred to resident program & after execution of residentprogram; control is transferred to original ISR of requested interrupt. Get interrupt vector : 35h (interrupt no in AL) Set interrupt vector : 25h (interrupt no in AL) Terminate & stay resident : 31h (size of program in DX)


Microprocessor Interfacing Laboratory Second Year computer Engineering

the heap. A small heap must bef) Allocate memory from the heap

e used by programs to request sysoccurs when a program calls an

instruction is

HEAP

STACK

DATA

CODE

MS-DOS TSR mapHigh memory

64k blockAddressableFrom DS

Low memory

If a TSR is created in assembly language, the programmer has exact control over the use ofmemory and can omit the heap area and place the initialization code at the end of thesegment (where It can be released after initialization) Variables required by MS-DOSinterrupt handlers must be placed at low memory tie beginning of the code segment.

If a TSR is created in C, the small-memory model must be used Because of the severememory limitations, the programmer should not use C allocation functions (such as mallocand calloc), as these add to assigned because some Clibrary routines (such as fprint .

12.4.2 Software Interrupt Software interrupts ar tem services A software interrupt interrupt routine using the

INT instruction. The format of the INT

INT interrupt number.

The 8086 treats this interrupt number in the same way as the interrupt numbergenerated by a hardware device.

We have already seen a number of examples of this using INT 21h.

How program worksA time representation is 00.00:00

Three stepso obtains the current time (procedure GET TIME)o converts the hours, minutes ,and seconds-into ASCII digits (ignore the

fractions of seconds)o display the time and terminates

INT 0AH:-real time clock controller. Time of Day: allows a program to get and set thetimer tick count.

This interruption allows access to system's clock, for reading and setting the time. Time Of Day



Function: - AH = 02h: - READ Time Input:

o None Output: CF = 0, CF=1- Clock not operating

o CH = hours (0 - 23)o CL = minutes (0 - 59)o DH = seconds (0 - 59)o DL = 1/100 seconds (0 - 99)

rains the time: hours, minutes, seconds, and hundredths of seconds

The hour is represented as units; one unit has 55ms. When the system is on the number ofunit increases every 55ms.For AT class computers through this interruption BIOS gives access to system's RTC. TheRTC run even when the computer is off because of the battery on mainboard. It uses amemory segment from CMOS to store the time. This memory segment is rewritten every55ms without using the microprocessor.

INT 21h, Function 25h Set Interrupt Vector

Store interrupt vector into vector tableo Input:

AH = 25h,AL. = Interrupt number.DS: DX = interrupt vector

o Output:NoneThe procedure SETUP_INT in program saves an old interrupt vector and sets up a new vectorIt gets the interrupt number in AL, a buffer to save the old vector at aside, and a buyer containing thenew interrupt vector at DS:SIBy reversing the two buffers, SETUP_ INT can also be used to restore the old vector

Move CursorInput: e.g.:- 2140o DH = new cursor row (0-24)o DL = new cursor column (0-79 for 80x25 mode)

Output: none

INT 21h: Function 35h

Terminates execution of the currently executing program, passing a return code to theparent process, but reserves part or all of the program's memory so that it will not beoverlaid by the next transient program to be loaded.

Call with:AH = 31H, AL = return code, DX = amount of memory to reserve (in paragraphs)



by time read function.

RAMond value to video RAM

Returns: NothingExample:Exit with a return code of 1 but stay resident, reserving 16 KB of memory starting at theprogram segment prefix of the process.

MOV AH, 31H ; function numberMOV AL, 1 ; return code for parentMOV DX, 0400H ; paragraphs to reserveINT 21H ; transfer to MS-DOS

ORG: - Sets the current origin to a new value.

For example: ORG 0100h tells the assembler to assemble all subsequent code ' startingat address 0100h

DD: - allocates and initializes double word of storage.

12.5 Algorithm:1. Start2. Write initialization routine3. Write Resident routine4. End

Resident Routine1. Push all register to sick2. Read time from clock chip3. Set address of video RAM4. Set specific offset in video5. Transfer hour, minute & sec6. Pop all register values7. Transfer control to original service routine address

Initialization Routine1. Read Interrupt vector address of int_08h (clock interrupt).2. Save that 32 bit address3. Replace address of int_08h in IVT by Resident Routine4. Make the routine resident using DOS function.

12.6 Assignment Questions:1. What is TSR? Explain the Structure of TSR with suitable example.2. How it is made Resident in the memory? Can we remove it? If yes how?

12.7 Oral Questions:1. Explain the Instructions used in the program.2. Which assembler directives are used in the program?3. Where interrupt vector table of 8086 is? Is it in the RAM or ROM?4. What is the use of Interrupt vector table of 8086 microprocessor?5. What is interrupt in 8086?6. What is interrupt service routine?

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and keyboard INT in TSRH in TSR.

essed, the CPU must be notified


Assignment 12(OR)

Problem Definition:Write a TSR program in 8086 ALP to implement Screen Saver. Screen Savershould get activated if the keyboard is idle for 7 seconds. Access the video RAMdirectly in your routine.

13.1 Prerequisite: Concept of Screen Saver

13.2 Learning Objectives: Implementation Screen Saver application Using TSR

13.3 New Concepts: Applying the counter Applying the INT 10

13.4 TheoryHardware Interrupt Whenever a key is pr to read a key code into the

keyboard buffer The general hardware interrupt goes like this: a device that needs service sends an interrupt request signal to the processor

o The CPU suspends the current task aid transfers control to an interruptroutine.

o The interrupt routine services the hardware device by performing some i/0operation.

o Control is transferred back to the original executing task at the point whereit was suspended.

Interrupt 9 - Keyboard: generated by the keyboard whenever a key is pressed orreleasedo The service routine reads a scan code and stores it in the keyboard buffer.

Acknowledging an Interrupt Because an interrupt signal may come at any time, the CPU checks for the signal

after executing each instruction. On detecting the interrupt signal, the CPU acknowledges it by sending an interrupt

acknowledge signal. The interrupting device responds by sending an eight-bit number on the data bus,

called an interrupt number Each device uses a different interrupt number to identify its own service routine.



256 colors. 320x200 pixels. 1 pag

position.

This process is called hand-shaking

Transferring to an Interrupt Routine The process is similar to a procedure call Before transferring control to the interrupt routine, the CPU first saves the address

of the next instruction on the stack; this is the return address The CPU also saves the FLAGS register on the stack; this ensures that the status of

the suspended task will be restored. It is the responsibility of the interrupt routine to restore any registers it uses

INT 10h / AH = 0 - set video mode.Input:AL = desired video mode.

These video modes are supported:

00h - text mode. 40x25. 16 colors. 8 pages.

03h - text mode. 80x25. 16 colors. 8 pages.

13h - graphical mode. 40x25. e.Example:

MOV AL, 13HMOV AH, 0INT 10H

INT 10h / AH = 2 - set cursorInput:DH = row.DL = column.BH = page number (0..7).Example:

MOV DH, 10MOV DL, 20MOV BH, 0MOV AH, 2INT 10H

INT 10h / AH = 03h - get cursor position and size.Input:BH = page number.Return:DH = row.DL = column.CH = cursor start line.CL = cursor bottom line.



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INT 10h / AH = 05h - select active video page.Input:AL = new page number (0..7).The activated page is displayed.

INT 10h / AH = 09h - write character and attribute at cursor position.Input:AL = character to display.BH = page number.BL = attribute.CX = number of times to write character.Attribute bit color table:Character attribute is 8 bit value, low 4 bits set fore color, high 4 bits set background color.

HEX BIN COLOR

13.5 Algorithm:1. Start2. Write initialization routine3. Write Resident routine4. End

Resident routineCount routine

1. Push all register to stack2. Increment count3. If count<=5 second goto step 44. Set address of video RAM5. Transfer ‘Screensaver” message to video RAM6. Pop all register values7. Transfer control to original service routine address of int_08

Key press routine1. Push all register to stack

0 0000 black1 0001 blue2 0010 green3 0011 cyan4 0100 red5 0101 magen6 0110 brown7 0111 light g8 1000 dark g9 1001 light bA 1010 light gB 1011 light cC 1100 light rD 1101 lightE 1110 yellowF 1111 white



2. Set count = 03. Pop all register values4. Transfer control to original service routine address of int_09

Initialization routine1. Read interrupt vector address of int_08h (clock interrupt)2. Save that 32 bit address3. Replace address of int_08h in IVT by count resident routine4. Read interrupt vector address of int_09h (keypress)5. Save that 32 bit address6. Replace address of int_09h in IVT by keypress resident routine7. Make both routine residents using DOS function.

13.6 Assignment Questions:1. What will happen on memory if same TSR is loaded ‘n’ time (n=15)2. Explain the difference between typical.COM program & a TSR program is a TSR.A system

program

13.7 Oral Questions:1. How does the CPU find out a device is signaling?2. How does it know which interrupt routine to execute?3. How does it resume the previous task?

microprocessor interfacing laboratory - mr.rajiv bhandari · a laboratory manual for microprocessor...

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