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M i c ro s o f t P ro j e c t O l y mp u s S e r ve r
Siamak Tavallaei/Principal Architect/Microsoft
Mark A. Shaw/Principal Hardware Engineering Manager/Microsoft
Bob Ogrey/Fellow Platform Architecture/AMD
Gopal Hegde/VP, GM, Data Center Processor Group/Cavium
Chris Bergen/Sr. Director Product Management/Qualcomm Technologies
March 9th, 2017
• Project Olympus Modular Architecture
• Collaborative work with Industry CPU Leaders
• US1-Xeon: Project Olympus 1U Server Motherboard, based on a dual-socket x86 CPU Platform from Intel
• US1-”Naples”: A Motherboard and Server Design around dual-socket x86 CPU on “Naples” Platform from AMD
• US1-ThunderX2: A Motherboard and Server Design around dual-socket ARM64 ThunderX2 SoC from Cavium
• US1-Centriq: A Motherboard and Server Design around single-socket ARM64 Centriq™ SoC from Qualcomm
PROJECT OLYMPUS SERVERS
Talk Outline
PROJECT OLYMPUS BASE
PROJECT OLYMPUS MODULAR ARCHITECTURE
Establishes a baseline for cloud-scale standard deployment
Datacenter management, power, cooling, performance
NEW MOTHERBOARDS
DROP IN OR ADAPT TO PROJECT OLYMPUS UNIVERSAL SERVER CHASSIS
US1-”Naples” US1-ThunderX2 US1-Centriq
Mark A. Shaw
Principal Hardware Engineering Manager, Microsoft
Mark A. Shaw is a Principal Hardware Engineering Manager for Microsoft’s Cloud + Enterprise Division. Mark and his team are responsible for specification development and design execution of Compute, Storage, and System hardware utilized in Azure’s cloud scale services. Prior to Microsoft Mark was a Senior Hardware Engineer at Convey Computer Corp developing FPGA based application accelerators and led a motherboard design team for enterprise servers at Hewlett Packard Corp.
Goals
• Optimized for Microsoft partners
⎻ Enables seamless world-wide deployment
⎻Optimized for hyper-scale datacenter support
⎻ Enable future technologies and faster TTM
• Optimized for OCP partners
⎻ Incorporates feedback from OCP community
⎻ Enables OCP technology
Management and Serviceability
• Emergency Power Reduction
⎻Rack level control
⎻Over-current protection
• Management 1GbE (front panel)
• Fan Control – 12 fans, 3 zones
• I2C telemetry monitoring
⎻PCIe, HSC, PSUs
• PLD/FPGA update from BMC
• Optimized for cold aisle service
OCP Support
• Changes driven by OCP feedback
⎻ ASPED BMC AST2400 with PCIe x1
⎻ VGA and NCSI cable connectors
⎻Creation of OCP NIC Mezz adapter
• OCP collaboration
⎻ AVA Quad M.2 Carrier
⎻ Enables 4TB M.2 Expansion (soon 8TB)
NIC Mezz Carrier
Quad M.2 Carrier
SpecificationsMechanical CAD Schematics &
Board Files
OCP Contributions
https://github.com/opencomputeproject/Project_Olympus
Bob Ogrey:
Fellow Platform Architecture, AMD
Bob Ogrey has over 25 years of experience in the area of design and architecture in both consumer and enterprise products and platforms. During the last 15 years of employment with AMD, Ogrey managed a team in the design of the world’s first 4 socket Opteron™ server reference platform. Current focus is working with multiple OEM/ODM server system design architectures, definitions of end customer large datacenter Web 2.0/Cloud deployments, as well as a current member of the Open Compute incubation committee.
P ro j e c t O l y mp u s a n dt h e A M D “ N a p l e s ” P l a t fo r m
▪ Early collaboration with the Olympus project spanning approximately 2 years
▪ Common system design components (Power Supply, Fans and Systems Management) to allow for
multiple CPU architectures to be utilized within the same base system
▪ Paves the path to provide choice, hopefully leading to broader industry adoption
▪ Power efficient system and platform design
▪ Modular system approach allows for tool-less access and ease of platform choice and swap
▪ AMD will create and contribute the base specification to the OCP committee(WIP)
▪ Demonstration Blade in both the AMD and Microsoft booth
“ N a p l e s ” P l a t fo r m B l o c k D i a g r a m
32ea DDR-4
Dimm’s
Total of 112
Gen-3 PCI-e 1 lanes1 Pending PCI-e Certification
2 USB Pending USB Certification
Enab l ing Hyper sca le : ThunderX2 O l ympus p la t form
Gopal Hegde
VP/GM, Data Center Processor Group
Cavium Inc.
Gopal Hegde:
VP/GM, Data Center Processor Group, Cavium Inc.
Gopal Hegde is the VP/GM of the Data Center Processor Group at Cavium, where he is responsible for the ThunderX family of processors targeting Data Center, Cloud and HPC markets. He has over 25 years of experience driving business, technology, and product innovations in silicon, software, and systems. He joined Cavium from Calxedawhere he was the COO. Prior to Calxeda, Gopal was Senior Director of Engineering at Cisco where he was responsible for UCS server platforms. He has also been GM of Intel Communications Group’s Ethernet Switching division and Chief Architect of IO for Intel Server Platforms. Gopal holds an MSECE from the University of Massachusetts at Amherst, and an ME from the Indian Institute of Science (Bangalore).
ThunderX2 Olympus Platform
• Most modular and flexible cloud server platform for
data centers
• Developed in collaboration with one of Microsoft’s
leading ODMs
• Extensive long term collaboration to optimize current
& future products for Microsoft Data Centers
• Demonstrating Web services on the Windows server
developed for Microsoft internal use
ThunderX2 Value Proposition
• World’s FIRST ARM processor with competitive single-
core & per-socket performance to high end x86
servers
• ThunderX and ThunderX2: World’s FIRST dual-socket
ARM server processors
• World class DDR memory bandwidth
• Rich IO Configurations for a range of Microsoft Cloud
Services
Microsoft endorsement for ARM ecosystem
• Vote of confidence in competitiveness of latest generation of ARM
servers like ThunderX2
• Drives accelerated adoption at other Hyperscale and High performance
compute main stream applications
• Generated enthusiasm and accelerated SW ecosystem development
S c a l i n g O l y m p u s :
A c c e l e r a t i n g I n n o v a t i o n i n a n O p e n E c o s y s t e m
Chris Bergen
Sr. Director Product Management
Qualcomm Datacenter Technologies, Inc.
Chris Bergen
Sr. Director Product Management, Qualcomm Technologies
Chris Bergen is Sr. Director of Product Management for DCG at Qualcomm Technologies in San Jose, California. Prior to Qualcomm, he was responsible for technology roadmap for the AppliedMicro ARM64 processor platform, along with next-generation architectures. Chris was a founder and CTO of ZettaCom, a provider of high-speed switching, network processing, and traffic management solutions, which was acquired by IDT. Chris has been involved in silicon architecture, design, and management for over 20 years, including hardware development for leading-edge networking equipment vendor Cisco Systems.
Power Supply
Design
Rack
Design
Chassis
DesignMicrosoft
Project Olympus Chassis
Project Olympus… Rack Manager, Enclosure, Universal
PDU, Motherboard etc..etc….
Open Innovation with Project OlympusBuilding Blocks for ARM-based Data Center
Single Node 1U Design
Up to 48 cores for Highly Parallelized,
Compute Applications
Compute-Memory Intensive Big Data or
Hadoop Style Cloud Applications
Modularity enables scale-out configurability
for compute/storage/network
Fits into 19” Standard Rack
Display and Demo at Microsoft Booth #A4
Microsoft Project
Olympus Chassis
Qualcomm Centriq™ 2400 Open Compute Motherboard
Right-Sizing Compute/Memory/Throughput for General Cloud Applications
Molecular Chemistry Qualcomm + Microsoft Collaborate on World’s First 10nm Server Platform to OCP
Molecular Building BlockQualcomm Centriq™ 2400 Open Compute Motherboard
Compute
1 Qualcomm Centriq 2400 Processor− Up to 48 Cores
Memory
6 DDR4 (2667MT/s) per SoC− 1 or 2 DIMMs per Channel
Half-Width 1U Standard Form Factor
Connectivity
50 Gbps NIC32 lanes of PCIe Gen 3
2 USB Connectors1GbE Ethernet PHY8 SATA ports
World’s First 10nm Server Solution
Submitted to Open Compute Project (OCP)
Dual Node 1U Design
24 DIMMs Slots
Dual-Host Shared NIC
(Supports Mellanox latest ConnectX-5)
64 lanes of PCIe Gen3
(Supports 6 Types of PCIe Riser Configurability)
6x SAS/SATA HDDs
On Display at Mellanox Booth #C23
Qualcomm Centriq™ 2400
Open Compute Motherboard
Innovating with Qualcomm Centriq™ 2400 Open Compute Motherboard
Qualcomm Reference Evaluation Platform (1U)
Modularity Enables Configurability
Qualcomm Reference Evaluation Platform
Open Compute Motherboard
+ Acceleration
Open Compute Motherboard
+ NVMe Farm
Open Compute Motherboard
+ Storage
− Single Node− 1 PCIe x16− GPU or FPGA
− Single Node− 1 PCIe x16− 20 NVMe SSDs
− Dual Node− 16 2.5” SATA HDD− 2 NVMe SSDs− 1 Multi-Host NIC
Innovating with Qualcomm Centriq™ 2400 Open Compute Motherboard
Conceptual Designs*: Modular Configurability for Workload Applications
*Based on Qualcomm Centriq™ 2400 Reference Evaluation Platform
From Development to Enablement: Ecosystem MaturesOS & Firmware Running Today on Qualcomm Reference Evaluation Platform
Qualcomm Centriq™ 2400 Open Compute Motherboard
BIOS / BMC
Enterprise Linux Serverfor ARM Development Preview
CentOS 7
OS
Aptio-V© BIOS
MegaRAC BMC
Ubuntu 16.04.3
Compilers/
MiddlewareGCC LLVM Java
Qualcomm Centriq™
2400
ARM. The Atomic Unit of Change.
Qualcomm Centriq is a product of Qualcomm Datacenter Technologies, Inc.
World’s first 10nm Server
Processor
Industry’s most advanced
process node
Up to 48 cores
Qualcomm® Falkor™ CPU:
Microarchitecture based on
ARMv8
Purpose-built for cloud
datacenter applications
• As contributors to an open-source hardware community and to provide differentiated value, we have collaborated with Intel, AMD, Cavium, and Qualcomm to produce a series of Server Motherboards and Server Platforms.
• We are contributing these products/designs to OCP based on Project Olympus base specification.
MICROSOFT PROJECT OLYMPUS SERVERS
Summary
SpecificationsMechanical CAD Schematics &
Board Files
OCP Contributions
https://github.com/opencomputeproject/Project_Olympus