Microwind Lab

Microwind Tutorial

Double click on

Microwind icon

Microwind 3.1

Change background color

• To change the background color, click File → Colors… → White background.

Process Tecnology

• This showing technology using in

current design.

• The lambda units is fixed to half of

the minimum available lithography of

the technology.

• Currently is showing 5 lambda skill,

zoom in to change to 1 lambda skill.

• To change the technology process,

click File → Select Foundry, and

select the design that you want.

Palette

• The palette is located in the

lower right corner of the

screen. A red color

indicates the current layer.

NMOS Transistor

• Click on the polysilicon on palette first to make sure in polysilicon layer.

• Than, fix the first corner of the box with the mouse. While keeping the mouse button pressed, move the mouse to opposite corner of the box. Release the button. This creates a box in polysilicon layer as shown. The box width should not be inferior to 2λ, which is the minimum width of the polysilicon box.

• Next to draw the n+ diffusion. Change the current layer into n+ diffusion by a click on the palette of the Diffusion n+ button. Make sure that the red layer is now the n+ diffusion. Draw a n-diffusion box at the bottom of the drawing. N-diffusion box is represented in green. The intersection between diffusion and polysilicon creates the channel of the nMOS device.

2D view of the transistor.

• Click on icon to access process simulation.(Simulation → Process section in 2D ). The cross section is given by a click of the mouse at the first point and the release of the mouse at the second point.

• In the example, three nodes appear in the cross section of the n-channel MOS device: The gate (red), the left diffusion called source (green) and the right diffusion called drain (green), over a substrate (gray). A thin oxide called the gate oxide isolated the gate.

MOS characteristic• Click on the MOS

characteristic icon. It appear Id/Vd static characteristic of the nMOS device. The MOS size (width and length) has a strong influence on the value of the current. A high gate voltage (Vg=1.2V) corresponds to the highest Id/Vd curve. For Vg =0; no current flow.

Dynamic MOS behaviour

Analog simulation

• Click on Simulate → Start Simulation the

timing diagram of the nMOS device

appear as shown below.