mipi alliance disco specification for soundwire, v1€¦ · soundwire. sm. version 1.0 10 november...

Copyright © 2017 MIPI Alliance, Inc. All rights reserved.

Confidential

Discovery And Configuration (DisCoSM) Specification for

SoundWireSM

Version 1.0

10 November 2016

MIPI Board Adopted 28 March 2017

This document is a MIPI Specification. MIPI member companies’ rights and obligations apply to this MIPI Specification as defined in the MIPI Membership Agreement and MIPI Bylaws. Further technical changes to this document are expected as work continues in the Software Working Group.

DisCo Specification for SoundWire Version 1.0 10-Nov-2016

ii Copyright © 2017 MIPI Alliance, Inc. All rights reserved. Confidential

NOTICE OF DISCLAIMER The material contained herein is not a license, either expressly or impliedly, to any IPR owned or controlled by any of the authors or developers of this material or MIPI®. The material contained herein is provided on an “AS IS” basis and to the maximum extent permitted by applicable law, this material is provided AS IS AND WITH ALL FAULTS, and the authors and developers of this material and MIPI hereby disclaim all other warranties and conditions, either express, implied or statutory, including, but not limited to, any (if any) implied warranties, duties or conditions of merchantability, of fitness for a particular purpose, of accuracy or completeness of responses, of results, of workmanlike effort, of lack of viruses, and of lack of negligence. All materials contained herein are protected by copyright laws, and may not be reproduced, republished, distributed, transmitted, displayed, broadcast or otherwise exploited in any manner without the express prior written permission of MIPI Alliance. MIPI, MIPI Alliance and the dotted rainbow arch and all related trademarks, tradenames, and other intellectual property are the exclusive property of MIPI Alliance and cannot be used without its express prior written permission. ALSO, THERE IS NO WARRANTY OF CONDITION OF TITLE, QUIET ENJOYMENT, QUIET POSSESSION, CORRESPONDENCE TO DESCRIPTION OR NON-INFRINGEMENT WITH REGARD TO THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT. IN NO EVENT WILL ANY AUTHOR OR DEVELOPER OF THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT OR MIPI BE LIABLE TO ANY OTHER PARTY FOR THE COST OF PROCURING SUBSTITUTE GOODS OR SERVICES, LOST PROFITS, LOSS OF USE, LOSS OF DATA, OR ANY INCIDENTAL, CONSEQUENTIAL, DIRECT, INDIRECT, OR SPECIAL DAMAGES WHETHER UNDER CONTRACT, TORT, WARRANTY, OR OTHERWISE, ARISING IN ANY WAY OUT OF THIS OR ANY OTHER AGREEMENT, SPECIFICATION OR DOCUMENT RELATING TO THIS MATERIAL, WHETHER OR NOT SUCH PARTY HAD ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. Without limiting the generality of this Disclaimer stated above, the user of the contents of this Document is further notified that MIPI: (a) does not evaluate, test or verify the accuracy, soundness or credibility of the contents of this Document; (b) does not monitor or enforce compliance with the contents of this Document; and (c) does not certify, test, or in any manner investigate products or Services or any claims of compliance with the contents of this Document. The use or implementation of the contents of this Document may involve or require the use of intellectual property rights (“IPR”) including (but not limited to) patents, patent applications, or copyrights owned by one or more parties, whether or not Members of MIPI. MIPI does not make any search or investigation for IPR, nor does MIPI require or request the disclosure of any IPR or claims of IPR as respects the contents of this Document or otherwise. Questions pertaining to this document, or the terms or conditions of its provision, should be addressed to: MIPI Alliance, Inc. c/o IEEE-ISTO 445 Hoes Lane Piscataway, NJ 08854 Attn: Board Secretary

Version 1.0 DisCo Specification for SoundWire 10-Nov-2016

Copyright © 2017 MIPI Alliance, Inc. iii All rights reserved. Confidential

Contents

Figures ............................................................................................................................... iv

Tables ...................................................................................................................................v

Release History ................................................................................................................. vi 1 Introduction .................................................................................................................1

1.1 Scope ............................................................................................................................... 1 1.2 Purpose ............................................................................................................................ 1

2 Terminology .................................................................................................................2 2.1 Use of Special Terms ....................................................................................................... 2 2.2 Definitions ....................................................................................................................... 2 2.3 Abbreviations ................................................................................................................... 3 2.4 Acronyms ......................................................................................................................... 3

3 References ....................................................................................................................4

4 Technical Overview .....................................................................................................5

5 SoundWire DisCo Definition ......................................................................................6 5.1 SoundWire DisCo Descriptors ......................................................................................... 6

5.1.1 Controller Descriptors .................................................................................................. 8 5.1.2 Master Descriptors ........................................................................................................ 9 5.1.3 Slave Device Descriptors ........................................................................................... 11

5.2 Lane Mapping Example ................................................................................................. 24 5.3 ASL Example ................................................................................................................. 25


iv Copyright © 2017 MIPI Alliance, Inc. All rights reserved. Confidential

Figures

Figure 1 SoundWire Driver Architecture Example .......................................................................... 5

Figure 2 Controller/Master/Slave Example Hierarchy ..................................................................... 7

Figure 3 Lane Mapping Example ................................................................................................... 24


Copyright © 2017 MIPI Alliance, Inc. v All rights reserved. Confidential

Tables

Table 1 Properties for a SoundWire Controller ................................................................................ 8

Table 2 Optional Properties for a SoundWire Master ....................................................................... 9

Table 3 Slave Device Descriptors _ADR Encoding for a SoundWire DeviceObject ..................... 11

Table 4 Optional _DSD Properties for a SoundWire Slave Device................................................ 12

Table 5 Required _DSD Properties for a Multi-Lane SoundWire Slave Device ............................ 15

Table 6 DP0 _DSD Properties for a SoundWire Slave Device ...................................................... 16

Table 7 _DSD DP0 BRA Mode Properties ..................................................................................... 18

Table 8 _DSD DPn Audio Port Config Properties ......................................................................... 19

Table 9 _DSD Port Audio Mode Properties ................................................................................... 22

Table 10 Property Keys for Lane Mapping Example ..................................................................... 24


vi Copyright © 2017 MIPI Alliance, Inc. All rights reserved. Confidential

Release History

Date Version Description

2017-03-28 v1.0 Initial Board adopted release.


Copyright © 2017 MIPI Alliance, Inc. 1 All rights reserved. Confidential

1 Introduction This Specification defines a Discovery and Configuration (DisCo) mechanism for MIPI SoundWire 1

[MIPI01] Devices (Controllers, Masters, and Slaves) based on the MIPI Alliance Specification for 2

Discovery and Configuration (DisCo) [MIPI02], a uniform ACPI-based [ACPI01] software architecture for 3 enumerating Controllers, Busses, and Devices that support the MIPI Alliance interface Specifications. 4

The MIPI DisCo architecture is targeted to support a variety of Device types such as Camera, Display, 5

Audio, Sensor, Storage, etc. as found in a typical smartphone, tablet, or similar mobile appliance. These 6

Specifications are intended for use by system firmware/software developers addressing MIPI-based 7

systems. Implementers are encouraged to check the MIPI Alliance public web site [MIPI04] for available 8 reference code. 9

1.1 Scope The Specification defines the MIPI DisCo mechanism for MIPI SoundWire [MIPI01]. 10

1.2 Purpose This Specification provides an ACPI-based description mechanism that can be used to describe any 11

allowable implementation of SoundWire Masters, Slaves, and/or Controller in a system to be exposed via 12 the MIPI DisCo Specification [MIPI02]. 13


2 Copyright © 2017 MIPI Alliance, Inc. All rights reserved. Confidential

2 Terminology

2.1 Use of Special Terms The MIPI Alliance has adopted Section 13.1 of the IEEE Standards Style Manual, which dictates use of the 14 words “shall”, “should”, “may”, and “can” in the development of documentation, as follows: 15

The word shall is used to indicate mandatory requirements strictly to be followed in order 16

to conform to the Specification and from which no deviation is permitted (shall equals is 17 required to). 18

The use of the word must is deprecated and shall not be used when stating mandatory 19 requirements; must is used only to describe unavoidable situations. 20

The use of the word will is deprecated and shall not be used when stating mandatory 21 requirements; will is only used in statements of fact. 22

The word should is used to indicate that among several possibilities one is recommended 23

as particularly suitable, without mentioning or excluding others; or that a certain course 24

of action is preferred but not necessarily required; or that (in the negative form) a certain 25 course of action is deprecated but not prohibited (should equals is recommended that). 26

The word may is used to indicate a course of action permissible within the limits of the 27 Specification (may equals is permitted to). 28

The word can is used for statements of possibility and capability, whether material, 29 physical, or causal (can equals is able to). 30

All sections are normative, unless they are explicitly indicated to be informative. 31

2.2 Definitions Address (_ADR): ACPI-defined object providing a value used to correlate an ACPI DeviceObject with an 32

addressable and discoverable entity on a Bus. _ADR value encoding is Bus-specific. 33

Augmented Device Descriptor: Additional Device information that is not provided from the Device itself, 34

yet is needed by the Device or Bus driver in order to properly configure and use the Device. 35

Bus: Logical interconnect whereby MIPI Devices are connected to other MIPI or non-MIPI Devices and/or 36 Controllers. For SoundWire, this may also be called a Link. 37

Controller: An interconnect interface Device that allows host software to interact with SoundWire 38

Masters. A Controller may contain one or more Masters. 39

Device: Embodiment of logic that implements a specific function. A Device may be a Master, a Controller, 40

or a Slave. 41

Device Descriptor: An ACPI Object [ACPI01] that describes properties of a hardware Device. 42

Device ID: A value assigned by the Device manufacturer that uniquely identifies a Device. The Device ID 43

format is defined by the respective MIPI Bus interface specification. 44

Full Device Descriptor: Complete descriptions of Devices that cannot be discovered through any other 45

standard Bus enumeration mechanism. 46

Link: Physical interconnect between two or more SoundWire Devices. 47

Manufacturer ID: A value assigned by MIPI Alliance that uniquely identifies a Device manufacturer. See 48

<http://mid.mipi.org> [MIPI03]. 49

Master: A Device that generates synchronizing and control information for all other Devices on a 50

SoundWire Bus, typically controlled by Software. A Master Device is accessed by the host by means of the 51 SoundWire Controller. 52

http://mid.mipi.org/



Slave: A SoundWire Device that responds to the control information on a SoundWire Bus or Link. 53

2.3 Abbreviations e.g. For example (Latin: exempli gratia) 54

i.e. That is (Latin: id est) 55

2.4 Acronyms ACPI Advanced Configuration and Power Interface Specification [ACPI01] 56

ASL ACPI Source Language [ACPI01] 57

BRA Bulk Register Access 58

HID ACPI Hardware ID [ACPI01] 59



3 References [ACPI01] ACPI Specification, Version 6.1, 60

http://www.uefi.org/sites/default/files/resources/ACPI_6_1.pdf, UEFI Forum, January 61 2016. 62

[ACPI02] _DSD (Device Specific Data) Implementation Guide, Version 1.1, 63

http://www.uefi.org/sites/default/files/resources/_DSD-implementation-guide-toplevel-64 1_1.htm, UEFI Forum, August 2015. 65

[MIPI01] MIPI Alliance Specification for SoundWire, Version 1.1, MIPI Alliance, Inc., 22 August 66

2016. 67

[MIPI02] MIPI Alliance Specification for Discovery and Configuration (DisCo), Version 1.0, MIPI 68

Alliance, Inc., 28 December 2016. 69

[MIPI03] MIPI Alliance, Inc., “MIPI Alliance Manufacturer ID Page”, http://mid.mipi.org, last 70

accessed 27 March 2017. 71

[MIPI04] MIPI Alliance, Inc., “MIPI Alliance Public Web Site”, http://mipi.org, last accessed 27 72

March 2017. 73

http://www.uefi.org/sites/default/files/resources/_DSD-implementation-guide-toplevel-1_1.htm

http://www.uefi.org/sites/default/files/resources/_DSD-implementation-guide-toplevel-1_1.htm

http://mipi.org/



4 Technical Overview This Specification defines the MIPI DisCo mechanism for Devices conforming to the MIPI Alliance 74 Specification for SoundWire [MIPI01]. 75

In addition to the requirements stated in this Specification, all requirements given in the MIPI Alliance 76 Specification for Discovery and Configuration (DisCo) [MIPI02] shall also be followed. 77

Figure 1 shows an example of how software Controller and Slave drivers interact in conjunction with the 78

ACPI Descriptors defined in Section 5 and the sample in Section 0. This Specification only lists a set of 79

properties defining the interface between Master and Slave kernel drivers and an ACPI subsystem, and not 80

the Bus driver API which would be OS-specific. It is expected however that the Bus driver API definition 81 would reflect most of the properties defined in this Specification. 82

The SoundWire Bus driver is in charge of clock management, bandwidth allocation, and scaling, as well as 83

transport enablement. This is a hardware-agnostic core infrastructure. 84

It is possible for a software-addressable Controller to contain multiple SoundWire Bus Masters. While 85

permissible, this Specification does not describe how such an implementation should work, other than 86 providing an addressing mechanism (_ADR) to support Slaves on separate Links. See Table 3 for details on 87

this encoding. 88

The SoundWire Master driver is specific to a hardware implementation of the SoundWire Master interface. 89

It receives commands from the Bus driver and translates them into hardware implementation-specific 90 configurations. 91

The SoundWire Slave drivers register with the Bus driver, and provide support for non-standard functional 92 parts typically controlled by implementation-defined registers in SoundWire Slave chips (see Section 5.2). 93

The Master and Slave drivers register with the ACPI subsystem, and will be loaded when a match is found 94

between an enumerated Device and a DeviceObject in the ACPI namespace. Both the Master and Slave 95 drivers register with the Bus driver, and inform it of the capabilities extracted from _DSD properties. 96

An alternate implementation would be to rely on the ACPI matching mechanism only. The registration with 97

the Bus driver would be identical, but the properties would be extracted with a different mechanism than 98 the _DSD solution. Such mechanisms are beyond the scope of this Specification. 99

SoundWire Master Device

Driver

child_of child_of child_of child_of

SoundWireBus

Driver

Reg

iste

r

Register

Not

ifica

tions

Commands

Respo

nses

Notifica

tions

ACPISubsystem

Con

figur

atio

ns

Probe

Read _DSD Properties

Probe

Read _DSD Properties

SdW1 Slave

DeviceDriver

SdW2Slave

DeviceDriver

SdW3 Slave

DeviceDriver

SdW4 Slave

DeviceDriver

100

Figure 1 SoundWire Driver Architecture Example



5 SoundWire DisCo Definition

5.1 SoundWire DisCo Descriptors SoundWire Controllers may be enumerable by the parent Bus enumeration mechanism. Any additional 101

SoundWire Controller information shall be provided through ACPI, using an Augmented Device 102

Descriptor. If no such enumeration mechanism exists, the Controller shall be described through ACPI using 103

a Full Device Descriptor. SoundWire Slaves shall be enumerated according to the SoundWire Specification 104

[MIPI01]. Any required Augmented Device Descriptors shall be located within the ACPI Namespace scope 105

of the Controller or Slave. Properties for Devices which are described using the Device Specific Data 106 object (_DSD) shall adhere to the _DSD Implementation Guide Version 1.1 or later [ACPI02]. Vendor-107

specific properties for all types of Devices may optionally be used as well, in addition to the properties 108 defined within this Specification. 109

_DSD properties defined within this Specification are not OS-specific, nor limited to any particular 110

firmware implementation; while ACPI is typically implemented within a UEFI framework, it is not limited 111

to UEFI. Additionally, properties defined within this Specification are portable to other non-ACPI software 112

environments (such as DeviceTree). All MIPI-defined properties using the DisCo mechanism use the prefix 113 mipi- for each property defined. All MIPI SoundWire-defined properties additionally include a second 114

prefix of sdw-. Therefore, all SoundWire DisCo properties begin with mipi-sdw-. Vendor-defined 115 properties shall not use the mipi- prefix. 116

The mipi-sdw-*-supported properties convey two meanings when set to False: 117

1. The hardware does not support a feature. 118

2. The hardware supports a feature, but the platform configuration requires a feature to be disabled. 119

This can be the case, for example, for the master-clock-stop-mode1-supported 120

property. If the latency due to re-enumeration when the clock restarts is not compatible 121 with the platform requirements, then the property should be set to False so that the Bus 122

driver only uses ClockStopMode0. If some of the Slave devices require the clock to be 123

on at all times for a specific use case, even in the absence of data traffic, then the property 124 master-clock-stop-mode0-supported should be set to False to keep the link 125

active. 126

Note that the software is not under any obligation to strictly comply with the behavior specified by the 127

property values. OS drivers may implement additional quirks for specific platforms that override the DisCo 128 property values defined in this document. 129



Figure 2 shows the possible relationships between Controller, Master, and Slave Devices. 130

ControllerSlave

Master

Master

Master

Slave

Slave

Slave

Slave

Slave

Master Master

Slave

131

Figure 2 Controller/Master/Slave Example Hierarchy



5.1.1 Controller Descriptors There is no MIPI-defined architectural definition for a MIPI SoundWire Controller. Therefore, if a Full Device Descriptor is used for a Controller Device, the 132

_HID value shall use the ACPI Vendor ID of the Device manufacturer or Controller driver provider. Bus enumeration for a Controller, using the appropriate _ADR 133

object for the parent Bus, is also acceptable. A single system may incorporate multiple SoundWire Controllers. 134

Table 1 defines the list of properties that are applicable for a SoundWire Controller. Properties defined in Table 2 may also be populated within the scope of the 135 Controller, provided that those properties apply to all Masters within this Controller. 136

Table 1 Properties for a SoundWire Controller 137

Property String Property

Data Type

Description

mipi-sdw-sw-interface-revision Integer

Version of this Specification whose Property definitions apply. This is intended to guard against any potential changes to the property definitions in future versions of this Specification (32-bit value). Bits 31-16: (Upper word) Major version number Bits 15-0: (Lower word) Minor version number This entry shall be provided if any other property entry within this structure is populated. Example: 0x00010000 indicates that the contained properties shall be interpreted according to the property definitions given in version 1.0 of this Specification.

mipi-sdw-master-count Integer If present, this property describes the number of Masters present on this Device. For a Controller where this property is absent, the expected Master count is 1.

mipi-sdw-master-<n>-subproperties String See Note 1

String encoding of a NameString of an object resolving to a package describing properties for each master. The number of these entries shall be equal to the value of mipi-sdw-master-count See Table 2 for package contents.

Note: 138

1. This property is exposed using the _DSD Hierarchical Extension mechanism described within the _DSD Implementation Guide [ACPI02]. The formatting requirements specified by this external document may change, in a backwards-compatible manner. Therefore, any manner described by [ACPI02] to describe properties or sub-properties is permitted.



5.1.2 Master Descriptors Table 2 defines the list of properties that are applicable for a SoundWire Master Device, or a SoundWire Slave Device containing one or more Masters. If these 139 properties are exposed at the Controller level, then they apply to all Masters within that Controller. 140

If any Slave contains one or more Masters, the properties defined in this section can also be included within the _DSD hierarchy of the Slave DeviceObject, and 141

applies to all Masters within that Slave Device. 142

Table 2 Optional Properties for a SoundWire Master 143

Property String Property Data Type Description



mipi-sdw-clock-stop-mode0-supported Integer (Boolean)

True (nonzero): Clock-stop mode0 is supported on this Device.

mipi-sdw-clock-stop-mode1-supported Integer (Boolean)

True (nonzero): Clock-stop mode1 is supported on this Device.

mipi-sdw-max-clock-frequency Integer See Note 1

Maximum Bus clock in Hz for this Master. This is the maximum usable Bus clock frequency for this platform.

mipi-sdw-supported-clock-gears Package A package containing one integer entry for each supported gear, e.g. {1, 2, 3, 4, 8, 16}. Some Masters may only support a single gear, or powers of two.

mipi-sdw-clock-frequencies-supported Package A package containing one integer entry for each clock frequency (in Hz) supported. This property is an alternate way of representing Bus configurations if clock gears are not relevant in a system.

mipi-sdw-default-frame-rate Integer See Note 1

Controller default frame rate in Hz. The frame rate defines the control bandwidth on a SoundWire Bus.

mipi-sdw-default-frame-row-size Integer See Note 1

Number of rows, 48 – 256 (inclusive). Not all values are valid, see Table 19 of the SoundWire Specification [MIPI01]



Property String Property Data Type Description

mipi-sdw-default-frame-col-size Integer See Note 1

Number of columns, 2 – 16 (inclusive). Only even numbers are valid.

mipi-sdw-dynamic-frame-shape Integer (Boolean)

False (0): The Bus driver may not change the frame shape dynamically, and shall only use the default/initial setting.

mipi-sdw-command-error-threshold Integer

Number of times that software may retry sending a single command. Once this threshold has been reached, an error condition exists and the command should not be retried. Note that a value > 0 may impact synchronization, SSP generation, and compliance with requirement {1804} in the SoundWire Specification [MIPI01].

Note: 144

1. The values pertaining to these property keys are interrelated, and shall be defined such that they are compatible with each other.



5.1.3 Slave Device Descriptors SoundWire Slave Devices shall use Augmented Device Descriptors where necessary. The _ADR value encoding is as follows: 145

Table 3 Slave Device Descriptors _ADR Encoding for a SoundWire DeviceObject 146

Field Bits Description DeviceID 47:0 DeviceID Encoding as described in the SoundWire 1.0 Specification [MIPI01] at Table 80

LinkID 51:48 Zero-based SoundWire Link number. This field is used in the case where a Controller has multiple SoundWire Bus Master Devices, each producing a separate SoundWire Link. For single-Link Controllers, this value shall be 0x0. For a Slave that also contains one or Masters, Slave children LinkID numbering restarts at zero; all LinkID values are relative to the immediate parent Device.

Reserved 63:52 Reserved, set to 0x000

A SoundWire Slave Device Descriptor shall contain a Device-Specific Data (_DSD) object. 147

The SoundWire Slave Device _DSD contents are described as follows. Note that data types are ASL types: integers are 64-bit, but may be optimized by the ASL 148

compiler into smaller types or constants (for Ones/Zero). 149



Table 4 defines the list of properties that are applicable for a SoundWire Slave Device.

Table 4 Optional _DSD Properties for a SoundWire Slave Device 150


Data Type

Description



mipi-sdw-wake-up-unavailable Integer (Boolean)

True (nonzero): Wake-up events from this Device are not supported or allowed.

mipi-sdw-test-mode-supported Integer (Boolean)

True (nonzero): Test mode is supported on this Device.

mipi-sdw-clock-stop-mode1-supported Integer (Boolean) True (nonzero): Clock-stop mode1 is supported on this Device.

mipi-sdw-simplified-clockstopprepare-sm-supported Integer (Boolean)

True (nonzero): This Slave only supports the simplified clock stop prepare state machine, and will always be ready for a clock stop transition.

mipi-sdw-clockstopprepare-timeout Integer

Slave-specific timeout in milliseconds. This value indicates the worst-case latency of the Clock Stop Prepare state machine transitions. After receiving a successful clock stop prepare/de-prepare command, the Slave should complete the operation before the expiration of the timeout. Software may poll for completion periodically, or wait for this timeout value. If the requested action has not completed at the end of this timeout, software shall interpret this as an error condition. It is recommended that this value be lower than 300 ms. This property shall not be used when a Slave implements a Simplified ClockStopPrepare state machine.




Data Type

Description

mipi-sdw-slave-channelprepare-timeout Integer

Slave-specific Timeout value in milliseconds. This value indicates the worst-case latency of the Channel Prepare state machine transitions. After receiving a successful channel prepare/de-prepare command, the Slave should complete the operation before the expiration of the timeout. Software may poll for completion periodically or wait for this timeout value. If the requested action has not completed at the end of this timeout, software shall interpret this as an error condition. It is recommended this value be lower than 30 ms, in order to comply with typical operating system certification requirements for cold boot latency for the audio subsystem. The timeout value is assumed to be the same for all channels in all ports. This property shall not be used when a Slave implements a Simplified ChannelPrepare state machine.

mipi-sdw-clockstopprepare-hard-reset-behavior Integer (Bitmap)

Bit 0: When set, the Slave keeps the status of the SlaveStopClockPrepare state machine (P=1 SCSP_SM) after exit from clock-stop mode1, and needs to be de-prepared by software. Otherwise, the Hard Reset sequence results in the Slave losing its SCSP_SM status when exiting clock-stop mode1 – in this case, it is not necessary for software to send a set of commands to de-prepare the Slave. All other bits: Reserved. If this property is not present, the default behavior is assumed.

mipi-sdw-highPHY-capable Integer (Boolean) True (nonzero): Device is HighPHY capable.

mipi-sdw-paging-supported Integer (Boolean) True (nonzero): Device implements paging registers SCP_AddrPage1 and SCP_AddrPage2.

mipi-sdw-bank-delay-supported Integer (Boolean)

True (nonzero): Device implements bank delay/bridge support registers SCP_BankDelay and SCP_NextFrame.

mipi-sdw-port15-read-behavior Integer

Slave behavior when the Master attempts a Read to the Port15 alias. 0: Command_Ignored 1: Command_OK, data is logical OR of all registers All other values: Reserved.

mipi-sdw-master-count Integer If present, this property describes the number of Masters present on this Slave. For a Slave containing one or more Masters, this property is Required and its value shall not be Zero.




Data Type

Description

mipi-sdw-link-<n>-subproperties String See Note 1

String encoding of a NameString of an object resolving to a package describing properties for each Link. There is one Link per Master, therefore the number of these entries shall be equal to the value of mipi-sdw-master-count. See Table 2 for package contents.

mipi-sdw-source-port-list Integer (Bitmap)

Bitmap identifying source ports on the Device, including ports that are also sinks. Bit 0: Shall be set to zero Bit N: Set to 0b1 if Port N is source-capable

mipi-sdw-sink-port-list Integer (Bitmap)

Bitmap identifying sink ports on the Device, including ports that are also sources. Bit 0: Shall be set to zero Bit N: Set to 0b1 if Port N is sink-capable

mipi-sdw-dp-0-subproperties String See Note 1

String encoding of a NameString of an object resolving to a package describing properties for DP0. See Table 6 for package contents. This property shall not be set if DP0 is not supported.

mipi-sdw-dp-<n>-source-subproperties String See Note 1

String encoding of a NameString of an object resolving to a package describing properties for source port DPn. <n> is encoded as a decimal integer within the range 1-14. See Table 8 for package contents. This property shall be present if bit <n> of the source-port-list bitmap is set. If all source ports share the same configuration, they may point to the same reference.

mipi-sdw-dp-<n>-sink-subproperties String See Note 1

String encoding of a NameString of an object resolving to a package describing properties for sink port DPn. <n> is encoded as a decimal integer within the range 1-14. See Table 8 for package contents. This property shall be present if bit <n> of the sink-port-list bitmap is set. If all sink ports share the same configuration, they may point to the same reference.

Note: 151

1. These properties are exposed using the _DSD Hierarchical Extension mechanism described within the _DSD Implementation Guide [ACPI02]. The formatting requirements specified by this external document may change, in a backwards-compatible manner. Therefore, any manner described by [ACPI02] to describe properties or sub-properties is permitted.



Table 5 describes a set of additional properties that shall be provided to describe SoundWire Slave Devices that are connected to other Devices by more than one 152 Lane. These properties are provided to describe the Lane mapping between this Slave Device and other Devices, both Master and Slave. 153

Table 5 Required _DSD Properties for a Multi-Lane SoundWire Slave Device 154


Data Type

Description



mipi-sdw-lane-<n>-mapping String

Identifier encoded as a string. This property is used by driver software to determine which Lanes are connected to Lanes on the Master or on other Slaves via a Slave Link. For Master-connected Lanes, the value shall be mipi-sdw-master-lane-<m> where <m> is an integer between 1 and 7. If there are multiple Masters in the Controller, the value <m> is defined only in the scope of the Master identified with the LinkID value (see Table 3). The information only provides information on which Lanes are connected, not how many Lanes the Master can handle. A Master Lane that is not used in a system will be identified as not connected to any Device. For Slave-connected Lanes, the value shall be mipi-sdw-slave-link-<tag> where <tag> uniquely identifies the Link in the system. <n> is encoded as an integer between 1 and 7, inclusive. Lane 0 must always be connected to the Master, and its connection is not described using this property type. See the example in Section 0 for more information on how this property is used.

mipi-sdw-lane-<n>-bus-holder Integer (Boolean)

True (nonzero): The Device behaves as Bus holder for this Lane. <n> is encoded as an integer between 1 and 7, inclusive. This property is only valid for ports where the mipi-sdw-lane-<n>-mapping points to a slave Link, and not to a Master.



Table 6 describes the property fields for data port 0, which is used for transmitting encapsulated control information using regular transport mechanisms to 155 improve or extend control bandwidth. All properties in this table are optional. 156

Table 6 DP0 _DSD Properties for a SoundWire Slave Device 157


Data Type

Description

mipi-sdw-port-max-wordlength Integer Maximum number of bits in a Payload Channel Sample, 1 – 64 (inclusive).

mipi-sdw-port-min-wordlength Integer Minimum number of bits in a Payload Channel Sample, 1 – 64 (inclusive). When using min-max properties, all values in the defined range are allowed. Use the config list in the next field if only discrete values are supported.

mipi-sdw-port-wordlength-configs Package Package containing one integer entry for each supported wordlength Example: {1, 5, 8, 16}

mipi-sdw-port-bra-mode-<m> String See Note 1

String encoding of a NameString of an object resolving to a package describing properties for a BRA mode. One entry per BRA mode, starting with mode 0. <m> is an integer. See Table 7 for package contents.

mipi-sdw-bra-flow-controlled Integer (Boolean)

Use if the Slave implementation can result in an OK_NotReady response. Implementations may either (a) re-issue the same transaction immediately, effectively performing an active loop until the Slave is ready, or (b) suspend and reschedule it later, typically using the information from Table 7 properties.

mipi-sdw-bra-imp-def-response-supported Integer (Boolean)

True (nonzero): Implementation-defined response is supported. This information may be used by a Device driver to request that a generic Bus driver forwards the response to the client Device driver.

mipi-sdw-bra-role-supported Integer One: The Slave supports initiating BRA transactions. Zero: The Slave only behaves as a BRA target and shall not initiate BRA transactions. All other values: Reserved.

mipi-sdw-simplified-channel-prepare-sm Integer (Boolean)

True (nonzero): The channel prepare sequence is not required, and the Port Ready interrupt is not supported. The same capability is assumed for all channels implemented in a Port.

mipi-sdw-imp-def-dp0-interrupts-supported Integer (Boolean)

If set, each bit i (i<3) corresponds to support for implementation-defined interrupts ImpDef i+1. This information may be used by a Device driver to register with a generic Bus driver and request that the interrupt source information be forwarded to the client Device driver. Example: If bit 0 of this Property is set to 0b1, then ImpDef 1 is supported.

mipi-sdw-imp-def-bpt-supported Integer (Boolean)

True (nonzero): Implementation-defined Payload Type is supported. This information is used to bypass the BRA protocol and may only be of interest when a Device driver is aware of the capabilities of the master controller and Slave Devices.



Note: 158




Table 7 describes the property for each Bulk Register Access mode in the DP0 Port. 159

SoundWire Slave Devices supporting the BRA protocol shall parse the payload, but may not be able to read/write data at the maximum bandwidth, and may have 160

alignment requirements or timing dependencies related to the Bus frequencies. There may be several configurations listed as BRA modes, for symmetry with the 161 Audio Modes listed in Table 9 for DPn Ports. Either bra-mode-max/min-bus-frequency properties or bra-mode-bus-frequency-configs can be used, 162

but not both. 163

Table 7 _DSD DP0 BRA Mode Properties 164


Data Type

Description

mipi-sdw-bra-mode-max-bus-frequency Integer Maximum Bus frequency of this mode, in Hz

bra-mode-min-bus-frequency Integer

Minimum Bus frequency of this mode, in Hz When using min-max properties, all values in the defined range are allowed. Use the config list in the next field if only discrete values are supported.

mipi-sdw-bra-mode-bus-frequency-configs Package Package containing one integer entry for each supported Bus frequency in that mode, in Hz. Example: {2400000, 48000000, 9600000}

mipi-sdw-bra-mode-max-data-per-frame Integer Maximum data payload, in bytes per frame excluding header, CRC, and footer. Maximum value is 470.

mipi-sdw-bra-mode-min-us-between-transactions Integer Amount of delay, in microseconds, required to be inserted between BRA transactions. Use if Slave needs idle time between BRA transactions.

mipi-sdw-bra-mode-max-bandwidth Integer Maximum bandwidth, in bytes per second (excluding header, CRCs, and footer), that can be written/read

mipi-sdw-bra-mode-block-alignment Integer Size of basic block, in bytes. The data payload size shall be an integer multiple of this basic block size. Padding/repeating of the same value is required for transactions smaller than this basic block size.



Table 8 describes the property fields for Slave Device DPn Ports – typically dedicated to audio functionality. 165

One object per port may be provided, or one object may be referenced by multiple entries described in Table 4. All properties in this table are optional. Either 166

port-max/min-wordlength properties or port-wordlength-configs may be used, however port-max/min-wordlength properties and port-167 wordlength-configs shall not be used together. 168

Table 8 _DSD DPn Audio Port Config Properties 169


Data Type

Description

mipi-sdw-port-max-wordlength Integer Maximum number of bits in a Payload Channel Sample, 1 – 64 (inclusive).

mipi-sdw-port-min-wordlength Integer Minimum number of bits in a Payload Channel Sample, 1 – 64 (inclusive). When using min-max properties, all values in the defined range are allowed. Use the config list in the next field if only discrete values are supported.

mipi-sdw-port-wordlength-configs Package Package containing one integer entry for each supported wordlength. Example: {1, 8, 16, 24} Note: This field shall not be implemented when using min- and max-wordlength entries.

mipi-sdw-data-port-type Integer

Type of Data Port. 0: Full Data Port 1: Simplified Data Port 2: Reduced Data Port (specific to version 1.1 of the SoundWire specification) Simplified Data Port is required to implement a subset of transport registers.

mipi-sdw-max-grouping-supported Integer

Maximum number of samples that can be grouped together for a full data port. This property should not be used to describe Simplified or Reduced data ports, where the required grouping is 4. 0: BlockGroupCount = 1 1: BlockGroupCount = 2 2: BlockGroupCount = 3 3: BlockGroupCount = 4

mipi-sdw-simplified-channelprepare-sm Integer (Boolean)

True (nonzero): The channel prepare sequence is not required, and the Port Ready interrupt is not supported.




Data Type

Description

mipi-sdw-port-channelprepare-timeout Integer

Port-specific timeout value in milliseconds. This value indicates the worst-case latency of the Channel Prepare state machine transitions. After receiving a successful channel prepare/de-prepare command, the slave should complete the operation before the expiration of the timeout. Software may poll for completion periodically or wait for this timeout value. If the requested action has not completed at the end of this timeout, software shall interpret this as an error condition. It is recommended this value be lower than 30 ms in order to comply with typical operating system certification requirements for cold boot latency for the audio subsystem. This property shall not be used when a Slave implements a Simplified ChannelPrepare state machine. If present, this value overrides the mipi-sdw-slave-channelprepare-timeout for this port only.

mipi-sdw-imp-def-dpn-interrupts-supported Integer (Bitmap)

If set, each bit i (i < 3) corresponds to support for implementation-defined interrupts ImpDef i+1. This information may be used by a Device driver to register with a generic Bus driver and request that the interrupt source information be forwarded to the Device driver. Example: If bit 0 of this Property is set to 0b1, then ImpDef 1 is supported.

mipi-sdw-min-channel-number Integer Used when channel numbers are consecutive inclusive.

mipi-sdw-max-channel-number Integer Used when channel numbers are consecutive inclusive. When using min-max properties, all values in the defined range are allowed. Use the config list in the next field if only discrete values are supported.

mipi-sdw-channel-number-list Package Package containing one integer entry for each available channel number. Note: This field shall not be implemented when using min- and max-channel-number entries.

mipi-sdw-channel-combination-list Package Package containing one bitmap entry for each valid channel number combination. The bitmaps shall be compatible with the channel number lists or min/max channel numbers. Example: {0x1, 0x3, 0xF} indicates that only mono, stereo, and 4-channel configurations are supported.

mipi-sdw-modes-supported Integer (Bitmap)

Bitmap identifying the types of modes supported by the Device: Bit 0: If nonzero, supports isochronous Bit 1: If nonzero, supports tx-controlled Bit 2: If nonzero, supports rx-controlled Bit 3: If nonzero, supports full asynchronous All other bits: Reserved, set to zero.




Data Type

Description

mipi-sdw-max-async-buffer Integer Number of samples that this port can buffer in asynchronous modes. The SoundWire specification only requires minimal buffering; this property is only required if the Slave implements a buffer that exceeds the SoundWire requirements

mipi-sdw-block-packing-mode Integer (Boolean)

True (nonzero): BlockPackingMode may be configured as either BlockPerPort or BlockPerChannel. False: BlockPackingMode must be set to BlockPerPort.

mipi-sdw-port-encoding-type Integer (Bitmap)

Describes the types of Payload Channel Sample encoding schemes implemented by this port. Bit 0: Two’s complement Bit 1: Sign/magnitude Bit 2: IEEE 32-bit floating point All other bits: Reserved, do not use.

mipi-sdw-port-audio-mode-<m> String See Note 1

String encoding of a NameString of an object resolving to a Package object. One entry per audio mode, starting with mode 0. See Table 9 for package contents.

Note: 170




Table 9 describes the property fields for Audio Modes. The SoundWire Specification [MIPI01] requires the Slaves to handle control and commands at speeds 171

from 24 kHz to the maximum allowed by the physical layer (typically in the order of 10MHz). However the audio functionality may not be enabled across this 172 range of frequencies. 173

If a Port Audio Mode property set is provided, it must include all information necessary to describe the mode, including Bus frequencies, sampling frequencies, 174

Channel Prepare behavior, and if more than one Mode is defined, the glitchless transition bitmap. 175

The Audio Mode properties provide additional information required for the Bus driver to manage the clock, e.g. if a Slave can only support audio functionality at 176

a single Bus frequency, then the clock scaling will have to be disabled while this Slave captures or renders audio data. Conversely if the Slave is able to transition 177

between frequencies and audio modes in a glitchless manner, then the Bus driver can manage the clock more aggressively to reduce power consumption. Slaves 178 may also require the clock to be changed first before transport is enabled, e.g. to let their internal PLLs lock. 179

The Audio Mode properties include information regarding supported sampling frequencies. The selected Bus frequency must be high enough to support the 180

desired sampling frequency. For example, an Audio Mode supporting a 48 kHz sampling frequency might require the Bus to be configured to at least 4.8 MHz, 181

whereas support for 192 kHz in another Audio Mode might only be possible with the Bus configured to 9.6 MHz. These requirements are passed from the codec 182 driver to the Bus driver in an OS-specific manner, and are outside of the scope of this Specification. 183

For Bus frequency and sampling frequency properties, either the max and min values or the config list properties may be supplied, but both shall not be supplied. 184

If using max and min properties for Bus frequency properties, max and min properties shall be used for sampling frequency properties as well, and vice versa. 185

Table 9 _DSD Port Audio Mode Properties 186


Data Type

Description

mipi-sdw-audio-mode-max-bus-frequency Integer Maximum Bus frequency of this mode, in Hz.

mipi-sdw-audio-mode-min-bus-frequency Integer

Minimum Bus frequency of this mode, in Hz. When using min-max properties, all values in the defined range are allowed. Use the config list in the next field if only discrete values are supported.

mipi-sdw-audio-mode-bus-frequency-configs Package

Package containing one integer entry for each supported Bus frequency in that mode, in Hz. Example: {2400000, 48000000, 9600000} Note: It is assumed that transitions between these configurations are seamless. If there is a limitation, then another mode should be used and the relevant bitfield in the audio-mode-glitchless-transitions property should be clear.

mipi-sdw-audio-mode-max-sampling-frequency Integer Maximum sampling frequency of this mode, in Hz.

mipi-sdw-audio-mode-min-sampling-frequency Integer

Minimum sampling frequency of this mode, in Hz. When using min-max properties, all values in the defined range are allowed. Use the config list in the next field if only discrete values are supported.




Data Type

Description

mipi-sdw-audio-mode-sampling-frequency-configs Package

Package containing one integer entry for each supported sampling frequency in that mode, in Hz. Example: {192000, 48000, 96000} Note: It is assumed that transitions between these configurations are seamless. If there is a limitation, then another mode should be used and the relevant bitfield in the audio-mode-glitchless-transitions property should be clear.

mipi-sdw-audio-mode-prepare-channel-behavior Integer

Specifies the dependencies between Channel Prepare sequence and Bus clock configuration. 0: Channel Prepare can happen at any Bus clock rate 1: Channel Prepare sequence shall happen only after Bus clock is changed to a frequency supported by this mode or compatible modes described by the next field. This may be required, e.g. when the Slave internal audio clocks are derived from the Bus clock. This property applies to all channels within this port. This property may be omitted for ports implementing a Simplified ChannelPrepare State Machine (SCPSM).

mipi-sdw-audio-mode-glitchless-transitions Integer (Bitmap)

Bitmap describing possible glitchless transitions from this Audio Mode to other Audio Modes, If only a single mode is supported, this property shall not be used. Bit n: If set to 0b1, this Audio Mode can transition to Audio Mode n without audible glitches. All non-implemented bits n: Reserved, set to zero.



5.2 Lane Mapping Example This section provides an example of how Master and Slave Lane mapping should be described for 187 SoundWire DisCo. 188

Master

Slave #1

Slave #2

Slave #3

Slave #4

0 0

0

0

0

3

2

1

1

2

3

1

2

1

3

2

1

2

slave-link-A

slave-link-B

189

Figure 3 Lane Mapping Example

For the example topology above, the following properties would be provided within the ACPI Object 190 referenced by the respective Slave DeviceObject Scope: 191

Table 10 Property Keys for Lane Mapping Example 192

Device Property Key Value

Slave #1

mipi-sdw-lane-1-mapping master-lane-3

mipi-sdw-lane-2-mapping slave-link-A

mipi-sdw-lane-3-mapping slave-link-B

Slave #2 mipi-sdw-lane-2-mapping master-lane-3


Slave #3

mipi-sdw-lane-1-mapping master-lane-2



Slave #4 mipi-sdw-lane-2-mapping master-lane-1




5.3 ASL Example The following ASL example shows how to use DisCo to describe a SoundWire Controller and child 193 SoundWire Devices for a sample topology. 194

Implementers are encouraged to check the MIPI Alliance public web site [MIPI04] for any additional or 195 updated ASL examples. 196

Note: 197

Property values shown below are merely examples, and as a result may not necessarily be 198 representative of the capabilities of any actual SoundWire Device. 199

200

Device(SWC0) { // SoundWire Controller 0, Full Device Descriptor 201

Name(_HID, "VEND0000") // sample Vendor ID- do not use 202

203

Name(_DSD, Package() { 204

ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 205

Package () { 206

Package (2) {"mipi-sdw-sw-interface-revision", 0x00010000}, // v 1.0 207

}, 208

ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), // Hierarchical Extension 209

Package () { 210

Package (2) {"mipi-sdw-link-0-subproperties", "SWM0"}, 211

// ... 212

} 213

}) // End _DSD 214

215

Name(SWM0, Package() { 216


Package () { 218


Package (2) {"mipi-sdw-clock-stop-mode0-supported", One}, 220


Package (2) {"mipi-sdw-max-clock-frequency", 9600000}, 222

Package (2) {"mipi-sdw-supported-clock-gears", 223

Package() {1, 2, 3, 4, 8, 16}}, 224

Package (2) {"mipi-sdw-command-error-threshold", 4}, 225

// ... 226

} 227

}) // End SWC0.SWM0 228 229



Device (SWS0) { // SoundWire Slave 0 230

Name(_ADR, 0x000<L><nnnnnnnnnnnn >) 231



Package () { 234



Package (2) {"mipi-sdw-simplified-clockstopprepare-sm-supported", One}, 237

Package (2) {"mipi-sdw-highPHY-capable", One}, 238

// ... 239

Package (2) {"mipi-sdw-source-port-list", 0x06}, 240

Package (2) {"mipi-sdw-sink-port-list", 0x18}, 241

}, 242


Package () { 244

Package (2) {"mipi-sdw-dp-0-subproperties", "P0SP"}, 245

Package (2) {"mipi-sdw-dp-1-source-subproperties", "S1SP"}, 246


Package (2) {"mipi-sdw-dp-3-sink-subproperties", "K3SP"}, 248

Package (2) {"mipi-sdw-dp-4-sink-subproperties", "K4SP"}, 249

} 250

}) // End _DSD 251

252

Name(P0SP, Package() { 253


Package () { 255

Package (2) {"mipi-sdw-port-max-wordlength", 16}, 256

Package (2) {"mipi-sdw-port-min-wordlength", 8}, 257

Package (2) {"mipi-sdw-bra-role-supported", One} 258

}, 259

ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), // Hierarchical Extension 260 Package () { 261

Package (2) {"mipi-sdw-port-bra-mode-0", "BRA0"}, 262

} 263

}) // End SWC0.SWS0.P0SP 264

265

Name(BRA0, Package() { 266


Package () { 268

Package (2) {"mipi-sdw-bra-mode-bus-frequency-configs", 269

Package() {2400000, 48000000, 9600000}}, 270

Package (2) {"mipi-sdw-bra-mode-max-data-per-frame", 128} 271

} 272

}) // End SWC0.SWS0.BRA0 273

274

Name(S1SP, Package() { 275


Package () { 277



} 280

}) // End SWC0.SWS0.S1SP 281



282



Package () { 285



Package (2) {"mipi-sdw-data-port-type", 0}, 288

Package (2) {"mipi-sdw-max-grouping-supported", 0}, 289

Package (2) {"mipi-sdw-modes-supported", 0x0F}, 290

}, 291


Package () { 293

Package (2) {"mipi-sdw-port-audio-mode-0", "MOD0"} 294

} 295


297

Name(MOD0, Package() { 298


Package () { 300

Package (2) {"mipi-sdw-audio-mode-bus-frequency-configs", 301

Package () {2400000, 48000000, 9600000}}, 302

Package (2) {"mipi-sdw-audio-mode-sampling-frequency-configs", 303

Package () {192000, 48000, 96000}}, 304

Package (2) {"mipi-sdw-audio-mode-prepare-channel-behavior", 0}, 305

} 306

}) // End SWC0.SWS0.MOD0 307

308

Name(K3SP, Package() { 309


Package () { 311




Package (2) {"mipi-sdw-max-grouping-supported", 0} 315 } 316

}) // End SWC0.SWS0.K3SP 317

318



Package () { 321




Package (2) {"mipi-sdw-max-grouping-supported", 0} 325

} 326


328

} // End SWC0.SWD0 329

330



Device (SWS1) { // SoundWire Slave 1 331

Name(_ADR, 0x000<L><nnnnnnnnnnnn >) 332



Package () { 335

Package (2) {"mipi-sdw-interface-revision", 0x00010000}, // v 1.0 336


Package (2) {"mipi-sdw-simplified-clockstopprepare-sm-supported", One}, 338

Package (2) {"mipi-sdw-highPHY-capable", One}, 339

// ... 340

Package (2) {"mipi-sdw-source-port-list", 0x06}, 341

Package (2) {"mipi-sdw-sink-port-list", 0x18}, 342

}, 343


Package () { 345

Package (2) {"mipi-sdw-dp-0-subproperties", "P0SP"}, 346


Package (2) {"mipi-sdw-dp-2-sink-subproperties", "S2SP"}, 348

Package (2) {"mipi-sdw-dp-3-source-subproperties", "K3SP"}, 349

Package (2) {"mipi-sdw-dp-4-sink-subproperties", "K4SP"} 350

} 351

}) // End _DSD 352

353

Name(P0SP, Package() { 354


Package () { 356



Package (2) {"mipi-sdw-bra-role-supported", One} 359

} 360

}) // End SWC0.SWS1.D0SP 361

362

Name(S1SP, Package() { 363 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), 364

Package () { 365



} 368


370





Package () { 373




Package (2) {"mipi-sdw-max-grouping-supported", 0}, 377

Package (2) {"mipi-sdw-modes-supported", 0x0F}, 378

}, 379


Package () { 381

Package (2) {"mipi-sdw-port-audio-mode-0", "MOD0"} 382

} 383


385

Name(MOD0, Package() { 386


Package () { 388

Package (2) {"mipi-sdw-audio-mode-bus-frequency-configs", 389

Package () {2400000, 48000000, 9600000}}, 390

Package (2) {"mipi-sdw-audio-mode-sampling-frequency-configs", 391

Package () {192000, 48000, 96000}}, 392

Package (2) {"mipi-sdw-audio-mode-prepare-channel-behavior", 0}, 393

} 394

}) // End SWC0.SWS1.MOD0 395

396



Package () { 399




Package (2) {"mipi-sdw-max-grouping-supported", 0} 403 } 404


406



Package () { 409




Package (2) {"mipi-sdw-max-grouping-supported", 0} 413

} 414


} // End SWC0.SWS1 416

} // End SWC0 417


Copyright © 2017 MIPI Alliance, Inc. All rights reserved. Confidential

Participants The list below includes those persons who participated in the Working Group that developed this 1 Specification and who consented to appear on this list. 2

Darren Abramson, Intel Corporation Lior Amarilio, Qualcomm Incorporated Eddie Ashfield, MIPI Alliance, Inc. (staff) Adeel A. Aslam, Intel Corporation Lukasz Barcik, Cadence Design Systems, Inc. Daniel Bogard, Conexant Systems Inc. Pierre Bossart, Intel Corporation Bartlomiej Cieszkowski, Intel Corporation John Frierson, Cirrus Logic Robert Gough, Intel Corporation Krzysztof Hejmowski, Intel Corporation Thomas Hoff, Cirrus Logic Patrick Lai, Qualcomm Incorporated

Grant Malcolm, Maxim Integrated Products, Inc. Sudheer Papothi, Qualcomm Incorporated Tomasz Pielaszkiewicz, Intel Corporation Dafydd Roche, Dialog Semiconductor Hardik T. Shah, Intel Corporation Chuting Su, Realtek Semiconductor Corp David Tyndall, Dialog Semiconductor Rakesh A. Ughreja, Intel Corporation Phani Kumar Uppalapati, Qualcomm

Incorporated Niel Warren, Knowles Electronics Devon Worrell, Intel Corporation Spring Yeh, Realtek Semiconductor Corp

mipi alliance disco specification for soundwire, v1€¦ · soundwire. sm. version 1.0 10 november...

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