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6.004 Computation StructuresSpring 2009
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L02 - Digital Abstraction 16.004 Spring 2009 2/5/09

The Digial Absracion

Handous: Lecure Slides

1. Making bis concree2. Wha makes a good bi3. Geting bis under conrac

modified 1/30/09 11:46 L02 - Digital Abstraction 26.004 Spring 2009 2/5/09

Concree encoding of informaion

To his poin weve discussed encoding informaion usingbis. Bu where do bis come from?

If were going o design a machine ha manipulaesinformaion, how should ha informaion be physicallyencoded?

Wha makes a good bi?- cheap (we wan a lo of hem)- sable (reliable, repeaable)- ease of manipulaion

(access, ransform, combine, ransmi, sore)

He said to his friend, "If the British marchBy land or sea from the town to-night,

Hang a lantern aloft in the belfry archOf the North Church tower as a signal light,--

One if by land, and wo if by sea;And I on the opposite shore will be,

Ready to ride and spread the alarmThrough every Middlesex village and farm,

For the country folk to be up and to arm."


Subsraes for compuaionWe can build upon almos any physical

phenomenon

Wai!Those las onesmigh have poenial...

lanerns

polarizaion of a phoon

dominos

engraved sone ables

Billiard balls

E. Coli


Bu, since were EEs

Sick wih hings we know abou:volages phasecurrens frequency

This semeser well use volages o encode informaion. Bu he bes choicedepends on he inended applicaion...

Volage pros:easy generaion, deecionlos of engineering knowledgepoenially low power in seady sae

Volage cons:easily affeced by environmen

DC conneciviy required?R & C effecs slow hings down

zero

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Represening informaion wih volage

Represenaion of each poin (x, y) on a B&W Picure:

0 vols: BLACK1 vol: WHITE0.37 vols: 37% Grayec.

Represenaion of a picure:Scan poins in some prescribed

raser order generae volagewaveform

How much informaiona each poin?


Informaion Processing = Compuaion

Firs les inroduce some processing blocks:

vCopyv

INVv 1-v


Why have processing blocks?

The goal of modular design:

Wha does ha mean anyway:

Rules simple enough for a 6-3 o followUndersanding BEHAVIOR

wihou knowing IMPLEMENTATION

Predicable composiion of funcions

Tinker-oy assembly

Guaraneed behavior,

under REAL WORLD circumsances

Absracion


?

Les build a sysem!

Copy INV

Copy INV

Copy INV

Copy INV

oupu

(In Theory)

(Realiy)

inpu

Figure by MIT OpenCourseWare.

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Why did our sysem fail?

Why doesn realiy mach heory?

1. COPY Operaor doesn work righ2. INVERSION Operaor doesn work righ

3. Theory is imperfec

4. Realiy is imperfec

5. Our sysem archiecure sinks

ANSWER: all of he above!

Noise and inaccuracy are ineviable; we can reliablyreproduce infinie informaion-- we mus design our sysemo olerae some amoun of error if i is o processinformaion reliably.


The Key o Sysem Design

A sysem is a srucure ha is guaraneed o exhibi a

specified behavior, assuming all of is componensobey heir specified behaviors.

How is his achieved?

Conracs!

Every sysem componen will have clear obligaionsand responsibiliies. If hese are mainained we have

every righ o expec he sysem o behave asplanned. If conracs are violaed all bes are off.


The Digial Panacea ...

Why digial?

because i keeps he conracs simple!

The price we pay for his robusness:

All he informaion ha we ransfer beween

modules is only 1 crummy bi!

Bu, we ge a guaranee of reliable processing.

0 or 1


The Digial Absracion

Real World

IdealAbstract World

Volts orElectrons orErgs or Gallons

Bis

0/1

Keep in mind ha he world is no digial, we would simply like o

engineer i o behave ha way. Furhermore, we mus use real

physical phenomena o implemen digial designs!

Noise

Manufacuring

Variaions

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Using Volages Digially

Key idea: don allow 0 o be misaken for a 1 or vice versa Use he same uniform represenaion convenion for every

componen and wire in our digial sysem

To implemen devices wih high reliabiliy, we oulaw close calls via arepresenaion convenion which forbids a range of volages beween0 and 1.

CONSEQUENCE:

Noion of VALID and INVALID logic levels

vols

Valid0

Valid1Forbidden Zone

Invalid


A Digial Processing Elemen

Saicdiscipline

Oupu a 1 if aleas 2 ou of 3 of

my inpus are a 1.Oherwise, oupu 0.

I will generae a validoupu in no more han

2 minues aferseeing valid inpus

inpu A

inpu B

inpu C

oupu Y

A combinaional device is a circui elemen ha has

one or more digial inputs one or more digial outputs a functional specificationha deails he value of each

oupu for every possible combinaion of valid inpu values

a timing specificationconsising (a minimum) of an upperbound pd on he required ime for he device o compuehe specified oupu values from an arbirary se of sable,valid inpu values


A Combinaional Digial Sysem

A se of inerconneced elemens is acombinaional device if

each circui elemen is combinaional every inpu is conneced o exacly one oupu

or o some vas supply of consan 0s and 1s

he circui conains no direced cyclesWhy is his rue?

Given an acyclic circui meeing he aboveconsrains, we can derive funcional and imingspecs for he inpu/oupu behavior from hespecs of is componens!

Well see los of examples soon. Bu firs, we need o

build some combinaional devices o work wih


Wires: heory vs. pracice

Vin Vou(volage close o boundary

wih forbidden zone)(volage in forbidden zone:Oops, no a valid volage!)

Does a wire obey he saic discipline?

Noise: changes volage

Quesions o ask ourselves:

In digital systems, where does noise come from?

How big an effect are we talking about?

VinVin

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Power Supply Noise

+

-

Inegraed circui

Rs and Cs from Aluminumwiring layers

Curren loads from on-chip devices

Ls from chip leads

V from:

IR drop(beween gaes: 30mV, wihin module: 50mV, across chip: 350mV )

L(dI/d) drop(use exra pins and bypass caps o keep wihin 250mV)

LC ringing riggered by curren seps

Power supply


Crossalk

CC

CO

VA

VB

A

B

If node B is driven

+

-

AV

A

CO

C

BV

CC

CV

+=

This siuaion frequenly happens on inegraed circuis where here

are many overlapping wiring layers. In a modern inegraed circuiVAmigh be 2.5V, CO = 20fF and CC = 10fFVB = 0.83V! Designersofen ry o avoid hese really bad cases by careful rouing of signals,bu some crossalk is unavoidable.


Sequenial InerferenceV from energy sorage lef over from earlier signaling on he wire:

ransmission line disconinuiies(reflecions off of impedance mismaches and erminaions)

[Dally]Fig. 6-17

charge sorage in RC circui(narrow pulses are los due oincomplee ransiions)

[Dally]Fig. 6-19

[Dally]Fig. 6-20

RLC ringing (riggered by volage seps)

Fix: slower operaion, limiingvolage swings and slew raes


Needed: Noise Margins!

Vin Vou(marginally valid) (invalid!)

Does a wire obey he saic discipline?

No! A combinaional device mus resore marginally valid signals. Imus accep marginal inpus and provide unquesionable oupus (i.e.,o leave room for noise).

volsForbidden ZoneValid

0Valid1

VilVol Vih Voh

VALID INPUT REPRESENTATIONS

VALID OUTPUT REPRESENTATIONS

NOISE MARGINS

Thas whahe small prin

was abou!

Noise

z0,t

1

RT=Zo(1+

)

/2

l tw2t1 2t1

tw

tw

V=1

8 10n

10p

2

1

0

21.5

1

1 2 3 4 5 6 7 8 9 10 11121314 1516171819

1 2 3 4 5 6 7 8 9 10 11121314 1516171819

0.5

21.5

10.5

1 0 1 1 1 1 1 1 1 10 0 0 0 0 0 0 00(A)

(B)

(C)

A4/2 4/2

1B

B C

1C

500 fF

Figures by MIT OpenCourseWare.

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A Buffer

0 0 1 1

A simple combinational device:

Saic Discipline requires ha he VTC avoid he shaded regions (akaforbidden zones), which correspond o validinpus bu invalidoupus.

Volage Transfer Characerisic (VTC):Plo of Vou vs. Vin where eachmeasuremen is aken afer anyransiens have died ou.

Vou

Vin

Vil

Vol

Vih

Voh

Vol Vil Vih Voh

Note: VTC does not tell you anything about

how fast a device is it measuresstatic behavior not dynamic behavior

Ne resul: combinaional devices mus have GAIN > 1 and be NONLINEAR.


Can his be a combinaional device?

VOUT

VIN1 2 3 4 50

0

1

2

3

4

5(0,5)

(1,4)

(2.5,1)

(3,0.5)

VOL

VOL

Suppose ha you measured he volage ransfer curve of he device shown below.

Could we build a logic family using i as a single-inpu combinaional device?

The device mus be able o acually producehe desired oupu level. Thus, VOL can beno lower han 0.5 V.

VIH

VIH

VIL

VIL

VOH

VOH

VIH mus be high enough o produce VOL

Now, choose noise margins find an N and se

VOH = VIH + NVIL = VOL + NSuch ha

VIH IN generaes VOL or less ou; ANDVIL IN generaes VOH or more ou.

Try VOL = 0.5 V

Try VIH = 3 V

Try N = 0.5 V

Hmmm, i had beter be an INVERTER


Summary

Use volages o encode informaionDigial encoding

valid volage levels for represening 0 and 1 forbidden zone avoids misaking 0 for 1 and vice versa gives rise o noion of signal VALIDITY.

Noise Wan o olerae real-world condiions: NOISE. Key: ougher sandards for oupu han for inpu devices mus have gain and have a non-linear VTC

Combinaional devices Each logic family has Tinkeroy-se simpliciy, modulariy predicable composiion: pars workwhole hing works saic discipline

digial inpus, oupus; resore marginal inpu volagescomplee funcional specvalid inpus lead o valid oupus in bounded ime


Nex ime:Building Logic w/ Transisors

Is abouime!

Id havepreferred he

dominos

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