Telscale SS7 card

Part 1: long intro● SS7, Sigtran and TDM

● What is it? G.704 structure

● Who are competitors?

● How long TDM will survive?

Part 2: Telscale SS7 card● Architecture

● Use cases

● Software structure

● Current state & Goals

ISUP

Telscale SS7 card

jSS7 and Telscale Card

CAMEL MAP

TCAP

SCCP

MTP3

MTP2

HW

M3UA

SCTP TCP

Ethernet

→a card to convert SS7 into Sigtran(M3UA, M2UA, M2PA) → support media (MGCP+G.711) → G.703 to SIP gateway → G.703 probe

Telscale SS7 card

E1, T1 etc

● Sequence of bits

● Bipolar coding with clock recovery (HDB-3 for E1)

● Quality monitoring: PBV (code errors) + CRC-4 (timeslot 0)

● G.703 — pulse shaping, masks

● 32 channels (time slots), 8 bits each

● A time slot is a 64k channel: SS7 link, G.711 voice or whatever

● Time slot 0: G.704. Dedicated content

.. and why do they call it G.703?

TS31bit 7

TS0bit 0

TS0bit 1

TS0bit 2

TS0bit 3

TS0bit 4

TS0bit 5

TS0bit 6

TS0bit 7

TS1bit 0

TS1bit 1

Telscale SS7 card

Cards at the Market● Dialogic– sophisticated card with CPU onboard– voice and signaling onboard– OS driver, API

● Digium (Asterisk)– low cost card w/o inteligence– OS driver, interfaces timeslots to host CPU

● Telscale Card– NO drivers:

stand-alone system with Ethernet interfacing– DSP running uClinux:

DSP interfaces(SPORT) + power of linux

Telscale SS7 card

Is there a Market?● GSM world (various SS7 apps with or w/o voice)– initial GSM specs; available everywhere– too much was invested

● Interfacing existing PBXs (ISDN SIP)↔

.. how long G.703 will survive?

.. how long will SS7 live?

Telscale SS7 card

Architecture

FPGA

– E1/T1 interfacing– SS7 MTP2(HDLC)

E1/T1line

interfacing

AdditionalE1/T1

receivers

FPGAconf.memory

DSP Core– running uClinux– 2 Ethernet

RAM128M

SPIflash

Par.flash

Telscale SS7 card

Use Cases

→ PCM terminal● Set of SS7 terminals● SS7 terminals + optional Voice● ISDN SIP↔

→ SS7 probe for various apps

Telscale SS7 card

Software StructurePart 1

An embedded system with FPGA and linux

Flexible Schematics that must be configured (from SPI flash) →

to “build” a “hardware” DSP can “reload” a new schematics →

(@another offset) → SPI content can be changed Linux system that has

a flexible boot loader→

→ linux + applications

Telscale SS7 card

Software StructurePart 2 → Various SS7/Sigtran stacks

in parallel → SS7 links are distributed

via shared memory “→ multiplexing” works with

array of time slots, ea ether processes time slot as →

SS7 link → controls time slot via MGCP (ea media) → each driver interfaces

a PCM linePCM driver PCM driver

“Multiplexing”

M2UAM3UA

M2PA

SS7 links via SHM

Telscale SS7 cardCurrent state & Goals

→ deployed already → production state, commercially available

Production (now) → fixing production cycle and logistics

Optimization (Q4'12) Features(Q1'13) → driver re-design (char MMAP)→ M2PA for card→

→ moving part of MTP2 to FPGA M2PA for jSS7→

USABILITY → user-friendly configuration

FEATURES → SCTP Multihoming → M2UA/M2PA ? → T1 if requested → pseudo-interfaces for wireshark

VOICE MGCP+RTP→

→ DTMF+ECHO

Telscale SS7 card

Questions? Ideas?

Dmitri.Soloviev@telestax.com

http://OpenSigtran.org