monolith semiconductor inc.neil/sic_workshop...monolith semiconductor inc. '...

Monolith Semiconductor Inc.

Taking'Silicon'Carbide'Fabless:'Opportunity'and'Challenges'

Kevin'Matocha'President,'Monolith'Semiconductor''

14'August'2014'–'ARL'SiC'MOS'Workshop'

MONOLITH SEMICONDUCTOR INC. '

2'

Fabless'Silicon'Carbide'Power'Device'Company'

150mm'SiC'Wafer'Supplier'

''

Design'and'Process'IP'Applica@on'Knowledge'

150mm'Silicon'Foundry'

Assembly'

Customer'

•  SiC'diodes'and'MOSFETs:'900VJ1.2kVJ1.7kV+'•  Monolith'owns'all'SiC'design'and'SiC'process'IP'•  Silicon'compa@ble'process;'fabless,'using'highJ

volume'150mm'CMOS'foundry'for'manufacturing;'lowJcost'

Incorporated'in'December'2012.'


Monolith’s'SiC'MOSFETs'J'Prototype'

3'

OffJstate''BV'>'1700V'

OnJstate''Rsp,on''5.5'miliohmJcm2''

•  Prototypes'built'at'Cornell'University'

•  Results'demonstrate'improvement'compared'to'stateJofJtheJart'

ShortJterm'stability':'Stable'aYer'225°C'stress'

Monolith Semiconductor Inc.

Supported'by'the'Cornell'NanofabricaOon'Facility'and'NaOonal'Science'FoundaOon'(Grant'ECCSS0335765)'


4'

Na@onal'Network'for'Manufacturing'Innova@on'


6'

Na@onal'Network'for'Manufacturing'Innova@on'

NNMI'objecOves:''•  Focus'areas'where'the'US'is'leading'in'technology'•  Strong'export'opportunity'–'growth'markets'•  Provide'leadership'in'the'US'to'breakthrough'manufacturability'

and'cost'•  Improve'energy'efficiency,'reduce'system'cost'

' '(e.g.'variable'speed'motor'drives)''''Monolith'Semiconductor'is'an'anchor'partner'of'the'NNMI,'focusing'on'Silicon'Carbide'device'manufacturing.'''


7'

DOE'SBIR'–'Impact'of'Cosmic'Rays'on'SiC'devices'

Project'goal:'Is'deJra@ng'necessary'for'SiC'devices?'''

lightly'doped,n'type,SiC,epitaxial,layer,

n+,SiC,substrate,

,,,,,,,,n+, ,,,,,n+,p'well, p'well,

p+, p+,

Source,Electrode,

Gate,Electrode,

Drain,Electrode,


8'

NSF'STTR'Collabora@on'with'Auburn'University'

Basic'''

lightlySdoped'nStype'SiC'epitaxial'layer'

n+'SiC'substrate'

''''''''n+' '''''n+'pSwell' pSwell'

p+' p+'

Source'Electrode'

Gate'Electrode'

Drain'Electrode'

Silicon'Carbon'

Phosphorus'

Oxygen'

Silicon'carbide'(SiC)'

Silicon'dioxide'(SiO2)'

AsSoxidized'SiC'surface'

SiC'

SiO2'

Phosphorus'passivates'dangling'

bonds'

SchemaOc'of'PotenOal'Mechanisms'of'How'Phosphorus'Improves'the'SiC/SiO2'Interface''

Project'objecOves:''Understand'the'role'of'Phosphorus'on'the'channel'mobility'and'threshold'voltage'stability'of'SiC'power'MOSFETs.''Evaluate'the'Auburn'University'“Thin'PSG”'process'on'SiC'DMOSFETs'

NaOonal'Science'FoundaOon'and'Sarit'Dhar'S'Auburn'University,'STTR'(IIPS1332039)'


9'

Key'outcomes:''The'Auburn'“thinSPSG”'achieves'superior'onSresistance'results,'even'when'applied'to'heavilySdoped'channels'of'SiC'DMOSFETs.''“ThinSPSG”'delivers'mobility'of'35'cm2/VSs'on'heavilySdoped'DMOS'pSwell''(compare'to'15'cm2/VSs'with'NO)'''Bias'Temperature'Stress'@'225°C:'IntroducOon'phosphorus'into'the'oxide'introduces'unacceptable'threshold'voltage'instability.''Also:'Phosphorus'incorporaOon'S>'poor'gate'yield''

0'

2'

4'

6'

8'

10'

12'

14'

16'

18'

0' 50' 100' 150' 200' 250'

Specific'on

Jresistance,'Vgs=15V

'''(m

Ohm

Jcm2)'

Temperature'(C)'

NO'baseline'

Thin'PSG'

S8'

S6'

S4'

S2'

0'

2'

4'

6'

5'min' 60'min'

Threshold'voltage'shiY'aYer'225

°C'

stress'at'+15'or'J1

5V'VGS'(ΔVT,'Volts)'

Stress'@me'

NO'

Thin'PSG'

Phosphorus'incorpora@on'techniques'need'significant'improvement'for'BTS,'yield.'

NSF'STTR'Collabora@on'with'Auburn'University'


10'

ARPAJe'SWITCHES'Overview'

Develop'technology'to'manufacture'wide'bandgap'switches'at'costSparity'with'silicon'IGBT'prices'<'10¢/A'''

Monolith'Semi'approach:'•  Improve'the'performance'(shrink'die)'through'design'and'process'innovaOon'•  UOlize'fabless'business'model'to'reduce'producOon'cost'(depreciaOon'costs)'•  Manufacture'on'150mm'SiC'wafers''

ARPASe'SWITCHES'program,'SBIR'(DESAR0000442)'


11'

SiC'Process'Transfer'Requirements'

1.''Define'process'flow.''2.''IdenOfy'toolset'required'for'SiC'process'flow.''3.''Modify'tools'to'handle'transparent'SiC'wafers.'

'S'Do'not'disrupt'Silicon'processing.''S'Lead'Ome'

4.''Verify'unit'step'process'operaOon'on'SiC'wafers.''S'IdenOfy,'develop'and'demonstrate'process'changes'

required'to'achieve'required'process'capability'on'SiC'wafers''5.  Evaluate'process'capability'for'each'unit'step'on'SiC'substrates'

and'epiwafers'Varia@ons'in'wafer'backside'finish'impact'tool'handling'and'processing/uniformity.'


12'

First'SiC'pin'diode'results'on'150mm'SiC'wafers'

PiN'diode'blocking'Voltage:'1700'V'Developed'basic'process'steps'for'photo,'oxides,'etc.''''Required'numerous'tool'modificaOons'and'changes'to'run'SiC'wafers.''SiC'processing'of'150mm'wafers'on'the'silicon'fabricaOon'line.'''Results:'Demonstrated'1700V'SiC'pin'diodes'on'150mm'wafers'processed'on'a'silicon'line.''''

ARPASe'SWITCHES'program,'SBIR'(DESAR0000442)'

1.2mm'x'1.2mm'


13'

Power'Electronics'Trends'

Frequency':'''''60Hz'Efficiency':'''''45%''

5W'charger'–'Past'and'Present'

60'KHz'85%''

10KW'inverter'–'Present'and'Future'

Monolith'Inside'

Frequency''':'10'KHz'Efficiency'':''92%''

100'KHz'99%''

•  Compact,'higher'efficiency'power'electronics'at'same'or'lower'cost'•  Volume,'weight'and'cost'dominated'by'passives'and'heat'sink'J'need'higher'

switching'frequency'and'higher'efficiency'•  SiC'switches'will'enable'this'at'power'levels:'100W'to'Megawaos''


14'

Google/IEEE'Li\le'Box'Challenge'–'50'W/in3'solar'inverter!'


19'

Monolith'Semiconductor'Challenges'

What'are'the'different'values'of'verOcal'integraOon'versus'the'fabless'approach?''Control''Quality''ContaminaOon'risks''IP''Cost''

'What'is'the'real'cost'of'modifying'a'silicon'fab'to'process'SiC'wafers?''Can'we'bridge'the'technology'“valley'of'death”'inside'a'volume'producOon'facility?''Is'verOcal'vs.'fabless'the'only'approach,'or'is'there'a'suitable'middle'ground'to'ease'the'transiOon?'''Is'there'some'other'reason'that'pure'fabless'SiC'hasn’t'been'done'yet?'

'' ' 'Only'by'trying'will'we'find'out.'

'''


20'

Summary'

Monolith'Semi'is'a'fabless'SiC'device'supplier'focused'on'900S1.2kVS1.7kV+'SiC'diodes'and'MOSFETs.''We'have'demonstrated'1200V,'5.5'mOhmScm2'SiC'MOSFETs'with'stable'operaOon'at'225°C.''We'are'transferring'our'SiC'processes'into'a'highSvolume,'150'mm'silicon'foundry.''We'are'targeOng'to'run'SiC'wafers'in'parallel'with'silicon'wafers'on'the'same'process'tools.''''We'have'demonstrated'iniOal'SiC'processes,'including'demonstraOng'1700V'SiC'implanted'PiN'diodes.'''''


21'

Acknowledgments'

''Cornell'NanofabricaOon'Facility'and'the'NaOonal'Science'FoundaOon'(Grant'ECCSS0335765)''NaOonal'Science'FoundaOon'and'Sarit'Dhar'S'Auburn'University,'STTR'(IIPS1332039)'''Department'of'Energy,'SBIR'Impact'of'Cosmic'Rays'on'SiC'(DESSC0011395)''''ARPASe'SWITCHES'program,'SBIR'(DESAR0000442)''

We'appreciate'the'support'of'the'following'agencies'and'programs:''

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