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Monte Carlo Simulation Using VHDL-AMS
Ekkehart-Peter WagnerSiemens VDO Automotive AG Regensburg
Joachim HaaseFraunhofer-Institute for Integrated CircuitsBranch Lab Design Automation (EAS) Dresden
Forum on Specification & Design Languages FDL ´04AMS Session 4: Language Issues / Proc. Vol. 1, pp. 112 - 122 September 15, 2004
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OutlineMotivation
Discussion of the problem
Mathematical background –Generation of random numbers
VHDL-AMS approach
Examples
Conclusion
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Model Exchange (1)
translational rotational
Controller Hella,
H. Hessel
MotorBMW, H. Lang
Steering PinionAudi / Bertrandt
Road ForceFord, H. Frielingsdorf
Worm GearAudi / Bertrandt
H. Sterner/H. Grassmann
steering data
speed, temperature, massMasse
MotorControl
Infineon, H. Schaefer
U(t)Msoll
EPS-pinionAudi / Bertrandt
Power SupplyDelphi, H. Reinders
BatteryDelphi, H. Reinders
UECU
UBatt
UsUMA
Steering RodAudi / Bertrandt H.
Sterner/H. Grassmann
Steering Sensor Siemens,
H. Wagner
Driving CycleSteering Cycle
DC, H. Blauensteiner
electrical
Motivation
EPS – Electric Power Steering System
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Model Exchange (2)
Integration
OEM
FunctionTechnology
ECU Manufacturer
Component
Supplier
Motivation
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ConsequencesSituation• Models from different companies• Usage of different simulators in the companies
Exchange of Models must be possible• Guidelines to write models
First steps• Work on model libraries• Proposal for a general interface for Spice-like models in
VHDL-AMS• Considerations to use Monte Carlo simulations with VHDL-AMS• ...
Motivation
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Problem
Design process• More and more complicated circuits and shorter
developmental times• Circuits have to work taking into consideration
environmental or production effects• Tolerance and worst-case analysis is required. Such
Investigations for analog and mixed-signal circuits• One methods is Monte Carlo simulation
Requirements concerning Monte Carlo simulation• Support not only in Spice but also in VHDL-AMS• Exchangeability of models reproducibility of results
Discussion of the problem
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Possible Work-Flow
Circuit / System
easy analysis ?
Tolerance problemsexpected?
Yes
Statistical Simulation or Worst-Case Simulation
with statistically predefined models
Analytical Worst-Case Analysis
No
No
Yes
Tolerance within requirements ?
ready
Redesign
No
Yes
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Monte Carlo Simulation in VHDL-AMS
Requirements (E. Christen, http://www.vhdl.org/analog)Same model for nominal and Monte Carlo analysisAssignment of different statistical distributions to constantsSupport of continuous and discrete distributionsPossibility to specify correlation between constants
From a practical point of viewIndependent random number generationReproducibility of results within different tools
Conclusion (E. Christen)Support can be provided using packages
But: No unified standard approach
Discussion of the problem
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Transformation of Random Numbers
Starting point are (0,1) uniform distributed numbers X, X1 and X2
Uniform distributed numbers between a and b
N(µ,σ) Gaussian distributed numbers•
•
Bernoulli distributed numbers with values v1 and v2
XabaY ⋅−+= )(
)2cos()ln(2 21 XXY ⋅⋅⋅−⋅+= πσµ
−⋅+= ∑
=
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iiXY σµ
Mathematical background
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UNIFORM Procedure in VHDLlibrary IEEE;
use IEEE.MATH_REAL.all;
...
process ... is
variable SEED1 : INTEGER := 99999;
variable SEED2 : INTEGER := 2004;
variable X : REAL;
begin
...
UNIFORM (SEED1, SEED2, X);
...
end process;
...
• Same X with the same SEED1 and SEED2
• (0,1) uniform distributedX with updated SEED-values
Mathematical background
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UNIFORM Call in Monte Carlo Simulation
Write updatedSEED1, SEED2 to a global file
ReadSEED1, SEED2 from a global file
UNIFORM (inout SEED1, SEED2, out X)
(0,1) distributed random number X
Mathematical background
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Random Number Generation
Read seed values from file
Call procedure UNIFORM fromIEEE package MATH_REAL
Write seed values to file
NormalDist UniformDist WorstCase
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Correlation between Random Numbers
Correlation between Gaussian distributed numbers
• Y1, Y2, ..., Yn shall be N(µ1, σ1), N(µ2, σ2), ..., N(µn, σn)
• Correlation matrix
• Generate X1, X2, ..., Xn with (0,1) distribution
Much more complicated for non-Gaussian numbers
Mathematical background
GGR T ⋅=
⋅
+
=
Xn
XX
Y
YY
nnn
L
L
KKKK
K
K
KK2
1
2
1
2
1
2
1
00
0000
σ
σσ
µ
µµ
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Package STATISTIC_GLOBALpackage STATISTIC_GLOBAL is
type GLOBAL_DISTRIBUTION_TYP isNOMINAL, -- Nominal analysisUNDEF); -- Statistical analysis
constant GLOBAL_DISTRIBUTION : GLOBAL_DISTRIBUTION_TYP;
constant GLOBAL_FILE_NAME : STRING;
end package STATISTIC_GLOBAL;
package body STATISTIC_GLOBAL is
constant GLOBAL_DISTRIBUTION : GLOBAL_DISTRIBUTION_TYP:= UNDEF;
constant GLOBAL_FILE_NAME : STRING:= "seed_values.dat";
end package body STATISTIC_GLOBAL;
Mathematical background
Results can be reproduced if the simulation starts with the same global file.
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Package STATISTIC
Random value depends on nominal value and tolerance
package STATISTIC is
function SET_TOL_WorstCase (tolerance) return TOL_DATA;
function SET_TOL_UniformDist (tolerance) return TOL_DATA;
function SET_TOL_NormalDist (sigma) return TOL_DATA;
function RND (NOMINAL_VALUE : REAL;TOL : TOL_DATA)
return REAL;
end package STATISTIC;
Functions to describe distributions
VHDL-AMS approach
Nominal analysis if GLOBAL_DISTRIBUTION equal NOMINAL.
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Usage of the Packages
Assignment of random values to constants in theinitialization phase using the available distribution functions
Assign random values to generic parametersduring instantiation or to constants declared ina model
Carry out multiple runs
VHDL-AMS approach
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Support of the Evaluation of Resultsarchitecture A0 of MEASURE is
procedure APPEND_VALUE (VALUE : REAL; FILE_NAME : STRING) is
...end procedure APPEND_VALUE;
quantity V across P to M;begin
process is
begin
wait for T;APPEND_VALUE (V, FILE_NAME);
wait;
end process;
end architecture A0;
VHDL-AMS approach
P
M
Write voltage between P and Mat time T to a file using APPEND_MODE
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Use of Existing Modelslibrary IEEE;
use IEEE.ELECTRICAL_SYSTEMS.all;
entity RESISTOR is
generic (R : REAL);
port (terminal P, N : ELECTRICAL);
end entity RESISTOR;
architecture BASIC of RESISTOR is
quantity V across I through P to N;
begin
V == R*I;
end architecture BASIC;
library MONTE_CARLO_LIB;use MONTE_CARLO_LIB.STATISTIC.all;
…R1: entity RESISTOR (BASIC)
generic map (R => RND(5.0E3, SET_TOL_WorstCase(0.01))port map (P => …, N => …);
P
N
R
Examples
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Special Models with Statistical Effectslibrary IEEE;
use IEEE.ELECTRICAL_SYSTEMS.all;
entity RESISTOR is
generic (R : REAL; TOL : REAL := 0.0);
port (terminal P, N : ELECTRICAL);
end entity RESISTOR;
library MONTE_CARLO_LIB;
use MONTE_CARLO_LIB.STATISTIC.all;
architecture BASIC_MC of RESISTOR is
constant VALUE : REAL := RND (R, SET_TOL_WorstCase(TOL));quantity V across I through P to N;
begin
V == VALUE*I;
end architecture BASIC_WC;
…
R1: entity RESISTOR (BASIC_MC)generic map (R => 5.0E3, TOL => 0.05)
P
N
R +/- TOL*R
Examples
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architecture BENCH of DAC_BENCH is
constant tol1Proc : TOL_DATA := SET_TOL_WorstCase (0.01);
constant tol01sig : TOL_DATA := SET_TOL_NormalDist (0.1);
constant Vlo: REAL := RND(0.2, tol01sig); constant Vx: REAL := RND(2.5, tol01sig);
constant Vhi: REAL := RND(4.8, tol01sig); constant Rof: REAL := 1.0e12;
constant Ron: REAL := 1.0e3; constant Rload: REAL := RND(1.0e6, tol1Proc);
constant Cload: REAL := RND(1.0e-12, tol1Proc); quantity Vrload across Irload through aout;
quantity Vcload across Icload through aout; ...
Digital Analog Converter
Examples DIN AOUTDAC
RLOAD CLOAD
Nominal value
Gaussian
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... cont‘d Digital Analog Converterbegin
-- unit under test
UUT: entity DAC(A0)generic map ( Vlo => Vlo, Vx => Vx, Vhi => Vhi,
Rof => Rof, Ron => Ron )port map ( din => DIN, aout => AOUT);
... end architecture BENCH;
Gaussian distributed
M1: entity measure (A0)
generic map ( T => 200 ns, FILE_NAME => "results_200ns.dat" )
port map ( P => AOUT, M => ELECTRICAL_REF);
“Measurement“
Examples
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Examples
0
0,05
0,1
0,15
0,2
0,25
Histogram of voltagesat 200 ns
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Resistor : +/-10 % tolerance
Capacitor : +/-10 % tolerance
Leakage current of ADC : +/-200nA
Analog Digital Converter
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Maximum voltage : 4.05VMinimum voltage : 3.08VResulting Tolerance : 14%
Examples
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Test of DistributionsHistogram
0
5
10
15
20
25
4,4 4,5 4,6 4,7 4,8 4,9 5 5,1 5,2 5,3 5,4 5,5 5,6
Bin
Freq
uenc
y
Frequency
Histogram
0
5
10
15
20
25
30
35
40
45
4,4 4,5 4,6 4,7 4,8 4,9 5 5,1 5,2 5,3 5,4 5,5 5,6
Bin
Freq
uenc
y
Frequency
Examples
Gaussian
Bernoulli (p=0.5)
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ConclusionMethod is applicable in different VHDL-AMS simulatorsPrerequisites for usage
• Package TEXTIO of library STD must be supported• Multiple runs must be supported by the VHDL-AMS simulator
Aspects concerning VHDL-AMS simulators• Built-in Monte Carlo support of VHDL-AMS simulators could cover the
same (or improved) interfaces (Standardization ?)• Statistical Post-Processing-Tools should be available
Extensions• Other pre-defined distribution functions• User defined distribution functions
Improvements• Other methods for SEED generation• Check and improvement of quality of UNIFORM procedure