mos device physics and designs chap. 3 instructor: pei-wen li dept. of e. e. ncu 1 chap 3. p-n...

MOS Device Physics and Designs Chap. 3

Instructor: Pei-Wen LiDept. of E. E. NCU

1

Chap 3. P-N junction

P-N junction Formation Step PN Junction Fermi Level Alignment Built-in E-field (cut-in voltage) Linearly Graded PN Junction I-V Characteristics Breakdown



2

Basic Symbol and Structure of the pn Junction Diode



3

Charge Distribution across PN junction



4

Step Junction

ND - NA

Actual Linearly Graded Profile

x

ND

-NA

Ideal step junction

CathodeAnode

Metal contactp-type Si, NA n-type Si, ND

–––––

–––––

–––––

–––––



5

Step P-N junction—Band Diagram

EC

EV

EFEFi

EC

EV

EF

EFi

P-Semiconductor N-Semiconductor

EC

EV

EF

EFi

EFi

EC

EV

EF

Band Diagram

Fermi-level alignment

EC

EV

EFEFi

EC

EV

EF

EFi



6

Step Junction

Recall Poisson’s Equation:

For 1-D, E = Ex

dE/dx = /kso

where = q (p – n + ND – NA)

For a pn junction, electrons and holes will diffuse through the junction, which would result in net in the space charge region.

oSk

E

constant dielectric :

density charge :

Sk



7

P-N Junction

CathodeAnode

Metal contactp-type Si, NA

n-type Si, ND

–––––

–––––

–––––

–––––

+

–

–––––

–––––

–––––

}Depletion

region Ionized dopants



8

Charge Distribution in PN Junction

Net results in the depletion region (or space charge region)

= -qNA -xp x 0qND 0 x xp

xn

x+

–

-xp

oSoS k

q

kdx

dE

nD

pA

xxN

xxN

0

0

nDpApnnDoS

DoS

nDoS

AoS

nn

x

xoS

xNxNxExExxNk

qxN

k

qxE

xxNk

qxN

k

qxE

dx

dVxExEx

kxE

n

0,00 if

0 if

0,0 ,1

Charge neutrality



9

Open-Circuit Condition of a pn Junction Diode

Potentialhill

0Barriervoltage

}p-type Si n-type Si

Depletionregion

CathodeAnode

Metal contact

Charge distribution of barrier voltage acros

s a pn Junction.

22

2 nDpAoS

bi xNxNk

qV



10

Width of Space Charge Region

Recall xnND = xpNA,

W is dependent on the built-in voltage Vbi.

2/1

2/1

2/1

2

2

2

biDA

DAospn

biDAD

Dosp

biDAD

Aosn

VNN

NN

q

kxxW

VNNN

N

q

kx

VNNN

N

q

kx



11

Reverse-Biased PN Junction Diode

p n

3 V Lamp

Open-circuit condition(high resistance)

Vbi Vbi + VA

W



12

Forward-Biased PN Junction Diode

p n

3 V

Hole flow Electron flow

Lamp

Vbi Vbi - VA

W



13

Bias Effect on the PN Junction



14

Bias Effect on the PN Junction Band Diagrams

Fig. 5.12



15

Linearly Graded PN Junction

Assume the linearly graded profile is ND – NA = ax, a: grading const.

3

1

12

Abi

oS VVqa

kW



16

Continuity Equations

There will be a change in carrier concentrations within a given small regions of the semiconductor if an imbalance exists between the total currents into and out of the region.

Minority Carrier Diffusion Equation

P

N

Jt

pq

Jt

nq

2

2

2

2

2

2

2

2

2

2

2

2

x

pqD

x

pqD

t

pq

x

nqD

x

nqD

t

nq

x

nqD

x

nqD

x

nqDJ

NP

NP

N

PN

PN

P

NNNN



17

Continuity Equations

If thermal R-G is considered, continuity equations would be modified

Minority carrier Diffusion equations become

const. time: , 1

1

G-Rthermal

G-Rthermal

G-Rthermal

nn

P

N

n

t

n

t

pJ

qt

p

t

nJ

qt

n

p

nNP

N

n

PPN

P

p

x

pD

t

p

n

x

nD

t

n

2

2

2

2



18

Diffusion Length

The average distance minority carriers can diffuse into a sea of majority carriers before being annihilated.

material type-p ain electronscarrier minority

material type-nan in holescarrier minority

---

---

nNN

pPP

DL

DL



19

Quasi-Fermi levels

Are energy levels used to specify the carrier concentrations inside a semiconductor under nonequilibrium conditions.

cases riumnonequilibunder holesfor level fermi-quasi

cases riumnonequilibunder electronsfor level fermi-quasi

: lnor

: lnor

iiPi

iiNi

n

pkTEFenp

n

nkTEFenn

kTPFEiE

kTiENFE

EC

EF

Ei

EV

Under equilibrium

EC

FN

Ei

EV

FP

Under non-equilibrium



20

PN Diodes: I-V Characteristics



21

Forward and Reverse Electrical Characteristics of a Silicon Diode

120 100 80 60 40 20

.4 .8 1.2 1.6

+ I

- V + V

- I

Breakdownvoltage

Leakagecurrent

Reverse bias curve

Forward bias curve

Junction voltage

torssemiconduc on the depending

magnitude of ordersmany by can vary which

current, saturation: ,1

oo IeII refVAV



22

Composite energy-band/circuit diagram of a reverse-biased pn diode



23

I-V Characteristics

From deviation:

So for p+/n diode,

For n+/p diode,

As a general rule, this suggests that the heavily doped side of an asymmetrical junction can be ignored in determining the electrical characteristics of the junction.

D

i

P

P

A

i

N

No N

n

L

D

N

n

L

DqAI

22

D

i

P

PoDA N

n

L

DqAINN

2

A

i

N

NoAD N

n

L

DqAINN

2



24

Derivation of I-V Characteristics

dx

dpqDpEqJ

dx

dnqDnEqJ

xJxJJ

PpP

NnN

PN

}p-type Si n-type Si

Depletionregion

Quasi-neutral p region

E ~ 0

Quasi-neutral n region

E ~ 0

E0



25

Derivation of I-V Characteristics

In quasi-neutral regions, E = 0, so consider diffusion and thermal R-G currents only.

In Depletion Region:

0,

0 ,

2

2

2

2

for

for

n

nnPn

nPP

n

ppNp

pNN

p

dx

pdD

t

pxx

dx

pdqDJ

n

dx

ndD

t

nxx

dx

ndqDJ

PN

nPP

pNNN

n

pN

JJJ

xJJ

xJJdx

dJnJ

qt

n

const. ,similarily

const.01

0thermal



26

Boundary conditions and quasi fermi level inside a forward-biased diode



27

Carrier Concentration inside a pn diode under forward and reverse biasing.



28

Experimental I-V Characteristics



29

Reverse-Bias Breakdown

Large reverse current flows when the reverse voltage exceeds a certain value, VBR. The current must be limited to avoid excessive “heating”.

Practical VBR measurements typically quote the voltage where the reverse current exceeds 1 A.

Factors to affect VBR:

– 1. Bandgap of the semiconductor to fabricate the pn diode

– 2. doping on the lightly doped side of the pn junction, NB

Breakdown Mechanism:– Avalanche process

– Zener process

75.0

1

BBR N

V



30

Avalanching

•As VA << VBR, the reverse current is due to minority carriers randomly entering the depletion region and being accelerated by the E-field.

•The acceleration is not continuous but is interrupted by energy-losing collisions with the semiconductor lattice.

•Since the mean free path between the collisions is ~10-6 cm, and a median depletion width is ~10-4 cm, a carrier can undergo 10-1000 collisions in crossing the depletion region.

•The energy lost by the carrier per collision is small.

•The energy transferred to the lattice simply causes lattice vibration --- local heating.



31

Avalanching

As VA VBR, the amount of energy transfer to the lattice per collision increases dramatically, and becomes sufficient to ionize a semiconductor atom. That is to causes an electron from the valence band to jump to conduction band. “impact ionization”

The electrons created by impact ioization are immediately accelerated by the large E-field in the depletion region, and consequently, they make additional collisions and create even more energetic electrons. “Avalanching”

Impact ionization



32

Zener Process

The occurrence of “tunneling” in a reverse-biased diode.

Two major requirements for tunneling to occur and be significant:– There must be filled states on one si

de of the barrier and empty states on the other side of the barrier at the same energy.

– The width of the potential energy barrier must be very thin (< 10 nm).

– That is the doping on the “lightly” doped Si is in excess of 1017 cm-3.

– Zener process is only important in diodes that are heavily doped on both sides.



33

R-G Current

When diode is reverse biased, the carrier concentrations in the depletion region are reduced below their equilibrium values, leading to the thermal generation of electrons and holes throughout the region.

The large E-field in the depletion region rapidly sweeps the generated carriers onto the quasi-neutral regions, thereby adding to the reverse current.

Reverse-biased generation

Forward-biased recombination



34

Hetero-Junction

EC

EV

EF

EFi

Semiconductor AEC

EV

EFEFi

Semiconductor B

EV

ECEC < 20 meV

bulk Si

Eg = 1.17 eV

Strained Si0.8Ge0.2

Eg ~ 1.0 eV

EV ~ 0.15 eV

EC ~0.15 eV

EV ~ 0.05 eV

Relaxed Si0.7Ge0.3

Eg ~ 1.08 eVStrained Si

Eg ~ 0.88 eV

Type I Alignment Type II Alignment



35

Quantum Well

Hole Confinement

EC ~ 0.02 eV

relaxed Si0.7Ge0.3

Eg = 1.08 eV

Strained Si0.3Ge0.7

Eg ~ 0.72 eV

EV ~ 0.48 eV

Strained Si

Eg = 0.88 eV

EC ~0.18 eV

EV ~0.34 eV

Electron Confinement

mos device physics and designs chap. 3 instructor: pei-wen li dept. of e. e. ncu 1 chap 3. p-n...

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