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    Model {Name "my_syncbuck_ol"Version 7.7MdlSubVersion 0GraphicalInterface {

    NumRootInports 0NumRootOutports 0ParameterArgumentNames ""ComputedModelVersion "1.21"NumModelReferences 0NumTestPointedSignals 0

    }SavedCharacterEncoding "ISO-8859-1"SaveDefaultBlockParams onScopeRefreshTime 0.035000OverrideScopeRefreshTime onDisableAllScopes offDataTypeOverride "UseLocalSettings"DataTypeOverrideAppliesTo "AllNumericTypes"MinMaxOverflowLogging "UseLocalSettings"MinMaxOverflowArchiveMode "Overwrite"MaxMDLFileLineLength 120Created "Sat Apr 28 10:25:41 2012"Creator "ePrime"

    UpdateHistory "UpdateHistoryNever"ModifiedByFormat "%"LastModifiedBy "ePrime"ModifiedDateFormat "%"LastModifiedDate "Mon May 28 10:25:21 2012"RTWModifiedTimeStamp 260101374ModelVersionFormat "1.%"ConfigurationManager "None"SampleTimeColors offSampleTimeAnnotations offLibraryLinkDisplay "none"WideLines offShowLineDimensions off

    ShowPortDataTypes offShowLoopsOnError onIgnoreBidirectionalLines offShowStorageClass offShowTestPointIcons onShowSignalResolutionIcons onShowViewerIcons onSortedOrder offExecutionContextIcon offShowLinearizationAnnotations onBlockNameDataTip offBlockParametersDataTip offBlockDescriptionStringDataTip off

    ToolBar onStatusBar onBrowserShowLibraryLinks offBrowserLookUnderMasks offSimulationMode "normal"LinearizationMsg "none"Profile offParamWorkspaceSource "MATLABWorkspace"AccelSystemTargetFile "accel.tlc"AccelTemplateMakefile "accel_default_tmf"

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    AccelMakeCommand "make_rtw"TryForcingSFcnDF offObject {

    $PropName "DataLoggingOverride"$ObjectID 1$ClassName "Simulink.SimulationData.ModelLoggingInfo"model_ "my_syncbuck_OL"signals_ []overrideMode_ [0.0]Array {Type "Cell"Dimension 1Cell "my_syncbuck_OL"PropName "logAsSpecifiedByModels_"

    }Array {Type "Cell"Dimension 1Cell []PropName "logAsSpecifiedByModelsSSIDs_"

    }}RecordCoverage offCovPath "/"

    CovSaveName "covdata"CovMetricSettings "dw"CovNameIncrementing offCovHtmlReporting onCovForceBlockReductionOff oncovSaveCumulativeToWorkspaceVar onCovSaveSingleToWorkspaceVar onCovCumulativeVarName "covCumulativeData"CovCumulativeReport offCovReportOnPause onCovModelRefEnable "Off"CovExternalEMLEnable offExtModeBatchMode off

    ExtModeEnableFloating onExtModeTrigType "manual"ExtModeTrigMode "normal"ExtModeTrigPort "1"ExtModeTrigElement "any"ExtModeTrigDuration 1000ExtModeTrigDurationFloating "auto"ExtModeTrigHoldOff 0ExtModeTrigDelay 0ExtModeTrigDirection "rising"ExtModeTrigLevel 0ExtModeArchiveMode "off"ExtModeAutoIncOneShot off

    ExtModeIncDirWhenArm offExtModeAddSuffixToVar offExtModeWriteAllDataToWs offExtModeArmWhenConnect onExtModeSkipDownloadWhenConnect offExtModeLogAll onExtModeAutoUpdateStatusClock onBufferReuse onShowModelReferenceBlockVersion offShowModelReferenceBlockIO off

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    Array {Type "Handle"Dimension 1Simulink.ConfigSet {$ObjectID 2Version "1.11.0"Array {

    Type "Handle"Dimension 8Simulink.SolverCC {$ObjectID 3Version "1.11.0"StartTime "0.0"StopTime "0.005"AbsTol "auto"FixedStep "auto"InitialStep "auto"MaxNumMinSteps "-1"MaxOrder 5ZcThreshold "auto"ConsecutiveZCsStepRelTol "10*128*eps"MaxConsecutiveZCs "1000"ExtrapolationOrder 4NumberNewtonIterations 1

    MaxStep "1e-6"MinStep "auto"MaxConsecutiveMinStep "1"RelTol "1e-3"SolverMode "Auto"ConcurrentTasks offSolver "ode45"SolverName "ode45"SolverJacobianMethodControl "auto"ShapePreserveControl "DisableAll"ZeroCrossControl "UseLocalSettings"ZeroCrossAlgorithm "Nonadaptive"AlgebraicLoopSolver "TrustRegion"

    SolverResetMethod "Fast"PositivePriorityOrder offAutoInsertRateTranBlk offSampleTimeConstraint "Unconstrained"InsertRTBMode "Whenever possible"

    }Simulink.DataIOCC {$ObjectID 4Version "1.11.0"Decimation "1"ExternalInput "[t, u]"FinalStateName "xFinal"InitialState "xInitial"

    LimitDataPoints onMaxDataPoints "1000"LoadExternalInput offLoadInitialState offSaveFinalState offSaveCompleteFinalSimState offSaveFormat "Array"SignalLoggingSaveFormat "ModelDataLogs"SaveOutput onSaveState off

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    SignalLogging onDSMLogging onInspectSignalLogs offSaveTime onReturnWorkspaceOutputs offStateSaveName "xout"TimeSaveName "tout"OutputSaveName "yout"SignalLoggingName "logsout"DSMLoggingName "dsmout"OutputOption "RefineOutputTimes"OutputTimes "[]"ReturnWorkspaceOutputsName "out"Refine "1"

    }Simulink.OptimizationCC {$ObjectID 5Version "1.11.0"Array {

    Type "Cell"Dimension 8Cell "BooleansAsBitfields"Cell "PassReuseOutputArgsAs"Cell "PassReuseOutputArgsThreshold"

    Cell "ZeroExternalMemoryAtStartup"Cell "ZeroInternalMemoryAtStartup"Cell "OptimizeModelRefInitCode"Cell "NoFixptDivByZeroProtection"Cell "UseSpecifiedMinMax"PropName "DisabledProps"

    }BlockReduction onBooleanDataType onConditionallyExecuteInputs onInlineParams offUseIntDivNetSlope offUseSpecifiedMinMax off

    InlineInvariantSignals offOptimizeBlockIOStorage onBufferReuse onEnhancedBackFolding offStrengthReduction offExpressionFolding onBooleansAsBitfields offBitfieldContainerType "uint_T"EnableMemcpy onMemcpyThreshold 64PassReuseOutputArgsAs "Structure reference"ExpressionDepthLimit 2147483647FoldNonRolledExpr on

    LocalBlockOutputs onRollThreshold 5SystemCodeInlineAuto offStateBitsets offDataBitsets offUseTempVars offZeroExternalMemoryAtStartup onZeroInternalMemoryAtStartup onInitFltsAndDblsToZero offNoFixptDivByZeroProtection off

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    EfficientFloat2IntCast offEfficientMapNaN2IntZero onOptimizeModelRefInitCode offLifeSpan "inf"MaxStackSize "Inherit from target"BufferReusableBoundary onSimCompilerOptimization "Off"AccelVerboseBuild offAccelParallelForEachSubsystem on

    }Simulink.DebuggingCC {$ObjectID 6Version "1.11.0"RTPrefix "error"ConsistencyChecking "none"ArrayBoundsChecking "none"SignalInfNanChecking "none"SignalRangeChecking "none"ReadBeforeWriteMsg "UseLocalSettings"WriteAfterWriteMsg "UseLocalSettings"WriteAfterReadMsg "UseLocalSettings"AlgebraicLoopMsg "warning"ArtificialAlgebraicLoopMsg "warning"SaveWithDisabledLinksMsg "warning"

    SaveWithParameterizedLinksMsg "warning"CheckSSInitialOutputMsg onUnderspecifiedInitializationDetection "Classic"MergeDetectMultiDrivingBlocksExec "none"CheckExecutionContextPreStartOutputMsg offCheckExecutionContextRuntimeOutputMsg offSignalResolutionControl "UseLocalSettings"BlockPriorityViolationMsg "warning"MinStepSizeMsg "warning"TimeAdjustmentMsg "none"MaxConsecutiveZCsMsg "error"MaskedZcDiagnostic "warning"IgnoredZcDiagnostic "warning"

    SolverPrmCheckMsg "warning"InheritedTsInSrcMsg "warning"DiscreteInheritContinuousMsg "warning"MultiTaskDSMMsg "error"MultiTaskCondExecSysMsg "error"MultiTaskRateTransMsg "error"SingleTaskRateTransMsg "none"TasksWithSamePriorityMsg "warning"SigSpecEnsureSampleTimeMsg "warning"CheckMatrixSingularityMsg "none"IntegerOverflowMsg "warning"Int32ToFloatConvMsg "warning"ParameterDowncastMsg "error"

    ParameterOverflowMsg "error"ParameterUnderflowMsg "none"ParameterPrecisionLossMsg "warning"ParameterTunabilityLossMsg "warning"FixptConstUnderflowMsg "none"FixptConstOverflowMsg "none"FixptConstPrecisionLossMsg "none"UnderSpecifiedDataTypeMsg "none"UnnecessaryDatatypeConvMsg "none"VectorMatrixConversionMsg "none"

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    InvalidFcnCallConnMsg "error"FcnCallInpInsideContextMsg "Use local settings"SignalLabelMismatchMsg "none"UnconnectedInputMsg "warning"UnconnectedOutputMsg "warning"UnconnectedLineMsg "warning"SFcnCompatibilityMsg "none"UniqueDataStoreMsg "none"BusObjectLabelMismatch "warning"RootOutportRequireBusObject "warning"AssertControl "UseLocalSettings"EnableOverflowDetection offModelReferenceIOMsg "none"ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error"ModelReferenceVersionMismatchMessage "none"ModelReferenceIOMismatchMessage "none"ModelReferenceCSMismatchMessage "none"UnknownTsInhSupMsg "warning"ModelReferenceDataLoggingMessage "warning"ModelReferenceSymbolNameMessage "warning"ModelReferenceExtraNoncontSigs "error"StateNameClashWarn "warning"SimStateInterfaceChecksumMismatchMsg "warning"SimStateOlderReleaseMsg "error"

    InitInArrayFormatMsg "warning"StrictBusMsg "ErrorLevel1"BusNameAdapt "WarnAndRepair"NonBusSignalsTreatedAsBus "none"LoggingUnavailableSignals "error"BlockIODiagnostic "none"SFUnusedDataAndEventsDiag "warning"SFUnexpectedBacktrackingDiag "warning"SFInvalidInputDataAccessInChartInitDiag "warning"SFNoUnconditionalDefaultTransitionDiag "warning"SFTransitionOutsideNaturalParentDiag "warning"

    }Simulink.HardwareCC {

    $ObjectID 7Version "1.11.0"ProdBitPerChar 8ProdBitPerShort 16ProdBitPerInt 32ProdBitPerLong 32ProdBitPerFloat 32ProdBitPerDouble 64ProdBitPerPointer 32ProdLargestAtomicInteger "Char"ProdLargestAtomicFloat "None"ProdIntDivRoundTo "Undefined"ProdEndianess "Unspecified"

    ProdWordSize 32ProdShiftRightIntArith onProdHWDeviceType "32-bit Generic"TargetBitPerChar 8TargetBitPerShort 16TargetBitPerInt 32TargetBitPerLong 32TargetBitPerFloat 32TargetBitPerDouble 64TargetBitPerPointer 32

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    TargetLargestAtomicInteger "Char"TargetLargestAtomicFloat "None"TargetShiftRightIntArith onTargetIntDivRoundTo "Undefined"TargetEndianess "Unspecified"TargetWordSize 32TargetTypeEmulationWarnSuppressLevel 0TargetPreprocMaxBitsSint 32TargetPreprocMaxBitsUint 32TargetHWDeviceType "Specified"TargetUnknown offProdEqTarget on

    }Simulink.ModelReferenceCC {$ObjectID 8Version "1.11.0"UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"CheckModelReferenceTargetMessage "error"EnableParallelModelReferenceBuilds offParallelModelReferenceErrorOnInvalidPool onParallelModelReferenceMATLABWorkerInit "None"ModelReferenceNumInstancesAllowed "Multi"PropagateVarSize "Infer from blocks in model"ModelReferencePassRootInputsByReference on

    ModelReferenceMinAlgLoopOccurrences offPropagateSignalLabelsOutOfModel offSupportModelReferenceSimTargetCustomCode off

    }Simulink.SFSimCC {$ObjectID 9Version "1.11.0"SFSimEnableDebug onSFSimOverflowDetection onSFSimEcho onSimBlas onSimCtrlC onSimExtrinsic on

    SimIntegrity onSimUseLocalCustomCode offSimParseCustomCode onSimBuildMode "sf_incremental_build"

    }Simulink.RTWCC {$BackupClass "Simulink.RTWCC"$ObjectID 10Version "1.11.0"Array {

    Type "Cell"Dimension 8Cell "IncludeHyperlinkInReport"

    Cell "GenerateTraceInfo"Cell "GenerateTraceReport"Cell "GenerateTraceReportSl"Cell "GenerateTraceReportSf"Cell "GenerateTraceReportEml"Cell "GenerateSLWebview"Cell "GenerateCodeMetricsReport"PropName "DisabledProps"

    }SystemTargetFile "grt.tlc"

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    GenCodeOnly offMakeCommand "make_rtw"GenerateMakefile onTemplateMakefile "grt_default_tmf"GenerateReport offSaveLog offRTWVerbose onRetainRTWFile offProfileTLC offTLCDebug offTLCCoverage offTLCAssert offProcessScriptMode "Default"ConfigurationMode "Optimized"ConfigAtBuild offRTWUseLocalCustomCode offRTWUseSimCustomCode offIncludeHyperlinkInReport offLaunchReport offTargetLang "C"IncludeBusHierarchyInRTWFileBlockHierarchyMap offIncludeERTFirstTime offGenerateTraceInfo offGenerateTraceReport off

    GenerateTraceReportSl offGenerateTraceReportSf offGenerateTraceReportEml offGenerateCodeInfo offGenerateSLWebview offGenerateCodeMetricsReport offRTWCompilerOptimization "Off"CheckMdlBeforeBuild "Off"CustomRebuildMode "OnUpdate"Array {

    Type "Handle"Dimension 2Simulink.CodeAppCC {

    $ObjectID 11Version "1.11.0"Array {

    Type "Cell"Dimension 21Cell "IgnoreCustomStorageClasses"Cell "IgnoreTestpoints"Cell "InsertBlockDesc"Cell "InsertPolySpaceComments"Cell "SFDataObjDesc"Cell "MATLABFcnDesc"Cell "SimulinkDataObjDesc"Cell "DefineNamingRule"

    Cell "SignalNamingRule"Cell "ParamNamingRule"Cell "InlinedPrmAccess"Cell "CustomSymbolStr"Cell "CustomSymbolStrGlobalVar"Cell "CustomSymbolStrType"Cell "CustomSymbolStrField"Cell "CustomSymbolStrFcn"Cell "CustomSymbolStrFcnArg"Cell "CustomSymbolStrBlkIO"

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    Cell "CustomSymbolStrTmpVar"Cell "CustomSymbolStrMacro"Cell "ReqsInCode"PropName "DisabledProps"

    }ForceParamTrailComments offGenerateComments onIgnoreCustomStorageClasses onIgnoreTestpoints offIncHierarchyInIds offMaxIdLength 31PreserveName offPreserveNameWithParent offShowEliminatedStatement offIncAutoGenComments offSimulinkDataObjDesc offSFDataObjDesc offMATLABFcnDesc offIncDataTypeInIds offMangleLength 1CustomSymbolStrGlobalVar "$R$N$M"CustomSymbolStrType "$N$R$M"CustomSymbolStrField "$N$M"CustomSymbolStrFcn "$R$N$M$F"

    CustomSymbolStrFcnArg "rt$I$N$M"CustomSymbolStrBlkIO "rtb_$N$M"CustomSymbolStrTmpVar "$N$M"CustomSymbolStrMacro "$R$N$M"DefineNamingRule "None"ParamNamingRule "None"SignalNamingRule "None"InsertBlockDesc offInsertPolySpaceComments offSimulinkBlockComments onMATLABSourceComments offEnableCustomComments offInlinedPrmAccess "Literals"

    ReqsInCode offUseSimReservedNames off}Simulink.GRTTargetCC {$BackupClass "Simulink.TargetCC"$ObjectID 12Version "1.11.0"Array {

    Type "Cell"Dimension 16Cell "GeneratePreprocessorConditionals"Cell "IncludeMdlTerminateFcn"Cell "CombineOutputUpdateFcns"

    Cell "SuppressErrorStatus"Cell "ERTCustomFileBanners"Cell "GenerateSampleERTMain"Cell "GenerateTestInterfaces"Cell "ModelStepFunctionPrototypeControlCompli

    ant"Cell "CPPClassGenCompliant"Cell "MultiInstanceERTCode"Cell "PurelyIntegerCode"Cell "SupportComplex"

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    Cell "SupportAbsoluteTime"Cell "SupportContinuousTime"Cell "SupportNonInlinedSFcns"Cell "PortableWordSizes"PropName "DisabledProps"

    }TargetFcnLib "ansi_tfl_table_tmw.mat"TargetLibSuffix ""TargetPreCompLibLocation ""TargetFunctionLibrary "ANSI_C"UtilityFuncGeneration "Auto"ERTMultiwordTypeDef "System defined"FunctionExecutionProfile offCodeExecutionProfiling offERTCodeCoverageTool "None"ERTMultiwordLength 256MultiwordLength 2048GenerateFullHeader onGenerateSampleERTMain offGenerateTestInterfaces offIsPILTarget offModelReferenceCompliant onParMdlRefBuildCompliant onCompOptLevelCompliant on

    IncludeMdlTerminateFcn onGeneratePreprocessorConditionals "Disable all"CombineOutputUpdateFcns offCombineSignalStateStructs offSuppressErrorStatus offERTFirstTimeCompliant offIncludeFileDelimiter "Auto"ERTCustomFileBanners offSupportAbsoluteTime onLogVarNameModifier "rt_"MatFileLogging onMultiInstanceERTCode offSupportNonFinite on

    SupportComplex onPurelyIntegerCode offSupportContinuousTime onSupportNonInlinedSFcns onSupportVariableSizeSignals offEnableShiftOperators onParenthesesLevel "Nominal"PortableWordSizes offModelStepFunctionPrototypeControlCompliant offCPPClassGenCompliant offAutosarCompliant offUseMalloc offExtMode off

    ExtModeStaticAlloc offExtModeTesting offExtModeStaticAllocSize 1000000ExtModeTransport 0ExtModeMexFile "ext_comm"ExtModeIntrfLevel "Level1"RTWCAPISignals offRTWCAPIParams offRTWCAPIStates offRTWCAPIRootIO off

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    GenerateASAP2 off}PropName "Components"

    }}PropName "Components"

    }Name "Configuration"CurrentDlgPage "Solver"ConfigPrmDlgPosition [ 269, 102, 1171, 724 ]

    }PropName "ConfigurationSets"

    }Simulink.ConfigSet {

    $PropName "ActiveConfigurationSet"$ObjectID 2

    }BlockDefaults {

    ForegroundColor "black"BackgroundColor "white"DropShadow offNamePlacement "normal"FontName "Helvetica"FontSize 10

    FontWeight "normal"FontAngle "normal"ShowName onBlockRotation 0BlockMirror off

    }AnnotationDefaults {

    HorizontalAlignment "center"VerticalAlignment "middle"ForegroundColor "black"BackgroundColor "white"DropShadow offFontName "Helvetica"

    FontSize 10FontWeight "normal"FontAngle "normal"UseDisplayTextAsClickCallback off

    }LineDefaults {

    FontName "Helvetica"FontSize 9FontWeight "normal"FontAngle "normal"

    }BlockParameterDefaults {

    Block {

    BlockType ConstantValue "1"VectorParams1D onSamplingMode "Sample based"OutMin "[]"OutMax "[]"OutDataTypeStr "Inherit: Inherit from 'Constant value'"LockScale offSampleTime "inf"FramePeriod "inf"

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    PreserveConstantTs off}Block {BlockType GainGain "1"Multiplication "Element-wise(K.*u)"ParamMin "[]"ParamMax "[]"ParamDataTypeStr "Inherit: Same as input"OutMin "[]"OutMax "[]"OutDataTypeStr "Inherit: Same as input"LockScale offRndMeth "Floor"SaturateOnIntegerOverflow onSampleTime "-1"

    }Block {BlockType InportPort "1"OutputFunctionCall offOutMin "[]"OutMax "[]"OutDataTypeStr "Inherit: auto"

    LockScale offBusOutputAsStruct offPortDimensions "-1"VarSizeSig "Inherit"SampleTime "-1"SignalType "auto"SamplingMode "auto"LatchByDelayingOutsideSignal offLatchInputForFeedbackSignals offInterpolate on

    }Block {BlockType Integrator

    ExternalReset "none"InitialConditionSource "internal"InitialCondition "0"LimitOutput offUpperSaturationLimit "inf"LowerSaturationLimit "-inf"ShowSaturationPort offShowStatePort offAbsoluteTolerance "auto"IgnoreLimit offZeroCross onContinuousStateAttributes "''"

    }

    Block {BlockType OutportPort "1"OutMin "[]"OutMax "[]"OutDataTypeStr "Inherit: auto"LockScale offBusOutputAsStruct offPortDimensions "-1"VarSizeSig "Inherit"

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    SampleTime "-1"SignalType "auto"SamplingMode "auto"SourceOfInitialOutputValue "Dialog"OutputWhenDisabled "held"InitialOutput "[]"

    }Block {BlockType ProductInputs "2"Multiplication "Element-wise(.*)"CollapseMode "All dimensions"CollapseDim "1"InputSameDT onOutMin "[]"OutMax "[]"OutDataTypeStr "Inherit: Same as first input"LockScale offRndMeth "Zero"SaturateOnIntegerOverflow onSampleTime "-1"

    }Block {BlockType Relay

    OnSwitchValue "eps"OffSwitchValue "eps"OnOutputValue "1"OffOutputValue "0"OutMin "[]"OutMax "[]"OutDataTypeStr "Inherit: All ports same datatype"LockScale offZeroCross onSampleTime "-1"

    }Block {BlockType Scope

    ModelBased offTickLabels "OneTimeTick"ZoomMode "on"Grid "on"TimeRange "auto"YMin "-5"YMax "5"SaveToWorkspace offSaveName "ScopeData"LimitDataPoints onMaxDataPoints "5000"Decimation "1"SampleInput off

    SampleTime "-1"}Block {BlockType SubSystemShowPortLabels "FromPortIcon"Permissions "ReadWrite"PermitHierarchicalResolution "All"TreatAsAtomicUnit offCheckFcnCallInpInsideContextMsg offSystemSampleTime "-1"

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    RTWFcnNameOpts "Auto"RTWFileNameOpts "Auto"RTWMemSecFuncInitTerm "Inherit from model"RTWMemSecFuncExecute "Inherit from model"RTWMemSecDataConstants "Inherit from model"RTWMemSecDataInternal "Inherit from model"RTWMemSecDataParameters "Inherit from model"SimViewingDevice offDataTypeOverride "UseLocalSettings"DataTypeOverrideAppliesTo "AllNumericTypes"MinMaxOverflowLogging "UseLocalSettings"Variant offGeneratePreprocessorConditionals off

    }Block {BlockType SumIconShape "rectangular"Inputs "++"CollapseMode "All dimensions"CollapseDim "1"InputSameDT onAccumDataTypeStr "Inherit: Inherit via internal rule"OutMin "[]"OutMax "[]"

    OutDataTypeStr "Inherit: Same as first input"LockScale offRndMeth "Floor"SaturateOnIntegerOverflow onSampleTime "-1"

    }}System {

    Name "my_syncbuck_ol"Location [19, 56, 780, 548]Open onModelBrowserVisibility offModelBrowserWidth 200

    ScreenColor "white"PaperOrientation "landscape"PaperPositionMode "auto"PaperType "usletter"PaperUnits "inches"TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]TiledPageScale 1ShowPageBoundaries offZoomFactor "100"ReportName "simulink-default.rpt"SIDHighWatermark "55"Block {BlockType SubSystem

    Name "Buck Converter - Open Loop"SID "50"Ports [3, 2]Position [280, 37, 410, 233]MinAlgLoopOccurrences offPropExecContextOutsideSubsystem offRTWSystemCode "Auto"FunctionWithSeparateData offOpaque offRequestExecContextInheritance off

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    MaskHideContents offSystem {

    Name "Buck Converter - Open Loop"Location [26, 282, 526, 600]Open offModelBrowserVisibility offModelBrowserWidth 200ScreenColor "white"PaperOrientation "landscape"PaperPositionMode "auto"PaperType "usletter"PaperUnits "inches"TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]TiledPageScale 1ShowPageBoundaries offZoomFactor "100"Block {BlockType InportName "Vg"SID "51"Position [215, 53, 245, 67]IconDisplay "Port number"

    }Block {

    BlockType InportName "d"SID "53"Position [25, 118, 55, 132]Port "2"IconDisplay "Port number"

    }Block {BlockType InportName "R"SID "55"Position [95, 188, 125, 202]Port "3"

    IconDisplay "Port number"}Block {BlockType ProductName "Divide"SID "49"Ports [2, 1]Position [150, 172, 180, 203]Inputs "*/"InputSameDT offOutDataTypeStr "Inherit: Inherit via internal rule"RndMeth "Floor"SaturateOnIntegerOverflow off

    }Block {BlockType SubSystemName "PWM"SID "25"Ports [1, 1]Position [80, 104, 180, 146]MinAlgLoopOccurrences offPropExecContextOutsideSubsystem offRTWSystemCode "Auto"

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    FunctionWithSeparateData offOpaque offRequestExecContextInheritance offMaskHideContents offMaskPromptString "Switching frequency - fs|PWM ramp amplitude -

    VM"MaskStyleString "edit,edit"MaskVariables "fs=@1;VM=@2;"MaskTunableValueString "on,on"MaskCallbackString "|"MaskEnableString "on,on"MaskVisibilityString "on,on"MaskToolTipString "on,on"MaskIconFrame onMaskIconOpaque onMaskIconRotate "none"MaskPortRotate "default"MaskIconUnits "autoscale"MaskValueString "100e3|1"System {

    Name "PWM"Location [237, 346, 735, 646]Open offModelBrowserVisibility off

    ModelBrowserWidth 200ScreenColor "white"PaperOrientation "landscape"PaperPositionMode "auto"PaperType "usletter"PaperUnits "inches"TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]TiledPageScale 1ShowPageBoundaries offZoomFactor "100"Block {BlockType InportName "d"

    SID "26"Position [15, 103, 45, 117]IconDisplay "Port number"

    }Block {BlockType RelayName "Comparator"SID "47"Position [255, 105, 285, 135]

    }Block {BlockType ReferenceName "Sawtooth"

    SID "45"Ports [0, 1]Position [15, 155, 45, 185]LibraryVersion "1.236"SourceBlock "simulink/Sources/Repeating\nSequence"SourceType "Repeating table"ShowPortLabels "FromPortIcon"SystemSampleTime "-1"FunctionWithSeparateData offRTWMemSecFuncInitTerm "Inherit from model"

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    RTWMemSecFuncExecute "Inherit from model"RTWMemSecDataConstants "Inherit from model"RTWMemSecDataInternal "Inherit from model"RTWMemSecDataParameters "Inherit from model"GeneratePreprocessorConditionals offrep_seq_t "[0 1.0/fs]"rep_seq_y "[0 VM]"

    }Block {BlockType SumName "Subtract"SID "46"Ports [2, 1]Position [140, 102, 170, 133]Inputs "+-"InputSameDT offOutDataTypeStr "Inherit: Inherit via internal rule"SaturateOnIntegerOverflow off

    }Block {BlockType OutportName "c"SID "27"Position [435, 113, 465, 127]

    IconDisplay "Port number"}Line {SrcBlock "d"SrcPort 1DstBlock "Subtract"DstPort 1

    }Line {SrcBlock "Sawtooth"SrcPort 1Points [35, 0; 0, -45]DstBlock "Subtract"

    DstPort 2}Line {SrcBlock "Subtract"SrcPort 1DstBlock "Comparator"DstPort 1

    }Line {SrcBlock "Comparator"SrcPort 1DstBlock "c"DstPort 1

    }}

    }Block {BlockType SubSystemName "buck converter"SID "28"Ports [3, 2]Position [270, 25, 390, 225]MinAlgLoopOccurrences off

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    PropExecContextOutsideSubsystem offRTWSystemCode "Auto"FunctionWithSeparateData offOpaque offRequestExecContextInheritance offMaskHideContents offMaskPromptString "Inductance - L|Inductor series resistance - R

    L|Capacitance - C|Capacitor series resistance - ESR"MaskStyleString "edit,edit,edit,edit"MaskVariables "L=@1;RL=@2;C=@3;ESR=@4;"MaskTunableValueString "on,on,on,on"MaskCallbackString "|||"MaskEnableString "on,on,on,on"MaskVisibilityString "on,on,on,on"MaskToolTipString "on,on,on,on"MaskIconFrame onMaskIconOpaque onMaskIconRotate "none"MaskPortRotate "default"MaskIconUnits "autoscale"MaskValueString "4.1e-6|80e-3|376e-6|5e-3"System {

    Name "buck converter"Location [464, 154, 1289, 584]

    Open offModelBrowserVisibility offModelBrowserWidth 200ScreenColor "white"PaperOrientation "landscape"PaperPositionMode "auto"PaperType "usletter"PaperUnits "inches"TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]TiledPageScale 1ShowPageBoundaries offZoomFactor "100"Block {

    BlockType InportName "Vg"SID "29"Position [30, 33, 60, 47]IconDisplay "Port number"

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    }Block {BlockType InportName "iout"SID "32"Position [25, 238, 55, 252]Port "3"IconDisplay "Port number"

    }Block {

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    BlockType GainName "1/C"SID "41"Position [345, 224, 385, 256]Gain "1/C"ParamDataTypeStr "Inherit: Inherit via internal rule"OutDataTypeStr "Inherit: Inherit via internal rule"SaturateOnIntegerOverflow off

    }Block {BlockType GainName "1/L"SID "39"Position [465, 55, 495, 85]Gain "1/L"ParamDataTypeStr "Inherit: Inherit via internal rule"OutDataTypeStr "Inherit: Inherit via internal rule"SaturateOnIntegerOverflow off

    }Block {BlockType SumName "Add"SID "44"Ports [2, 1]

    Position [575, 232, 605, 263]InputSameDT offOutDataTypeStr "Inherit: Inherit via internal rule"SaturateOnIntegerOverflow off

    }Block {BlockType GainName "ESR - Capacitor series resistance"SID "43"Position [465, 297, 510, 333]Gain "ESR"ParamDataTypeStr "Inherit: Inherit via internal rule"OutDataTypeStr "Inherit: Inherit via internal rule"

    SaturateOnIntegerOverflow off}Block {BlockType ProductName "Product"SID "33"Ports [2, 1]Position [145, 32, 175, 63]InputSameDT offOutDataTypeStr "Inherit: Inherit via internal rule"SaturateOnIntegerOverflow off

    }Block {

    BlockType GainName "RL - Inductor series resistance"SID "35"Position [465, 110, 495, 140]BlockMirror onGain "RL"ParamDataTypeStr "Inherit: Inherit via internal rule"OutDataTypeStr "Inherit: Inherit via internal rule"SaturateOnIntegerOverflow off

    }

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    Block {BlockType SumName "Subtract"SID "34"Ports [2, 1]Position [245, 42, 275, 73]Inputs "+-"InputSameDT offOutDataTypeStr "Inherit: Inherit via internal rule"SaturateOnIntegerOverflow off

    }Block {BlockType SumName "Subtract1"SID "37"Ports [2, 1]Position [350, 52, 380, 83]Inputs "+-"InputSameDT offOutDataTypeStr "Inherit: Inherit via internal rule"SaturateOnIntegerOverflow off

    }Block {BlockType Sum

    Name "Subtract2"SID "40"Ports [2, 1]Position [240, 222, 270, 253]Inputs "+-"InputSameDT offOutDataTypeStr "Inherit: Inherit via internal rule"SaturateOnIntegerOverflow off

    }Block {BlockType IntegratorName "capacitor integrator"SID "42"

    Ports [1, 1]Position [465, 225, 495, 255]}Block {BlockType IntegratorName "inductor integrator"SID "38"Ports [1, 1]Position [580, 55, 610, 85]

    }Block {BlockType OutportName "Vo"

    SID "30"Position [765, 243, 795, 257]IconDisplay "Port number"

    }Block {BlockType OutportName "iL"SID "36"Position [770, 63, 800, 77]Port "2"

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    IconDisplay "Port number"}Line {SrcBlock "Vg"SrcPort 1DstBlock "Product"DstPort 1

    }Line {SrcBlock "d"SrcPort 1Points [30, 0; 0, -45]DstBlock "Product"DstPort 2

    }Line {SrcBlock "Product"SrcPort 1DstBlock "Subtract"DstPort 1

    }Line {SrcBlock "Subtract"SrcPort 1

    DstBlock "Subtract1"DstPort 1}Line {SrcBlock "Subtract1"SrcPort 1DstBlock "1/L"DstPort 1

    }Line {SrcBlock "1/L"SrcPort 1DstBlock "inductor integrator"

    DstPort 1}Line {SrcBlock "inductor integrator"SrcPort 1Points [80, 0]Branch {

    Points [0, 55]DstBlock "RL - Inductor series resistance"DstPort 1

    }Branch {

    Points [40, 0]

    Branch {DstBlock "iL"DstPort 1

    }Branch {Points [0, 100; -520, 0; 0, 60]DstBlock "Subtract2"DstPort 1

    }}

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    }Line {SrcBlock "RL - Inductor series resistance"SrcPort 1Points [-240, 0; 0, -60]DstBlock "Subtract"DstPort 2

    }Line {SrcBlock "iout"SrcPort 1DstBlock "Subtract2"DstPort 2

    }Line {SrcBlock "Subtract2"SrcPort 1Points [25, 0]Branch {

    DstBlock "1/C"DstPort 1

    }Branch {

    Points [0, 75]

    DstBlock "ESR - Capacitor series resistance"DstPort 1}

    }Line {Labels [0, 0]SrcBlock "1/C"SrcPort 1DstBlock "capacitor integrator"DstPort 1

    }Line {Labels [0, 0]

    SrcBlock "capacitor integrator"SrcPort 1DstBlock "Add"DstPort 1

    }Line {SrcBlock "ESR - Capacitor series resistance"SrcPort 1Points [15, 0; 0, -60]DstBlock "Add"DstPort 2

    }Line {

    SrcBlock "Add"SrcPort 1Points [120, 0]Branch {

    DstBlock "Vo"DstPort 1

    }Branch {

    Labels [3, 0]Points [0, -50; -425, 0; 0, -125]

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    DstBlock "Subtract1"DstPort 2

    }}Annotation {Name "vc"Position [502, 229]

    }Annotation {Name "Vg*d"Position [200, 37]

    }Annotation {Name "iL*RL"Position [421, 119]

    }Annotation {Name "Vo"Position [316, 88]

    }Annotation {Name "di/dt"Position [514, 61]

    }

    Annotation {Name "dv/dt"Position [390, 230]

    }Annotation {Name "Inductor current"Position [771, 46]

    }Annotation {Name "Output voltage"Position [772, 232]

    }Annotation {

    Name "Load current"Position [32, 230]}Annotation {Name "Duty cycle"Position [37, 85]

    }Annotation {Name "Input voltage"Position [47, 22]

    }}

    }

    Block {BlockType OutportName "Vo"SID "52"Position [445, 68, 475, 82]IconDisplay "Port number"

    }Block {BlockType OutportName "iL"

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    SID "54"Position [445, 168, 475, 182]Port "2"IconDisplay "Port number"

    }Line {SrcBlock "PWM"SrcPort 1DstBlock "buck converter"DstPort 2

    }Line {SrcBlock "buck converter"SrcPort 1Points [30, 0]Branch {

    Points [0, 215; -350, 0; 0, -110]DstBlock "Divide"DstPort 1

    }Branch {

    DstBlock "Vo"DstPort 1

    }

    }Line {SrcBlock "Divide"SrcPort 1DstBlock "buck converter"DstPort 3

    }Line {SrcBlock "Vg"SrcPort 1DstBlock "buck converter"DstPort 1

    }

    Line {SrcBlock "d"SrcPort 1DstBlock "PWM"DstPort 1

    }Line {SrcBlock "buck converter"SrcPort 2DstBlock "iL"DstPort 1

    }Line {

    SrcBlock "R"SrcPort 1DstBlock "Divide"DstPort 2

    }}

    }Block {BlockType ConstantName "Duty cylce \nd"

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    SID "2"Position [55, 120, 85, 150]Value "0.42"

    }Block {BlockType ConstantName "Input voltage\nVg"SID "1"Position [55, 55, 85, 85]Value "12"

    }Block {BlockType ConstantName "Load resistance\nR"SID "3"Position [55, 185, 85, 215]

    }Block {BlockType ScopeName "Scope"SID "48"Ports [2]Position [535, 36, 660, 234]Floating off

    Location [1, 71, 1441, 822]Open offNumInputPorts "2"List {

    ListType AxesTitlesaxes1 "%"axes2 "%"

    }YMin "17.92~0.25"YMax "18.07~3.5"DataFormat "StructureWithTime"LimitDataPoints offSampleTime "0"

    }Line {SrcBlock "Input voltage\nVg"SrcPort 1DstBlock "Buck Converter - Open Loop"DstPort 1

    }Line {SrcBlock "Duty cylce \nd"SrcPort 1DstBlock "Buck Converter - Open Loop"DstPort 2

    }

    Line {SrcBlock "Buck Converter - Open Loop"SrcPort 2DstBlock "Scope"DstPort 2

    }Line {SrcBlock "Load resistance\nR"SrcPort 1DstBlock "Buck Converter - Open Loop"

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    DstPort 3}Line {SrcBlock "Buck Converter - Open Loop"SrcPort 1DstBlock "Scope"DstPort 1

    }}

    }# Finite State Machines## Stateflow Version 7.5 (R2010a) dated Mar 4 2011, 20:02:43##

    Stateflow {machine {

    id 1name "my_syncbuck_ol"created "28-Apr-2012 10:31:34"isLibrary 0firstTarget 2

    sfVersion 75014001}target {

    id 2name "sfun"description "Default Simulink S-Function Target."machine 1linkNode [1 0 0]

    }}