near-infrared detector arrays - the state of the art -
DESCRIPTION
Near-Infrared Detector Arrays - The State of the Art -. Klaus W. Hodapp Institute for Astronomy University of Hawaii. Historic Milestones. 1800: Infrared radiation discovered 1960s and 70s: Single detectors (PbS, InSb …) 1980s: First infrared arrays (32 2 , 58 62, 64 2 , 128 2 ) - PowerPoint PPT PresentationTRANSCRIPT
Near-Infrared Detector Arrays- The State of the Art -
Klaus W. Hodapp
Institute for Astronomy
University of Hawaii
Historic Milestones
• 1800: Infrared radiation discovered
• 1960s and 70s: Single detectors (PbS, InSb …)
• 1980s: First infrared arrays (322, 5862, 642, 1282)
• 1990: NICMOS-3 (2.5m PACE-1 HgCdTe)
• 1991: SBRC 2562 (InSb)
• 1994: HAWAII-1 (2.5m PACE-1 HgCdTe)
• 1995: Aladdin (InSb)
• 2000: HAWAII-2 (2.5m PACE-1 HgCdTe)
• 2002: HAWAII-1RG (5.0μm MBE HgCdTe)
• 2002: HAWAII-2RG (5.0μm MBE HgCdTe)
• 2002: RIO 2K×2K NGST InSb
• 2002: RIO 2K×2K Orion
Hawaii-2RG Heritage
1.05 million pixels>3.4 million FETs
CDS: <10e-
16,384 pixels70,000 FETsCDS: <50e-
65,536 pixels250,000 FETsCDS: <30e-
1987 1994 19981990
65,536 pixels250,000 FETsCDS: <20e-
1994
All Successfully Developed on 1st Design PassAll Successfully Developed on 1st Design Pass
4.2 million pixels>13 million FETs
Expect CDS <10e-
Exploiting Many LessonsLearned to Minimize Development Risk
And Enable Next Generation Performance Transition to 0.25µm CMOSWith Full Wafer Stitching and
Low-Power System-on-Chip ASIC
CDS: <TBD e-
2000
-1-2
-1R
Infrared Arrays
•Diode Array
•Multiplexer
•Readout Electronics
Electric Field in a CCD 1.
The n-type layer contains an excess of electrons that diffuse into the p-layer. The p-layer contains an excess of holes that diffuse into the n-layer. This structure is identical to that of a diode junction. The diffusion creates a charge imbalance and induces an internal electric field. The electric potential reaches a maximum just inside the n-layer, and it is here that any photo-generated electrons will collect. All science CCDs have this junction structure, known as a ‘Buried Channel’. It has the advantage of keeping the photo-electrons confined away from the surface of the CCD where they could become trapped. It also reduces the amount of thermally generated noise (dark current).
n p
Ele
ctri
c po
tent
ial
Potential along this line shownin graph above.
Ele
ctri
c po
tent
ial
Cross section through the thickness of the CCD
pixe
l bo
unda
ry
Charge packetp-type silicon
n-type silicon
SiO2 Insulating layer
Electrode Structure
pixe
l bo
unda
ry
inco
min
gph
oton
s
Charge Collection in a CCD.
Photons entering the CCD create electron-hole pairs. The electrons are then attracted towards the most positive potential in the device where they create ‘charge packets’. Each packet corresponds to one pixel
NIR Photodiode Array Technologies
•LPE HgCdTe on Sapphire (PACE-1): Rockwell, CdTe buffer
•MBE HgCdTe on CdZnTe: Rockwell, thin or substrate removed, AR coated
•InSb (Raytheon): Bulk material, p-on-n, thinned, AR coated
•LPE HgCdTe on CdZnTe: Raytheon, thick
•MBE HgCdTe on Si: Raytheon, ZnTe and CdTe buffer, thick, thin in future
Problems:
•Substrate availability
•Thermal expansion match to Si
•Lattice match to detector material
Time
Dio
de B
ias
Vol
tage
0.5 V
0 V
Res
et
Open Shutter Close Shutter
Readout
Re
se
t
kTC Noise
Reset-Read Sampling
Recharge Noise in Capacitors
Energy stored in a capacitor: E = ½ Q²/C
Noise Energy must be: E_n = ½kT
Noise Charge: ½ (Q_n)²/C = ½kT
(Q_n)² = kTC
Q_n = √ kTC
Example:
Capacitance: 50 fF, T=37 K
k = 1.38 e-23 J/K
Q_n = √ kTC
Q_n = 5 e-18 C
With q_e = 1.6 e-19 C
Q_n = 32 electrons rms
Time
Dio
de B
ias
Vol
tage
0.5 V
0 V
Re
se
t
Open Shutter Close Shutter
Readout
Re
se
t
Readout
kTC noise
CD
S S
ign
al
Double Correlated Sampling
Time
Dio
de B
ias
Vol
tage
0.5 V
0 V
Res
et
Open Shutter Close Shutter
Readout
Re
se
t
Readout
kTC noise
MC
S S
ign
al
Fowler (multi) Sampling
Time
Dio
de B
ias
Vol
tage
0.5 V
0 V
Res
et
Open Shutter Close Shutter
Re
se
t
Up-the-ramp Readout
kTC noise
MC
S S
ign
al
Up-the-Ramp Sampling
NASA CDR 05-08-01 Rockwell Proprietary Information
HAWAII-2: Photolithographically Abut 4 CMOS Reticles to Produce Each 20482 ROIC
Twelve 20482 ROICs per 8” Wafer
20482 Readout Provides Low Read Noise for Visible and MWIR
Canon 16mm x 14 mm
GCA 20mm x 20 mm
ASML 22mm x 27.4 mm
Reticle-Stitching: 2048x2048 ROIC
Submicron Stepper Options
External JFETs
optimized
HAWAII-1Rockwell Science Center
• 10241024 2.5m HgCdTe detector array
• 4 Quadrant architecture
• 4 Output amplifiers
• 18.5 m pixels
• LPE HgCdTe on sapphire (PACE-1)
• Use of external JFETs possible
• Available for purchase
HAWAII-1 Focal Plane Array
HAWAII-1
• Quantum efficiency (50% - 60%)
• Dark current 0.01 e-/s (65K)
• Read noise about 10 - 15 e- rms CDS
• Residual image effect
• Some multiplexer glow
• Fringing
3600 s
128 samp
T= 65K
Internal FETs
External JFETs
optimized
Fringing in PACE-1 material
1997 1998
Residual Images in PACE-1 HAWAII-1 Arrays
AladdinRaytheon Center for Infrared Excellence
• 10241024 InSb detector array
• 4 Quadrant architecture
• 32 Output amplifiers
• 27 m pixels
• Thinned, AR coated InSb
• Three generations of multiplexers
• “Foundry Run” distribution mode
Aladdin
• Quantum efficiency high (80% - 90%)
• Dark current 0.2 - 1.0 e-/s
• Read noise about 40 e- rms CDS
• Charge capacity 200,000 e-
• Residual image effect
• No amplifier glow
Aladdin frame taken with SPEX (J. Rayner)
NIRI Aladdin Image of AFGL2591
HAWAII-2Rockwell Science Center
• 20482048 2.5m HgCdTe detector array
• 4 Quadrant architecture
• 32 Output amplifiers
• 3 Output modes available
• 18.0 m pixels
• Use of external JFETs possible
• Reference signal channel
HAWAII-2: Photolithographically Abut 4 CMOS Reticles to Produce Each 20482 ROIC
Twelve 20482 ROICs per 8” Wafer
20482 Readout Provides Low Read Noise for Visible and MWIR
Canon 16mm x 14 mm
GCA 20mm x 20 mm
ASML 22mm x 27.4 mm
Reticle-Stitching: 2048x2048 ROIC
Submicron Stepper Options
HAWAII-2 Reference Signal
New Developments
• Multiplexers:• HAWAII-1R
• HAWAII-1RG
• HAWAII-2RG
• Abuttable 2K2K
• RIO developments
• Detector Materials:• MBE HgCdTe on CdZnTe
• MBE HgCdTe on Si
• Cutoff wavelength
• Thinning
• Substrate removal
• AR coating
NGST H-2RG & H-1R Packaging Critical
Design ReviewMay 8th, 2001
Rockwell Science Center Thousand Oaks, CA
HAWAII Heritage
1024 x 1024 pixels3.4 million FETs
0.8 µm CMOS3-4 e- (8/8 Fowler)
10 e- (CDS)
HAWAII - 1HAWAII - 11994
2048 x 2048 pixels13 million FETs0.8 µm CMOS
3-4 e- (8/8 Fowler)10 e- (CDS)
1998HAWAII - 2HAWAII - 2 HAWAII - 1RHAWAII - 1R
2000
2048 x 2048 pixels25 million FETs0.25 µm CMOS
HAWAII - 2RGHAWAII - 2RG
1024 x 1024 pixels3.4 million FETs
0.5 µm CMOSno noise data
Stitching(four independ.Quadrants)
Guide mode& additional
read/reset opt.
True stitching
Referencepixels
WFC 3
RSC Approach
H A W A I I - H A W A I I - 2 R G2 R G
H A W A I I - H A W A I I - 2 R G2 R G
• HgCdTe detector – substrate removed to achieve 0.6 µm sensitivity
HgCdTe Astronomy Wide Area Infrared Imager with 2k2 Resolution, Reference pixels and Guide Mode
• Specifically designed multiplexer– highly flexible reset and readout options – optimized for low power and low glow operation– three-side close buttable
• Two-chip imaging system: MUX + ASIC– convenient operation with small number of clocks/signals– lower power, less noise
HAWAII-2RG: UMC 0.25µm CMOS
• 3.3/2.5V Process on Epi Wafers
• 1 Poly/4- or 5-Metal
• 65/33Å Oxide
• Low, Normal and High Threshold Voltage Options
• MIM (Analog) Capacitor
• 22 mm by 22 mm Stepper Field
• Full Intra-Reticle Stitching
• One Mask Set Comprising Modular Blocks to Photocompose Each CMOS Multiplexer on 200 mm Wafers
• 2048 x 2048 resolution with 18 µm square pixels
• True stitched design (electrical connections across stitching lines)
• Close buttable die : - 2.5 mm mux overlap on top (pad) side - 1 mm mux overlap on each side gap 2 mm)
• 1, 4, or 32 output mode selectable
• Slow mode (100 kHz) and fast mode (5 MHz with additional column buffers) selectable, both usable with internal and external buffers
NGST Multiplexer Overview
Number ofoutputs
Frame time in slowmode
Frame time infast mode
1 42 s 840 ms
4 10.5 s 210 ms
32 1.3 s 26 msNGSTNGST
Output Options
Slo
w s
can
dire
ctio
n se
lect
able
Single output for all2048 x 2048 pixels
(guide mode always uses single output)
Fast scan direction selectable
Single Output ModeSingle Output Mode
default scan directions
Fast scan direction individuallyselectable for each subblock
Separate output for each subblock of 512 x 2048 pixels
S
low
sca
n di
rect
ion
sele
ctab
le
4 Output Mode4 Output Mode
default scan directions
Output Options (2)Sl
ow s
can
dire
ctio
n se
lect
able
32 Output Mode32 Output Mode
Separate output for each subblock of 64 x 2048 pixels
Four different patterns for fast scan direction selectable
default scan directions
Interleaved readout of full field and guide window
Guide windowGuide window
Full fieldFull field
FPAFPA• Switching between full field and guide window is possible at any time
any desired interleaved readout pattern can be realized• Three examples for interleaved readout:
1. Read guide window after reading part of the full field row
2. Read guide window after reading one full field row
3. Read guide window after reading two or more full field rows
Pixel by pixel reset Line by line reset Global reset
Full field
Guidewindow
Pixel by pixel reset Line by line reset Global reset
Full field
Guidewindow
Reset Schemes
3-D Barrier to Prevent Glow from Reaching the Detector
Metal 1
Metal 2
Metal 3
Poly 1
Analog Capacitor
Lo
w-N
ois
e C
MO
S M
ult
iple
xer
p-type
n+
HgCdTeDetector
IndiumInterconnect
Overglass
CMOS (LOCOS)
HAWAII-1RG Comes First
• In order to decrease risk and to get testable devices earlier, a smaller version of the HAWAII-2RG will be produced first.
H A W A I I - H A W A I I - 1 R G1 R G
H A W A I I - H A W A I I - 1 R G1 R G• 1024 x 1024 pixels (upper left quadrant of HAWAII-2RG)
• Full functionality of HAWAII-2RG
• 16 / 2 / 1 Outputs
• Some Pads folded along the right mux side
• Fits in one reticle no stitching required
CCD Mosaic Building Blocks-A Mature Packaging Technology
8K x 8K Mosaic CCD Array
•Constructed from 2Kx4K building block arrays
Prototype 2×2 Mosaic for NGST
Ground-Based Camera Projects
•IfA ULB
•UKIRT WFC
•CFHT WIRCAM
•Gemini GSAOI
•ESO VISTA
•Keck KIRMOS
Continuing to Aggressively Use CMOS• 5 Designs in 0.25µm
• 3.3/1.8V 0.18µm CMOS underway for ProCam-2
• Also migrating to 0.13µm on newest programs to boost performance via Cu and low-k interlayer dielectrics
Year of Introduction1965 1970 1975 1980 1985 1990 1995 2000 2005
Min
imu
m F
eatu
re (
µm
)
0.1
1
10
DRAM CMOSRSC FPA
After Isaac (1999)