Noise and Delay Uncertainty Studies for Coupled RC Interconnects

Andrew B. Kahng, Sudhakar Muddu† and Devendra Vidhani‡

UCLA Computer Science Department, abk@cs.ucla.edu†Silicon Graphics Inc., muddu@mti.sgi.com

‡Sun Microsystems, dv@eng.sun.com

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Outline of Talk

Signal Integrity issues

Previous works

Our Contributions– Circuits Models

– Delay and Noise Equations

Simulation results

Conclusions

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Interconnect induced issues– scaled linewidths greater wire and via RC– increased aspect ratios greater wire and via RC– larger die sizes greater wire and via RC– more metal layers higher coupling to ground ratio

Process Induced Issues– low device thresholds increased susceptibility to

low noise margins– low VDD increased susceptibility to low

noise margins– high frequency faster slew times

Factors Affecting Signal Integrity

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Focus: Crosstalk Issues

Functionality Issues– peak noise

false switching of noise sensitive nodes in the design

Timing Issues– delay uncertainty

maximum difference between maximum and minimum victim line delay over all possible cases of switching activity on neighboring aggressor line(s)

Motivation: find noise issues ASAP!!– find signal integrity problem earlier in deisgn– provide sufficient conditions for finding problem

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Outline of Talk

Signal Integrity issues Previous works Our Contributions

– Circuits Models– Delay and Noise Equations

Simulation results Conclusions

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Previous Work on Signal Integrity

Vittal et. Al., 97: L model; step input; ignore Rint, Cint

Kawaguchi et. Al., 98: diffusion equations; step input; same peak noise expressions as Vittal

Nakagawa et. Al., 98: L model; assumptions about peak noise time

Shepard et. Al., 97: L model; ignores R and C of aggressors; uses ramp with heuristics

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Previous Work on Signal Integrity Issues

Circuit models issues– use lumped capacitance models

– use charge sharing models

Noise models issues– estimations very pessimistic

– assumptions about R and C

– assume zero slew rate

– some are simulation based

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Outline of Talk

Signal Integrity issues Previous works Our Contributions

– Circuits Models– Delay and Noise Equations

Simulation results Conclusions

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Our Work

Improved peak noise and delay and noise models– better peak noise estimates– analytical equations for delay uncertainty

Methodology– for coupled RC interconnects only– takes drivers into account– considers slew times– considers both lumped L-Model and -Model– considers both local and global lines

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Our Work

Circuit model

L model

model

Noise analysis and peak noise expressions

Delay analysis and delay uncertainty

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Circuit Model

Two parallel coupled lines

Aggressor - Green; Victim - Red

Coupling capacitance - Cc

Supply voltages - Vs1, Vs2

Aggressor Line

Victim Line

Vs1

Vs2

Driver 1

Driver 2

Load 1

Load 2Cc

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No resistance Lumped capacitance -

C1, C2

Load capacitance - CL1, CL2

Node C has noise voltage

Charge Sharing Model

C

B

Vs1

Vs2

CL1

Aggressor Line

Victim Line

Cc1

C’1

C1

CL2

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Noise Analysis For Charge Sharing Model

Basic noise analysis model– Victim line quiet

– Aggressor line switching

Peak noise defined by ratio of coupling capacitance to total capacitance of wire

)'1

1(1 CcC

sVpeakV

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All resistances considered

Lumped capacitances

Different slew times considered

Lumped L Model

B

C

Vs1

Vs2

Rd2

R1

R’1

CL1

Aggressor Line

Victim Line

Rd1

Cc1

C’1

C1

CL2

Solve using nodal equations at B and C

]1)('1)[2

'1(2

]1)(1)[11(1

CsCBVCVsCCVdRRCVSV

CsCCVBVsCBVdRRBVSV

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M1, M2, a1, and a2, are given as

Solving L Model

)2211(

)2(1

)2211(

)11(1

sMsM

sasVCV

sMsM

sasVBV

1)'12(1

)1'1)('

12(1

)]1'11

'111)('

12)(11[(2

)]1'1)('

12()11)(11[(1

cCRdRa

cCCRdRa

CCcCCcCCRdRRdRM

cCCRdRcCCRdRM

Transfer functions for nodes B and C are

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Noise Analysis For L Model

L model voltage function for ramp input at victim node C (TS is slew time)

L model peak noise expression for step input reduces to Vittal et. Al. peak noise expression

STt

STtse

tse

sssMSTts

ets

esssMST

avSTt

tse

sssM

tse

sssMST

av

tcv

)])(22(

)21(22

1))(11(

)21(12

1[20

]2)21(22

11)21(12

11[20

)(

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Peak Noise For L Model

Differentiate vc(t) to get tpeak

L Model peak noise at tpeak

)21(2

)11(

)21()21(22

)21(

)21(1

)11(

)21()21(12

)11(

20

sss

STse

STse

sssM

STse

sss

STse

STse

sssM

STse

ST

avpeakv

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Lumped - Model

C

B

Vs1

Vs2

Rd2

C1

Cc1

D

AR1

R’1

CL1

Aggressor Line

Victim Line

Rd1

Cc2

C’1

C’2

C2

CL2

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Peak Noise For Model

Vpeak is given at vc( tpeak)

where

STpeaktsTs

e

sTse

sk

sk

sspeakt

STpeaktsk

sk

sspeakt

2 11

11

22

11ln22

12

10 22

11ln22

11

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Delay Uncertainty

Maximum difference between maximum and minimum delay

Caused by crosstalk between victim and aggressor switching simultaneously

Maximum delay by worst case– Aggressor and victim switching in opposite directions

Minimum delay by best case– Aggressor and victim switching in same direction

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General Case– both victim ramp (TS2) and aggressor ramp (TS2) and four regimes of

operation

Simultaneous Switching of Victim & Aggressor

Our Case: first region is empty

0

V0

0

V0

Ts1

Vs2

Ts2

Vs121 STtST 2STt 1STt

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Delay Uncertainty

Our delay uncertainty study based on Model

Corresponding voltage function at node C

12 21

)])2(11(3)

)2(22(221[2

021 21

)13

2210(

2

0

)(

sTtsTiforsT,tsTtif

sTtse

tseksTts

ets

eksTksT

vsTtsTiforsT,tsTtif

tsek

tsektkk

sT

v

tcv

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Delay Function

Delay Function at node C

12

where12 21

|))1(2

)2|1|1(3ln(|

|1|1

2)1(

21 21

)1302)11((

1

1

bsTthvADT

sTtsTiforsT,tsTtifthvsT

sTsek

ssTthv

sTtsTiforsT,tsTtif

ADTsekksTthvk

k

vD

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Outline of Talk

Signal Integrity issues Previous works Our Contributions

– Circuits Models– Delay and Noise Equations

Simulation results Conclusions

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Simulation Results

Simulation configuration– 0.25 micron technology

– analyzing different metal layer wires

– analyze different factors like slew, coupling cap, etc.

Peak noise results w.r.t. slew Best and worst delay result Delay uncertainty w.r.t. aggressor slew and

coupling

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Simulation Configuration

Criteria– global wires (case 2 and 3) and local wires (case 1 and 4)– different coupling to ground capacitance ratios

Cases Width(in m)

Spacing(in m)

Length(in m)

Rint

(in )Cgnd

(in fF)Ccoup

(in fF)1 0.49 0.46 1000 122.9 63.2 115.02

2 0.49 0.46 5000 614.32 315.77 575.033 1.00 0.46 10000 605.63 983.97 1187.034 0.49 1.30 1000 122.9 109.3 46.2

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Peak Noise Results

Peak noise for different models Comparison with previous work (Vittal et. Al. and

Kawaguchi et. Al.) Our results considered different slew times at aggressor

Ts = 0 ps Ts = 100 psCases

SPICE L[Vittal] KS [Our] SPICE [Our]

1 0.080 0.174 0.174 0.088 0.060 0.060

2 0.210 0.275 0.275 0.184 0.209 0.183

3 0.221 0.255 0.255 0.183 0.210 0.183

4 0.037 0.075 0.075 0.037 0.026 0.024

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Peak Noise Results

Peak noise for different models Comparison with previous work (VittalM97 and

Kawaguchi-Sakurai) Our results considered different slew times at aggressor

Ts = 200 ps Ts = 400 psCases

SPICE [Our] SPICE

[Our]

1 0.035 0.035 0.018 0.0172 0.200 0.181 0.198 0.1733 0.202 0.183 0.199 0.1814 0.012 0.010 0.007 0.007

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Peak Noise Variation For Local Wires

Peak noise variation with respect to slew of aggressor for local wire case 1

0

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.18

0.2

0 100 200 400

Slew on input of the inverter for aggressor line (in ps)

Noi

se V

alue

s (in

ratio

to V

_dd)

L_OURPi_OURSPICE

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Peak Noise Variation For Global Wires

Peak noise variation with respect to slew of aggressor for global wire case 3

0.18

0.19

0.2

0.21

0.22

0.23

0.24

0.25

0.26

0 100 200 400

Slew on input of the inverter for aggressor line (in ps)

Noi

se V

alue

s (in

rat

io to

V_d

d)

L_OURPi_OURSPICE

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Victim Delay Results (Best/Worst Case)

Worst case delay values using 50% threshold delay

Aggressor and victim switching in opposite directions

Same slew time on victim and aggressor

Case 1 and 4 - local Case 2 and 3 - global

Ts = 0 ps Ts = 100 psCases

SPICE [Our] SPICE

[Our]

1 16/24 15/25 20/32 21/332 138/405 133/377 142/408 135/3793 293/835 271/769 296/839 272/7694 18/22 17/21 24/30 25/29

Ts = 200 ps Ts = 400 ps

SPICE [Our] SPICE

[Our]

1 23/35 23/35 25/38 23/372 149/411 141/381 169/422 163/3893 300/842 276/771 314/847 287/7754 25/32 25/31 26/33 25/31

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Victim Delay Uncertainty With Slew Times

Delay uncertainty constant with same slew time on victim and aggressor

0

100

200

300

400

500

600

0 100 200 400

Slew on input of the inverter for both lines (in ps)

Del

ay U

ncer

tain

ty v

alue

s (in

ps)

Case 1 (Spice)Case 1 (Our)Case 2 (Spice)Case 2 (Our)Case 3 (Spice)Case 3 (Our)Case 4 (Spice)Case 4 (Our)

accuracy within 15% of spice

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Victim Delay Variation W.R.T. Coupling

Best and worst case delays variation with coupling capacitance variation

Same slew time on victim and aggressor Case 1 is local interconnect and case 2 is global interconnect

Case 1 (ps) Case 2 (ps)RatioCcoup/Cg

ndOur Spice Our Spice

0.25 31 32 309 3320.55 33 34 337 3621.00 35 35 363 3911.82 37 36 389 4204.00 39 39 417 451

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Victim Delay Variation With Aggressor Slew

Dependence of delay on slew times of aggressor (case 1)

0

10

20

30

40

50

60

100 200 300 400 500 600 700

Slew on input of the inverter for aggressor line (in ps)

Del

ay V

alue

s (in

ps)

Worst Case OurBest Case OurWorst Case SpiceBest Case Spice

Impact of aggressor slew on delay Victim slew constant at 400 ps 15% accuracy

w.r.t. spice Local

interconnect (case1) delay highly sensitive to slew time

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Victim Delay Variation With Aggressor Slew

Dependence of delay on slew times of aggressor (case 2)

100

150

200

250

300

350

400

450

500

100 200 400 500 600 700 900 1000

Slew on input of the inverter for aggressor line (in ps)

Del

ay V

alue

s (in

ps)

Worst Case OurBest Case OurWorst Case SpiceBest Case Spice

Impact of aggressor slew on delay Victim slew constant at 400 ps 15% accuracy

w.r.t. spice Local

interconnect (case1) delay highly sensitive to slew time

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Conclusions

Provide simple, fast and accurate analytical expressions for peak noise and delay estimates

Consider all R and C and all slew times Provide noise awareness methodology

possibility earlier in design phase Easy extensions

– multiple aggressor lines– slew offsets