november 12, 2003 1 instrument electronics henrik von der lippe lawrence berkeley national...

1November 12, 2003

Instrument Electronics

Henrik von der LippeLawrence Berkeley National Laboratory

November 11th, 2003

2November 12, 2003

• Overview & strategy

• Baseline for SNAP Instrument electronics system

• R&D goals

• Progress last year

• CCD & IR focal plane modules

• Mass memory & Compression

• Observatory Control Unit

• Schedule

• Manpower

• R&D management

• R&D deliverables

• Summary

Outline

3November 12, 2003

Instrument electronics

PROPULSION

CONTROLLER

/ACS

ITHACOTYPEBREACTIONWHEEL

SUNSENSORS

GUIDESTARTRACKER

INFRA REDIMAGER

VISIBLEIMAGER

AND POSITION SENSORSHUTTER MOTOR

AND POSITION SENSORSFILTER WHEEL MOTORS

FOCUS CONTROL MOTORSAND POSITION SENSORS

LiHBATTERY21AH2

TOINSTRUMENTS&S/CSYSTEMS

POWER

CONTROLLERSYSTEM

REGULATED+28V

UNIT

COMMAND&DATA

HANDLING

LOWERLGAA

UPPERLGAA

(PRIME)

GIMBLEHGA2AXIS

50CMDIA

TRANSMITTER

6WATT

KaBANDHGA

TRANSPONDERS-BAND5WATT

(PRIME)

LiHBATTERY21AH2

REGULATED+28VTOINSTRUMENTS&S/CSYSTEMS

CONTROLLER

POWERSYSTEM

44

TRANSMITTER

HGA2AXISGIMBLE

KaBAND

6WATT50CMDIA

HGA

TRANSPONDER

UPPERLGAB

LOWERLGAB

S-BAND

(BACK-UP)

5WATT




GROUPB

SETTHRUSTERPRIME

SET

THRUSTERBACK-UP

PROPELLANTTANK

PROPULSION

CONTROLLER

/ACS

CIRCUITBREAKER

BREAKERCIRCUIT

CIRCUITBREAKER

BREAKERCIRCUIT

5OR6TOTAL

5OR6TOTAL

(BACK-UP)

(PRIME)

HANDLING

COMMAND&DATA

UNIT

THRUSTER

(BACK-UP)

CIRCUIT

CLK/BIAS

CIRCUIT

AlN2

CKT

BD

8

2

2

10

CRIC

ASIC

BOARD

30

6

30CRIC

6

STROBE

STROBE

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

CLOCK2

2

3

GROUND

CLOCK

6

8

2

DC-DC

CONV

3

2

BACK-UPINTERFACE

PRIMEINTERFACE

INTERFACE

INTERFACE

INTERFACE

INTERFACE

3

1

1

1 1

1

1

MATRIX CONTROLDRIVER

3

1

3

1

1

1

1 1

1

1

136

RELAY

1

1

4

1

36

35

3

1

1

1

1

1

1

1 1

36

DRIVERMATRIXRELAY

3

3

1

1

1

1

1

1

1

1

1

36

CONTROL

1

4

35

13 1113 1111 3 11DRIVERMATRIXRELAY 1111 35CONTROL36 361 4CONTROL 4 113 11113 1111 3 11DRIVERMATRIX 1111136 361 35

1

1

RELAY

1

35

36

X36 TOTAL

PRIMEINTERFACE

INTERFACEBACK-UP

BACK-UPINTERFACE

PRIMEINTERFACE

3

3

1

1

1

1

1

1

1

1

1

1

1

INTERFACEPRIME

INTERFACEBACK-UP

RELAY

DRIVERMATRIX

1

1

1

336

CONTROL

1

1

1

4

1

1

1

1

1

1

3

1

1

1

1

1

1

1

DRIVERMATRIXRELAY

3

3

1

1

1

361

1

36

35

1

CONTROL 4

SPECTRO-GRAPH

A

GRAPHSPECTRO-

B

CIRCUIT

CLK/BIAS

AlN2

BD

CKT

BOARD

8 CRIC

ASIC2

10

2

6

30CIRCUIT

CRIC

6

30

CKT

BD

AlN2

STROBEBI-DIRECTIONAL DATA

BI-DIRECTIONAL DATASTROBE

DC-DC

CONV

2

2

CLOCK

CLOCK

8

6 2

INTERFACE

3

3

GROUND

2

MONITORSAND MECHANICAL

PRIME



CONV

DC-DC2

CHIP

ROCKWELLSIDECAR

CLOCK

CLOCK

3

3

GROUND

PRIMEINTERFACE

2

CONV

DC-DC

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

STROBE

STROBE

BD

CKT

AlN2

CLK/BIAS

CIRCUIT3030

BOARD

ASIC

CRIC8

CIRCUIT

10

2

2

CRIC

6 6

6

2

2

CLOCK

2

CLOCK

8

3

GROUND

3

PRIME

BACK-UP

2

STROBE

STROBE

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

DC-DC

CONV

AlN2

CKT

BD

CIRCUIT

CLK/BIAS

8 CRIC

ASIC2

2

6

CRICCIRCUITBOARD

30

6

10

30

2 CLOCK

2

8

6

CLOCK

2

3

GROUND

BACK-UP

2

3

PRIME

CONVDC-DCBI-DIRECTIONAL DATABI-DIRECTIONAL DATASTROBESTROBEBDCKTAlN2 BOARDASICCRIC8 1022 2 CLOCK2 CLOCKCLK/BIASCIRCUIT30 CIRCUITCRIC6 306 68 2 PRIME3 GROUND3 BACK-UPINTERFACEINTERFACE2STROBESTROBEBI-DIRECTIONAL DATABI-DIRECTIONAL DATADC-DCCONV

CONV

DC-DC

BI-DIRECTIONAL DATABI-DIRECTIONAL DATASTROBESTROBEAlN2CKTBDBDCKTAlN2

CIRCUITCLK/BIAS8 CRICASIC 226 CRICCIRCUITBOARD30 61030 2 CLOCK286 CLOCK2

CLK/BIAS

CIRCUIT3030

BOARDASICCRIC8

CIRCUIT

1022

CRIC

6 6

6

2

2

CLOCK2 CLOCK

8

3 GROUND BACK-UPINTERFACE23 PRIMEINTERFACE3 GROUND3INTERFACEPRIME

INTERFACEBACK-UP

2

BACK-UP

INTERFACE

THERMALCONTROLBOARD

POWERCONTROLBOARD

E.G.32LINESTOTAL

TOHEATER

MODULES

COMMANDS

INTERFACE

FROMDPU

DATA

+28VOLTPOWER

DPUBOARD

MEMORYCONTL/FORMATBD

UNITA

INSTRUMENTMEMORY

CALIBSOURCECONTLBD

MOTORCONTROLBOARD

CONTLBDFROMPWR

INSTRUMENTPOWERSERVICES

FOCALPLANEINTFBD

UNITB

MEMORYINSTRUMENT

CONNECTORS INSTALLEDAS NEEDED TO SEPARATEMECHANICAL ASSEMBLIES

21AUGUST,2003HHEETDERKSHHEETDERKSCOGENG'R:TITLE:DRAWNSHEET1OF1DATE:NO:DWGREV:

FLEXCIRCUIT LINK BETWEEN135 DEG K FOCAL PLANE AND290 DEG K SURROUNDINGSTRUCTURETHERMAL FLEXCIRCUIT LINKS MAY BE COMBINEDTO FORM A SMALLER NUMBER OF ASSEMBLIESAS LONG AS PRIME AND REDUNDANT CIRCUITS ARENOT INCLUDED IN THE SAME ASSEMBLY

ALL CIRCUITS ONFOCAL PLANEOPERATE AT135 DEG K

MEMORYSYSTEMTESTCONNECTOR


QUAD THERMALCONTROLLER ASIC

DOWNLINK MONITORTEXT CONNECTOR

TEXT CONNECTORDOWNLINK MONITOR

MOTORCONTROLBOARD

CALIBSOURCECONTLBD


FOCALPLANEINTFBD

DPUBOARD

MAY NEEDFPGA TO

IMPLEMENTREDUNDANTINTERFACES

BI-DIRECTIONAL DATA

GROUND

BI-DIRECTIONAL DATA

CKT

AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED

REDUNDANTIMPLEMENTFPGA TO

STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

BI-DIRECTIONAL DATA

GROUND

BI-DIRECTIONAL DATACKT

AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED


STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

BI-DIRECTIONAL DATA

GROUND

BI-DIRECTIONAL DATA

CKT

AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED


STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

GROUPA

SUNSENSORS

STAR TRACKERBALL CT-602

LITTON3 AXIS HRG

UNIT A

PRIME3 AXIS HRGLITTONBACK-UP


UNIT B

STAR TRACKERUNIT CBALL CT-602

MECHANISMSMOUNTED ON

OPTICS BENCH

INSTRUMENT

INSTRUMENTMOUNTED ONOPTICS BENCHCOMPONENTSACSSPACECRAFT USEANESIZEPRINTERFORGOODLEGIBILITY,

INTERFACE

FROMDPU

+28VOLT

CONTLBDFROMPWR

DATACOMMANDS

POWERCONTROLBOARD

SERVICESPOWERINSTRUMENT

TOHEATER

MODULES

THERMALCONTROLBOARDTOTAL

E.G.32LINES

POWER

INTERFACE

BACK-UP

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATABD

ASIC

CRIC8

2

10

2 2

2

CLOCKSTROBE

CKT

AlN2

CRICCIRCUITBOARD

30

6

30

6

BD

AlN2

CKT

CLK/BIAS

CIRCUIT6

8

2

CLOCK

CONV

DC-DC

STROBE

INTERFACES

CHIPSIDECAR

ROCKWELL

2


CLOCKSTROBE

MAY NEEDCLOCK

DC-DC

CONV

STROBE

BACK-UP

INTERFACE

GROUND

3

INTERFACE

2

3

PRIME

INTERFACE

BACK-UP

INTERFACE

GROUND

3

2

3

PRIME

1

1

RELAYMATRIXDRIVER

1

1

3

1

13

1

1

1

1

3

1

1

1

1

3

CONTROL

41

4

1

4

1

3 1

1

1

1

1

1

113

13

3 1

1

1

1

1

1

1

13

1

1

1

1

1

1

1

3

RELAYMATRIXDRIVER

1

1

1

1

CONTROL

4

4

1

4


INTERFACEPRIME

BACK-UP

INTERFACE

PRIMEINTERFACE

BACK-UP

INTERFACE

15531553444444444444

POR

DUALFIELDCOILS

POR

DUALFIELDCOILS

3

3

3

3

3

3

3

3

3

3

33

56

56

300MHZDOWNLINKPRIME

300MHZDOWNLINKBACK-UP


300MHZDOWNLINKPRIME

+28VOLTPOWERFROMPRIMES/CPWRDISTUNIT

PWRDISTUNITBACK-UPS/CPOWERFROM+28VOLT

HARNESSSHOWNINCYANISSUPPLIEDBYTHESPACECRAFTVENDOR

NOTETHATTHEREISANADDITIONALSETOFPRIMEANDBACK-UPHARNESSESFROM

WHICHISNOTSHOWNTHEPOWERSYSTEM

PWR DIST UNITBACK-UP S/CPOWER FROM+28 VOLT+28 VOLTPRIME S/CPOWER FROMPWR DIST UNIT15531553PWRDISTUNITBACK-UPS/CPOWERFROM+28VOLT


HYDRAZINELINES

CALIBRATION LIGHT SOURCES (PRIME)

CALIBRATION LIGHT SOURCES (BACK-UP)

HARNESS SHOWN IN MAGENTAIS SUPPLIED BY THEINSTRUMENT FABRICATOR

TELESCOPE FOCAL PLANE ASSEMBLY

THEPRIMEANDBACK-UPOCUEACHHAVEA28VOLTPOWERSERVICEFROMBOTHTHEPRIMEANDTHEBACK-UPPOWERSWITCHINGUNITS.POWERTOALLOTHERINSTRUMENTFUNCTIONSISSUPPLIEDBYTHEOCU.

(PRIME)

(BACK-UP)

OBSERVATORYCONTROLUNIT(PRIME)

SPACECRAFTINSTRUMENT TO

CONNECTOR

INSTRUMENT TOSPACECRAFTCONNECTOR


SPACECRAFTPOWERSUBSYSTEM

SPACECRAFTCOMMANDANDDATASUBSYSTEM

SPACECRAFTATTITUDECONTROLSUBSYSTEM

IMAGER CCD MODULE

GUIDER CCD MODULE

SPECTROGRAPH CCD MODULE

SPECTROGRAPH IR MODULE

3

2

3

2

GUIDER CCD MODULE

GUIDER CCD MODULE

IMAGER IR MODULE

IMAGER CCD MODULE

IMAGER CCD MODULE

IMAGER IR MODULE

IMAGER IR MODULE


2

3

2

3


CLOCK DRIVER MODULE

CLOCK DRIVER MODULE

CLOCK DRIVER MODULE

CLOCK DRIVER MODULE

CLOCK DRIVER MODULECLOCK DRIVER MODULE

CLOCK DRIVER MODULE

CONTROLLED BY TWO4 REDUNDANT HEATERS

CIRCUIT MODULES

HEATER ELEMENT.REDUNDANT MINCO

CLOCK DRIVER MODULE

BETWEEN INSTRUMENT

MECHANICALINTERFACE

AND SPACECRAFTANDSPACECRAFTBETWEENINSTRUMENT

ELECTRICALINTERFACE

INTERFACE BOARDPRIME OCU

INTERFACE BOARDBACK-UP OCU

3

2

3

2

2

3

3

2

3

2

2

3

2

3

2

3

3

2

3

2

3

2

2

3

32323223323

2

THIS HARNESS IS FIXEDON FOCAL PLANE

SPACESCIENCESLABORATORYLAWRENCEBERKELEYNATIONALLABORATORY

FIRSTVERSIONRELEASEDINTOCM.SHOWSCCDMODULEWITHINTEGRATEDCLOCKDRIVERS;FOCALPLANEREDUNDANCYSWITCHING;DESCRIPTION

CREV C.M.

2003AUG28

DATEM.A.ENGRCHK

HDHHDH

BYREVSYS

HASCOMPLETEFOCALPLANEHARNESSANDTHERMALLINKS;SHOWSMOREDETAILONOCUREQUIREMENTSANDFUNCTION.HDHHDHD MODIRDETELECTRONICSPERH.VONDERLIPPECOMMENTS;DOWNLINKDATAFROMOCU;SHOWACSCOMPONENTSONOPTICBENCHHDHHDH2003OCT10

OCUINTERFACESDIRECTLYTOSPECTROGRAPHDETECTORMODULES.THISSIMPLIFIESSPECTROGRAPHELECTRONICS.E HDHHDH2003OCT17

OCU & Mem

Spectrograph

Imager

Star Guider

Thermal Ctrl

4November 12, 2003

Instrument Electronics Layout

Focal plane

Massmemory

OCUPowersystem

Battery

5November 12, 2003

Strategy for Instrument Electronics

• Employ existing, tested solutions with space flight heritage wherever possible

• Avoid single-point failures and maintain redundancy where possible within power, weight, cost budgets

• Keep number of components and interconnections to a minimum for reliability

• Reduce number and length of cables carrying low-level analog signals to avoid noise pickup, crosstalk

• Use a common architecture for readout of different sensors to extent possible, to reduce number of different electronics systems

• Have a fallback option for areas of technical or schedule risk

6November 12, 2003

Baseline SNAP Electrical System

• System is has no single point failures— Fully redundant and cross strapped on spacecraft side

— Redundant Observatory Control Units and Large Memories on instrument side

— Instrument Detectors and Mechanisms modularized for failure tolerance

• Uses Industry Standard (e.g. 1553) interface between instrument and spacecraft

• Wide band downlink controlled directly by instrument• Memory Capability incorporated into the Instrument

— No need for Solid State Recorder in spacecraft

• Spacecraft consists of 3 independent modules connected by a 1553 bus

— Power system

— ACS System

— C&DH System

7November 12, 2003

R&D Goals

1. Risk mitigation through early R&D

2. System requirements & interface control documents

3. Conceptual design of electronics/DAQ system/Instrument control

4. Realistic cost & schedule estimate for CDR

• There are only a few key areas where hands-on R&D is required for risk mitigation, mostly in front-end readout and control

• The remainder of the electronics R&D program consists primarily of requirements & interface documentation, conceptual design studies, and cost and schedule estimates for the CDR.

8November 12, 2003

Electronics Working Concept

• Front-end electronics (control and readout) mounted on back of cold plate

+ Reduces cable plant, simplifies grounding & shielding issues, mass+ Minimize cross-talk, pickup for small analog signals+ Reduces power consumption due to increase in e- mobility+ Avoid problems associated with driver on CCD - power, noise+ Compatible with HgCdTe readout being developed by Rockwell for

NASA - must be <10 cm from sensor & operate cold– Thermal constraints - must keep cold plate cold

– Implications for total power and mass of cold plate

• Back-end electronics located in shielded room temperature boxes mounted on space craft

+ Lower radiation exposure+ Simpler temperature requirement+ No thermal impact on focal plane

9November 12, 2003

Progress last year

• Successful Front-end test IC (CRIC)Design specs:

— Photometry: CCD + electronic noise 4.0e- rms— Spectrograph: CCD + electronic noise 2.0e- rms— Large dynamic range: 96dB from noise floor to

130k e- well depth (16-bit)— Readout frequency: 100 kHz & 50kHz— Radiation tolerance: 10 kRad ionization (well

shielded)— Power: 200mJ/image/channel => 10mW/channel

(6.5mW for the analog front-end, 3.5mW for the ADC)

— Operation at 140K and 300K

• Combined CRIC-CCD test in progress (one year ahead of schedule)

• Radiation tolerance testing in progress

• Overall block diagram for the instrument has been developed

10November 12, 2003

CCD module

PROPULSION

CONTROLLER

/ACS


SUNSENSORS

GUIDESTARTRACKER

INFRA REDIMAGER

VISIBLEIMAGER




LiHBATTERY21AH2


POWER

CONTROLLERSYSTEM

REGULATED+28V

UNIT

COMMAND&DATA

HANDLING

LOWERLGAA

UPPERLGAA

(PRIME)

GIMBLEHGA2AXIS

50CMDIA

TRANSMITTER

6WATT

KaBANDHGA


(PRIME)

LiHBATTERY21AH2


CONTROLLER

POWERSYSTEM

44

TRANSMITTER

HGA2AXISGIMBLE

KaBAND

6WATT50CMDIA

HGA

TRANSPONDER

UPPERLGAB

LOWERLGAB

S-BAND

(BACK-UP)

5WATT




GROUPB

SET

THRUSTERPRIME

SET

THRUSTERBACK-UP

PROPELLANTTANK

PROPULSION

CONTROLLER

/ACS

CIRCUITBREAKER

BREAKERCIRCUIT

CIRCUITBREAKER

BREAKERCIRCUIT

5OR6TOTAL

5OR6TOTAL

(BACK-UP)

(PRIME)

HANDLING

COMMAND&DATA

UNIT

THRUSTER

(BACK-UP)

CIRCUIT

CLK/BIAS

CIRCUIT

AlN2

CKT

BD

8

2

2

10

CRIC

ASIC

BOARD

30

6

30CRIC

6

STROBE

STROBE

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

CLOCK2

2

3

GROUND

CLOCK

6

8

2

DC-DC

CONV

3

2

BACK-UPINTERFACE

PRIMEINTERFACE

INTERFACE

INTERFACE

INTERFACE

INTERFACE

3

1

1

1 1

1

1


3

1

3

1

1

1

1 1

1

1

136

RELAY

1

1

4

1

36

35

3

1

1

1

1

1

1

1 1

36

DRIVERMATRIXRELAY

3

3

1

1

1

1

1

1

1

1

1

36

CONTROL

1

4

35


1

1

RELAY

1

35

36

X36 TOTAL

PRIMEINTERFACE

INTERFACEBACK-UP

BACK-UPINTERFACE

PRIMEINTERFACE

3

3

1

1

1

1

1

1

1

1

1

1

1

INTERFACEPRIME

INTERFACEBACK-UP

RELAY

DRIVERMATRIX

1

1

1

336

CONTROL

1

1

1

4

1

1

1

1

1

1

3

1

1

1

1

1

1

1

DRIVERMATRIXRELAY

3

3

1

1

1

361

1

36

35

1

CONTROL 4

SPECTRO-GRAPH

A

GRAPHSPECTRO-

B

CIRCUIT

CLK/BIAS

AlN2

BD

CKT

BOARD

8 CRIC

ASIC2

10

2

6

30CIRCUIT

CRIC

6

30

CKT

BD

AlN2



DC-DC

CONV

2

2

CLOCK

CLOCK

8

6 2

INTERFACE

3

3

GROUND

2


PRIME



CONV

DC-DC2

CHIP

ROCKWELLSIDECAR

CLOCK

CLOCK

3

3

GROUND

PRIMEINTERFACE

2

CONV

DC-DC

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

STROBE

STROBE

BD

CKT

AlN2

CLK/BIAS

CIRCUIT3030

BOARD

ASIC

CRIC8

CIRCUIT

10

2

2

CRIC

6 6

6

2

2

CLOCK

2

CLOCK

8

3

GROUND

3

PRIME

BACK-UP

2

STROBE

STROBE

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

DC-DC

CONV

AlN2

CKT

BD

CIRCUIT

CLK/BIAS

8 CRIC

ASIC2

2

6

CRICCIRCUITBOARD

30

6

10

30

2 CLOCK

2

8

6

CLOCK

2

3

GROUND

BACK-UP

2

3

PRIME


CONV

DC-DC



CLK/BIAS

CIRCUIT3030

BOARDASICCRIC8

CIRCUIT

1022

CRIC

6 6

6

2

2

CLOCK2 CLOCK

8


INTERFACEBACK-UP

2

BACK-UP

INTERFACE

THERMALCONTROLBOARD

POWERCONTROLBOARD

E.G.32LINESTOTAL

TOHEATER

MODULES

COMMANDS

INTERFACE

FROMDPU

DATA

+28VOLTPOWER

DPUBOARD


UNITA

INSTRUMENTMEMORY

CALIBSOURCECONTLBD

MOTORCONTROLBOARD

CONTLBDFROMPWR


FOCALPLANEINTFBD

UNITB

MEMORYINSTRUMENT










MOTORCONTROLBOARD

CALIBSOURCECONTLBD


FOCALPLANEINTFBD

DPUBOARD

MAY NEEDFPGA TO


BI-DIRECTIONAL DATA

GROUND

BI-DIRECTIONAL DATA

CKT

AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED


STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

BI-DIRECTIONAL DATA

GROUND


AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED


STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

BI-DIRECTIONAL DATA

GROUND

BI-DIRECTIONAL DATA

CKT

AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED


STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

GROUPA

SUNSENSORS


LITTON3 AXIS HRG

UNIT A



UNIT B



OPTICS BENCH

INSTRUMENT


INTERFACE

FROMDPU

+28VOLT

CONTLBDFROMPWR

DATACOMMANDS

POWERCONTROLBOARD


TOHEATER

MODULES


E.G.32LINES

POWER

INTERFACE

BACK-UP

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA


ASIC

CRIC8

2

10

2 2

2

CLOCKSTROBE

CKT

AlN2

CRICCIRCUITBOARD

30

6

30

6

BD

AlN2

CKT

CLK/BIAS

CIRCUIT6

8

2

CLOCK

CONV

DC-DC

STROBE

INTERFACES

CHIPSIDECAR

ROCKWELL

2


CLOCKSTROBE

MAY NEEDCLOCK

DC-DC

CONV

STROBE

BACK-UP

INTERFACE

GROUND

3

INTERFACE

2

3

PRIME

INTERFACE

BACK-UP

INTERFACE

GROUND

3

2

3

PRIME

1

1

RELAYMATRIXDRIVER

1

1

3

1

13

1

1

1

1

3

1

1

1

1

3

CONTROL

41

4

1

4

1

3 1

1

1

1

1

1

113

13

3 1

1

1

1

1

1

1

13

1

1

1

1

1

1

1

3

RELAYMATRIXDRIVER

1

1

1

1

CONTROL

4

4

1

4


INTERFACEPRIME

BACK-UP

INTERFACE

PRIMEINTERFACE

BACK-UP

INTERFACE

15531553444444444444

POR

DUALFIELDCOILS

POR

DUALFIELDCOILS

3

3

3

3

3

3

3

3

3

3

33

56

56

300MHZDOWNLINKPRIME



300MHZDOWNLINKPRIME








HYDRAZINELINES






(PRIME)

(BACK-UP)



CONNECTOR






IMAGER CCD MODULE

GUIDER CCD MODULE



3

2

3

2

GUIDER CCD MODULE

GUIDER CCD MODULE

IMAGER IR MODULE

IMAGER CCD MODULE

IMAGER CCD MODULE

IMAGER IR MODULE

IMAGER IR MODULE


2

3

2

3


CLOCK DRIVER MODULE

CLOCK DRIVER MODULE

CLOCK DRIVER MODULE

CLOCK DRIVER MODULE


CLOCK DRIVER MODULE


CIRCUIT MODULES


CLOCK DRIVER MODULE

BETWEEN INSTRUMENT

MECHANICALINTERFACE


ELECTRICALINTERFACE



3

2

3

2

2

3

3

2

3

2

2

3

2

3

2

3

3

2

3

2

3

2

2

3

32323223323

2




CREV C.M.

2003AUG28

DATEM.A.ENGRCHK

HDHHDH

BYREVSYS



Star Guider

CIRCUIT

CLK/BIAS

CIRCUIT

AlN2

CKT

BD

8

2

2

10

CRIC

ASIC

BOARD

30

6

30CRIC

6

STROBE

STROBE

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

CLOCK2

2

3

GROUND

CLOCK

6

8

2

DC-DC

CONV

3

2

BACK-UPINTERFACE

PRIMEINTERFACE

IMAGER CCD MODULE CLOCK DRIVER MODULE

3

2

3

2

• CRIC ASIC – Dual-ramp correlated Double Sampler with a multislope integrator for each corner of the CCD. 96 dB dynamic range

• ADC – 12-bit, 100 kHz equivalent conversion rate per CCD

• Backup FE under development by Paris-VI

• Sequencer – Clock pattern generator supporting modes of operation: erase, expose, readout, idle.

• Clock drivers – Programmable amplitude and rise/fall times. Voltages ~20V

• Bias and power generation – Provide switched, programmable large voltages for CCD and local power. (60-80V)

• Temperature monitoring – Local and remote. DAQ and instrument control interface – Path to data buffer memory, master timing, and configuration and control.

11November 12, 2003

PROPULSION

CONTROLLER

/ACS


SUNSENSORS

GUIDESTARTRACKER

INFRA REDIMAGER

VISIBLEIMAGER




LiHBATTERY21AH2


POWER

CONTROLLERSYSTEM

REGULATED+28V

UNIT

COMMAND&DATA

HANDLING

LOWERLGAA

UPPERLGAA

(PRIME)

GIMBLEHGA2AXIS

50CMDIA

TRANSMITTER

6WATT

KaBANDHGA


(PRIME)

LiHBATTERY21AH2


CONTROLLER

POWERSYSTEM

44

TRANSMITTER

HGA2AXISGIMBLE

KaBAND

6WATT50CMDIA

HGA

TRANSPONDER

UPPERLGAB

LOWERLGAB

S-BAND

(BACK-UP)

5WATT




GROUPB

SET

THRUSTERPRIME

SET

THRUSTERBACK-UP

PROPELLANTTANK

PROPULSION

CONTROLLER

/ACS

CIRCUITBREAKER

BREAKERCIRCUIT

CIRCUITBREAKER

BREAKERCIRCUIT

5OR6TOTAL

5OR6TOTAL

(BACK-UP)

(PRIME)

HANDLING

COMMAND&DATA

UNIT

THRUSTER

(BACK-UP)

CIRCUIT

CLK/BIAS

CIRCUIT

AlN2

CKT

BD

8

2

2

10

CRIC

ASIC

BOARD

30

6

30CRIC

6

STROBE

STROBE

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

CLOCK2

2

3

GROUND

CLOCK

6

8

2

DC-DC

CONV

3

2

BACK-UPINTERFACE

PRIMEINTERFACE

INTERFACE

INTERFACE

INTERFACE

INTERFACE

3

1

1

1 1

1

1


3

1

3

1

1

1

1 1

1

1

136

RELAY

1

1

4

1

36

35

3

1

1

1

1

1

1

1 1

36

DRIVERMATRIXRELAY

3

3

1

1

1

1

1

1

1

1

1

36

CONTROL

1

4

35


1

1

RELAY

1

35

36

X36 TOTAL

PRIMEINTERFACE

INTERFACEBACK-UP

BACK-UPINTERFACE

PRIMEINTERFACE

3

3

1

1

1

1

1

1

1

1

1

1

1

INTERFACEPRIME

INTERFACEBACK-UP

RELAY

DRIVERMATRIX

1

1

1

336

CONTROL

1

1

1

4

1

1

1

1

1

1

3

1

1

1

1

1

1

1

DRIVERMATRIXRELAY

3

3

1

1

1

361

1

36

35

1

CONTROL 4

SPECTRO-GRAPH

A

GRAPHSPECTRO-

B

CIRCUIT

CLK/BIAS

AlN2

BD

CKT

BOARD

8 CRIC

ASIC2

10

2

6

30CIRCUIT

CRIC

6

30

CKT

BD

AlN2



DC-DC

CONV

2

2

CLOCK

CLOCK

8

6 2

INTERFACE

3

3

GROUND

2


PRIME



CONV

DC-DC2

CHIP

ROCKWELLSIDECAR

CLOCK

CLOCK

3

3

GROUND

PRIMEINTERFACE

2

CONV

DC-DC

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

STROBE

STROBE

BD

CKT

AlN2

CLK/BIAS

CIRCUIT3030

BOARD

ASIC

CRIC8

CIRCUIT

10

2

2

CRIC

6 6

6

2

2

CLOCK

2

CLOCK

8

3

GROUND

3

PRIME

BACK-UP

2

STROBE

STROBE

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

DC-DC

CONV

AlN2

CKT

BD

CIRCUIT

CLK/BIAS

8 CRIC

ASIC2

2

6

CRICCIRCUITBOARD

30

6

10

30

2 CLOCK

2

8

6

CLOCK

2

3

GROUND

BACK-UP

2

3

PRIME


CONV

DC-DC



CLK/BIAS

CIRCUIT3030

BOARDASICCRIC8

CIRCUIT

1022

CRIC

6 6

6

2

2

CLOCK2 CLOCK

8


INTERFACEBACK-UP

2

BACK-UP

INTERFACE

THERMALCONTROLBOARD

POWERCONTROLBOARD

E.G.32LINESTOTAL

TOHEATER

MODULES

COMMANDS

INTERFACE

FROMDPU

DATA

+28VOLTPOWER

DPUBOARD


UNITA

INSTRUMENTMEMORY

CALIBSOURCECONTLBD

MOTORCONTROLBOARD

CONTLBDFROMPWR


FOCALPLANEINTFBD

UNITB

MEMORYINSTRUMENT










MOTORCONTROLBOARD

CALIBSOURCECONTLBD


FOCALPLANEINTFBD

DPUBOARD

MAY NEEDFPGA TO


BI-DIRECTIONAL DATA

GROUND

BI-DIRECTIONAL DATA

CKT

AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED


STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

BI-DIRECTIONAL DATA

GROUND


AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED


STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

BI-DIRECTIONAL DATA

GROUND

BI-DIRECTIONAL DATA

CKT

AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED


STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

GROUPA

SUNSENSORS


LITTON3 AXIS HRG

UNIT A



UNIT B



OPTICS BENCH

INSTRUMENT


INTERFACE

FROMDPU

+28VOLT

CONTLBDFROMPWR

DATACOMMANDS

POWERCONTROLBOARD


TOHEATER

MODULES


E.G.32LINES

POWER

INTERFACE

BACK-UP

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA

BI-DIRECTIONAL DATA


ASIC

CRIC8

2

10

2 2

2

CLOCKSTROBE

CKT

AlN2

CRICCIRCUITBOARD

30

6

30

6

BD

AlN2

CKT

CLK/BIAS

CIRCUIT6

8

2

CLOCK

CONV

DC-DC

STROBE

INTERFACES

CHIPSIDECAR

ROCKWELL

2


CLOCKSTROBE

MAY NEEDCLOCK

DC-DC

CONV

STROBE

BACK-UP

INTERFACE

GROUND

3

INTERFACE

2

3

PRIME

INTERFACE

BACK-UP

INTERFACE

GROUND

3

2

3

PRIME

1

1

RELAYMATRIXDRIVER

1

1

3

1

13

1

1

1

1

3

1

1

1

1

3

CONTROL

41

4

1

4

1

3 1

1

1

1

1

1

113

13

3 1

1

1

1

1

1

1

13

1

1

1

1

1

1

1

3

RELAYMATRIXDRIVER

1

1

1

1

CONTROL

4

4

1

4


INTERFACEPRIME

BACK-UP

INTERFACE

PRIMEINTERFACE

BACK-UP

INTERFACE

15531553444444444444

POR

DUALFIELDCOILS

POR

DUALFIELDCOILS

3

3

3

3

3

3

3

3

3

3

33

56

56

300MHZDOWNLINKPRIME



300MHZDOWNLINKPRIME








HYDRAZINELINES






(PRIME)

(BACK-UP)



CONNECTOR






IMAGER CCD MODULE

GUIDER CCD MODULE



3

2

3

2

GUIDER CCD MODULE

GUIDER CCD MODULE

IMAGER IR MODULE

IMAGER CCD MODULE

IMAGER CCD MODULE

IMAGER IR MODULE

IMAGER IR MODULE


2

3

2

3


CLOCK DRIVER MODULE

CLOCK DRIVER MODULE

CLOCK DRIVER MODULE

CLOCK DRIVER MODULE


CLOCK DRIVER MODULE


CIRCUIT MODULES


CLOCK DRIVER MODULE

BETWEEN INSTRUMENT

MECHANICALINTERFACE


ELECTRICALINTERFACE



3

2

3

2

2

3

3

2

3

2

2

3

2

3

2

3

3

2

3

2

3

2

2

3

32323223323

2




CREV C.M.

2003AUG28

DATEM.A.ENGRCHK

HDHHDH

BYREVSYS



IR module

• Bias and power generation – Provide bias voltages for detector & multiplexer

• Temperature monitoring • DAQ and instrument control interface –

Path to data buffer memory, master timing, and configuration and control.

INTERFACEPRIME

INTERFACEBACK-UP

BI-DIRECTIONAL DATA

GROUND


AlN2

BD

INTERFACES

SIDECARROCKWELL

CHIP

2

MAY NEED


STROBECLOCK

STROBECLOCK

CONV

DC-DC

3

3

2

IMAGER IR MODULE

2

3

2

3

• The Rockwell SIDECAR ASIC provides:

— Programmable gain pre-amplification— 16 bit, 100kHz Analog to digital

conversion• Sequencer – Clock pattern generator

supporting modes of operation: erase, expose, readout, idle.

• Control signals for reading out the mux• Multi-read averaging for noise

reduction

12November 12, 2003

THERMAL CONTROL BOARD

POWER CONTROL BOARD

E.G. 32LINESTOTAL

TO HEATER

MODULES

COMMANDS

INTERFACE

FROM DPU

DATA

+28 VOLTPOWER

DPU BOARD

MEMORY CONTL/FORMAT BD

UNIT A

INSTRUMENTMEMORY

CALIB SOURCE CONTL BD

MOTOR CONTROL BOARD

CONTL BDFROM PWR

INSTRUMENTPOWER

SERVICES

FOCAL PLANE INTF BD

MEMORY SYSTEMTEST CONNECTOR


+28 VOLTPOWER FROM

PRIME S/CPWR DIST UNIT

PWR DIST UNITBACK-UP S/C

POWER FROM+28 VOLT

(PRIME)

OBSERVATORY CONTROL UNIT (PRIME)


CONNECTOR

Observatory Control Unit (OCU)

• Includes all interfaces to the detectors and instrument for both science and housekeeping data

— A given unit connects to either the prime or the redundant interface on focal plane modules

• Has redundant cross strapped interface to Spacecraft Electronics

• Comprised of seven major subassemblies— DPU

• Interfaces to SC C&DH via a single 1553 port on the DPU• Provides command and engineering data interface

— Memory Control / Formatter• Manages Instrument data storage memory• Provides 300 Mhz science data output which directly

drives the Ka band transmitter— Data Compression

• Lossless compression of all science data

— I/O and Control• Collect focal plane science data• Operates motors and mechanisms• Collects instrument housekeeping• Performs power distribution to focal plane electronics• Centroid calculation of guider star for the ACS

— Calibration control• Controls all calibration lamps

— Thermal control• Sets up control for ~1k heater elements

— Power Control

13November 12, 2003

Mass memory

• Two memory technology types are being studied— Flash

— DRAM

• Tests:1. Error rate

2. Access speed

3. Durability (# write cycles)

4. Radiation tolerance

• Total dose

• SEU

• SEL

14November 12, 2003

Data Compression

• Algorithms— CCSDS 120.0 Baseline (Rice)

— Sqrt(N) + CCSDS 120.0

— The algorithms are being test with data from SLOAN and GOODS

• Evaluation of FPGA for algorithm implementation— Survey of alternative FPGA’s

— Performance

— Radiation Tests on Candidate FPGA Technologies

• Evaluation of ASIC’s— Survey of existing IC’s

— Applicability of existing IC to SNAP

15November 12, 2003

R&D Schedule Milestones

SNAP R&D SCHEDULEMajor Milestones O N D J F M A M J J A S O N D J F M A M J J A S O N D J F M A M J J A S

Major Project Reviews ▲ZDR ▲CDRMission Definition and Requirements ▲Draft ▲MCR▲DRR ▲SysRR

INSTRUMENT: Electronics Summary

Essential Model Complete 19-Aug-03Mass Memory Requirement end 15-Oct-03 #

Requirements Analysis end 24-Sep-04 1

Block Diagram Complete 1-Oct-04 1

SIDECAR Characterization done 12-Jan-05 1

CCD Clock & Power Supply Concept complete 17-Feb-05 1

HgCdTe Clock & Power Supply Concept complete 17-Feb-05 1

Compression Requirements end 19-Aug-05 1

CCD Front End Readout end 11-Nov-05 1

Requirements Generation end 18-Jan-06 1

FY 2004 FY 2005 FY 2006

16November 12, 2003




INSTRUMENT: IR Controller (SIDECAR)

MUX Performance Benchmarked 16-Nov-03 #

SIDECAR Delivery 1-Jun-04 #

Start SIDECAR evaluation 2-Jun-04 #

Interface to SIDECAR complete 22-Jul-04 1

Test dewar setup complete 16-Sep-04 1

SIDECAR Temperature performance complete 4-Oct-04 1

SIDECAR Room Temperature functionality test 11-Nov-04 1

SIDECAR Noise Evaluation complete 23-Nov-04 1

Video Generator test complete 27-Dec-04 1

SIDECAR-H2RG test complete 1-Jan-05 1

SIDECAR-VIRGO test complete 16-Feb-05 1

FY 2004 FY 2005 FY 2006

17November 12, 2003




INSTRUMENT: CCD Readout Technology Evaluation

CRIC - CCD Test Complete 1-Nov-03 #

CRIC Testing Complete 15-Dec-03 #

CRIC2 Design Complete 30-Mar-04 #

CRIC2 Fabrication Complete 30-May-04 #

CRIC2 Test Board Complete 30-Jun-04 #

CRIC2 Testing Complete 15-Dec-04 1

CRIC3 Design Complete 30-Jun-05 1

CRIC3 Fabrication Complete 30-Aug-05 1

CRIC3 Test Board Complete 30-Aug-05 1

CRIC3 Testing Complete 30-Nov-05 1

FY 2004 FY 2005 FY 2006

18November 12, 2003




INSTRUMENT: Mass Memory Technology Evaluation

FLASH Test Board Complete 31-Oct-03 #

Mass Memory Technology Review Complete 1-Nov-03 #

FLASH Radiation Test Report Complete 13-Nov-03 #

DRAM Memory Test Board Complete 28-Feb-04 #

Finalize Mass Memory Spec's for CDR 30-Apr-04 #

DRAM Radiation Test Report Complete 13-May-04 #

Mass Memory Technology Recommendation 30-Jun-04 #

for ZDRMass Memory Technology Recommendation 30-May-05 1

for CDR

FY 2004 FY 2005 FY 2006

19November 12, 2003




INSTRUMENT: Compression Algorithm and Implementation Technology Study

FPGA Radiation Test Complete 15-Dec-03 #

Preliminary Report on Sqrt(N) 8-Jan-04 #

CCSCS Preliminary Test Report 21-Jan-04 #

Preliminary Report on LOCO 16-Apr-04 #

ZDR Technology Recommendation 30-Jun-04 #

CDR Technology Recommendation 30-May-05 1

Preliminary Specifications Complete 28-Feb-04 #

Sqrt(N) Preliminary Report on Shapes 30-Mar-04 #

Summary of Literature Research 30-Jun-04 #

Sqrt(N) Report on Weak Lensing 30-Jul-04 1

ZDR Contribution Complete 15-Dec-04 1

CDR Contribution Complete 30-Aug-05 1

FY 2004 FY 2005 FY 2006

20November 12, 2003

Manpower

LBNL CALTECH PARIS XI

A. KarcherH. von der LippeJ-P. WalderG. Zizka

R. SmithM. BonatiD. Guzman

E. BarlettJ-F. GenatH. LebolloR. Sefri

FNAL (pending)

SLAC (pending)

W. Wester (MM)C. Nelson (MM)G. Cardoso (Comp)G. Cancelo (Comp)

W. AlthouseM. E. HufferNew hire

21November 12, 2003

Electronics R&D Management

• Team lead is H. von der Lippe (LBNL)• Weekly meetings with scientists & engineers to review progress,

discuss requirements, etc.• Bi-weekly video meetings between LBNL and Paris to coordinate

electronic R&D activities. These meeting will be converted to Instrument Electronics meetings

• Regular participation in SNAP science, CCD detector, SNAP system engineering & management meetings

• Instrument manager meetings to coordinate between electronics R&D and CCD, HgCdTe, spectrograph R&D activities

• Planning for internal and external reviews— Preliminary design requirements review

— Pre-submission IC design, simulation & verification review

— Preliminary conceptual design review

22November 12, 2003

R&D Deliverables

Two classes• Paper trade studies and conceptual design studies• Active SNAP advancement of a technology

“Paper” deliverables• Detailed requirements & interface control documents• Overall system architecture & design partitioning• Power, grounding & shielding plan• Study of CCD controller options: FPGA, commercial part, VHDL (Custom IC) • Study of memory components• Study of compression algorithms• Study of thermal control system• Plan for space-qualification of all parts

Hardware deliverables• CCD front-end test chip; irradiation & low-temp testing• Test of Rockwell HgCdTe readout IC (SIDECAR)• Prototype demonstration for front-end readout:

- CDS/ADC + CCD sensor

- HgCdTe readout + sensor

23November 12, 2003

Summary

• SNAP instrument electronics presents challenges for high channel count, low noise, low power, low temperature, large dynamic range, and radiation tolerance

• R&D phase will be used to develop requirements, interfaces and system architecture as basis for a detailed cost and schedule for the Conceptual Design Report

• Development of ASIC-based front-end readout requires a limited and focused plan for hands-on R&D towards proof-of-principle prototypes

• R&D management is in place and already actively guiding development

november 12, 2003 1 instrument electronics henrik von der lippe lawrence berkeley national...

Documents

instrument electronics

electronics rd program

instrument detectors

ccd power

schedule risk slide

instrument memory capability

early rd

handson rd