optimizing the board assembly process - smta · optimizing the board assembly process greg caswell...

© 2004 - 2007 © 2004 - 2010 9000 Virginia Manor Rd Ste 290, Beltsville MD 20705 | 301-474-0607 | www.dfrsolutions.com © 2004 – 2010

Optimizing the Board

Assembly Process

Greg Caswell

Senior Member of the Technical Staff

[email protected]

© 2004 - 2007 © 2004 - 2010 9000 Virginia Manor Rd Ste 290, Beltsville MD 20705 | 301-474-0607 | www.dfrsolutions.com

DfM Abstract o In the electronics industry. the quality and reliability of any product is highly dependent

upon the capability of the manufacturing supplier, regardless of whether it is a

contractor or a captured shop. Manufacturing issues are one of the top reasons that

companies fail to meet warranty expectations, which can result in severe financial pain

and eventual loss of market share. What a surprising number of engineers and

managers fail to realize is that focusing on processes addresses only part of the issue.

Design plays a critical role in the success or failure of manufacturing and assembly.

o Designing printed boards today is more difficult than ever before because of the

increased lead free process temperature requirements and associated changes

required in manufacturing. Not only has the density of the electronic assembly

increased, but many changes are taking place throughout the entire supply chain

regarding the use of hazardous materials and the requirements for recycling. Much of

the change is due to the European Union (EU) Directives regarding these issues. The

RoHS and REACH directives have caused many suppliers to the industry to rethink

their materials and processes. Thus, everyone designing or producing electronics has

been or will be affected.

o This course provides a comprehensive insight into the areas where design plays an

important role in the manufacturing process. This workshop addresses the increasingly

sophisticated PCB fabrication technologies and processes.


Course Outline

MODULE 1: INTRODUCTIONS

o Intro to Design for Manufacturing

o Key Global DfM Guidelines

MODULE 2: INDUSTRY

STANDARD DESIGN RULES

(Reference)

o Quick View of Industry

Standards

MODULE 3: OVERVIEW OF DFM

TASKS

o Types of Review Processes

o Root Cause Problem Solving

o Failure Analysis (Reference)

MODULE 4: DfM - COMPONENT

• Component Robustness

• Temperature Sensitivity Level

• Moisture Sensitivity Level

MODULE 5: PCB ISSUES

• Shock/Strain /Flexure Issues

• Pad Cratering

• Cleanliness

Electro-Chemical Migration (ECM)

MODULE 5: DfM - SOLDER

• General Soldering

• Lead Free Solder Alloy Update

• Hand Soldering

• Copper Dissolution

• Mixed Assembly


Module 1: Introduction

Introduction to Design for Manufacturing (DfM)


Design for Manufacturing (DfM)

o Definition

o The process of ensuring a design can be consistently

manufactured by the designated supply chain with a

minimum number of defects

o Requirements

o An understanding of best practices (what fails during

manufacturing?)

o An understanding of the limitations of the supply chain


DfM Failures

o DfM is often overlooked in the design process for

some of the following reasons:

o Design team often has poor insight into supply chain

o Original Equipment Manufacturer (OEM) requests no

feedback on DfM from supply chain

o DfM feedback consists of standard rule checks (no

insight)

o DfM activities at the OEM are not standardized or

distributed


Introduction to Design for Manufacturing

(DfM) o DfM is the process of proactively designing

products to:

o Optimize all of the manufacturing functions: supplier selection and management, procurement, receiving, fabrication, assembly, quality control, operator training, shipping, delivery, service, and repair.

o Assure that critical objectives of cost, quality, reliability, regulatory compliance, safety, time-to-market, and customer satisfaction are known, balanced, monitored, and achieved.


Introduction to Design for Manufacturing

(DfM)

o Successful DFM efforts require the

integration of product design and process

planning

o If existing processes are used, new products

must be designed to the parameters and

limitations of these processes regardless of

whether the product is build internally or

externally.

o If new processes are used, then the product

and process need to be developed carefully

considering the risks associated with “new”


Why DfM? (cont.)

Reduce Costs by Improving

Manufacturability Upfront


Key Design for Manufacturing Guidelines

o The foundation of a robust Design for Manufacturing system is a set of design guidelines and tasks to help the product team improve manufacturability, increase quality, reduce lifecycle cost and enhance long term reliability.

o These guidelines need to be customized to your company’s culture, products, technologies and based on a solid understanding of the intended production system – whether internal or external.

o The next module will review global “Top 10” DfM guidelines and tasks that are applicable to most industries and processes.


DfM Guideline #1: Know Your History

“Those who do not learn from history are doomed to repeat it.” o Develop and implement strategies to address and prevent

recurrence of mistakes. o Know and understand problems and issues with current

and past products with respect to: o Manufacturability o Delivery o Quality o Repairability & serviceability, o Regulatory issues o Recalls o Critical if carrying over existing technologies into new

designs!


DfM Guideline #1: Know Your History

o Best approach is to have an effective

system for capturing and sharing

historical knowledge throughout the

organization.

o Absolute minimum should be focused

brain storming sessions (post-mortems)

after product launch to collect lessons

learned/best practices from all areas of

the organization.


DfM Guideline #2: Standardize Methods

o Standardize design, procurement, processes, assembly, and equipment throughout your organization

o Reduces overall cycle time.

o Simplifies training and tasks.

o Reduces repeated mistakes

o Improves opportunity for bulk discounts.

o Improves opportunity for automation and operation standardization.


DfM Guideline #2: Standardize Design

Methods o Don’t Redesign the Wheel

o Never custom design something that you can buy off the shelf.

o Limit exotic or unique components.

o Higher prices due to low volumes and less supplier competition.

o Lower quality for exotic components.

o More opportunity for supply chain disruptions.


DfM Guidelines #3: Simplify the Design by Parts

Reduction

o Parts reduction is one of the best ways to

reduce the cost of fabricating and

assembling a product and increase quality

and reliability. o Reduces parts & labor costs.

o Reduces process equipment.

o Fewer opportunities for defective parts.

o Fewer opportunities for assembly errors.

Everything should be made as simple as possible, but not one bit simpler.

- Albert Einstein


DfM Guidelines #3: Simplify the Design - Methods for Part

Reduction

o Parts Commonality via Multi-Use/Multi-Functional Parts o Develop an approved or preferred parts lists or a standardized

BOM (Bill of Materials)

o Designer CAD/CAE systems can be configured to access preferred designs and parts catalogs.

o Whenever possible use one-piece structures from injection molding, extrusions, castings and powder metals or similar fabrication techniques instead of bolt/glue together multi part assemblies.

o Establish part families of similar parts based on proven materials, architecture and technologies that are scaled for size or functionality

o Use Multi-functional parts that perform more that one function

o A cover or base plate that also serves as a heat sink

o Incorporate guiding, aligning, or self-fixturing features into housing and structures.


DfM Guideline #4: Design for Lean

Processes

Fundamental Principle of Lean

Anything that does not add

value to the product is

waste and must be

reduced or eliminated


DfM Guideline #4: Design for Lean Processes

o Lean supply, fabrication and assembly processes are essential design considerations.

o More likely to be done quickly and correctly

o Reduced throughput time equals faster time to market and lower costs

o Designs that are easy to assemble manually will be more easily automated

o Assembly that is automated will be more uniform, more reliable, and of higher quality


DfM Guideline #4: Design for Lean

Processes

o Develop and use standard guidelines appropriate for the process being performed. Examples:

o Common hole sizes, lines, and spacings

o Standard handling, avoid MSL > 3 components

o For assembly - design for human factors – the “Visual” Factory

o Allow for visual, audio and/or tactile feedback to ensure correct assembly operations.

o Provide adequate access clearances for tools and hands.

o Design work to use standard tools and settings: crimpers, splicers, cutters, solder iron tips, drill bit sizes, torque settings, wire sizes


DfM Guideline #5: Eliminate Waste

o Seven Types of Waste

1. Overproduction

Build more than required, before required.

2. Waiting

Stop build to look for parts, tools, material, information

3. Transportation/Moving

Moving material, parts, tooling

Transferring product between locations, into/out of racks

4. Process Inefficiencies

Unnecessary operations, too many inspections, not building to customer spec

5. Inventories/Storage

Excess raw material, excess WIP

6. Unnecessary Motions

Walking, climbing, bending, searching, identifying

7. Defective products

Low Yields, mistakes leading to large reworks, sorting, inspection


DfM Guideline #6: Design for Parts

Handling o Minimize handling to correctly position, orient, and place parts

o Use non-symmetrical parts where possible. When

symmetrical parts are needed, use keying features to

ensure proper orientation. Make orienting and mating parts

as visually obvious as possible.

o Use parts oriented in magazines, bands, tape, reels or strips

when possible or use parts designed to consistently orient

themselves when fed into a process

o Reduce and avoid parts that can be easily damaged, bent,

or broken.

o Reduce the need for temporary fastening and complex

fixtures.

o Begin assembly with a large base component with a low

center of gravity to add other parts to.


DfM Guideline #7: Design for Joining &

Fastening o Design for efficient joining and fastening.

o Fasteners increase the cost of manufacturing, handling and

feeding operations.

o Screws, bolts, nuts and washers are time-consuming to assemble &

difficult to automate.

o Increased potential for defects (missing and improper assembly).

o Avoid threaded fasteners when possible, consider

alternatives

o Consider the use of snap-fit and adhesive bonding techniques.

o Where fasteners must be used, minimize variety o Use guidelines and standardize fasteners to minimize

the number, size, and variation.

o Self-tapping and chamfered screws are preferred.


DfM Guidelines #8: Use Error Proofing

Techniques o Mistakes will happen, What can go wrong will go wrong!

o Make the correct assembly process visually obvious, well-defined and clear cut

o Minimize wording in instructions, use pictures, icons, photos instead

o Have written instructions in 1 location only – no competing documents!

o Key unique parts so that they can be inserted only in the correct location.

o Design verifiability into the product and its components.

o Use visual (color coding), audio or tactile feedback

o Electronic products can be designed to contain self-test diagnostics (BIST, JTAG)


DfM Guideline #9: Design for Process

Capabilities o Make use of production DFM guidelines

o Know the process capabilities of the production equipment you expect to use.

o Avoid unnecessarily tight tolerances or tolerances that are at the inherent capability of the manufacturing processes or operators. Tighter is not always better!

o Perform tolerance stack up analyses on multiple, connected processes and parts.

o Determine when new production process capabilities are needed

o Allow sufficient time to develop/optimize new processes, determine optimal process parameters and establish controlled processes.


DfM Guideline #10: Design for Test, Repair, &

Serviceability o Designing for ease of test and repair will make them

more efficient, cost effective, and reliable.

o Use recommended component spacing

o Design in diagnostics, self tests, meaningful error

messages, and diagnostic interfaces.

o Standardize approaches and methods of

disassembly

o Minimize disassembly steps to access

replaceable/repairable Items.

o Wiring/Hose Interconnection – consider

disconnect and reconnect capabilities.


Module 2: Industry

Standard Design Rules

(Reference)


Industry Standards – IPC, JEDEC,

ISO… o Start with industry

standards where possible

o Tried and true

o But, represent only

minimum acceptable

requirements or

concerns

o Modify and extend as

needed to customize for

your product and

environments!

o Forums provide

opportunities for free

advice and feedback


IPC Design Requirement/Guideline

References o IPC-2221- Generic Standard on Printed Board Design

o IPC-2221A is the foundation design standard for all documents in the IPC-2220 series. It establishes the generic requirements for the design of printed boards and other forms of component mounting or interconnecting structures, whether single-sided, double-sided or multilayer.

o 3 Performance Classes

o Class 1 General Electronic Products - consumer products,

o Class 2 Dedicated Service Electronic Products

o Communications equipment, sophisticated business machine, instruments and military equipment where high performance, extended life and uninterrupted service is desired but is not critical.

o Class 3 High Reliability Electronic Products

o Commercial, industrial and military products where continued performance or performance on demand is critical and where high levels of assurance are required...


o Good quality is necessary but not SUFFICIENT to guarantee high reliability.

o IPC Class 3 by itself does not guarantee high reliability o A PCB or PCBA can be perfectly built to IPC Class 3 standards

and still be totally unreliable in its final application.

o Consider two different PCB laminates both built to IPC Class 3 standards.

o Both laminates are identical in all properties EXCEPT one laminate has a CTEz of 40 and the other has a CTEz of 60.

o The vias in the laminate with the lower CTEz will be MORE reliable in a long term, aggressive thermal cycling environment than the CTEz 60 laminate.

o A CTEz 40 laminate built to IPC class 2 could be MORE reliable than the CTEz 60 laminate built to Class 3.

o Appropriate materials selection for the environment is key!

A Word on Quality, Reliability & IPC Class 2 versus

Class 3


JEDEC/IPC Joint Standards

o JEDEC is the leading developer of standards for the solid-state industry. All JEDEC standards are available online, at no charge. www.jedec.org

o Some commonly referenced JEDEC/IPC Joint Standards standards:

o J-STD-020D.01: JOINT IPC/JEDEC STANDARD FOR MOISTURE/REFLOW SENSITIVITY CLASSIFICATION FOR NONHERMETIC SOLID STATE SURFACE-MOUNT DEVICES:

o This document identifies the classification level of nonhermetic solid-state surface mount devices (SMDs) that are sensitive to moisture-induced stress. It is used to determine what classification level should be used for initial reliability qualification. This revision now covers components to be processed at higher temperatures for lead-free assembly.

o JS9704 : IPC/JEDEC-9704: Printed Wiring Board (PWB) Strain Gage Test Guideline

o This document describes specific guidelines for strain gage testing for Printed Wiring Board (PWB)assemblies. The suggested procedures enables board manufacturers to conduct required strain gage testing independently, and provides a quantitative method for measuring board flexure, and assessing risk levels. The topics covered include: Test setup and equipment; requirements; Strain measurement; Report format

http://www.jedec.org/


Module 3: Overview of DfM Tasks


Common Types of DfM Review

Processes o Informal “Gut Check” Review o Performed by highly experienced engineers.

o Difficult with transition to original design

manufacturers (ODM) in developing countries.

o “Tribal knowledge”

o Formal Design reviews o Internal team

o External experts

o Automated (electronic) design

automation

(ADA) software o Modules automate DfM rule checking.

o Electronic manufacturing

service (EMS) providers o Perform DfM as a service


Design for Manufacturing (DfM)

o Formal DfM Reviews and Tools Sometimes Overlooked

o Organization may lack specialized expertise.

o More design organizations completely removed from manufacturing.

o DfM Reviews Needs to be Performed for:

o Bare Board

o Circuit Board Assemblies

o Chassis/Housing Integration Packaging

o System Assembly

o DfM Needs to be conducted in conjunction with the actual electronic assembly source.

o What is good DfM for one supplier and one set of assembly equipment may not be good for another.


Use a Root Cause Problem Solving

Methodology o Critical that your organization has a formal root

cause problem solving methodology used both

internally and externally.

o This is the best way to incorporate relevant material into

your customized Design for Manufacturing and Sourcing

guidelines.

o This ties in closely with DfM Guideline #1: Know

Your History!


8D Problem Solving Methodology

oProblem Statement:

o Simply fixing the symptoms of a problem, more often than

not, leads to band-aid solutions

o End up solving the same problem several times

o Other areas experience similar problems

oSolution:

o Do root cause analysis and follow through with permanent

corrective actions on significant problems

o Break the endless loop

o Drive Continuous Improvement o Save money & efficiencies

o Reap benefits beyond the discrete issue


The 8 Disciplines (8D)

1. Create the Team

2. Problem Description and Data Analysis

3. Containment Actions

4. Perform Root Cause Analysis

5. Choose and Verify Corrective Action

6. Implement Corrective Action

7. Apply Lessons Learned

8. Celebrate Success / Close the Issue

(8D forms can also be used by suppliers. )


Why is Failure Analysis Knowledge

Important? o There are always more problems than resources!

o If you don’t analyze, learn from, and prevent

problems, you simply repeat them. Your list

never gets smaller.


General Words of Wisdom on Failure

Analysis o Before spending time and money on Failure Analysis (FA),

consider the following:

o Consider “order” carefully. Some actions will limit or eliminate the

ability to perform additional tests.

o Understand the limitations and output of the tests selected.

o Use labs who can help you select and interpret tests for

capabilities you don’t have.

o Avoid requesting a specific test. Describe the problem and define

the data and output you need first.

o Pursue multiple courses of action. There is rarely one test or one

root cause that will solve your problem.

o Consider how the data will help solve the problem

o Some FA is just not worth doing!


Failure Analysis Techniques

Returned parts failure analysis always starts with Non-Destructive Evaluation (NDE)

Designed to obtain maximum information with minimal risk of

damaging or destroying physical evidence

Emphasize the use of simple tools first!

(Generally) non-destructive techniques:

Visual Inspection

Electrical Characterization

Time Domain Reflectometry (TDR)

Acoustic Microscopy (SAM)

X-ray Microscopy

Thermal Imaging (Infra-red camera)

Superconducting Quantum Interfering Device (SQUID)

Microscopy


Failure Analysis Techniques

o Destructive evaluation techniques o Decapsulation o Plasma etching o Cross-sectioning o Thermal imaging (liquid crystal; SQUID and IR also good after

decap) o SEM/EDX – Scanning Electron Microscope / Energy dispersive X-

ray Spectroscopy o Surface/depth profiling techniques: SIMS-Secondary Ion Mass

Spectroscopy, Auger o OBIC/EBIC o FIB - Focused Ion Beam o Mechanical testing: wire pull, wire shear, solder ball shear, die

shear o Other characterization methods

o FTIR- Fourier Transform Infra-Red Spectroscopy o Ion chromatography o DSC – Differential Scanning Calorimetry o DMA/TMA – Thermo-mechanical analysis


o Most critical step in the failure analysis process o Can the reported failure mode be replicated?

o Persistent or intermittent?

o Intermittent failures often incorrectly diagnosed as no trouble found (NTF)

o Least utilized to its fullest extent

o Approach dependent upon the product o Component

o Bare substrate

o PCB assembly

o Sometimes performed in combination with environmental exposure o Characterization over specified/expected temperature range

o Characterization over specified / expected radiation range

o Humidity environment (re-introduction of moisture)

o Not intended to induce damage!

Electrical Characterization


Failure Analysis Tools: Dye N Pry

Capability o Allows for quick

(destructive) inspection for cracked or fractured solder joints under leadless components (BGAs, QFNs)

o http://www.electroiq.com/index/display/packaging-article-display/165957/articles/advanced-packaging/volume-12/issue-1/features/solder-joint-failure-analysis.html

http://www.electroiq.com/index/display/packaging-article-display/165957/articles/advanced-packaging/volume-12/issue-1/features/solder-joint-failure-analysis.html




















Failure Analysis Dremel Tool – Induce

Vibrations

o A Dremel tool can be used

to induce local vibration

during debugging

o http://www.dremel.com

http://www.dremel.com


Module 4: Components Component Robustness


Robustness - Components

o Concerns o Potential for latent defects after exposure to Pb-free

reflow temperatures

o 215°C - 220°C peak → 240°C - 260°C peak

o Drivers

o Initial observations of deformed or damaged components

o Failure of component manufacturers to update specifications

o Components of particular interest o Aluminum electrolytic capacitors

o Ceramic chip capacitors

o Surface mount connectors

o Specialty components (RF, optoelectronic, etc.)


Ceramic Capacitors (Thermal Shock

Cracks) o Due to excessive change in

temperature o Reflow, cleaning, wave solder, rework o Inability of capacitor to relieve

stresses during transient conditions.

o Maximum tensile stress occurs near end of termination o Determined through transient thermal

analyses o Model results validated through

sectioning of ceramic capacitors exposed to thermal shock conditions

o Three manifestations o Visually detectable (rare) o Electrically detectable o Microcrack (worst-case)

NAMICS

AVX


Thermal Shock Crack: Visually

Detectable

AVX


Thermal Shock Crack: Micro Crack

o Variations in voltage or temperature will drive crack propagation

o Induces a different failure mode o Increase in electrical resistance

or decrease capacitance DfR


Corrective Actions: Design

o Avoid certain dimensions and materials o Maximum case size for SnPb: 1210

o Maximum case size for SAC305: 0805

o Maximum thickness: 1.2 mm

o C0G, X7R preferred

o Adequate spacing from hand soldering operations

o Use manufacturer’s recommended bond pad dimensions or smaller o Smaller bond pads reduce rate of thermal transfer


Corrective Actions: Manufacturing

o Reflow o Room temperature to preheat (max 2-3oC/sec)

o Preheat to at least 150oC

o Preheat to maximum temperature (max 4-5oC/sec)

o Cooling (max 2-3oC/sec)

o In conflict with profile from J-STD-020C (6oC/sec)

o Make sure assembly is less than 60oC before cleaning

o Selective/ Wave soldering o Maintain belt speeds to a maximum of 1.2 to 1.5

meters/minute

o Eliminate “cosmetic” touch up


Flex Cracking of Ceramic Capacitors (cont.)

o Excessive flexure of PCB under ceramic chip capacitor can induce cracking at the terminations

o Pb-free more resistant to flex cracking o Correlates with Kemet results

(CARTS 2005)

o Rationale o Smaller solder joints

o Residual compressive stresses

o Influence of bond pad

1.00 10.00

1.00

5.00

10.00

50.00

90.00

99.90

R eliaSoft's W eibull++ 6.0 - w w w .W eibull.c om

Probability - Weibull

Displacement (mm)

Unre

liability

, F(t

)

6/13/2005 21:56DfR SolutionsCraig Hillman

Weibull1812 SAC

W2 RRX - RRM MEDF=162 / S=0

1812 SnPb

W2 RRX - RRM MEDF=90 / S=0

SnPb

SnAgCu


o Due to excessive flexure of

the board

o Occurrence

o Depaneling

o Handling (i.e., placement into a test jig)

o Insertion (i.e., mounting insertion-mount

connectors or daughter cards)

o Attachment of board to other structures

(plates, covers, heatsinks, etc.)

DfM Example: Flex Cracking of

Ceramic Caps


Flex Cracking (Case Studies)

Screw Attachment Board Depaneling

Connector Insertion Heatsink Attachment


Flex Cracking (cont.)

o Drivers

o Distance from flex point

o Orientation

o Length (most common at 1206 and above; observed in 0603)

o Solutions

o Avoid case sizes greater than 1206

o Maintain 30-60 mil spacing from flex point

o Reorient parallel to flex point

o Replace with Flexicap (Syfer) or Soft Termination (AVX)

o Reduce bond pad width to 80 to 100% of capacitor width

o Measure board-level strain (maintain below 750 microstrain,

below 500 microstrain preferred for Pb-free)


Module 4: Components

Temperature Sensitivity

Moisture Sensitivity


Peak Temperature Ratings

o AKA: ‘Temperature Sensitivity Level’ (TSL)

o Some component manufacturers are not

certifying their components to a peak

temperature of 260ºC

o 260ºC is industry default for ‘worst-case’ peak

Pb-free reflow temperature

o Why lower than 260ºC?

o Industry specification

o Technology/Packaging limitation


Industry Specification (J-STD-020)

o Package size o Number of component

manufacturers rely on table and reflow profile suggested in J-STD-020C

o Larger package size, lower peak temperature

o Issues as to specifying dwell time o J-STD-020C: Within 5ºC of 260ºC for 20-40 seconds

o Manufacturers: At 260ºC for 5-10 seconds


J-STD-020D.1 Reflow Profile (Update)

o Specification of peak package body temperature (Tp)

o Users must not exceed Tp

o Suppliers must be equal

to or exceed Tp

o Not yet widely adopted


Temperature Sensitivity Level

o Limited examples of technology and package limitations o Surface mount connectors (primarily

overcome)

o RF devices (already sensitive to SnPb reflow)

o Opto-electronic (LEDs, opto-isolators, etc.)

o Examples o Amphenol: “Amphenol connectors containing LEDs must

NOT be processed using Lead-free infra-red reflow soldering using JEDEC-020C (or similar) profiles”

o Micron / Aptina: “Some Pb-free CMOS imaging products are limited to 235°C MAX peak temperature”

http://www.amphenolcanada.com/ProductSearch/GeneralInfo/Disclaimer%20for%20Connectors%20containing%20LEDs.htm

B. Willis, SMART Group

http://download.micron.com/pdf/technotes/tn_00_15.pdf


Moisture Sensitivity Level (MSL)

o Popcorning controlled through moisture sensitivity levels (MSL) o Defined by IPC/JEDEC

documents J-STD-020D.1 and J-STD-033B

o Higher profile in the industry due to transition to Pb-free and more aggressive packaging o Higher die/package ratios

o Multiple die (i.e., stacked die)

o Larger components


MSL: Typical Issues and Action Items

o Identify your maximum MSL o Driven by contract manufacturer

(CM) capability and OEM risk aversion

o Majority limit between MSL3 and MSL4 (survey of the MSD Council of SMTA, 2004)

o High volume, low mix: tends towards MSL4 Low volume, high mix: tends towards MSL3

o Not all datasheets list MSL o Can be buried in reference or quality documents

o Ensure that listed MSL conforms to latest version of J-STD-020

Cogiscan


Popcorning in Tantalum/Polymer

Capacitors o Pb-free reflow is hotter

o Increased susceptibility to popcorning

o Tantalum/polymer capacitors are the primary risk

o Approach to labeling can be inconsistent

o Aluminum Polymer are rated MSL 3 (SnPb)

o Tantalum Polymer are stored in moisture proof bags (no MSL rating)

o Approach to Tantalum is inconsistent (some packaged with dessicant; some not)

o Material issues o Aluminum Polymer are rated MSL 3 for

eutectic (could be higher for Pb-free)

o Sensitive conductive-polymer technology may prevent extensive changes

o Solutions

o Confirm Pb-free MSL on incoming plastic encapsulated capacitors (PECs)

o More rigorous inspection of PECs during initial build


Module 4: Component Summary

o Know when peak temperature indicates true temperature sensitivity o Component manufacturer’s peak temperature ratings

deviate from J-STD-020

o Peak temperature ratings are very specific or nuanced in some fashion

o Ask component manufacturer for data confirming issues at temperatures below 260C

o Consider requiring MSL on the BOM for certain component packaging and technologies o Focus on polymeric and large tantalum capacitors


Module 5: Printed Circuit Board Issues

PCB Shipping & Handling

Assembly Shock/Strain /Flexure Issues

Pad Cratering

Cleanliness

Electro-Chemical Migration (ECM)


o PCBs should remain in sealed packaging until

assembly

o Package PCBs in brick counts which closely

emulate run quantities

o PCBs should be stored in temperature and

humidity controlled conditions

o Packaging in MBB (moisture barrier bags) with

desiccant and HIC (humidity indicator cards)

may be needed for some laminates

PCB Shipping & Handling

Vacuum Sealer

Humidity Indicator Card

Moisture Barrier Bag


o Due to today’s low profile surface mount components, shock failures are primarily driven by board flexure o BGAs don’t care about in-plane shock

o Specific failure modes are o Pad cratering (A,G)

o Intermetallic fracture (B, F)

o Component cracking

o Shock tends to be an overstress event (though, not for car doors) o Failure distribution is ‘random’

Mechanical Shock Failures


Mechanical Shock Failure Modes


o Tend to be overly focused

on drop, but excessive

flexure can occur at

multiple points post-

assembly

Mechanical Shock Events


o Option One: Stop the board from bending!

o Mount points, standoffs, epoxy bonding, thicker board, etc.

o Option Two: Give your part flexibility

o Flexible terminations on ceramic capacitors

o Option Three: Strengthen your part (BGA / CSP)

o Corner Staking

o Edge Bonding

o Underfill

How to Mitigate Shock/Drop?


Shock/Drop and Corner Staking

ReliaSoft Weibull++ 7 - www.ReliaSoft.com


Corner Stake BGA\1583: Corner Stake BGA\UA 2605: Corner Stake BGA\SnPb: Corner Stake BGA\SN100C: Corner Stake BGA\SAC:

Number of Drops

Un

reli

ab

ilit

y,

F(

t)

10.000 1000.000100.0001.000

5.000

10.000

50.000

90.000

99.000

x 4

Probability-Weibull

Corner Stake BGA\SACWeibull-2PRRX SRM MED FMF=12/S=3

Data PointsProbability L ine

Corner Stake BGA\SN100CWeibull-2PRRX SRM MED FMF=10/S=5


Corner Stake BGA\SnPbWeibull-2PRRX SRM MED FMF=10/S=5


Corner Stake BGA\UA 2605Weibull-2PRRX SRM MED FMF=4/S=11


Corner Stake BGA\1583Weibull-2PRRX SRM MED FMF=6/S=9


Melissa KeenerDfR Solutions8/7/20123:55:11 PM


Shock/Drop and Edge Bonding



Edge Bond BGA\1583: Edge Bond BGA\VA2605: Edge Bond BGA\SN100C: Edge Bond BGA\SnPb: Edge Bond BGA\SAC:

Number of Drops

Un

reli

ab

ilit

y,

F(

t)

10.000 1000.000100.0001.000

5.000

10.000

50.000

90.000

99.000

x 4

Probability-Weibull

Edge Bond BGA\SACWeibull-2PRRX SRM MED FMF=12/S=3


Edge Bond BGA\SnPbWeibull-2PRRX SRM MED FMF=10/S=5


Edge Bond BGA\SN100CWeibull-2PRRX SRM MED FMF=10/S=5


Edge Bond BGA\VA2605Weibull-2PRRX SRM MED FMF=7/S=8


Edge Bond BGA\1583Weibull-2PRRX SRM MED FMF=6/S=9


Melissa KeenerDfR Solutions8/14/20123:57:00 PM


Shock/Drop and Underfill



Underfill\BGA L3549: Underfill\SN100C: Underfill\SnPb: Underfill\SAC305:

Number of Drops

Un

reli

ab

ilit

y,

F(

t)

10.000 1000.000100.0001.000

5.000

10.000

50.000

90.000

99.000

x 4

x 15

Probability-Weibull

Underfill\SAC305Weibull-2PRRX SRM MED FMF=12/S=3


Underfill\SnPbWeibull-2PRRX SRM MED FMF=10/S=5


Underfill\SN100CWeibull-2PRRX SRM MED FMF=10/S=5


Underfill\BGA L3549Weibull-1PMLE SRM MED FMF=0/S=15

Susp PointsProbability L ine

Melissa KeenerDfR Solutions8/31/201211:20:58 AM


SAC Solder is More Vulnerable to Flexure

& Strain

PCB deflection

Ten

sile

fo

rce o

n

pad

an

d L

am

inate

PbSn

LF

PbSn limit LF limit

Laminate Load

Bearing

Capability

Loa

d (kN

)0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

SAC Sn-Pb

Solder Alloy

Each Pair

Student's t

0.05

SAC

Sn-Pb

Level

18

18

Number

0.230859

0.416101

Mean

0.056591

0.040408

Std Dev

0.01334

0.00952

Std Err Mean

0.20272

0.39601

Lower 95%

0.25900

0.43620

Upper 95%

Means and Std Dev iations

Onew ay Analysis of Load (kN) By Solder Alloy

NEMI study showed SAC is more

Sensitive to bend stress. Sources of strain can be ICT, stuffing through-

hole components, shipping/handling,

mounting to a chassis, or shock events.


Strain & Flexure: Pad Cratering

o Cracking initiating within the laminate during a

dynamic mechanical event

o In circuit testing (ICT), board depanelization, connector

insertion, shock and vibration, etc.

G. Shade, Intel (2006)


Pad Cratering

o Drivers

o Finer pitch components

o More brittle laminates

o Stiffer solders (SAC vs. SnPb)

o Presence of a large heat sink

o Difficult to detect using

standard procedures

o X-ray, dye-n-pry, ball shear,

and ball pull

Intel (2006)


Potential Mitigations to Pad Cratering

• Design

• Non-critical pads

• Solder mask defined vs. non-solder mask defined

• Pad Geometry

• Layout & PCB thickness

• Limitations on board flexure

• 750 to 500 microstrain, component and layout dependent

• Process Control & Validation

• Corner Glue

• More compliant solder

• SAC305 is relatively rigid, SAC105 and SNC are possible

alternatives

• New laminate acceptance criteria and materials


Component Supplier Practices Intel

Example


• Pad design influences failure

• Smaller pads result in higher stress under a

given load

• Solder mask defined pads can provide

additional strength

• Increases tolerable strain

• But, moves failure location from pad crater to

intermetallic fracture

Pad Geometry


o Review/perform ICT strain evaluation at fixture mfg and in process: 500 us, IPC 9701 and 9704 specs, critical for QFN, CSP, and BGA

o http://www.rematek.com/download_center/board_stress_analysis.pdf

o To reduce the pressures exerted on a PCB, the first and simplest solution is to reduce the probes forces, when this is possible.

o Secondly, the positioning of the fingers/stoppers must be optimized to control the probe forces. But this is often very difficult to achieve. Mechanically, the stoppers must be located exactly under the pressure fingers to avoid the creation of shear points

ICT Strain: Fixture & Process Analysis

http://www.rematek.com/download_center/board_stress_analysis.pdf


Why Contamination and Cleanliness?

o Believed to be one of the primary drivers of field issues in electronics today o Induces corrosion and metal migration

(electrochemical migration – ECM)

o Intermittent behavior lends itself to no-fault-found (NFF) returns o Driven by self-healing behavior o Difficult to diagnosis

o Pervasive o Failure modes observed on batteries, LCDs, PCBAs, wiring,

switches, etc.

o Will continue to get worse


Future of Contamination / Cleanliness

o Continued reductions in pitch between conductors will make future packaging more susceptible

o Increased use of leadless packages (QFN, land grid array, etc.) results in reduction in standoff

o Will reduce efficiency of cleaning, which may lead to increased concentration of contaminants

o Increased product sales into countries with polluted and tropical environments (East Asia, South Asia, etc.)

o ECM occurrence very sensitive to ambient humidity conditions

o Pb-Free and smaller bond pads

o Require more aggressive flux formulations


Failure Mode

o Why do you care about excessive contamination or

insufficient cleanliness?

Electrochemical Migration (note: not Electromigration; completely different mechanism)

o Understanding the mechanism provides insight into

the drivers and appropriate mitigations


What is Electrochemical Migration

(ECM)? o Alternative definition

o Movement of metal through an electrolytic solution under

an applied electric field between insulated conductors

o Electrochemical migration can occur on or in almost

all electronic packaging

o Die surface

o Epoxy encapsulant

o Printed board

o Passive components

o In, Under & Over Coating and Potting Materials


ECM Mechanisms

o Some ECM Mechanisms have more definitive descriptions

o Dendritic growth o Descriptor for ECM along a

surface that produces a dendrite morphology

o “Tree-like”, “Feather-like”

o Conductive anodic filaments (CAF) o Descriptor for migration within

a printed circuit board (PCB)


PCB Cleanliness: Moving Forward

o Extensive effort to update PCB Cleanliness Standards

o IPC-5701: Users Guide for Cleanliness of Unpopulated

Printed Boards (2003)

o IPC-5702: Guidelines for OEMs in Determining

Acceptable Levels of Cleanliness of Unpopulated Printed

Boards (2007)

o IPC-5703: Guidelines for Printed Board Fabricators in

Determining Acceptable Levels of Cleanliness of

Unpopulated Printed Boards (Draft)

o IPC-5704: Cleanliness Requirements for Unpopulated

Printed Boards (2010)


Nominal Ionic Levels

o Bare printed circuit boards (PCBs)

o Chloride: 0.2 to 1 µg/inch2 (average of 0.5 to 1)

o Bromide: 1.0 to 5 µg/inch2 (average of 3 to 4)

o Assembled board (PCBA)

o Chloride: 0.2 to 1 µg/inch2 (average of 0.5 to 1)

o Bromide: 2.5 to 7 µg/inch2 (average of 5 to 7)

o Weak organic acids: 50 to 150 µg/inch2 (average of 120)

o Higher levels

o Corrosion/ECM issues at levels above 2 (typically 5 to 10)

o Corrosion/ECM issues at levels above 10 (typically 15 to 25)

o Corrosion/ECM issues at levels above 200 (typically 400)

o General rule

o Dependent upon board materials and complexity


Cleanliness Control

o Incoming PCB Cleanliness

o Cleanliness testing performed using ROSE (resistivity of solvent

extracted) or Omega-Meter method (ionic cleanliness, NaCl

equivalent)

o Consider cleanliness requirements in terms of IC (ion

chromatography) test for PCBs using WS flux

o Don’t use ROSE or Omegameter test as single option (at all? Risk

from dirty IPA)

o Inspection method with accept/reject limit

o Sampling criteria

o Control cleanliness throughout the process from start to

finish.


BTC, CSP & Low Profile Cleanliness Issues

(Bottom Termination Components, Chip

Scale Components) o Low or no standoff parts are particularly vulnerable

to cleanliness / residual flux problems o Difficult to clean under

o Short paths from lead to lead or lead to via

o Can result in leakage resistance, shorts, corrosion, electrochemical migration, dendritic growth

o Recommend spot check testing of cleanliness using ion chromatography under low profile SMT parts


Reliability: Dendritic Growth / Electrochemical

Migration

o Large area, multi-I/O and low standoff can trap flux under the QFN

o Processes using no-clean flux should be requalified o Particular configuration could result in weak organic acid

concentrations above maximum (150 – 200 ug/in2)

o Those processes not using no-clean flux will likely experience dendritic growth without modification of cleaning process o Changes in water temperature

o Changes in saponifier

o Changes to impingement jets


Process Material Qualification – SIR

o Validate compatibility and performance of all new process materials using SIR testing.

o IPC-B-52 SIR TEST VEHICLE (shown

below)

o IPC-A-52:Cleanliness and Residue

Evaluation Test Board – Single User

CD-ROM

o The IPC-B-52 test board is intended

to be a process qualification vehicle,

with the materials of construction and

source of test boards to be

representative

o https://portal.ipc.org/Purchase/Produc

tDetail.aspx?Product_code=5e7a862

6-b486-db11-a4eb-005056875b22

https://portal.ipc.org/Purchase/ProductDetail.aspx?Product_code=5e7a8626-b486-db11-a4eb-005056875b22













Module 6: Solders

General Soldering & Printing


Process Capabilities Defects Rates for

Soldering Processes

o Designs that avoid manual soldering operations reduce defects. o Main Issues: Insufficient solder or bonding, Missed joints, Heat Damage

o Reflow soldering produces less defects that wave soldering. o Main Issues: Solder Bridges, Solder Skips/Insufficient Solder, Missing

Component

Defects Per Million (Joint) Opportunities (DPMO)

Example 1,000 Joints/Board on 1,000 Boards

Solder

Process

DPMO

Standard Best in

Class

Hand 5000 N/A

Wave 500 20 - 100

Reflow 50 <10


Reflow Profile Optimization

o Start with paste manufacturer’s recommendations!

o Preheating Phase - Ramp & Soak vs. Straight Ramp preheating

profiles

o Ramp & Soak (soak period just below liquidus), more common,

more forgiving.

o Allow flux solvents to fully evaporate and activate to deoxidize

the surfaces to be soldered.

o Allows temperature equalization across the entire assembly.

o Consistent soldering and reduces tomb stoning.

o If too long, flux may be consumed resulting in excessive

oxidation.

o Flux may become volatile - producing solder balls or

voiding defects.

o Straight Line is faster and causes less thermal damage to

materials

o But more susceptible to defect and quality variation, does not

work as well on complex, dense assemblies.


Reflow Profile Optimization

o Peak Temperature and Time at (above) Liquidus (TAL)

o A balance between being hot enough for long enough to achieve

good consistent solder wetting and bonding for proper joint

formation, across the entire assembly.

o Yet as quickly as possible to prevent thermal damage to the

components and board and to prevent excessive copper dissolution

and excessive intermetallic growth.

o Cooling Rate of SnAgCu effects the Microstructure & Bulk

Intermetallics

o Faster cooling rates produce a finer, stronger microstructure and

limits intermetallics.

o Overall Time (Costs & Efficiency)

o Overall throughput is determined the board size/complexity and the

oven's heat transfer capabilities.

o Rule of Thumb: 2-3 C/second ramp up and down rate


Stencil Enhancements

o Numerous stencil enhancements

to take advantage of

o Materials & Processes

o Fine grain stainless steel is a

superior performer in multiple

studies*

o NanoCoatings

o Many suppliers now provide OR

o Aculon wipe on nanocoating

o Cheap & effective!

*Enabling Technologies for Broadband Printing, Chrys Shea


PTH Soldering: Incomplete Hole Fill

o Poor solder hole fill can lead to solder joint cracks/failures. Can be caused by: o Insufficient top side heating prevented solder from wicking up into PTH

Barrel

o Insufficient flux or flux activity for the surface finish in use

o Lack of thermal relief for large copper planes

o PCB hole wall integrity issues – voids, plating, contamination


PTH Hole Fill & Thermal Relief

o Utilize thermal reliefs on all copper planes when practical

o Reduces thermal transfer rate between PTH and copper plane

o Allows for easier solder joint formation during solder (especially for Pb-free)

o Allows for better hole fill

Copper

Plane

PTH

Laminate

Copper

Spoke

Courtesy of D. Canfield (Excalibur Manufacturing)


Module 6: Solders

Discussion of 2nd generation Pb-free alloys

(e.g., SN100C)


The Current State of Lead-Free

o Component suppliers o SAC305 still dominant, but with increasing introduction

of low silver alloys (SAC205, SAC105, SAC0507)

o Solder Paste o SAC305 still dominant

o Wave and Rework o Sn07Cu+Ni (SN100C) o Sn07Cu+Co (SN100e) o Sn07Cu+Ni+Bi (K100LD)

o HASL PCB Coating o Sn07Cu+Ni (SN100C)


What are Solder Suppliers Promoting? Company Paste Wire / Wave

Senju ECO Solder (SAC305)

Nihon Genma NP303 (SAC305),

NP601 (Sn8Zn3Bi)

NP303 (SAC305),

NP103 (SAC0307)

Metallic Resources SAC305 SAC305,

SC995e (Sn05Cu+Co)

Koki

S3X (SAC305),

S3XNI58 (SAC305+Ni+In),

SB6N58 (Sn3.5Ag0.5Bi6In)

S3X (SAC305),

S03X7C (SAC0307+0.03Co)

Heraeus SAC405

Cookson / Alpha Metals SACX (SAC0307+Bi+0.1P+0.02RareEarth+0.01Sb)

Kester K100LD (Sn07Cu+0.05Ni+Bi)

Qualitek SN100e (Sn07Cu+0.05Co)

Nihon Superior SN100C (Sn07Cu+0.05Ni+Ge)

AIM SN100C (Sn07Cu+0.05Ni+Ge)

Indium Indium5.1AT (SAC305) N/A

Amtech SAC305, Sn3.5Ag, Sn5Ag, Sn07Cu, Sn5Sb

Shenmao SAC305 to SAC405, SAC305+0.06Ni+0.01Ge

Henkel No preference

EFD No preference

P. Kay Metals No preference


2nd Generation Pb-Free Solder

(Thoughts) o Ni-modified SnCu and low silver SAC are the primary front

runners o Both seem to display reliability behaviors between SAC305

and SnPb

o Proliferation of custom alloys is unhealthy for the electronics industry o Too much time spent on material identification,

characterization, and risk assessment

o One customer had SAC405, SAC387, SAC305, SAC105, SAC0307, and SAC125Ni on one board!

o Almost no component manufacturers assess these new alloys from a physics of failure o Test to spec mentality

o Huge risk for escapes


Module 6: Solders

Hand Soldering

Copper Dissolution

Mixed Assembly


o Designed for hand soldering

o SIR data

o Halogen / halide free: Watch for definitions!

o Supplier – relationships, proximity

o Lead finish

o Substrate finish

o Acid number

o Lead free or SnPb soldering?

o Compatibility with adjacent materials o Adhesives, conformal coatings, etc.

Basic Hand Soldering Materials

Selection Criteria


o Size /type / pitch / plating of leads

o Substrate finish / type – rigid, flex, ENIG, etc

o Space between hand soldered leads and adjacent

components and circuitry

o Size, shape, heat sinking of module at time of hand

soldering

o Can unit and component be preheated?

Design Considerations


o Operator variation is the norm. Training is critical!

o General hand soldering tips:

o Use soldering irons with great thermal recovery - the lower the

soldering temperature and the larger the tip, the less heat loss

o Use a high power soldering iron

o Use the largest tip commensurate with the size of the joint being

soldered and available space

o Custom tips can be designed if needed.

o Use the largest cored solder wire diameter appropriate for the

size of the joint and available space.

o Avoid the use of liquid fluxes

o Typical tip temperatures for Pb-free solder are ~700F with 2-5

seconds of contact time. Higher temps can damage boards and

components.

Hand Soldering Process


Solder Tip Size and Cored Wire Size

Images courtesy of OK International

The diagram below shows why No-Clean Flux-cored solder seldom works as well

as RMA-cored solder:


o Consider use of a portable

preheater to shorten contact

time and fully activate fluxes

o http://www.zeph.com/airbathseries.

htm

o Preheat to 100 F or so

o Verify actual PCB and lead

temperatures with small temp labels

o http://www.omega.com/toc_asp/se

ctionSC.asp?section=F&book=tem

perature

o Use solder preforms for repeatable

joint size and flux volume – both PTH

and SMT

Hand Soldering Tips

http://www.zeph.com/airbathseries.htm



http://www.omega.com/toc_asp/sectionSC.asp?section=F&book=temperature





o Solder preforms with flux can be placed

on a PTH lead on the topside of the

PCB

o Can assist in getting improved barrel fill

o Controls both volume of solder and volume

of flux applied.

o Preforms can be made in size, alloy, and

flux of choice

Experimenting with Preforms to Improve Hand

Soldering


o Always avoid liquid flux if possible

o If it’s truly needed: o Look for methods to ensure precise delivery

o Flux pens are one method

o The needle tip dispense bottles are not recommended.

o Avoid letting flux run under and around adjacent components.

o Provide some form of uniform heating to volatalize as much of the liquid as possible.

o Select a flux designed and validated for hand soldering processes

o This is probably NOT be the same material as your wave solder flux. Wave solder fluxes are designed to hold up through preheat and dual wave contact.

o Review surface insulation resistance (SIR) data

Use of Liquid Flux


o Typical manual cleaning process: o Some type of solvent spray is used to loosen flux residues

and followed by hand cleaning using IPA and a soft bristle brush.

o This type of manual cleaning process represents a reliability risk. o Several studies have shown that SIR (surface insulation

resistance) actually INCREASES when IPA and brushes are used in manual cleaning.

o Brushes are not routinely cleaned or maintained and become contamination transfer mechanisms.

o Poorly removed residues are more likely to experience corrosion failures than no clean flux residues left intact.

o In rework and repair, if you can’t rinse, you can’t clean.

Manual Removal of Flux Residues: Not

Recommended!


o If flux residues must be moved

manually, a 4 step process is

recommended:

o Wet, scrub, rinse, dry

o Use some form of dispensing system for

aerosol solvent to control the flow of the

cleaning fluid

o Material is fresh and pure each time.

Never sits in typical IPA bottle or spray

bottle

o Bottles are rarely, if ever, cleaned

o Brushes should be routinely replaced

o Clean better, more consistently and with less

solvent

Manual Removal of Flux Residues


Hand Solder Equipment Cleanliness

o These images show tools which must be routinely replaced or cleaned to prevent contamination

o Needle tip flux dispense is not recommend due to poor control over volume & flow

o Solvent dispense bottles are commonly never cleaned – simply refilled over time

o Sponges, brushes & tip cleaners should be frequently replaced and different solder alloys should not use the same materials


Solders: Copper Dissolution

o The reduction or elimination of surface copper

conductors due to repeated exposure to Sn-based

solders

o Significant concern for

industries that perform

extensive rework

o Telecom, military,

avionics

Bath, iNEMI

ENIG Plating

60 sec. exposure

274ºC solder fountain


Solders: Copper Dissolution (cont.)

o PTH knee is the point of

greatest plating reduction

o Primarily a rework/repair

issue

o Celestica identified significant

risk with >1X rework

o Already having a

detrimental effect

o Major OEM unable to repair

ball grid arrays (BGAs) S. Zweigart, Solectron


Copper Dissolution (Contact Time)

o Contact time is the major driver o Some indications of a 25-30 second limit

o Preheat and pot temp. seem to have a lesser effect

o Optimum conditions (for SAC) o Contact time (max): 47 sec. (cumulative)

o Preheat temperature: 140-150°C

o Pot temperature: 260-265°C A Study of Copper Dissolution During Pb-Free PTH Rework Using a

Thermally Massive Test Vehicle , C. Hamilton (May 2007)


Solutions to Cu Dissolution

o Option 1: restriction on rework o Number of reworks or

contact time

o Option 2: solder material o Indications that SNC can

decrease dissolution rates

o Reduced diffusion rate through Sn-Ni-Cu intermetallics

o Option 3: board plating o Some considering ENIG

o Some considering SNC HASL

A Study of Copper Dissolution During Pb-Free PTH Rework Using a

Thermally Massive Test Vehicle , C. Hamilton (May 2007)


Mixed Assembly

o Primarily refers to Pb-

free BGAs assembled

using SnPb eutectic

solder paste

o Why?

o Area array devices (e.g.,

ball grid array, chip scale

package) with eutectic

solder balls are

becoming obsolete

o Military, avionics,

telecommunications,

industrial do not want to

transition to Pb-free…yet

UIC


Mixed Assembly: Reflow

• Initial studies focused on peak temperature

• Identified melt temperature of solder ball as critical parameter

• 217°C for SAC305

• Ensured ball collapse and intermixing

• Recommendations • Minimum peak reflow temperature of 220°C

• Reflow temperatures below 220°C may result in poor assembly yields and/or inadequate interconnect reliability

• For increased margin, >225 to 245°C peak


Mixed Assembly: Solder Joint

Morphology

Motorola


Mixed Assembly: Solder Joint

Morphology

Richard Coyle,et al), “THERMAL FATIGUE

RELIABILITY AND MICROSTRUCTURAL

CHARACTERIZATION OF A LARGE,HIGH

DENSITY BALL GRID ARRAY WITH

BACKWARD COMPATIBLE ASSEMBLY”,

SMTAI 2012

W. Fox et al, “DEVELOPMENT OF PROCESSING

PARAMETERS FOR SOLDERING LEAD-FREE

BALL GRID ARRAYS USING TIN-LEAD

SOLDER”, SMTAI 2012

Better mixing appears to enhance reliability


Increasing Heat Increases Ball

Strength

W. Fox, B. Gumpert, and L. Woody (Lockheed Martin), “DEVELOPMENT OF

PROCESSING PARAMETERS FOR

SOLDERING LEAD-FREE BALL GRID ARRAYS USING TIN-LEAD

SOLDER”, SMTAI 2012, p878-885, Orlando,

Florida, October 14-18, 2012


Impact of Peak Temp & % Pb Dissolution on

Fatigue Life o Fatigue life begins to

increase at 217 C

o Increases until the maximum temperature of 224°C is reached.

o After 217 C, higher peak temperature = higher fatigue life.

o Fatigue life does not increase until ~ 85% Pb dissolution

o To maximize fatigue life, require at least 85% dissolution

Mudasir Ahmad, Kuo-Chuan Liu, Gnyaneshwar Ramakrishna, and Jie Xue

(Cisco), ” IMPACT OF BACKWARDS COMPATIBLE ASSEMBLY

ON BGA THERMOMECHANICAL RELIABILITY AND MECHANICAL SHOCK,

PRE- AND POST-AGING”, SMTAI 2008, p306-321, Orlando,

Florida, August 17-21, 2008


Mixed Assembly: Time Above

Liquidus

• Effect is inconclusive Kinyanjui, Sanmina-SCI,

iNEMI SnPb-Compatible BGA

Workshop (IPC/APEX 2007)


Mixed Assembly: Solder Paste Volume

• Some conflict • Sanmina claims no effect

• Celestica claims significant effect

• Other factors may play a greater role

• Additional investigation necessary

Snugovsky, Celestica (2005)

Moderate solder paste volume

Large solder paste volume

Kinyanjui, Sanmina-SCI,




• Intel: reduced self alignment

• Degree of difficulty: 0.5mm > 0.8mm > 1 - 1.27mm pitch

component

• Sanmina: improved mixing

Kinyanjui, Sanmina-SCI,




Mixed Assembly: Temp Cycling

Results

100 1,000 8,00010

0.03

0.3

3

30

99

SnAgCu/SnPb

SnAgCu/SnAgCu

SnPb

Cycles to FailureC

um

ula

tive

Fa

ilu

re (

%)

100 1,000 8,00010

0.03

0.3

3

30

99

SnAgCu/SnPb

SnAgCu/SnAgCu

SnPb

100 1,000 8,00010

0.03

0.3

3

30

99

100 1,000 8,00010

0.03

0.3

3

30

99

SnAgCu/SnPb

SnAgCu/SnAgCu

SnPb

Cycles to FailureC

um

ula

tive

Fa

ilu

re (

%)

HP: 0 to 100ºC, 214ºC Peak Temp


Mixed Assembly & Voiding

o BGA voiding is

common in mixed

assembly

o Indium Corp. studied

behavior under

o 217C Peak T (Low)

o 240 C Peak T (High)


Indium Corp Study Conclusions

o Mixed systems have less voiding at low temp

o Mixed systems had higher voiding than lead-free

systems when reflowed at high temp

o Some ways to reduce voiding

o Solder paste formulation less prone to have voiding

o Mechanical shielding fixture (temperature)

o Longer soaking profile

o Nitrogen reflow atmosphere


Mixed Assembly: Conclusions

o A potentially lower risk than complete transition to

Pb-free

o Important note: more studies on vibration and shock

performance should be performed

o The preferred approach for some high reliability

manufacturers (military, telecom):

o Acceptance of mixed assembly could be driven by GEIA-

STD-0005-1


Mixed Assembly: Alternatives

o Other options on dealing with Pb-free BGAs other than mixing with SnPb o Placement post-reflow

o Reballing

o Two flux options o Application of Pb-free solder paste

o Application of flux preform

o Two soldering options o Hot air (manual)

o Laser soldering (automatic)


Reballing BGAs

o Has been shown to be reliable in several studies

o “Reballed components exhibited adequate performance and can be recommended as a solution for the mixed system assembly process.”

Intermetallic Structure of reballed BGAs

RELIABILITY ASSESSMENT OF REBALLED BGAs

J. Li1, S. Poranki1, M. Abtew2, R. Kinyanjui2, Ph.D., and K.

Srihari1,


Ongoing DfM Learning Opportunities

o Some ideas for low cost continuing education inside

and outside of your company

o E-Learning at dfrsolutions.com

o Organize “Your Company Days”, Poster Sessions, Demos

o Use internal electronic bulletin boards an resources

o Brown Bags &” Lunch and Learns” from your internal gurus

and from your suppliers

o PCB

o Contract Manufacturers

o Electronics Materials - paste, fluxes, cleaners


Summary

o DfM is a proven, cost-effective strategic methodology.

o Early effective cross functional involvement:

o Reduces overall product development time (less changes, spins, problem solving)

o Results in a smoother production launch.

o Speeds time to market.

o Reduces overall costs.

o Designed right the first time.

o Build right the first time = less rework, scrap, and warranty costs.

o Improved quality and reliability results in:

o Higher customer satisfaction.

o Reduced warranty costs.


Presenter Biography

o Greg has over 40 years of experience in electronics manufacturing focusing on

failure analysis and reliability. He is passionate about applying his unique

background to enable his clients to maximize and accelerate product design and

development while saving time, managing resources, and improving customer

satisfaction.

o Greg, a Senior Member of the Technical Staff for DfR Solutions, is an industry

recognized expert in the fields of SMT, advanced packaging, printed board

fabrication, circuit card assembly, and bonding solutions using nanotechnology.

He has been well-regarded as a leader in the electronics contract manufacturing

and component packaging industries for the past 40 years. Prior to joining DfR

Greg was the Vice President of Engineering at Reactive Nanotechnology (RNT),

where he led application development for the RNT Nanofoil® and ensured a

successful transition of product technology to Indium Corporation. His previous

appointments include Vice President of Business Development for Newport

Enterprises, Director of Engineering for VirTex Assembly Services, and Technical

Director at Silicon Hills Design. He has presented over 250 papers at

conferences all over the world and has taught courses at IMAPS, SMTA and IPC

events. He helped design the 1st pick and place system used exclusively for SMT

in 1978, edited and co-authored the 1st book on SMT in 1984 for ISHM and built

the 1st SMT electronics launched into space.

o B.A., Management (St. Edwards University)

o B.S., Electrical Engineering (Rutgers University)


Contact Information

• Questions?

• Contact Greg Caswell, [email protected],

301-640-5825 (office)

• 443-834-9284 (cell)

• [email protected]

• www.dfrsolutions.com

• Connect with me in LinkedIn as well!

http://www.dfrsolutions.com/

optimizing the board assembly process - smta · optimizing the board assembly process greg caswell...

Documents