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Oxynitride Gate Dielectrics for Deep Sub-micron MOS Devices

Antoine Khoueir

A Thesis submitted in conformity with the requirements

For the degree of Master of Applied Science in the

Department of Metallurgy and Materials Science

University of Toronto

O Copyright by Antoine Khoueir 2000

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Master of Applied Science, 2000

Antoine Khoueir Department of Metallurgy and Materials Science

University of Toronto

ABSTRACT

The continuous demand for improved CMOS transistors necessitate smailer

device dimensions. The reduction in chip size into the deep sub-micron dimensions opens

up new scientific and engineering challenges. One of the most critical material in

developing deep sub-micron MOS transistors is high quality ultrathin (- a few nm) gate

dielectric film. As the gate dielectric thickness is reduced to below the 3 nm mark, the

conventionally used SiOz creditability as a dielectric layer deteriorates. The incorporation

of nitrogen atoms into the dielecinc has been shown to improve its characteristics: by

reducing defect generation at the Si-SiO2 interface when incorporated at monolayer levels

and reducing boron penetration from p+ poly-silicon gate electrodes through the dielectric

films. The function of Si02 as an insulating layer for thickness < 2 nm becomes

ineffective, as a result of high leakage current.

This thesis deds with the development of oxynitride films as alternative gate

dielecaics for deep sub-micron devices. Rapid thermal processing of nitrogen ion-

implanted wafers and direct nitridation in N2 are the methods used in this work to grow

oxynitride films. X-ray photoelectron spectroscopy (XPS) has been performed to study

the chernical structure of the films. MOS capacitors with n* poly were fabticated to

determine the potential usage of these oxynitride films in MOS transistors.

ACKNO WLEDGMENTS

1 would like to sincerely thank Professors 2. H. Lu and W. T. Ng for their support

throughout this work. Their guidance and advice had a major impact on the final outcome

of this thesis.

Thûnks :O Dam R e m for al! tie fabrication hclp, it nas cssciiti'al Kchaid

Barber for his advice throughout the processing of my device. I would like to also thank

Dod Chettiar, Jaro Pnstupa, Shahla Honarkhah, Sameh Nassif and Zhixian Jiao for their

help and advice. 1 am also grateful to Dr. R. N. S. Sodhi from the Center of Biomaterials

for his help with the XPS rneasurements. Thanks to al1 the students at the VRG Iab for

creating a great atmosphere in which to do research.

Thanks to Xiaodong Feng, Robert Yang and Hongyu Yu for the intangibles. And,

most importantly, 1 thank my farnily and Gigi.

Financial suppon provided by Gennurn Corporation. MICROKLT, the Natural

Science and Engineering Research Council of Canada and University of Toronto Open

fellowship is greatly appreciated.

Table of Contents

Chapter 1 INTRODUCTION ............................................................................................................. 1

1.1 A Historical Perspective and Recent Issues of Ultrathin Dielectrics on Si-based Devices ............................................................................................................................ 1 1.2 Basic Concept of Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) ..................................................................................................................... 4

....................... 1.3 Limitations of SiO2 as a Gate Dielectric for Sub.0.18 prn Devices 8 .................................................................................. 1.3.1 Hot C h e r Degradation 8

1 .3.2 Boron Penetration ............................................................................................ 9 1.3.3 Leakage Current .............................................................................................. 9

1.4 Oxynitnde as Gate Dielectric ............................................................................... 10 1.5 Thermal Growth of Oxynitnde in Conventional vs . Rapid-Thermal-Processing

............................................................................................................................. (RTP) 1 1 1.6 X-ray Photoelectron Spectroscopy: its Usage and Application in Characterizing

.............................................................................................. Ultrathin Gate DieIectrics 12 1.7 Thesis objective ..................................................................................................... 15

Chapter 2 ULTRATHIN OXYNITRIDE FORMATION BY LOW ENERGY ION- IMPLANTATION ........................................................................................................... 18

2.1 Introduction ....................................................... 18 2.2 Expenment ............................................................................................................ 19 2.3 Resutts and Discussion ..................................................................................... 20

2.3.1 Nitrogen Segregation ..................................................................................... 20 2.3.2 Growth Kinetics ............................ .... ............................................... .... ......... 20 2.3.3 XPS Analysis ................................................................................................ 27 2.3.3.1 Chernicd structure and Distribution of N ..................................................... 27 2.3.3.2 Si 2p spectra ................................................................................................. 28

2.4 Conclusions ........................................................................................................... 31 ..................................................................................... 2.4. L Nitrogen Segregation 31

2.4.2 Growth Kinetics ................... .. ....................................................................... 31 2.4.3 N structure and distribution ....................................... , ...................... 32 2.4.4 Si 2p Spectra ........................................................................................ 3 2

Chapter 3 GROWTa OF ULTRATHIN NI'l"R.DE ON Si (100) BY RAPID THERMAL Nt TREATMENT ................................................................................................................. 35

........................................................................................................... 3 . f Introduction 35

........................................................................................................... 3.2 Experiments 35 3.3 Results and Discussions ...................................~.................................................... 36

3.3.1 XPS Analysis ............. .. ............................................................................. 36 3.3.3 AFM Results and Discussion ...........................,..................................... . 40

3.4 Conclusions ..................................................~...~.................................................. 41

Chapter 4 OXYlW"I'IDE FORMATION BY DIRECT NTRIDA~ON**o~.oe.e.e.~~.~~~~~ m.,.. ooeo 43

....................................................................................................... 4.1 Introduction 4 3 ....................................................................................... 4.2 Experimentai Procedure 44

......................................................................................... 4.3 Results and Discussion 4 5 4.3.1 Growth Knetics ....................................................................................... 45 4.3.2 XPSAnalysis ................................................................................................. 50

....................................... 4.3.2.1 Chernicd Structure and Distribution of Nitrogen 50 4.3.2.2 Si 2p Spectrum .............................................................................................. 54

............................................................................... 4.3.3 Electrical Characteristics 55 .................................. 4.3.3.1 High-Frequenc y Capacitance-Voltage Measurements 56

.................................................................... 4.3.3.2 Current-Voltage Characteristics 59 4.4 Conclusions ........................................................................................................... 62

............................................................................................ 4.4.1 Growth Kinetics 62 ........................................................................... 4.4.2 N structure and distribution 62

4.4.3 Si2pSpectra .................................................................................................. 63 ............................................................................... 4.4.4 Electncal Characteristics 63

Chapter 5 CONCLUSIONS ............................................................................................................. 66

Appendîx A MOS CAPACITOR ......................................................................................................... 68

List of Figures

Chapter 1 ........................................................... Fig 1. 1 Schematic of a simple n-channel MOSFET 2

........... Fig 1.2 Schematic illustration of the induced n-channel and the depletion region 5 ...................................................... Fig 1. 3 MOSFET scaling with constant scaling factor 8

Fig 1.4 Schematic cross-sectional view of a rapid thermal processing (Rn) systern ..... 12 .......... Fig 1.5 Schematic diagrarn of an X-ray photoelectron spectroscopy experiment .14

Chapter 2 Fig 2. 1 (a) Growth curve for the oxynitride film formation upon segregation of nitrogen

in nitrogen ion-implanted wafers. (b) The concentration of nitrogen in the oxynitride film. .................................*......**....-..*..**...*..*....**.***..........*.*...*............*...*..........*......* 2 1

Fig 2. 2 (a) A companson of the oxidation kinetics for N-irnplanted wafers, with and without N segregation, and bare silicon wafers at various temperatures for 60 S. The points on the solid lines are for individual experiments, the lines being least-squares fits to direct exponential equations. (b) Oxidation kinetics for N-implanted wafers, with and without N segregation. and bare silicon wafers at a constant temperature of 950 OC while varying the time. The lines are the least-squares fits to direct logarithmic equations for the samples with and without N-segregation and to a

............................................................... parabolic equation for bare silicon wafers. 23 Fig 2. 3 Nitrogen concentration as a function of thickness for (a) oxidation carried out at

various temperatures keeping the time constant for 60 s, (b) oxidation carried out at a constant temperature of 950 O C while varying the time up-to 300 S. (O) represents

............................ samples with N-segregation. (*) samples without N-segregation 24 Fig 2.4 uitensity comparison for N 1 s peak location between samples with and without N

segregation when oxidation is canied out at various temperatures keeping the time c o n s t for 60 S. ...................................................................................................... 27

Fig 2. 5 Intensity cornparison for Si 2p peak locations between samples with and without N segregation when oxidation is carried out at various temperatures keeping the time constant for 60 S. ..................... ,., ............................................................................... 29

Fig 2. 6 Chemical shifts between the substrate and oxided Si 2~~~ for oxidation at varying temperatures keeping time constant at 60 S. (O) represents samples with N segregation, (0) samples without N segregation, and (0) samples of bare wafen..30

Chapter 3 Fig 3. 1 Si 2p core level spectra recorded from samples treated by N2 at 1150 OC for

various time, as labeled. The doublet peaks associated with Sioz, Si3N4, and bulk Si .............................................................................................. have also been labeled, 37

Fig 3. 2 N 1s core level spectra recorded h m sarnples treated by N2 at 1150 OC for ............................................................................................ various tirnes, as Iabeled 37

Fig 3. 3 O 1 s core Ievel spectra recorded from sarnples treated by N2 at 1 150 OC for various times, as labeled ............................................................................................ 3 8

Fig 3. 4 Nitride thickness as a function of N2 exposure time. The inset shows nitride ............. thickness as a function of temperature at a constant 60 s N2 exposure time 39

Fig 3. 5 AFM images showing the difference in surface roughness between SiOz and S3N4 films. The Si3N4 films have been nitrided at 1 150 OC for various times .......... 40

Fig 3. 6 AFM images showing the formation of pinholes upon nitridation at 1 150 O C for

Chapter 4 Fig 4. 1 (a) A comparison of the oxidation kinetics for different nitrided sarnples at

various temperatures for 60 S. The points on the solid lines are for individual experiments, the lines being least-squares fits to direct exponential equations. (a) represents samples nitrided for 10 s, (O) samples nitrided for 20 s, (D sarnples

..................... nitrided for 30 s, and (O) samples nitrided for 60 s prior to oxidation 46 Fig 4. 2 Nitrogen concentration as a function of oxidation temperature, while keeping the

time constant for 60 S. (a) represents sarnples nitrided for 10 s, (O) samples nitrided for 20 s, (W) sarnples nitrided for 30 s, and (0) samples nitrided for 60 s pnor to . - oxidation. ............................................................................................................... 47

Fig 4. 3 Oxide thickness as a function of RTP temperature at a constant tirne of 60 s in N2. (O) represents the nitridation of 50 A SiO? film, (e) the nitridation of 25 A Si02 film, and (0) the nitridation of 16 A Si02 film. ..................................................... 49

Fig 4.4 Nitrogen concentration as a function of nitndation temperature at a constant time of 60 S. (0) represents the nitridation of 50 A SiOz film, (a) the nitndation of 25 A

................................................ SiO2 film, and (0) the nitridation of 16 A SiO? film 50 Fig 4. 5 An intensity comparison of N 1s peaks between samples with different

nitridation times at specific oxidation temperatures. (a) represents samples nitrided for 10 s, (O) samples nitrided for 20 s, (.) samples nitrided for 30 s, and (O)

............................................................. samples nitrided for 60 s pt-ior to oxidation. 5 1 Fig 4. 6 An intensity comparison for Nls peak locations between samples that have been

nitnded at different temperatures (a) with an initial Si02 thickness of 25 A and (b) ....................................................................... with an initial Si02 thickness of 16 A 54

Fig 4.7 An intensity comparison for Si 2p peak locations between samples that have been nitrided at different temperatures (a) with an initial SiOz thickness of 25 A and (b)

....................................................................... with an initial SiO? thickness of 16 A 55 Fig 4. 8 High frequency capacitance-voltage characteristics of (a) SiON gates grown

upon nitridation in N2 for 5, 10 and 20 s at 1 150 OC prior to oxidation in O2 at 1050 OC for 60 s and (b) comparison between a SiON filrn grown by nitridation for 20 s

............................. prior to oxidation and a pure SiOz film with the same thickness. 57 Fig 4. 9 High-frequency capacitance-voltage characteristics of various dielectrics. The

thickness shown is the electrical thickness. .............................................................. 58 Fig 4. 10 Current-voltage charactenstics of (a) SiON gates grown upon nitridation in Nz

for 5, 10 and 20 s at 1150 OC prior to oxidation in O2 at 1050 OC for 60 s and @) comparison between a SiON film grown by nitndation for 20 s pnor to oxidation and a pure SiOz füm with the sarne thickness. .......................................................... 60

Fig 4. 11 Current-voltage characte&ics of various dielectrics. The thickness shown is the eIectricd thickness. ........................... ...... .................................................. 6 1

Appendix A .............................. Fig A . 1 Capacitance of a MOS structure as function of gate voltage 68

.................................................................................... Fig A . 2 MOS capacitor Test Chip 69

Appendiv B ..................................................................................... . Fig B 1 Cross-sectional diagrarns 75

List of Tables

Table 1 . 1 Technology roadmap characteristics in the area of thermaVthin films .............. 2

Table 4 . 1: Oxynitride growth conditions for MOS capacitors ......................................... 45

Table A . 1 Dimensions of MOS Capacitor Test Structures .............................................. 70

viii

Cha~ter 1 - Introduction Universitv of Toronto

CHAPTER 1

INTRODUCTION

1.1 A Historical Perspective and Recent Issues of Ultrathin

Dielectrics on Si-based Devices

During the past several decades. semiconductor devices have infiltrated

practically every aspect of our daily life. It has changed the way we live and mostly the

way we communicate rendering it even more efficient and accessible. As a result, a new

system "intemet" flourished and with it the "e-commerce" creating a large potential of

growth and new business. The demand for persona1 computers and other electronic

devices increased trernendously, thus putting pressure for further improvement in speed,

memory capacity and general performance. The increasing need for portable and light

electronic utilities increased the demand to develop low power and highly efficient

devices. These devices constinite the main building block of the integrated circuit (IC),

that exist in watches. cars, ceilular phones, microwaves, etc. These integrated circuits are

small in dimensions typically less than 1 cm'. They are trernendously powemil thus

accomplishing one million operations per second. In order to achieve the characteristics

of higher speed, greater density (more deviceslarea), and lower power. each individual

device (MOSFET) has to be reduced in size. Therefore, "Scaling" which is the reduction

in individual device size. becarne the focus of engineen over the past 30 years. Scaling

allowed the possibility of achieving higher speed, greater density (more devicesjarea),

and low power. The scaling behavior has followed the well known Moore's law,

surnrnarized by exponential growth of chip complexity due to increasing wafer size and

reduction in minimum feature sizes accompanied by concurrent improvement of

technology processes and circuit design [6]. The minimum feature size has dropped from

tens of microns in the 1960's to the current value of 0.18 pm and it is projected to be 0.05

pm in 15 years as indicated in Table 1.

Oxynitride Gate Dielectrics for Deep Sub-micron MOS Devices 1

Chapter 1 - Introduction Universitv of Toronto

Table 1. 1 Technology roadrnap characteristics in the area of thermal/thin films [1]

PRODUCTION

The fundamentai limits of the metal-oxide-semiconductor has already been

reviewed and discussed since its first development more than 25 years ago [2-51. The

amaigarnation of single devices into an integrated circuit has already passed through

medium (MSI), large (LSI), very large (VLSD, and now ultralarge scale integration

(ULSI). The biggest breakthrough was the demonstration of the silicon MOSFET. metal-

oxide semiconductor field effect transistor (Fig. 1.1) which has emerge to be the key

component of most W I devices.

Minimum Feature Size, pm Eauivalent Oxide Thickness, nm

Fig 1. 1 Schematic of a simple nîhannel MOSFET [6]

The wide applications of the integrated circuit could not have been accomplished

without the unique properties of SüSiO? interface. The thin SiOz layer acts as an insulator

separating two electrical signais. One traveling between the source and drain in the

serniconductor layer undemeath the SiOl and the other fiows in the semi-metallic layer

(the gate) above the SQ. These two signals are coupled in a capacitive fashion by the

Si02 film. The metallic gate is fabricated to interconnect more than one device together

producing the integrated circuit. In order to operate systematically and reliably, the

integrated circuit depends directly on the insulator film between the semiconductor and

the metal layer. The Sior's unique properties as an effective insulator makes it currently

0.25 4 - 5

Oxynitride Gate Dielectrks for Deep Sub-micron MOS Devices 2

0.18 1 0.15 3 - 4 1 2 - 3

0.13 2 - 3

0.10 1-5 - 2

0.07 < 1 -5

0.05 el-0

I

'


the only gate dielectric that posses al1 the necessary characteristics. Presently, SiO2 films

with thickness of around 40 A are being used for the manufacturing of CMOS based devices.

Table 1 gives an idea on how these dimensions will continue to reduce with

respect to the time. Equivaient oxide thickness, 4, refers to the thickness of any dielectric scaled by the ratio of its dielectric constant to that of silicon dioxide (where

&xi& = 3.9) S U C ~ that

tx = k q ~ s k x i d e (1.1)

where tlq and t, are the equivalent oxide and physicai thickness, respectively, and &j&

and E, are respectively the dielectric constant of silicon dioxide and that of the other

die lec tric.

In the year 2012, if the gaie dielectric were to remain SiO?, the physical thickness

would be around 10 A, which is about three monolayer. Therefore, the traditional SiO2 dielectric faces a number of problems and challenges as the feature size of the device

decreases. Dopant (boron) diffusion into and through the ultrathin oxide from the poly-Si

gate becomes a critical issue. Oxynitride (SiO,N,) shows a strong potential to replace

conventional "pure" silicon gate oxides for sub-0.25 pm devices. Nitrogen incorporated

into the oxide has shown to f o m a barrier against boron diffusion in p' gate MOSFETs.

In addition, a small concentration of nitrogen near the interface appears to reduce hot-

electron degndation and improve breakdown properties. However, the fundamental limit

of the oxide films is direct tunneling (current) which grows exponentially with decreasing

film thickness. To overcome the direct tunneling problem, the physical thickness of the

dielectnc should be kept large, much thicker than the direct tunneling limit. On the other

hand, ULSI scaling is driving a reduction in thickness for next generation of fast

switching devices. One can overcome these conflicting needs by replacing the

conventional SiOl by a material with a higher dielectric constant in order to increase the

physicai thickness of the film, while the "equivalent" electncd thickness with respect to

pure S i 9 and the direct tunneling current would be much reduced.


Cha~ter 1 - Introduction University of Toronto

1.2 Basic Concept of Metal-Oxide-Semiconductur Field Effect

Transistors (MOSFETs)

The basic MOS transistor is illustrated in Figure 1.1 for the case of an n-type

channel fomed on a p-type Si substrate. The n+ source and drain regions are difised or

implanted into a relative Iightly doped p-type substrate and a thin oxide layer separates

the metal/poly-Si gate from the Si surface. In this device, a voltage applied at the gate

electrode that is isolated from the conducting channel by an oxide, controls the drain

current. No current flows from drain to source without a conducting n channel between

them. However, when a positive voltage is applied to the gate relatively to the substrate,

positive charges are in effect deposited on the gaie metal. In response, negative charges

are induced in the underlying Si, by the formation of a depletion region and a thin surface

region containing mobile electrons termed inversion Iayer as shown in Figure 1.2a. These

induced electrons form a conducting channel in the field-effect-transistor allowing

current to flow from drain to source (electrons from source to drain) when a positive

drain-source voltage is applied. The ohmic voltage drop in the channel results in the drain

end of the channel having a smaller field norxnal to the surface than at the source end,

hence the density of electrons decreases going from source to drain in the manner shown

in Fig. 1.2a. Since the potential difference between the channel and the substrate contact

is greater at the drain end, the depletion width at the drain end will dso be greater [7].

The drain current-voltage characteristics as a function of gate voltage are shown in Fig.

1 .Sb*


Chapter 1 - Introduction University of Toronto

Fig 1.2 (a) Schematic illustration of the induced n-channel and the depletion region [8]

Fig 1.2 (b) Drain current-voltage characteristics as a function of gate voltage [8]

The minimum gate voltage required to induce the channel is called the threshold

voltage VT, and is an important parameter in MOS transistors. The positive gate voltage

of an n-channel device m u t be larger than some value VT before a conducting channel is

induced. The transistor of this type that requires the applied gate voltage to be larger than

VT to induce a conducting channel is called the enhancement-mode transistor. The MOS

transistor is ''nomally off' with zero gate voltage. Despite the fact that both n-channel

and p-channel MOS transistors are in common usage. the n-channel type is generaily

preferred because it takes advantage of the fact that the electron mobility in Si is larger

than the mobility of holes. The ability for the MOS transistor to switch from the bboff'

state to the "on" state is particular useful in digital circuits.



To increase the number of components per integrated circuit chip, the device

dimensions rnust be scaled dom. Commercial devices with minimum feature length of

0.35 to 0.18 pm are now available. As the channels become shorter, many undesirable

effects, the so-cailed short channel effects, will arise. As the channel length L is reduced,

the depletion layer widths of the source and drain junction become comparable to the

channel length. When this happens, punch-through will occur. At punch-through, the two

depletion layers merge and the gate loses control of the current. Therefore, punch-through

is a major limitation of device operation for short-channel MOSFETs. If the biasing

voltage is kept constant and the channel length is decreased. the longitudinal electricai

field will increase; the channel mobility becornes field dependent, and eventuall y velocity

saturation occurs. Therefore, when saturation velocity occurs, a substantial reduction in

the current as well as the transconductance is observed.

One approach to minimize the short-channel effects is to maintain the long-

channel behavior by simply reducing d l dimensions and voltages by a scaling factor K (>

1), so that the intemal electric fields are the same as those of a long-channel MOSFET.

The new dimensions are:

For a constant field, the operating voltages vary as

The physical quantities are scaled as follows

-- -- --

Oxynitride Gate Dielectrîcs for Deep SU~-micron MOS Devices 6


The switching power Px and Pd= are scaled as

and

The switching energy is scaied as

Therefore, as the device is scaled down, al1 but one of these variables changes favorably.

The operating speed increases, the component density increases, and the power density

remains constant. However, the current density increases by the scaling factor. Figure 3

shows the traditionai large device (nght hand insert). the scaled down device (left-hand

insert), and their corresponding output chancteristics. It must be noted that the threshold

voltage is also scded down by the same factor. The reduction in oxide thickness is

essential for the continuous improvement and scaling of MOSFETs. Nevertheless, as the

SiOz thickness reaches that of 3 nm, the reliability of SiO2 to be used as a gate dielectric

becomes questionable thus require alternative material to meet the "scaling" requirements

for future generations. Essentidly, the focus of this thesis is to study nitnded silicon

oxides (silicon oxynitrides) as a potential substitute for SiO,. By using novel approaches,

oxynitndes have been grown and chanctenzed, this will subject of the coming chapters.



I OOPING NA I

SCALED- OOWN LARGE DEVICE

0 Vt /K "T "G

Fig 1. 3 MOSFET scaling with constant scaling factor [ 151

1.3 Limitations of SiOa as a Gate Dielectric for Sub-0.18 pm

Devices

1.3.1 Hot Carrier Degradation

The shnnkage of device dimension without corresponding reductions in supply

voltage leads to very high electric fields near the drain of the device [9]. Intense eiectric

fields cause some physical damage resulting in deterioration of device reliability. Hot-

carrier injection into gate oxide, c m result of the high electric field, where channel

electrons accelerate and produce impact ionization. The generated electrons and holes c m

be injected into the p t e oxide, resulting in charge trapping and interface trap generation.

Hot electrons can be generated from either the channel region or even the substrate. Some

of the electrons, those that gain suficient energy to surmount the Si-Si02 interfacial

energy bmier without suffering an energy-losing collision in the channel, are injected

Oxynitride Gate DieIectrÏcs for Deep Sub-micron MOS Devices 8


into the oxide. Subsequent trapping of the injected electrons cause device instability, such

as threshold voltage shift and transconductance degradation.

1.3.2 Boron Penetration

Until recently, Si02 has been effective in blocking impurities from penetrating

into the channel region. The bonding difference inside the SiO? film and the SilSi02

interface, act as impurity barrier. Therefore, there are two barrier energies required for the

impurities to pass before falling in the channel. As the SiOz film decreases in thickness,

so does its blocking power, and consequently, impurities (boron) penetrate into the gate

dielectric. The use of highly boron-doped gates for CMOS was fint introduced to reduce

short-channel effects and lower threshold voltage as the device dimensions are decreased.

Nevertheless, as a consequence of reduction in thickness of the gate dielectric, the

possibility of boron penetration became even more eminent. Poor threshold voltage

control. fluctuations in flat band voltage (VFB) accornpanied by increasing PMOS

subthreshold slope and electron trapping rate, and decreased Iow field mobility are the

negative implications resulting from any impurity penetration [I l , 121.

1.3.3 Leakage Current

The traditionally used silicon dioxide as the material of choice may reach its lirnit

as an insulating layer. A SiO? layer as thin as 15 A may not be usable due to some difficulties caused by manufacturing control and reliability [13, 141. As the silicon

dioxide's thickness is decreased, the gate leakage current through the film increases. For

silicon dioxide, at a gate bias of -1 V. the leakage current changes frorn 10-" M m ' at

-35 A to 10 Ncm' at - 15 A [15]. This renders an increase of about 12 orders of magnitude in current for a thickness reduction of just above two. This exponentid

increase in leakage current causes serious concern regarding the operation of CMOS

devices, especiaily with respect to standby power dissipation, reliability, and lifetime.

This exponentid increase in leakage current witb decreasing dielectric thickness is the

biggest k a t to the reliability of SiOz as the gate dielectric thickness decreases into

the15 to 20 A range.


Chapter I - Introduction University of Toronto

1.4 Oxynitride as Gate Dielectric

As the scaling of oxide thickness continues, it is quite desirable to maintain a low

leakage current as well as augmenting the reliability of ultrathin films. The introduction

of nitrogen into films has been useful by elirninated some concerns. A sensible way to

eliniinatz or reduçz any Jwiage ccausd by küpping during hot airctrons injection is co

improve the gate oxide and Si/SiOz interface quality. Annealing films in (MI3) or other N

containing gas has shown an increase in the film's reliability. The incorporation of

nitrogen reduces the generation of defects thus causing a reduction in trap formation,

which is formed by hot electron injection [16-181. Nevertheless, thermal nitridation was

first aimed to form silicon nitride not oxynitride due to its larger dielectric constant of 7.5

compared to 3.9 for Sioz. However, the use of NH3 as a nitridation agent, especidly to

nitridize the Si/Si02 interface, results in excessive H incorporation and the potential for

dielectnc degredation, therefore, subsequent reoxidation is essential to reduce electron

trapping caused by hydrogen incorporation. On the other hand, the use of N20 to

introduce N into SiO? films avoids the problem of trap generation caused by hydrogen

and constitutes a single step process by direct oxidation in N20 without further

reoxidation. It was confirmed that non-hydrogen nitrogen gas such as NzO and NO gave

better device reliability thus decreasing the defect-generation rate due to the absence of

hydrogen during the process of oxidation [ 191.

Oxide films that have been grown or annealed with N20 have a total nitrogen

concentration of less than 1 %. A small nitrogen concentration within the film provides

the ability of controlling channel hot-electron degradation effects in MOSFETs.

However, small nitrogen concentrations obtained in oxides grown or annealed in N20 is

not sufficient to obstruct boron penetration fiom a p-type Si gate into the gate dielectric.

Incorporation of large amounts of nitrogen to suppress the penetration of boron has

negative impacts causing threshold-voltage shifts, AVt, mobility and transconductance

degradation which are not only dependent on the concentration of nitrogen, but also on

the distribution of nitrogen (profile). The above is pady due to the positive charge that

results fiom the nitrogen incorporation into the Sioz.

Oxynitride Gate Dielechics for Deep Sub-micron MOS Devices 10


An ideal oxynitride should have small amounts of nitrogen at the Si/Si02

interface, to improve hot carrier resistance caused by channel hot electrons and higher

concentrations at the SiOz/polysilicon interface to prevent the penetration of boron from

the doped poly thus minimizing a negative implication on the perfommce of the device

[W. Implanting the wafers with nitrogen cm considerably reduce the rate of oxidation

thus producing oxynitrides. Silicon wafers cm be implanted with different nitrogen doses

through a sacrificial himace oxide. The ion implantation energy used is generally low,

around 10 keV. N-impanted wafers give the possibility of merging the logic and memory

components on a single chip by using different concentrations of implmted N doses thus

producing gate oxides with different thicknesses for different applications. Therefore, the

system on a chip minimizes the number of processing steps rendering it more efficient

and economical. The main disadvantage of this method is the extend of damage caused in

the Si substrate due to the implantation of heavy doses (1 x IO") of N-ions. Nevertheless,

oxynitrides formed via N-implantation have shown to reduce trap generations under high-

field stress conditions and prevent boron penetration [2 1,221.

1.5 Thermal Growth of Oxynitride in Conventional vs. Rapid-

Thermal-Processing (RTP)

Decreasing the oxide thickness below the 10 nm mark, cm be done by reducing

the oxidation rate by dropping the oxidation temperature in the range of 750°C to 900°C

compared to the high oxidation temperatures used pnor to 1990 which varied between

900°C and 1100°C. It is also possible to reduce the oxidation rate by decreasing the

concentration of oxygen Rowing in the furnace tube by diluting the oxygen influent with

nitrogen thus giving a better thickness control. The necessity to grow oxide films as thin

as 30 A demands alternative oxidation techniques. Rapid-thermal oxidation (RTO) emerged permitting the possibility of producing uniform ultrathin gate oxide of high

quality and reliability. The high ramp up rate as well as the possibility of oxidation at

1000°C for less than a minute compared to an equivalent thickness obtained in a fumace

at 750°C for 20 min gives an upper edge to the RTA, since high oxidation temperatures

generally produce better quality oxides.

Oxynitride Gate Dielectncs for Deep Sub-micron MOS Devices 11


Rapid thermal processing (Fig. 1.4), which utilizes incoherent light of tungsten-

halogen lamps to heat the wafer by photoabsorption, is a promising technique to be

utilized in ULSI technology. RTP has also the following advantages when compared with

conventional fumaces with regards to gate-dielectric fabrication:

An excellent controllability of the thermal process that ensures rapid heating and

cooling rates with steady-state temperature ranging between 500 to 1200 OC and time

from 3 to 600 S.

A controllable process arnbient which cm be switched and purged in seconds due to a

very small heating chamber and the use of mass-flow controllers to accommodate

advanced multi-gas processes such as oxidation-nitndation-reoxidation.

The ambient is filled with inert gas and the wafer is cold enough during loading and

unloading thus minimizing undesirable reactions to take place during RTP.

Gas Outlet Lampa Wafer Quartz Tube

I I " I 1

Fig 1.4 Schematic cross-sectional view of a rapid thermal processing (RTP) system

1.6 X-ray Photoelectron Spectroscopy: its Usage and Application in Characterizing Ultrathin Gate Dielectrics

X-ray photoelectron spectroscopy (XPS) is generally regarded as an important

key technique for surface charactenzation and analysis of ultrathin films. This technique

provides a total elementd analysis of the top 200 A of any solid surface, which is stable in vacuum. XPS is a technique from which quantitative information can be extracted with

regard to chernical bonding.

Oxynitnde Gate Dielectrics for Deep Sub-micron MOS Devices 12

Chapter 1 - Introduction Universitv of Toronto

The basic principle of XPS is the photoelectric effect, where a photon interacts

with an atomic orbital electron such that there is total and complete transfer of the

photon's energy to the electron. Given that the photon energy is greater than the binding

energy of the electron in the atom, the electron is then ejected from the atom with a

kinetic energy approxirnately equai to the difference between the photon energy and the

binding energy.

E b = hv - Ek (1.12)

where Eb is the electron binding energy, Et is the electron energy, measured by the

instrument, and hv is the photon energy (h is plank's constant and v is the X-ray

frequency). Al1 energies are expressed in eV. Measuring the kinetic energy will allow one

to calculate the binding energy and by knowing the binding energy. atoms c m be

identified.

Figure 1.5 presents a schematic version of the experiment for a solid sample. The

solid sarnple is mounted in a suitable sarnple holder and placed in the high-vacuum

environment of a typical instrument. An X-ray source emitting monochromatic X-ray

photons. usually magnesium or aluminum Ka, is directed towards the sarnple. The X-ray

photons statistically interact with the atomic and rnolecular orbital electrons in the

sarnple. Some fraction of the photoelectrons produced by this process is directed up and

out of the sarnple and analyzed by the analyzer. The anaiyzer basicaily measures the

number of electrons of different kinetic energies. The information is generally processed

by a computer to produce a spectnim of photoelectron intensity as a function of binding

energy. The binding energy position of each of the key peaks allows elementai

identification to be made. Quantification is achieved by measuring the area under each

peak.


Chapter L - Introduction University of Toronto

t Output Vin Compuicr Y iclds Photoekctron Kinctic Encrgy AnrIyzer

Fig 1.5 Schematic diagram of an X-ray photoelectron spectroscopy expenment

The methodology of XPS measurements is well described in Ref. 23. Briefly, the

oxide film thickness &,,. is determined by the Si 2p core level intensity ratio of the

oxidized silicon film Lx, and substrate Isi by

doxy = Lxy sin a ln[Lyl(PGi) + 1 1 (1.13) where Lx, is the photoelectron effective attenuation length in the oxide film, a is a photoelectron take-off angle, and P = 0.75. The above equation was derived based on the assumption that the photoelectron signal has an exponential depth distribution Funcrion.

This assumption has been confirmed experimentally [24] and theoretically by a Monte

Car10 simulation [25]. The average Si 2p photoelectron inelastic mean-free path (Lq) in silicon oxide films is found to be 2.96 nm [26]. The oxide film physical thicknesses

measured by TEM. XPS and SE (spectroscopy ellipsometry) are found to be in excellent

agreement with each other 1261.

Ox ynitride Gate Dielectrics for Deep Sub-micron MOS Devices 14


1.7 Thesis objective

The reduction in oxide thickness is essential for the continuous improvement and

scaling of MOSFETs. Nevertheless, as the SiOz thickness reaches that of 3 nm, the

reliability of SiO2 to be used as a gate dielectric becomes questionable thus demanding

alternative materiai to meet the "scaling" requirements for future generations. Essentially,

the focus of this thesis is to study nitrided silicon oxides (silicon oxynitrides) as a

potential substitute for SiO2. In Chapter 2, an XPS study on oxynitride films formed via

N-implanted wafers is presented. Chapter 3 discusses a novel approach to f o m Si3N4. In

Chapter 4, oxynitrides grown by direct nitridation in Nt are presented where a chernical

anaiysis and the electricd characteristics of the films are shown. Finally, conclusions

dong with suggestions for future work are presented in Chapter 5.



References

1. The National Technology Rodmap for Semiconductors, 3rd edition. Semiconductor Industry Association, San Jose, CA, 1997.

2. C. J. Frosch and L. Derick, Proceedings of the Electrochemicai Society, 1957, p. 547.

3. M. M. Atalla, E. Tannenbaum, and E. J. Scheibner, Bell Syst. Tech. J. 38,749 (1959).

4. 1. R. Ligenza and W. G. Spitzer, J. Phys. Chem. Solids 14, 13 1 (1960).

5. J. R. Ligenza and W. G. Spitzer, J. Phys. Chem. 65,201 1 (1961).

6. L. C. Feldman, E. P. Gusev, and E. Garfunkel, "Ultrathin dielectrics in silicon microelectronics," in "Fundamental Aspects of Ultrathin Dielectrics on Si-Based Devices", edited by E. Garfunkel, E. P. Gusev, and A. Y. Vul', (Kiuwer academic publishen, Dordrecht, Netherlands, 1998), p. 1.

7. S. C. Cobbold, "Theory and Applications of Field-Effect Transistors", John Wiley & Sons, 1970.

8. B. G. Streetman, "Solid State Electronic Devices" Prentice-Hdi Inc., 1995.

9. R. H. Dennard, F. H. Gaensslen, H. Yu, V. L. Rideout, E. Bassons, and A. R. Leblance, EEE J. Sotid State Circuits, SC-9,256 (1974).

10. G. J. Dunn and S. A. Scott, IEEE Trans. Electron Dev, 37, 1719 (1990).

I l . H. S. Momose, T. Morimoto, Y. Ozawa, K. Yarnabe, and H. Iwai, IEEE Trans. Electron Devices 41,546 ( 1995).

12. A. B. Joshi, J. Ahn, and D. L. Kwong, IEEE Trans. Elect. Devices 37, 1842 (1990).

13. H. S. Momose, E. Morifuji, T. Yoshitomi, T. Ohguro, M. Saito, T. Monmoto, Y. Katsurnata, and H. Iwai, Tech. Dig. Int. Electron Devices Meet., p. 105 (1996).

14. G. Timp, A. Agarwal, F. H. Baumann, T. Boone, M. Buoanna, R. Cirelli, V. Donelly, M. Foad, D. Grant, M. Green, H. Gossman, S. Hillenius, J. Jackson, D. Jacobson, R. Kleiman, A. KombIit, F. Memens, J. T.-C. Lee, W. Mansfield, S. Moccio, A. Murrell, M. O'Malley, J. Rosamilia, J. Sapjeta, P. Silverman, T. Sorsch, W. W. Tai, D. Tennant, H. Vuong, and B. Weir, Tech. Dig. Int. Electron Devices Meet., p.930 (1997).



15. D. A. Buchanan and S. H. Lo, "Characterization and the Lirnits of Ultrathin SiO2- Based Dielectrics for Future CMOS Applications," in 'The Symposium on the Physics and Chemistry of SiOl and the Si-SiO2 Interface", Los Angeles, 1996.

16. E. Cartier, D. A. Buchanan, and G. J. Dunn, Appl. Phys. Len. 64,901 (1994).

17. D. A. Buchanan, A. D. Marwick, D. J. DiMaria, and L. Dori, I. Appl. Phys. 76,3595 (1994).

18. E. Cartier, D. J. DiMaria, D. A. Buchanan, J. H. Stathis, W. W. Abadeer, and R. R. Voilersten, EEE Trans. Electron Devices 99, 1234 (1994).

19. G. Lucovsky, "Spatially-Selective Incorporation of Bonded-Nitrogen into Ultrathin Gate Dielectrics by LowTemperature Plasma-Assisted Processing," in Fundamental Aspects of Ultrathin Dielectrics on Si-Based Devices, E. Gaminkel, E. P. Gusev, and A. Y. Vul', Eds., (Kluwer Academic Publishers, Dordrecht, Netherlands, 1998). p. 147.

20. M. L. Green, D. Brasen, L. C. feldman, E. Garfunkel, E. P. Gusev, T. Guatafsson, W. N. Lennard. K. C. Lu and T. Sorsch, 'Thermal Routes To Ultrathin Oxpitrides", in Fundamental Aspects of Ultrathin Dielectrics on Si-Based Devices, Edited by E. Garfunkel, E. P. Gusev, and A. Y. Vul' (Kluwer Academic Publishers, Dordrecht, Netherlands, 1998) p. 18 1.

21. C. T. Liu, Y. Ma, J. Becerro, S. Nakahara, D. J. Eaglesharn, and S. J. Hillenius. IEEE Electron Device Lett. 18, 105 ( 1 997).

22. B. S. Doyle. H. R. Soleirnani, and A. Philipossian, IEEE Electron Device Lett. 16, 301 (1995).

23. M. F. Hochella, Jr. and A. H. Carim, Surf. Sci. 197, L260 (1988).

24. D. F. Mitchell, K. B. Clark, J. A. Bardwell, W. N. Lennard, G. R. Massoumi, and 1. V. Mitchell, Surf. Interface Anal. 21,44 (1994).

25. C. J. Powell. A. lablonski, S. Tanuma, and D. R. Penn, I. Electron Spectrosc. Relat. Phenom. 68,605 ( 1994).

26.2. H. Lu, J. P. McCaffrey, B. Brar, G. D. Wilk, R. M. Wallace, L. C. Feldman, and S. P. Tay, Appl. Phys. Lett. 71,2764 (1997).

Oxynitride Gate Dielecûics for Deep Sub-micron MOS Devices 17

Chapter 2 - Ultrathin Oxynitride Formation by Low Energy Ion-implantation University of Toronto

CHAPTER 2

ULTRATHIN OXYNITRXIDE FORMATION BY LOW ENERGY ION-IMPLANTATION

2.1 Introduction The continuous demand for smaller device dimensions in ultra large-scale

integrated circuits (ULSI) necessitates thinner gate oxides. To achieve ultrathin (~30 A) films, good thickness control is required by reducing the rate of oxidation. Nitrogen ion-

implant (N-VI) wafen have been used to contain the Si oxidation rate thus achieving

various ultrathin oxide thicknesses [ I l . Upon oxidation. (N-III) wafers produce ultrathin

nitrided oxides or oxyniuides. These oxynitrides have been shown to have supenor

electrical properties over the silicon dioxide when it comes to interface traps, breakdown

voltage strength and boron penetration resistance [Ml. The improvements in the electrical properties are mainly attributed to the presence of small amounts of nitrogen

(- 1 x 1 015 /cm2) at the oxpitride/silicon interface [7].

Previously. MI3 was used to introduce N into films, but hydrogen incorporation

causes electron trapping thus requiring reoxidation to reduce its effect [8]. Recently,

oxpitrides have been grown in N20 [6. 9, 101 or NO [LI, 121. One and even two

monolayers of nitrogen are reported in oxynitride layers upon growth in an NrO

environment 1131. In this work, two different processing approaches were undergone to

produce nitnded oxides or oxynitrides using nitrogen ion-implant (N-VI) wafers. One

approach is first segregating the nitrogen to the surface followed by oxidizing in oxygen,

while the second method is simply by direct oxidation where segregation and oxidation

occur simultaneously. The airn of this chapter is to study the growth kinetics of oxides in

these (N-III) wafers complemented by surface analysis. X-ray photoelectron spectroscopy

(XPS) is used in this snidy to perform a chernical analysis of the ultrathin nitrided oxides

or oxynitrides.

- -

Oxynitnde Gate Dielecnics for Deep Sub-micron MOS Devices 18

Chapter 2 - UItrathin Oxynitride Formation by Low Energy Ion-implantation University of Toronto

2.2 Experiment As mentioned above, via nitrogen ion-implanted wafers, two different process

methods were undertaken to grow ultrathin nitrided oxides or oxynitrides. These silicon

wafers have been implanted with 1 x 10" cm" nitrogen ions into the Si substrate through a

150 A sacrificial furnace oxide. The ion implantation energy used is 10 keV. The fint batch of sarnples was run in a 410 Heatpulse RTP (Rapid Thermal Processing) after

dipping the samples in 5% HF and rinsed in de-ionized water to etch away this sacrificial

oxide. The nitrogen in these as-implanted wders is concentrated at - 150 A below the Si substrate surface. Samples were run under nitrogen gas in the RTP for a constant time of

60 S. while varying the temperature from 500 to 1050 O C . The aim of the above

experiment is to obtain the anneal temperature at which nitrogen segregation occurs. The

second set of experiments consists of oxidizing three different batches of wafers. The

oxidation was accomplished under oxygen flow, in the RTP, by varying the temperature

between 800 and 1 100 OC while maintaining a constant time of 60 S. Similarly, a third set

of experiments was performed at a constant temperature of 950 O C while varying the time

from 10 to 300 S. Oxidation (RTO) was performed on:

a) bare silicon wafers, Le. wafers with no nitrogen ion-implant.

b) N-implanted wafers with N2 anneal.

c) As-received N-implanted wafers i.e. as-implanted wafers.

X-ray photoelectron spectroscopy (XPS) is used to determine the nature and

distribution of N in the ultrathin grown nitrided oxide films. The measurements were

carried out on a Leybold Max 200 system, which is equipped with a monochromatic AI

K a source. Thin oxide films of various thicknesses were obtained as described above.

The Si 2p core levels were recorded and were used to calculate the film thickness using

the rnethod described in Ref. 14 and chapter 1 for an electron free path of 2.96 nm. The

measurements were made at a 90" take-off angle.

The concentration of N in the oxynitride cm be calculated from the integrated

peak intensities of N ls, siC< (i.e., SiO2) 2p, and O 1s. Their relative sensitivity factors

were determined from themaily produced Si02 and Si3N4. Since it is hown that there

are some residud contaminants such as hydrocarbon and water present on the surface of


Chapter 2 - üimthin Oxynitride Formation by Low Energy Ion-impIantation University of Toronto

the sarnples. In order to eliminate this artificial fluctuation in the N profile, the N

concentration was calculated using only the N 1s and the si* 2p peaks.

2.3 Resuits and Discussion

2.3.1 Nitrogen Segregation

üpon sagregü ting the niirogen ai dilfereni temparaiurrs, an uihathin dieiecuiç

film is formed as shown in Fig. 2.1(a). The thickness increases from 4 to 8.5 A with increasing annealing temperature from 500 to 1050 OC. In Fig. 2.1 (b) the concentration of

nitrogen is plotted as a function of temperature. The amount of nitrogen levels off at 900

O C . It is observed in Fig. 2.l(b) that at temperatures higher than 900 OC, the concentration

of nitrogen decreases. This occun due to the dilution of nitrogen atoms in the film as its

thickness increases. This implies that nitrogen did segregate to the surface of the wafer

forming an ultrathin oxynitride or nitride layer. The N-1s binding energy in the N-rich

portion of the film. is 397.6 eV. The Si 2p spectrum shows a bulk Si peak at 99.1 eV.

which corresponds to the silicon substrate signal and a broad oxide peak at 102.4 eV.

This renders the SiOz peak a chemical shift of 3.3 eV compared to 2.45 eV for silicon

nitride, whose peak usually resides at 101.8 eV [15]. Therefore, segregation forms a

nitrogen rich oxynitride (SiO,N,) film rather than pure silicon nitnde since the chemical

shift of the SiO? peak is closer to that in oxide than in nitnde. The presence of oxygen in

the film can be attributed to the fact that the RTP is an open F~mace system where

oxygen infiltrates from the surroundings into the charnber thus oxidizing the film.

2-3.2 Growth Kinetics

The growth of niuided oxides or oxynitrides can be achieved dunng the oxidation

of N-implanted wafen, with and without N segregation, in O2 at temperatures ranging

berween 800 and 1100 O C for a constant time of 60 S. The film grows exponentially with

temperature, fitting a rate equation of the foxm

x = ~e~~


Chapter 2 - Ultrathin Oxynitride Fonnation by Low Energy Ion-implantation University of Toronto

Temperature ( O C )

Fig 2. 1 (a) Growth cuve for the oxynitride film formation upon segregation of nitrogen in nitrogen ion-implanted wafers. (b) The concentration of nitrogen in the oxynitride film.

where x is the oxide thickness in A, k is the exponentiai rate constant, T is the temperature in degrees Celsius, and A is a constant. The fitting values of A are 0.035,

0.39 and 2.36 for bare silicon wafer, annealed N-implanted wafers and as implanted

wafers, respectively. The exponential rate constant has the following values 0.0074,

0.004 1 and 0.0025 for bare silicon wafer, annealed N-implmted wafers and as implanted

wafers, respectively. Sirnilarly, the film grown on bare wafer reveals the sarne growth

characteristics. This is shown in Fig. 2.2(a), where kinetic data are compared for the

oxidation in Ot of N-implanted wafers, with and without N segregation, and bare silicon

wafea. The extent of oxidation is much less for N-irnplanted wafers than for bare silicon

wafers. These data support the view that the presence of nitrogen in the film retards

oxygen diffusion to the subsmte surface. Focussing our study on the nitrogen ion-

implant wafers, at Iow temperatures, the batch where segregation of nitrogen was


Chapter 2 - Ultrathin Oxynieride Formation by Low Energy Ion-implantation University of Toronto

performed first, has a slower oxidation rate than the ones where physical segregation of

nitrogen and oxidation of the substrate occur simultaneously. This holds tme in Fig.

2.2(a) when the processing temperature is below 1 0 OC. At this temperature and higher,

the oxide thickness for samples with and without N segregation become of equal value.

Hence, the nitrogen, at temperatures higher than 1ûûû "C in samples without N

segregation, is segregating more or Iess instantaneously to the surface thus kineticdly

functioning equivaiently to wafers whose nitrogen has been segregated before oxidation.

The difference in thickness at low temperatures is due to the fact that the samples with N

segregation are rich in nitrogen atoms at the surface, thus reducing the rate of oxidation.

For exarnple, at 800 O C , the film thickness for the segregated nitrogen pnor to oxidation

lies around 13 A compared to 19 A for the film that underwent simultaneous segregation and oxidation. The reason for that is revealed from Fig. 2.3(a), where the nitrogen

concentrations for both films are 14.4 and 3.2 atomic %, respectiveiy. Following the

trend of the curve in Fig 2.3(a), the nitrogen concentration for a 19 A film should be of the order of - 10 atomic %. This illustrates that nitrogen did not fully segregate at 800 O C for 60 s when simultaneous segregation and oxidation is performed, resulting in a thicker

film due to the low nitrogen concentration. At 900 OC for 60 s, the nitrogen seems to have

fully segregated for the film grown on a sample without N segregation as it lies close

enough to the curve of Fig. 2.3(a). The film obtained dunng simultaneous segregation

and oxidation has a thickness of 23 A, which is fairly elevated to that of 15.2 A, which is formed by segregation pnor to oxidation. The reason for this difference is probably the

fact that at 900 O C a longer time is required for the nitrogen atoms to diffuse to the

surface thus allowing. initially, a faster oxidation rate. Therefore, the excess time required

for nitrogen to segregate dunng simultaneous nitrogen segregation and oxidation at 800

and 900 "C and the dready present high nitrogen concentration at the surface for the

samples with N segregation causes this difference in thickness at lower temperatures.



I 1 l 1 i 1 I ( a b

I I

L - - B a r e s i l i c o n w a f e r s - L .I

L 9 - - L 9 -

W i t h o u t N S e o 9 - I -

1 1 I 1 1

600 900 1 O00 1 t O O

T e m p e r a t u r e ( O C )

8 0 - B a r e s i l i con w a f e r s I

I

9

T i m e (s)

Fig 2. 2 (a) A cornparison of the oxidation kinetics for N-implanted wafers, with and without N segregation, and bare silicon wafers at various temperatures for 60 S. The points on the solid lines are for individuai expenments, the lines being least-squares fits to direct exponentid equations. (b) Oxidation kinetics for N-implanted wafers, with and without N segregation, and bare silicon wafers at a constant temperature of 950 OC while varying the time. The lines are the least-squares fits to direct logarithmic equations for the samples with and without N-segregation and to a parabolic equation for bare silicon wafers.



T h i c k n e s s ( A )

Fig 2. 3 Nitrogen concentration as a Function of thickness for (a) oxidation carried out at various temperatures keeping the time constant for 60 s, (b) oxidation carried out at a constant temperature of 950 OC while varying the time up-to 300 S. (O) represents samples with N-segregation, (0 ) samples without N-segregation.

The kinetics of oxidation is also compared for N-implanted wafers, with and

without N segregation, upon oxidation at 950 O C while varying the time to 300 S. Once an

initial film with a finite thickness is developed, further oxidation requires the difision of

02- ions through the oxide. The oxidation rate is lirnited by the flux of ions to the growth

interface. That is,


Chapter 2 - Ulîrathin Oxynitride Formation by Low Energy Ion-imptantation University of Toronto

du Jiu= dt

From Fick's first law of diffusion in 1 -D

For bue silicon wafers, we have

Combining this result with the above equations

Sepanting the variables and integrating yields:

= C2r+ C3 (2-6)

where the constant Cz is equal to -DCo and the constant C3 results from the integration

and gives the initial oxide thickness. This is referred to as a parabolic growth rate and is

characteristic of oxide formation on Si. Figure 2.2b shows a parabolic curve fitting the

experimental data point for the bue silicon wafers. C2 has value of 26.8. while C3 is zero.

On the other hand, the (N-VI) sarnples c m be best expressed in terms of a direct

logarithmic equation of the form

y = Coln(Czt + 1) (2.71 where y is the oxide thickness in A, t is the tirne in seconds, and Co is a constant. This is in contrat to film growth on bue wafen at the same temperature of 950 OC, where a

parabolic rate relation is found to best fit the kinetic data. The fitting vaiues of C2 are

3.53 and 1.84 for the annealed N-implanted wafers and as implanted wafers. Co has the

following vaiues 3.76 and 1 1.74 for the annealed N-implanted wafers and as implanted

wafers, respectively.

Due to the presence of nitrogen, the diffusion of oxygen through the oxide wouid

exponentially decrease with increasing oxide thickness, instead of a linear decrease as

shown for the bue silicon wafer. Therefore,

Substituting by following the same procedure would yield,

-


Chapter 2 - Ultrathin Oxynitride Fomtion by Low Energy Ion-implantation University of Toronto

where Ci is DCo and C3 is one, since for a time of zero seconds, the thickness must also

be zero. For the sarnples where segregation was done prior to oxidation, the oxide

thickness is less than the wafers where simultaneous segregation and oxidation was

performed. This difference is again conuibuted to the high presence of nitrogen atoms

initially in the already segregated wafers thus slowing the oxidation rate. The difference

in cxide thichess persists m i l up-to 300 s cf oxidation. whex at ?his point bath

samples, with and without N-segregation yield the sarne thickness of -27 A. Fig. 2.3(b) shows the nitrogen concentrations for the 10 and 30 s oxidation falling well below the

curve. This indicates that nitrogen, during simultaneous segregation and oxidation for a

period of 10 and 30 S. did not fully diffuse to the surface. Therefore, at 950 O C , time is

required for nitrogen to segregate to the surface allowing, initiaily, a fairly npid

oxidation rate of the silicon substrate thus accounting for the difference in the film

thickness. The above discussion is confined by calculating the activation energy for

each situation.

~ 2 ( % 0 " C) D(950" C) Doe -,%(im )

Chapter 2 - UImthin Oxynitride Formation by Low Energy Ion-implantation University of Toronto

oxide thickness when using nitrogen ion-implant wafers compared to silicon dioxide

grown on bare silicon wafer.

2.3.3 XPS Analysis

2.3.3.1 Chemical structure and Distribution of N

Figure 2.4 shows a comparison of N 1s spectrum between segregated nitrogen

pior to oxidation (solid lines) and simultaneous segregation and oxidation (dashed lines)

of nitrogen ion-implant wafers. It is found that the binding energies for the samples that

underwent simultaneous segregation and oxidation are systematically lower when

compared to those where segregation of nitrogen is performed before oxidation.

-400 -398 396 Binding Energy (eV)

Fig 2.4 Intensity comparison for Nls peak location between sarnples with and without N segregation when oxidation is carried out at various temperatures keeping the time constant for 60 S.

The N 1s binding energy at 900 and 1000 O C for the sample without N

segregation is 397.6 eV, while 398.2 eV is obtained for the sarnples with N segregaîion.

Oxynitride Gate Dielectrîcs for Deep Sub-micron MOS Devices 27


The value for the samples without N segregation is the same as that of N20 oxides.

Therefore, chernically, there is no difference between the implanted N when segregation

and oxidation occur simultaneously and the N incorporated in a fumace that foms

N 4 i 3 [ 161. Furthemore, this means that the oxynitride formed dunng sirnultaneous

segregation and oxidation has the nitrogen localized near the interface forming silicon

nitride, this observation is also reported elsewhere [I l . However, when segregation is

performed prior to oxidation, the nitrogen seems to be more evenly distributed away from

the interface bonding, more with oxygen atoms causing a negative chemical shift of 4 . 6

eV which is attributed to the oxygen's higher electro-negativity. The chemicd

composition of that oxynitride is expected to be of the form SiO,N,. Oxidation at 800 OC

for 60 s results in the N 1s binding energies for the samples with and without N

segrrgation to be 397.8 eV and 397.4 eV. respectively. The reason behind the lower

binding energies when compared with those of 900 and 100 O C is the presence of fewer

oxygen atoms in the oxynitride film upon oxidation at lower temperatures. On the other

hand. at 1 100 OC, the binding energy for the segregated nitrogen before oxidation is 398.2

eV, which is the same as at 900 and 1000 OC; therefore, the oxynitride film is chemicdly

equivalent and stoichiometrically stable. The N Is binding energy at 1100 OC for the

samples without N segregation is 398 eV. This reveals that, at high temperatures,

nitrogen tends to extend into the film rather than staying localized close to the interface

adopting a similar chemical feature to the oxynitride film formed by sePgation prior to

oxidation.

2.3.3.2 Si 2p spectra

Figure 2.5 shows the Si 2p spectrum for the samples with N segregation to be

composed of two peaks, one at 99.2 eV, which corresponds to the silicon substrate signal,

and the second at 103 eV, which is due to the oxidized silicon. The Si 2p spectrum for the

samples without N segregation shows the bulk Si peak at 98.6 eV and a broad oxide peak

at 102.8 eV. Ai1 peaks are calibrated to the C 1s peak located at 284.6 eV. This difference

in peak locations is apparent for the samples that underwent oxidation at temperatures

varying from 800 to 1000 OC keeping a set tirne of 60 S. At 1100 OC, the peaks rnerge


Chapter 2 - Ultnthin Oxynitride Formation by Low Energy Ion-implantation University of Toronto

together for the N-implanted wafers, with and without N segregation, as shown in Fig.

2.5. A qualitative behavior c m be observed from Fig. 2.5. As the oxidation temperature

increases, the absolute intensity of the Si 2p peaks decreases while the SiOz peaks

increase. This behavior is mainly attributed to an increase in oxide thickness.

WMout N Seg.

-1 06 -1 01 -96

Binding Energy (eV)

Fig 2. 5 Intensity cornparison for Si 2p peak locations between samples with and without N segregation when oxidation is carried out at various temperatures keeping the time constant for 60 S.

In order to mess the oxidation state of the thermally grown ultrathin films, we

consider the chernical shifts with respect ro elementai Si as shown in Fig 2.6. The

difference in binding energy between the substrate and the oxided Si 2~~~ constitutes the

chernicd shift. It is observed h m Fig. 2.6 that the chemicai shift of siM relative to sio changes From 3.4 to about 4.5 eV as the oxide thickness increases from about 15 to 110

-- -

Oxyniûide Gate Dielectrics for Deep Sub-micron MOS Devices 29


A. This expenmental phenomenon is expected as it has been reported elsewhere that this change in chemical shift of the Si(-O) 2p peak with oxide thickness is mainly due to

surface charging [17]. At difierent oxidation temperatures and a constant thickness of - 20 A, the oxynitride film formed by simultaneous segregation and oxidation has a chemical shifi of 4.1 eV. As for the SiOz film grown on bare wafers, its chernical shift

lies around 4.2 eV. These results clearly indicate an existing chemical difference between

the two oxynitride films arising frorn two different processing methods. The cause for

this difference in chemical shift can be due to a difference in dielectric constant between

the films [18]. N segregation prior to oxidation at 1 100 O C for 60 s shows a chemical shift

of 4.1 eV. which is similar to that of simultaneous oxidation and segregation. This

observation cm be explained by the fact that at a higher oxidation temperatures, the

presence of oxygen atoms within the film increases thus accounting for the growth in film

thickness (-16 A thicker than the film when oxidized at 1OOO OC) as well as the dilution of N atoms. Therefore, the oxygen's higher electronegativity causes this increase in

chemical shift for the sarnple with N segregation upon oxidation at 1100 O C for 60 S.

Thickness (A)

Fig 2. 6 Chernical shifts between the substrate and oxided Si 2puz for oxidation at varying temperatures keeping time constant at 60 S. (O) represents samples with N segregation, (a) samples without N segregation, and (0) samples of bare wafers.



2.4 Conclusions

2.4.1 Nitrogen Segregation

Nitrogen segregation in (N-YI) silicon wafers has been performed in RTP under

nitrogen gas at temperatures varying from 500 to 1050 OC for a constant tirne of 60 S.

XPS results showed the formation of an ultrathin and uniform layer of oxynitride

occumng. The ultrathir. ox;.r.itnde surfxe m g e s in thickness frum 4 to 8.5 .4. The nitrogen concentration in the film Ievels off at 900 OC, since there is an indication of a

decrease in nitrogen concentration as the thickness of the film increases due to the

dilution of nitrogen atoms in the film. Hence, nitrogen has been thoroughly segregated to

the surface forming N-rïch ultrathin film.

2.4.2 Growth Kinetics

The oxidation of (N-I/I) wafers where the nitrogen has been segregated

beforehand and nitrogen ion-implant (N-I/T) wafen with no segregation prior to

oxidation, produced oxide films significantly thinner than those which are formed during

oxidation of bare wafers. The presence of nitrogen atoms retards significantly the

diffusion of oxygen to the substrate surface thus producing ultrathin films ranging in

thickness between 13 and J O A. Kinetically speaking, no substantial difference has been observed between the sarnples that have undergone nitrogen segregation prior to

oxidation and those where segregation and oxidation have been perfomed

simultaneously, except at iow oxidation temperature andfor time where the already

segregated nitrogen acts as an oxygen barrier thus resulting in a slower oxidation rate

than when simultaneous segregation and oxidation is performed. The conformity of the

oxidation kinetics to a direct logarithmic rate relation for nitrogen ion-implant (N-VI)

wafers, as opposed to the parabolic rate relation for bare silicon wafen, lends support to

the notion of a reduction in rate caused by the presence of nitrogen atoms in the film.

Oxynitride Gate Dielecaics for Deep Sub-micron MOS Devices 3 1


2.4.3 N structure and distribution

XPS studies found two different types of N in the oxynitride films: one occumng

where simultaneous segregation and oxidation is perfonned with a N 1 s binding energy at

397.6 eV attributed to N in the form of Si3N4; and another occumng, when segregation is

perfomed prior to oxidation, with the N Is binding energy at 398.2 eV attributed to N

situated in a more electronegative envimnment. The N 1s binding energy obtained for the

samples without N segregation is the s m e as that for N20 oxides. This means that

chemically, there is no difference between the oxynitride formed by N P and by direct

oxidation of N-implant wafer. Based on the above results, it is possible to infer that N is

located near the interface for the samples without N segregation as it is for the N20

oxides. This is not the case for oxynitrides formed by segregation prior to oxidation, due

to a higher N 1s binding energy, the nitrogen atoms seem to be distributed more

unifonnly throughout the film.

2.4.4 Si 2p Spectra

The Si 2p spectrum for the samples with N segregation, in the nitrogen ion-

implant wafers, is composed of a bulk Si peak at 99.2 eV and a broad oxide peak at 103

eV. On the other hand, the locations of the peaks for the sarnples without N-segregation

are at 98.6 eV and 102.8 eV. This variance in peak locations confirms the existence of a

chemical difference between the two-oxynitride films arising from the two processing

methods. Even more, the chemical shift values for the samples without N segregation are

much closer to those of Si02 film grown on bare wafers. Such a result confirms the

existence of an O2 rich layer within the oxynitride ultrathin film grown during

simultaneous segregation and oxidation. The lower chemical shift observed upon

segregation of nitrogen before oxidation can be attributed to the presence of nitrogen

atoms uniformiy distributed throughout the film.



References

C. T. Liu, Y. Ma, J. Becerro, S. Nakahara, D. J. Eaglesham, and S. J. Hillenius, IEEE Elect. Dev. Lett 18, 105 (1997).

H. R. Soleimani, B. S. Doyle, and A. Philipossian, J. Electrochem. Soc. 142, L132 (1995).

B. S. Doyle, H. R. Soleimani, and A. Philipossian. IEEE Electron Device Lett. 16. 301 (1995).

C. T. Liu, Y. Ma, K. P. Cheung, C. P. Chang, L. Fritzinger, 3. Becerro, H. L u h a n , H. M. Vaida, J. 1. Colonell, A. Kamgar, J. F. Mionr, R. G. Muirray, W. Y. C. Lai, C. S. Pai, and S. J. Hillenius, Symposium on VLSI Technology Digest of Technical Papers (IEEE, Piscataway, NJ, 1 W6), p. 18.

H. C. Lu, E. P. Gusev, T. Gustafsson, E. Garfunkel, M. L. Green, D. Brasen, and L. C. Feldman, Appl. Phys. Lett. 69, 27 13 (1 996).

P. J. Tobin, Y. Okada, S. A. Ajuna, V. Lakhotia, W. A. Feil, and R. 1. Hedge, J. Appl. Phys. 75, 18 1 1 ( 1994).

T. Arakawa, T. Hayashi, M. Ohno, R. Matsumoto, A. Uchiyama, and H. Fukuda, Intem. Conf. on Solid State Devices and Materials (The Japan Society of Applied Physics. Tokyo, Japan, 1994) p. 853.

N. S. Saks, D. 1. Ma, D. M. Fleetwood, and M. E. Twigg, in Silicon Nitride and Silicon Oxide Thin Insulnting Films, edited by V.J. Kapoor and W.D. Brown, (Electrochemical Society Proceedings Series. Pennington, NJ, 1994), Vol. 94- 16, p. 395.

H. Hwang, W. Ting, D.-L. Kwong, and J. Lee, Tech. Dig. Int. Electron Devices Meet. 421 (1990).

10. Y. Okada, P. I. Tobin, V. Likhotia, W. A. Feil, and R. 1. Hegde, Appl. Phys. Lett. 63, f 94 (1993).

1 i . R. 1. Hegde, P. J. Tobin, K. G. Reid, B. Maiti, and S. A. Ajuna, Appl. Phys. Lett. 66, 2882 (1995).

12. Y. Okada, P. J. Tobin, K. G. Reid, R. L Hedge, B. Maiti, and S. A. Ajuria, IEEE Trans. Electron Devices. 41, 1608 (1994).

13. M. L. Green, D. Brasen, L. C. Feldman, W. Lennmi, and HA. Tang, Appl. Phys. Lett. 67, 1600 (1995).


Chapter 2 - Ultnthin Oxynitride Formation by Low Energy Ion-impIantation University of Toronto

14.2. H. Lu, J. P McCaffrey, B. Brar, G. D. Wilk, R. M. Wallace, L. C. Feldman. and S. P. Tay, Appl. Phys. Lett. 71,2764 ( 1 997).

15. E. C. Carr and R. A. Behrman, Appl. Phys. Lett. 63, 54 (1993).

16.2. H. Lu, R. J. Hussey, R. Cao, and S. P. Tay, J. Vac. Sci. Technol. B 14, 2882 (1996).

17. Y. Tao, 2. H. Lu, M. J. Hussey, R. Cao and S. P. Tey, J. Vac. Sci. Technol. B 12, 2500 (1994).

18. A. Pasquarello, M. S. Hybertsen, and R. Carr, Physical Review B 53, 10943 (1996).


Chapter 3 - Growth of Ultrathin Nitride on Si(100) by Rapid Thermal Ni Treatment University of Toronto

CHAPTER 3

GROWTH OF ULTRATEUN NITRIDE ON Si (100) BY RAPID

THERMAL Nz TmATlWENI'

3.1 introduction

Thin gate dielectric film is one of the most critical materials in enabling the deep

submicron integrated circuits. Conventional thermal oxide has worked extremely well up

to now. With continuous scaling-down in the film thickness, however, alternative gate

dielectrics may have to be used to counter problems such as electron tunneling and boron

diffusion [Il. Si nitride is arnong the most attractive candidates for replacing Si02 in

hiture generations of gate dielectnc [1]. The most common root in producing gate

dielectrics is through various foms of deposition methods [2]. Although a direct reaction

of N2 with silicon at relative high temperature (>1200°C) has been known [3-51 in

production of sintered Si3N4. there is no repon on nitride film growth by rapid thermal

pathway in nitrogen arnbient. This chapter reports the finding of ultrathin silicon nitride

7 treatment. growth on Si(100) wafer by direct rapid thermal N-

3.2 Experiments

The nitridation was cmied in an AG 410 rapid thermal process apparatus. Four

inch diameter boron doped Si(100) wafers were used for the nitridation experiment. Al1

wafers were cleaned using the RCA clean recipes, followed by a HF dip to remove the

native surface oxide and a DI water rinse. The cleaned wafers were loaded into the RTP

for nitride growth. The film thickness and chernical composition were studied by X-ray

photoelectron spectroscopy (XPS). The XPS measurements were carried out in PHI 5500

system which is equipped with monochromatic Al K, source and a hemispherical

electron analyzer. As there is no accurate photoelectron mean free path value for silicon

nitride, the parameters used to obtain the nitrîde thickness are the ones [6] calibrated for

Si02.

Oxynihide Gate Dielectncs for Deep Sub-micron MOS Devices 35

Chapter 3 - Growth of Ultrathin Nitride on Si(100) by Rapid Thermal Nz Treatment University of Toronto

3.3 Resultç and Discussions

3.3.1 XPS Analysis

Figure 3.1 shows Si 2p core level spectra recorded from the samples exposed to

N2 at 1 150 OC for various times, as labeled. There is no indication of nitride formation at

temperatures below 1 150 OC. As c m be observed from Fig. 3.1 that there are two doublet

peaks olrrewed on surface with a short ! s duration at I 150 OC. The doublet is caused by

spin-orbit splitting, pue and pm, which have a width energy separation of 0.6 eV and an

intensity ratio !h. The doublet with the p 3 ~ position at about 99 eV is from the bulk

silicon. Based on its binding energy, the second doublet (not resolved) at about 103 eV is

attributed to SiO2 [7]. The formation of such SiO2 film is explained as due to surface

oxidation by the residual oxygen in the RTP system during temperature ramp up. For a 10

s duration, it is found that the intensity of the SiO? peak at about 103 eV is dnmatically

reduced and another doublet peak at about 101.2 eV is emerged. This latter peak with a

chernical shift of 2.37 eV is characteristic of SisNd species [8]. With a longer tirne N2

treatment, the nitride peak intensity increases. This indicates growth of nitride film on the

silicon surface.

Figure 3.2 shows N 1s core level spectra as a hinction of Nz exposure time at

1150 OC. The intensities of the spectra were as recorded. As can be seen from the figure

that there is no indication of N peak for a short 1 s exposure, confirming Si 2p data of no

nitride formation. In a previous snidy, Green et al. [9] reported oxynitede formation by

direct N2 RTP. The N detection limit of the current XPS measurement is subrnonolayer,

comparable to nuclear reaction analysis used in ref. 9. The oxynitride formation by direct

reaction with Nz was explained [9] as due to catalytic reaction with residual gases as

H20. These residual gases are apparent absent in our RTP system. With a longer (>ls)

duration time, a stronger N 1s peak becomes visible and its spectral intensity increases

with increasing N2 exposure tirne. The binding energy of N 1s peak is found to be at 397

eV, characteristic of Si3N4 species. This indicates that N has reacted with the surface to

form nitride. The nitride formation increases with increasing N2 exposure time.


Chapter 3 - Growth of Ultrathin Nitride on Si(f 00) by Rapid Thermal N2 Treatment University of Toronto

Binding Energy (eV)

Fig 3. 1 Si 2p core level spectra recorded from samples treated by N2 at 1150 O C for various time, as labeled. The doublet peaks associated with SiO2, Si3& and bulk Si have also been labeled.

400 398 396 394

Binding Energy (eV)

Fig 3. 2 N 1s core level spectra recorded from samples treated by N2 at 1150 OC for various times, as Iabe!ed,


Chapter 3 - Growth of Ultrathin Nitride on Si(100) by Rapid Thermal N2 Treatment University of Toronto

Figure 3.3 shows O 1s core level spectra as a hinction of N2 exposure time at

1 150 OC. The spectra intensity are as recorded. The figure shows a ciramatic reduction of

O 1s peak intensity as N2 exposure time is increased and the intensity remains constant

after exposure time >30 s, a pure nitride film is formed. The O 1s signal observed is

explained as due to surface contaminates on the nitride film after being exposed to

ambient atmosphere.

L -

1 t 1 * r . 1 534 532 530 528

Binding Energy (eV)

Fig 3. 3 O Is core level spectra recorded from sarnples treated by N2 at 1150 OC for various times, as labeled.

Figure 3.4 shows the nitride thickness as a function of N2 exposure time at 1150

OC. The thickness is found to saturate very quickiy after 60 s exposure. A logarithmic

growth mode1 can explain this growth kinetics. The nitride where, d, as a hinction of

exposure time, t, can be fitted to an equation, d = a ln(bt+l), where the constants a and b

take vaiue of 2.17 and 5.88, respectively. The inset shows the thickness as a hinction

oxynitride gate dielectrics for deep sub-micron mos devices · 2020. 4. 7. · oxynitride gate...

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