paralleling cts

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Copyright © SEL 2015 Paralleling CTs for Line Current Differential Applications: Problems and Solutions David Costello, Jason Young, and Jonas Traphoner Schweitzer Engineering Laboratories, Inc.

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Paralleling CTs

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Page 1: Paralleling CTs

Copyright © SEL 2015

Paralleling CTs for Line Current Differential Applications: Problems and Solutions

David Costello, Jason Young, and Jonas Traphoner

Schweitzer Engineering Laboratories, Inc.

Page 2: Paralleling CTs

Outline

• Review two fundamental principles

♦ Tapping multiratio CT derates CT

♦ Paralleling CTs to 87L inputs decreases security

• Compare 87L designs

• Discuss two case studies

• Present solutions

Page 3: Paralleling CTs

Equivalent Circuit for Paralleled CTsExternal Fault

I1I2 XMXM

RL RLRCT RCT

IF IF

CT BCT A

Page 4: Paralleling CTs

Criteria to Avoid SaturationModified for 87L Applications

F B STDX

I • Z 1 7.5VR

Page 5: Paralleling CTs

Fault Current ComponentsSymmetrical (AC) and Asymmetrical (DC)

R

tM M LV V

i t sin t sin eZ Z

Page 6: Paralleling CTs

Effect of Tapping 1200:5 Multiratio CTC800 at 300:5 Versus 1200:5

Page 7: Paralleling CTs

Time to Saturate

SAT

F S BSAT

VX 1I R RRT ln 1

XR

Page 8: Paralleling CTs

External CT Summation ConnectionNumber of CTs Is Greater Than Relay Inputs

1 2

IR IL1 + IR

IL1

Line

••••••

Page 9: Paralleling CTs

Modern Relay With Multiple CT Inputs

1 2

IR IL1 + IR

IL1

Line

••••••

1 2

Page 10: Paralleling CTs

Traditional Slope-Based 87L

IOP = KIRT

Restraining Region

Operating Region

IRT

K0

IOP

K2K1

Page 11: Paralleling CTs

Alpha Plane Characteristic

Re(k)

Im(k)

Operating Region

RestrainingRegion

Rad

ius

–1

Angle

Page 12: Paralleling CTs

External Fault Detector

+

+

DIOPP

DIRTP

DIRTR

DIOPRDIOP

DIRT

∆IOPR

∆IRTR

Page 13: Paralleling CTs

Advanced Relay Characteristics

Re(k)

Im(k

)

–4

–3

–2

–1

0

1

2

3

4

–4 –3 –2 –1 0 1 2

Page 14: Paralleling CTs

Case Study 1 One-Line Diagram

Substation Alpha

Substation Charlie

262524

21 22 23

Bus A Bus B

16

33

Line 1

Line 2

CGSubstation Bravo

•••

•••

Page 15: Paralleling CTs

Raw Event Data From Breaker 51Asymmetrical CG Fault

Page 16: Paralleling CTs

Relay and CT Connection87L With Tapped and Paralleled CTs

21 22

Bus A

Line 2

Primary 87L / 21 / 67

Secondary21 / 67

2000:5 2000:5800:5 800:5

2000:5800:5

2000:5800:5

Page 17: Paralleling CTs

Filtered 87L Event DataICL 1.5 Cycles After Fault Inception

Page 18: Paralleling CTs

Case Study 1 Summary

• CTs are paralleled to 87L relay – for external fault, relay measures only error or difference between CTs

• CTs are tapped down – this derates CT performance

• External asymmetrical fault (reclose) causes saturation and dissimilar CT performance

Page 19: Paralleling CTs

Case Study 2 One-Line Diagram

4 7

5 8

6 9

13 32

14 33

15 34

•••••• •••

TCC-6TCC-7

Substation PO-1

TCC-8TCC-9

Substation L

Substation SK

Page 20: Paralleling CTs

Raw Event Data From Terminal 14-15

Page 21: Paralleling CTs

Breaker Failure Relay DataIndividual CT 14-15 Signals

Page 22: Paralleling CTs

Difference or Error Between CTsBreaker 14 and 15 Data

Page 23: Paralleling CTs

Filtered Data for TCC-8BG Fault Evolves to ABG, IA Spikes

Page 24: Paralleling CTs

Breaker Failure Relay DataIndividual Breaker 32 and 33 Signals

Page 25: Paralleling CTs

Difference or Error Between CTsBreaker 32 and 33 Data

Page 26: Paralleling CTs

Difference Between CTsAnother, Less Obvious Case

Page 27: Paralleling CTs

Case Study 2 Summary

• CTs are paralleled to 87L relays

• CTs are tapped down

• External BG asymmetrical fault inception causes TCC-9 CT error and misoperation

• BG to ABG fault transition causes TCC-8 CT error and misoperation

Page 28: Paralleling CTs

Solution 1 – Add Short DelayAlso Delays Internal Fault Trips

Page 29: Paralleling CTs

Solution 2 – Use Full CT WindingCase Study 2 CTs at 300:5 and 1200:5 Taps

Page 30: Paralleling CTs

Solution 3 – Expand Restraining RegionNot Effective, Reduces Dependability

Im

Re

8.06.04.02.0

Page 31: Paralleling CTs

Solution 4 – Use Advanced Relay

Page 32: Paralleling CTs

Conclusions

• CTs paralleled to 87L relays

♦ Breaker-and-a-half and ring-bus applications

♦ Relays with one three-phase current input

♦ Measurement of only error or difference between CTs for external fault

• CTs tapped down

♦ Is sometimes done to meter low load currents better

♦ Derates CT performance during faults

Page 33: Paralleling CTs

Conclusions

• Two case studies

♦ Both show 87L misoperations for external faults

♦ Both use externally paralleled and tapped CTs

• Solutions involving setting changes

♦ Empirically derived settings may not work for all cases

♦ Delay also slows tripping for internal faults

♦ Increase in slope or Alpha Plane restraint decreases dependability

Page 34: Paralleling CTs

Conclusions

• Solution – use maximum CT winding

♦ Increase tap to improve CT performance

♦ Use short delay (1-cycle maximum) with improved CT taps if CT saturation is still possible

• Solution – install modern relay

♦ Relay should have two CT inputs, external fault detector, generalized Alpha Plane, and more

♦ Replay of original data proves secure

♦ Consider using full winding CTs

Page 35: Paralleling CTs

Questions?