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NUMBER 1:1 SCALE DATE 03/31/17 APPLE DESIGNER KEN KIPLINGER THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED NOTES: ARTWORK VIEWED FROM COMPONENT SIDE. PCB SHALL CONFORM TO STANDARDS AS DEFINED IN APPLE SPECIFICATION 080-2265 (FLEXIBLE PRINTED CIRCUIT BOARDS) OR 062-0073 (MULTI- LAYER BOARDS) AS APPLICABLE. ORIG DIV TOP SIDE ASSEMBLY

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TOP MLB

PCBF, X891

820-00863-09NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE

THE POSSESSOR AGREES TO THE FOLLOWING

(I) TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

(II) NOT TO REPRODUCE OR COPY IT(III) NOT TO REVEAL OR PUBLISH IT

TITLE

DRAWING NUMBER

1:1

SCALEDATE

03/31/17

APPLE

DESIGNER

KEN KIPLINGER

THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED

NOTES:

ARTWORK VIEWED FROM COMPONENT SIDE. PCB SHALL CONFORM

TO STANDARDS AS DEFINED IN APPLE SPECIFICATION

080-2265 (FLEXIBLE PRINTED CIRCUIT BOARDS) OR

062-0073 (MULTI- LAYER BOARDS) AS APPLICABLE.

ORIG DIV

TOP SIDE ASSEMBLY

8

2 1

124567

B

D

6 5 4 3

C

A

C

A

D

7

B

3

1. ALL INFORMATION COMPILED FOR USERS OF FORUM HTTP://WWW.MOBILEGSM.IN.UA

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MLB BOT

PCBF, X893

820-00869-06NOTICE OF PROPRIETARY PROPERTY

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE

THE POSSESSOR AGREES TO THE FOLLOWING

(I) TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

(II) NOT TO REPRODUCE OR COPY IT(III) NOT TO REVEAL OR PUBLISH IT

TITLE

DRAWING NUMBERSCALE

1:1

DATE

04/06/17

APPLE

DESIGNER

TIM REID

THIS IS THE PROPERTY OF APPLE AND IT MUST BE RETURNED

NOTES:

ARTWORK VIEWED FROM COMPONENT SIDE. PCB SHALL CONFORM

TO STANDARDS AS DEFINED IN APPLE SPECIFICATION

080-2265 (FLEXIBLE PRINTED CIRCUIT BOARDS) OR

062-0073 (MULTI- LAYER BOARDS) AS APPLICABLE.

ORIG DIV

TOP SIDE ASSEMBLY

PCB 820-00869-06 X893 Intel Edition TOP MLB

BOM:639-04583 (Ultimate)BOM:639-03409 (Extreme)MCO:056-04077

X891/X893 MLB Top: EVT

1 OF 51

LAST_MODIFICATION=Mon Apr 3 13:03:06 2017

4049 AUDIO: Speaker Amp Bottom

AUDIO: CODEC (2/2)

PEARL: B2B Rosaline + MiscPEARL: B2B Romeo + Juliet

CAMERA: B2B Strobe + Hold Button

CAMERA: Strobe DriversCAMERA: B2B Tele (MT)CAMERA: B2B Wide (WY)CAMERA: PMU (2/2)CAMERA: PMU (1/2)

SYSTEM POWER: B2B Cyclone + ButtonSYSTEM POWER: IktaraSYSTEM POWER: ChargerSYSTEM POWER: B2B BatterySYSTEM POWER: BoostSYSTEM POWER: PMU (4/4)

14

4156

CG: B2B Orb & TouchI/O: Overvoltage Cut-Off Circuit

58

42

3938

40

3837

SOC: Power (3/3)SOC: Power (2/3)

SYSTEM: Mechanical Components

SENSORS

test_mlb

3130

test_mlb

1726

SOC: Power (1/3)

test_mlbtest_mlb

SYSTEM POWER: PMU Bucks (2/4)SYSTEM POWER: PMU LDOs (3/4)

08/25/201510/13/2016

10/17/2016

10/13/2016

10/17/2016

CG: Power Supplies - Touch & Display

CAMERA: B2B FCAM

SOC: GPIO & UART

SOC: LPDPSOC: MIPI & ISP

BOOTSTRAPPINGSYSTEM: Testpoints (Top)

16

89

1112

10/13/201610/13/2016

1516

13

test_mlb

NAND

7

14

test_mlb

10/13/201610/13/2016

124

21

45

test_mlb

test_mlb

47 test_mlb

19

32

10/13/2016

28

30

27

39

22

50

CG: B2B Display

ARC: Driver10/13/2016

08/25/2015

15

17

10/13/2016

33

06/04/201510/13/201610/13/201610/13/201610/13/201610/17/2016

10/13/201610/13/2016

10/13/2016

11/01/201610/13/201610/13/2016

test_mlbtest_mlbtest_mlbtest_mlbtest_mlb

test_mlb

test_mlb

test_mlb

test_mlbtest_mlbtest_mlbtest_mlb

test_mlbtest_mlbtest_mlbtest_mlbtest_mlbtest_mlbtest_mlbtest_mlbtest_mlb

test_mlb

test_mlb

806564636261

46

44

35

515049

4746

45

43

28

23

18

654

2

RADIOSI/O: Interposer (Bottom)I/O: B2B DockI/O: HydraI/O: USB PDI/O: Accessory Buck

10/13/2016

5

1

10/17/2016

10/13/2016

57

10/13/2016

48

10/13/2016

10/17/201610/17/201610/17/201610/17/2016

10/13/2016

test_mlb 10/13/2016

test_mlb

36

48

19

36

4333

34

32

12

10

test_mlb

test_mlb

5944

sync

SOC: Serial

SOC: PCIE

6

3

51

37

35

18

13

10/13/2016PEARL: Power

29

10/13/2016test_mlb

27

34

26

test_mlb

10/13/201610/13/2016

01/10/201708/25/2015

test_mlb

41

SYSTEM:BOM TablesTABLE OF CONTENTS

10/13/2016

42

10/13/2016

10/13/2016

AUDIO: CODEC (1/2)

10/13/201610/13/2016

10/13/2016

SOC: JTAG,USB,XTAL11

2524

3120

AUDIO: Speaker Amp Top

29

test_mlbtest_mlbtest_mlbtest_mlb

SYSTEM POWER: PMU Bucks (1/4)

SOC: AOP

10

SCH,MLB,TOP,X891051-02221

2017-04-0500084097609 ENGINEERING RELEASED

1 OF 80

evt-1

9.0.0

NO

COMMONNOPCB

TABLE OF CONTENTS

820-00863 1 PCB,MLB_TOP,X891

1 SCH051-02221 SCH,MLB_TOP,X891 COMMON

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

TABLE_5_ITEM

BRANCH

8

REVISION

ECNREV DESCRIPTION OF REVISION2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

CKAPPD

2 1

124567

B

D

6 5 4 3

C

A

PAGE

C

A

D

DATE

SHEET

DSIZEDRAWING NUMBER

7

B

3

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

8

IV ALL RIGHTS RESERVED

II NOT TO REPRODUCE OR COPY IT

PROPRIETARY PROPERTY OF APPLE INC.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

DRAWING TITLE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

DATESYNCCONTENTSCSAPAGEDATESYNCCONTENTSCSAPAGE

EEEE Codes

SOC

XTAL Alternate

Multi-Vendor Criticals

Global R/C Alternates

RCAM B2Bs

CODEC

Ansel

Acorn

Pearl B2B

Audio

Strobe B2B

Agnes Input

Agnes Output

Global Ferrites

Sensors

Soft-Term Cap Sub BOMs

NANDUltimate

Global Capacitors

Extreme

Global Inductors

2 OF 51

9.0.0

evt-1

2 OF 80

051-02221

EEEE FOR (MLB_TOP,639-04583,ULTIMATE)

EEEE FOR (MLB_TOP,639-03409,EXTREME) EXTREME

ULTIMATE

NO

NO

EEEE_HP26

U1000

SKYE+3GB, B0, M, DEV

825-7691

825-7691

BOM_TABLE_ALTS

138S00144

138S00140

138S00142

138S00166

152S00720

BOM_TABLE_ALTS

CAP,CER,X5R,0.1UF,10%,16V,0201

CAP,CER,X5R,470PF,10%,10V,01005

CAP,CER,X7R,220PF,10%,10V,01005

339S00358

339S00358

339S00358

U2600BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

0402,5.1uF@3V, Taiyo

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS BOM_TABLE_ALTS

BOM_TABLE_ALTS BOM_TABLE_ALTS

BOM_TABLE_ALTS BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTSBOM_TABLE_ALTS

BOM_TABLE_ALTSBOM_TABLE_ALTS

BOM_TABLE_ALTSBOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

138S00049

152S00622

U1000

1

RES, 3.92K, 0.1%, 0201

CAP,X5R,4.7UF,6.3V,0.65MM,0402

CAP,CER,X5R,0.22UF,20%,6.3V,20%

118S0717

FERR BD, 150OHM, TY

CAP,CER,X5R,0.22UF,20%,6.3V,01005

CAP,CER,X5R,2.2UF,20%,6.3V,0201

IND,MLD,0.1UH,20%,6.1A,29MOHM,H=.65,1608

IND,MLD,0.1UH,20%,7.2A,17MOHM,H=0.8,2012

IND,MLD,0.47UH,20%,3.5A,53MO,H=.65,2012

IND,MLD,1.0UH,20%,2.1A,100MO,H=.65,2012

IND,MLD,1.0UH,20%,2.5A,78MO,H=0.8,2012

IND,MLD,1.0UH,20%,3.2A,60MO,H=0.8,2016

IND,MLD,0.47UH,3.8A,55MO,H=0.65MM,2012

IND,1.2UH, 3A, 2016, 0.65Z

IND,0.47UH,6.6A,3225,0.8Z

IND,MLD,1.5UH,20%,1.1A,160MO,H=.65,2012

152S00620

152S00651

152S00650

138S0652

138S0706

132S0400

138S0831

152S00712 ALL IND,MLD,0.1UH,20%,7.2A,17MOHM,H=0.8,2012152S00620

152S00713 ALL IND,MLD,0.47UH,20%,3.5A,53MO,H=.65,2012152S00621

IND,MLD,1.0UH,20%,3.2A,60MO,H=0.8,2016ALL152S00632152S00718

152S00631 IND,MLD,1.0UH,20%,2.5A,78MO,H=0.8,2012ALL152S00717

152S00626 IND,MLD,1.5UH,20%,1.1A,160MO,H=.65,2012ALL152S00716

152S00714 ALL IND,MLD,1.0UH,20%,2.1A,100MO,H=.65,2012

152S00631

152S00632

152S00640

IND,MLD,0.47UH,4A,48MO,H=0.8MM,2012152S00641

152S00710 152S00617 IND,MLD,0.1UH,20%,6.1A,29MOHM,H=.65,1608ALL

IND,MLD,0.47UH,3.8A,55MO,H=0.65MM,2012ALL152S00640

U2600335S00285 335S00287 TOSHIBA, BICS3, ULTIMATE

335S00284 335S00287 TOSHIBA, 1Z, ULTIMATE

TYPICAL_CAPCRITICALC3602,C36222138S0831 CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

0402,16uF@1V, Kyocera138S00143 ALL138S00144

ALL138S00148 138S00149 0402-3T,10.5uF@1V, Kyocera

SUBBOM_CAP CRITICAL COMMONSUBBOM,MLB,TOP,CAP,TYPICAL,X8911685-00155

CAP,TYPICAL,2.2UF,6.3V,0201,MURATA TYPICAL_CAPCRITICALC2970,C2971,C2980,C2981138S0831 4

SOFT_CAPCRITICALC4303CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA1138S00159

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA SOFT_CAPCRITICALC46131138S00159

TYPICAL_CAPCRITICALC5641,C5653CAP,TYPICAL,10UF,10V,0402,MUR/KYO2138S0979

SOFT_CAPCRITICALC3710CAP,SOFT-TERM,10UF,10V,0402,MURATA1138S00160

ALL IND,MLD,1UH,3.6A,60MO,H=0.8MM,2016152S00623152S00715

C4811,C4808 SOFT_CAPCRITICALCAP,SOFT-TERM,10UF,10V,0402,MURATA2138S00160

TYPICAL_CAPCRITICALC4303CAP,TYPICAL,2.2UF,6.3V,0201,MURATA1138S0831

SOFT_CAPCRITICALC4809,C4805CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA2138S00159

TYPICAL_CAPCRITICALC4809,C4805CAP,TYPICAL,2.2UF,6.3V,0201,MURATA2138S0831

152S00626

152S00622

152S00621

152S00617

155S0610 FERR BD, 150OHM, TDKALL155S00194

XTAL, 24M, 1612197S0446

138S00159 SOFT_CAPCRITICALC3602,C3622CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA2

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA SOFT_CAPCRITICALC2970,C2971,C2980,C29814138S00159

155S0610 FERR BD, 150OHM, 01005

ALL155S0610155S00200

138S0831 TYPICAL_CAPCRITICALC3909,C3925,C4025CAP,TYPICAL,2.2UF,6.3V,0201,MURATA3

CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA3 SOFT_CAPCRITICALC3909,C3925,C4025138S00159

9 CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA SOFT_CAPCRITICALC2900,C2901,C2903,C2906,C2907,C2910,C2911,C2913,C2914138S00159

138S0831 TYPICAL_CAPCRITICALC2900,C2901,C2903,C2906,C2907,C2910,C2911,C2913,C2914CAP,TYPICAL,2.2UF,6.3V,0201,MURATA9

IND,MLD,0.47UH,4A,48MO,H=0.8MM,2012ALL152S00641152S00721

1

EEEE_J2WJ

SUBBOM_CAP685-00155685-00156 SUBBOM,MLB,TOP,CAP,SOFT,X891

TYPICAL_CAPC3710CAP,TYPICAL,10UF,10V,0402,MUR/KYO1138S0979 CRITICAL

ALL152S00651152S00653 IND,1.2UH,3A,2016,0.65Z

SANDISK, BICS3, ULTIMATEU2600335S00286 335S00287

TYPICAL_CAPCRITICALC4811,C4808CAP,TYPICAL,10UF,10V,0402,MUR/KYO2138S0979

SOFT_CAPCRITICALC5641,C5653CAP,SOFT-TERM,10UF,10V,0402,MURATA2138S00160

TYPICAL_CAPCRITICALC4613CAP,TYPICAL,2.2UF,6.3V,0201,MURATA1138S0831

IND,MLD,1UH,3.6A,60MO,H=0.8MM,2016152S00623

IND,0.47UH,6.6A,3225,0.8ZL3340,L3341152S00649 152S00650

138S00144 0402,16uF@1V

ALL 0402,16uF@1V, Taiyo138S00163

138S00150 138S00149 ALL 0402-3T,10.5uF@1V, SEMCO

335S00247 335S00240 SANDISK, BICS3, EXTREMEU2600

ALL 0201,1.1uF@3V, SEMCO138S00141

0201,1.1uF@3V, TaiyoALL138S00141

0201,1.1uF@3V, KyoceraALL138S00141

ALL138S00146138S00165

138S00145 138S00146 ALL 0402,5.1uF@3V, Kyocera

138S00164 ALL138S00139 0201,3uF@1V, Taiyo

138S00139138S00138 ALL 0201,3uF@1V, Kyocera

132S0288

CAP,CER,X5R,0.01UF,10%,6.3V,01005132S0245

132S00025 CAP,CER,X5R,0.047UF,20%,6.3V,01005

132S00008 CAP,CER,0.1UF,10%,50V,X7R,0402

CAP,CER,NP0/C0G,15PF,5%,16V,01005131S0225

CAP,CER,NP0/C0G,27PF,5%,16V,01005131S0223

117S0055 RES,MF,1/20W,2M OHM,5,0201,SMD

107S0257 THERMISTOR,NTC,10K OHM,1%,B=3435,01005

U1000339S00361 DDR-S-18,3G, B0

CRITICAL ULTIMATE1335S00287 HYNIX, 3DV3, ULTIMATE U2600

1335S00240 EXTREMECRITICALHYNIX, 3DV3, EXTREME U2600

132S0249

132S0275

138S00149 0402-3T,10.5uF@1V

RES,MF,1.3 MOHM,1%,200PPM,1/20W,0201118S00068

CAP,CER,NP0/C0G,12PF,5%,16V,01005131S0220

339S00358 CRITICAL1 COMMON

118S0717 RES, 3.92K, 0.1%, 0201ALL118S0764

138S0652 ALL138S0648 CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO

CAP,CER,X5R,0.22UF,20%,6.3V,20%ALL138S0706138S0739

132S0436 ALL132S0400 CAP,CER,X5R,0.22UF,20%,6.3V,01005

ALL138S0831 CAP,CER,X5R,2.2UF,20%,6.3V,0201

DDR-S-20,3G, B0U1000339S00360

339S00359 DDR-H,3G, B0

SYSTEM:BOM TablesSYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

138S00151 0402-3T,10.5uF@1V, TYALL138S00149

335S00276 335S00240 SAMSUNG, 3DV4, EXTREMEU2600

335S00228 335S00240 TOSHIBA, BICS3, EXTREMEU2600

335S00287335S00288 U2600 SAMSUNG, 3DV4, ULTIMATE

197S0612 197S0446 XTAL, 24M, 1612Y1000

132S00093 CAP,X5R,0.022UF,20%,6.3V,01005

377S0106 SUPPR,TRANS,VARISTOR,12V,33PF,01005

197S0446 XTAL,24MHZ,30PPM,9.5PF,60 OHM MAX,1612

155S0576 FERR BD,10 OHM,50%,750MA,0.07 DCR,01005

155S00168 FLTR,NOISE,65 OHMZ,3.4OHM,0.7-2GHZ,0605

138S0979 CAP,CER,X5R,10UF,20%,10V,0402,H=0.65MM

131S0883 CAP,CER,NP0/C0G,220PF,2%,50V,0201

CAP,CER,27PF,5%,C0G,25V,0201131S0804

CAP,CER,NP0/C0G,100PF,5%,16V,01005131S0307

CAP,CER,X5R,1000PF,10%,6.3V,01005132S0296

CAP,CER,X5R,820PF,10%,10V,01005132S0318

138S00141 0201,1.1uF@3V

138S00146 0402,5.1uF@3V

132S0304 CAP,CER,X5R,0.22UF,20%,6.3V,0201

132S0316 CAP,CER,X5R,0.1UF,20%,6.3V,01005

132S0396 CAP,CER,X5R,1000PF,10%,10V,01005 CAP,CER,C0G,220PF,5%,10V,01005131S00053

131S0216 CAP,CER,NP0/C0G,47PF,5%,16V,01005132S0436 CAP,CER,X5R,0.22UF,20%,6.3V,01005

132S0534 CAP,CER,X5R,0.1UF,10%,25V,0201

132S0663 CAP,CER,X5R,1UF,10%,25V,0402

132S0664 CAP,CER,0.047UF,10%,25V,X5R,0201

138S00014 CAP,CER,1UF,20%,16V,X5R,0201,H=0.39MM

138S00070 CAP,X5R,4.7UF,20%,25V,0402

138S0652 CAP,CER,X5R,4.7UF,20%,6.3V,H=0.65MM,0402

138S0683 CAP,CER,X5R,1UF,10%,25V,0402

138S0692 CAP,CER,X5R,1UF,20%,6.3V,0201

138S00139 0201,3uF@1V

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

TABLE_5_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

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REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

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APAGE TITLE

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PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_ALT_ITEM

TABLE_CRITICAL_ITEM

CRITICAL PART# COMMENTTABLE_CRITICAL_HEADTABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

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COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

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TABLE_5_ITEM

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COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

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COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

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REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

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REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

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TABLE_5_ITEM

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REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_ALT_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALCRITICAL PART# COMMENT

TABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_5_ITEM

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COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

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BOM OPTIONCRITICAL

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REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

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BOM OPTIONCRITICAL

TABLE_ALT_ITEM

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FIDUCIALS

3 OF 51

9.0.0

evt-1

4 OF 80

051-02221

1

SB0402

1

FD0420

1SH0401

1

FD0412

1

FD0401

1

FD0402

1

FD0403

1

FD0404

1

FD0405

1

FD0410

1

FD0411

1SH0400

1

CL0400

1

CL0402

1

CL0401

1

CL0403

1

SB0400

1

SB0401

SYSTEM: Mechanical Components

2.10R1.60-NSP

2.10R1.60-NSP

2.10R1.60-NSP

2.10R1.60-NSP

STDOFF-MLB-TUBE

CRITICAL

0P5SQ-CROSS-NSPFID

ROOM=ASSEMBLY

SM

CRITICAL

SHLD-EMI-HARD-X891

ROOM=ASSEMBLY

0P5SQ-SMP3SQ-NSPFID

FID0P5SQ-CROSS-NSP

ROOM=ASSEMBLY

FID0P5SQ-CROSS-NSP

ROOM=ASSEMBLY

CRITICAL

STDOFF-2.9OD1.4ID-0.77H-SM

FID0P5SQ-CROSS-NSP

ROOM=ASSEMBLY

ROOM=ASSEMBLY

0P5SQ-CROSS-NSPFID

FID0P5SQ-SMP3SQ-NSP

ROOM=ASSEMBLY

0P5SQ-SMP3SQ-NSP

ROOM=ASSEMBLY

FID

0P5SQ-SMP3SQ-NSP

ROOM=ASSEMBLY

FID

SM

SHIELD-EMI-TOP-X891

CRITICAL

STDOFF-2.9OD1.4ID-0.77H-SM

CRITICAL

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

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APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

Probe Points

Sensors

Rigel

Hydra VBUS

NAND CCG2

SOC I2C1_AOP

SOC Debug

PCIE Refclk

PMU

SOC CPU/GPU

POWER

Test Points

4 OF 51

9.0.0

evt-1

5 OF 80

051-02221

1

PP0506

1

PP0592

1

PP0590

1

PP0591

1

PP0583

1

PP0586

1

PP0587

1

PP0582

1

PP0505

1

TP05431

TP0540

1

PP0547

1

PP0546

1

PP0545

1

PP0544

1

PP0571

1

PP0570

21

XW0511

21

XW0510

1

PP0504

1

PP0564

1

PP0563

1

PP0522

1

PP0562

1

PP0521

1

PP0516

1

PP0515

1

PP05141

PP0561

1

PP0560

1

PP0550

1

PP0542

1

PP0541

1

PP0540

1

PP0531

1

PP0530

1

PP0520

1

PP0513

1

PP0512

1

PP0503

1

PP0502

1

PP0501

1

PP0500PP_ROMEO_DENSE_ANODE

ROOM=TEST

ROOM=TEST

SM

P2MM-NSMSM

P2MM-NSMPP_ROMEO_CATHODE

SMP2MM-NSM

ROOM=TEST

P2MM-NSM

20

SPI_AOP_TO_IMU_SCLK

AP_BI_CCG2_SWDIO

SPI_AOP_TO_IMU_MOSI

SPI_IMU_TO_AOP_MISO

RIGEL_TO_ISP_INT

CAMPMU_TO_RIGEL_ENABLE

NAND_ANI1_VREF

NAND_ANI0_VREF

PDM_CODEC_TO_ARC_CLK

PDM_CODEC_TO_ARC_DATA

ACCEL_GYRO_TO_AOP_INT

ACCEL_GYRO_TO_AOP_DATARDY

COMPASS_TO_AOP_INT

PHOSPHORUS_TO_AOP_INT

HYDRA_TO_TIGRIS_VBUS1_VALID_L

SPI_S4E_TO_AP_MISO_BOOT_CONFIG2

SWD_AOP_TO_MANY_SWCLK

SWD_AP_BI_NAND_SWDIO CCG2_TO_SMC_INT_L

I2C1_AOP_SDA

I2C1_AOP_SCL

AP_TO_CCG2_SWCLK

BOARD_ID0

AP_TO_PMU_TEST_CLKOUT

PP_GPU

AP_CPU_PCORE_SENSE

PP_CPU_PCORE_LVCCPP_CPU_PCORE

AP_VDD_GPU_SENSE

TP_SOC_SENSE

TP_VSS_CPU_SENSE

TP_VSS_SENSE

AOP_TO_DDR_SLEEP1_READY

SPMI_PMU_BI_PMGR_SDATA

PMU_TO_AP_HYDRA_ACTIVE_READY

90_PCIE_AP_TO_NAND_REFCLK_P

90_PCIE_AP_TO_NAND_REFCLK_N

PP_GPU_LVCC

PMU_TO_AP_PRE_UVLO_L

AP_TO_PMU_SOCHOT_L

DFU_STATUS

AP_TO_FCAM_SHUTDOWN_L

AP_DEBUG3

SYSTEM: Testpoints (Top)SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

20 6

ROOM=TEST

SMP2MM-NSM

47 10

P2MM-NSMSM

ROOM=TEST

50 49 41 25 12

50 49 41 25 12

ROOM=TEST

SMP2MM-NSM

ROOM=TEST

P2MM-NSMSM

41 37

P2MM-NSMSM

ROOM=TEST

47 10

ROOM=TEST

SMP2MM-NSM

47 10

ROOM=TEST

SMP2MM-NSM

P2MM-NSMSM

ROOM=TEST41 37

11 6

P2MM-NSMSM

ROOM=TEST

26 12

ROOM=TEST

P2MM-NSMSM

49 25 12

ROOM=TEST

P2MM-NSMSM

26 12

ROOM=TEST

SMP2MM-NSM

26 12

ROOM=TEST

SMP2MM-NSM

ROOM=TEST

P2MM-NSMSM

34 20 8

34 28

P2MM-NSMSM

ROOM=TEST

SHORT-10L-0.05MM-SM

SHORT-10L-0.05MM-SM

11

16

ROOM=TEST

P2MM-NSMSM

SMP2MM-NSM

ROOM=TEST16

P2MM-NSM

ROOM=TEST

SM48 20 6

16 10 5 SM

ROOM=TEST

P2MM-NSM

20 10 SM

P2MM-NSM

ROOM=TEST

15

P2MM-NSM

ROOM=TEST

SM

P2MM-NSM

ROOM=TEST

SM15

13

P2MM-NSM

ROOM=TEST

SM50 16 12

16 12

48 23

26 12

26 12

26 12

16 7

16 7

14 12

20 13

20 13

8

32 8

11 5

20 6

P2MM-NSM

ROOM=TEST

SM

ROOM=TEST

P2MM-NSMSM

P2MM-NSMSM

ROOM=TEST

P2MM-NSM

ROOM=TEST

SM

SM

ROOM=TEST

P2MM-NSM

ROOM=TEST

P2MM-NSMSM

P2MM-NSM

ROOM=TEST

SM

SM

ROOM=TEST

P2MM-NSM

P2MM-NSMSM

ROOM=TEST

SMP2MM-NSM

ROOM=TEST

SM

ROOM=TEST

P2MM-NSM

SM

ROOM=TEST

P2MM-NSM

ROOM=TEST

SMP2MM-NSM

ROOM=TEST

SM

ROOM=TEST

SMP2MM-NSM

34 35

34 35

17 13

50 17 13

50

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN PP

IN PP

IN

IN PP

PP

IN PP

IN PP

IN PP

PPIN

IN PP

PP

PP

IN PP

IN PP

IN PP

IN PP

PPIN

IN PP

IN

IN PP

PPIN

PPIN

IN PP

IN PP

IN PP

PPIN

IN PP IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

BOARD IDBOOT CONFIG

No connect

On mlb_bot

No connect

D221 Baseband Selected on RF Board

BOOTSTRAPPING:BOARD REV

SELECTED -->

SELECTED -->

SELECTED -->

No connect

5 OF 51

PP1V8_IO

PP1V8_IO

CKPLUS_WAIVE=SINGLE_NODENET

9.0.0

evt-1

6 OF 80

051-02221

21

R0623

21

R0622

21

R0600

21

R0601

21

R0620

21

R0621

SPI_AP_TO_S4E_MOSI_BOOT_CONFIG1

SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0

BOARD_REV0

SPI_S4E_TO_AP_MISO_BOOT_CONFIG2

BOARD_REV1

BOARD_REV2

BOARD_REV3

BOARD_ID3

BOARD_ID0

PP1V8_IO

MAKE_BASE=TRUE

BOARD_ID4CKPLUS_WAIVE=SINGLE_NODENET

BOOTSTRAPPINGSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

NOSTUFF

01005

4.7K

ROOM=SOC

MF1/32W1%

01005

4.7K

ROOM=SOC

1/32WMF

1%

5%

MF1/32W

01005ROOM=SOC

1.00K

1.00K

MF01005

ROOM=SOC

1/32W5%

1.00K

01005ROOM=SOC

5%

MF1/32W

NOSTUFF

5%1/32W

1.00K

ROOM=SOC

MF01005

16 10

16 10

16 10 4

11 4

11

11

50 10

11

11

11

11

11 43 35 34 32

30 29 28 27 17 16 14 10 8 7 6

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

USB Reference

(Analog)

0.765V - 0.84V @ 5mA MAX

VDD18_USB: 1.62V - 1.98V @ 20mA MAXVDD11_XTAL:1.06-1.17V @ 2mA MAX

3.14-3.46V @ 12mA MAX

SOC - USB, JTAG, XTAL

evt-1

10 OF 80

6 OF 51

051-02221

9.0.0

MAKE_BASE=TRUE GND

GND

GND

MAKE_BASE=TRUE

21

R1020

2

1 C109321

FL1092

2

1 C1090

2

1 C1092

2

1 C1095

BA27BA28

AW5

AN15

AN14

AU28

AP14

AT7

AV7

AU8

AW6

AY6BA6

AY4BA4

V2

W4

AF34

AG38A30

AV6

AT10

AT9AT12

AT13

AT8

W5

AD3AD2

B31

AW21AT22

AU7

AV5AT34

AT27

U1000

2

1R1000

2

1 C1010

2

1R1010

21R1011

31

42

Y1000

2

1 C1011

AP_USB_REXT

PMU_TO_AP_HYDRA_ACTIVE_READY

AP_TO_PMU_TEST_CLKOUT

PMU_TO_SYSTEM_COLD_RESET_L

SWD_DOCK_TO_AP_SWCLKSWD_DOCK_BI_AP_SWDIO

PMU_TO_SYSTEM_COLD_RESET_R_L

AP_TO_NAND_FW_STRAP

AP_TO_PMU_AMUX_OUT

90_USB_AP_DATA_N90_USB_AP_DATA_P

USB_VBUS_DETECT

PMU_TO_AP_THROTTLE_GPU1_LPMU_TO_AP_THROTTLE_GPU0_L

PMU_TO_AP_THROTTLE_ECORE_L

AP_TO_PMU_WDOG_RESET

AP_TO_PMU_SOCHOT_L

PMU_TO_AP_PRE_UVLO_L

AP_USB_REXT

PMU_TO_AP_THROTTLE_PCORE_L

PP0V8_SOC_FIXED_S1

PP3V3_USB

PP1V8_IO

PP1V8_XTAL

AP_TO_NAND_RESET_L

SOC_24M_O

XTAL_AP_24M_OUTXTAL_AP_24M_IN

SYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

SOC: JTAG,USB,XTAL

01005

10K

MF1/32W5%

0201

4UF

ROOM=SOC

CER-X5R6.3V20%

240-OHM-25%-0.20A-0.9DCR

01005ROOM=SOC

0.1UF

X5R-CERM01005

20%6.3V

ROOM=SOC

X5R-CERM01005ROOM=SOC

20%6.3V0.1UF

0.1UF6.3VX5R-CERM

ROOM=SOC

20%

01005

20

20

20

16

20 4

20

20 11 4

20

20

23

48

48

20

16

20 4

48 20 4

48

48

WLCSPTMIT78B0-C4

ROOM=SOC

CRITICAL

OMIT_TABLE

ROOM=SOC

1/32W1%

01005MF

200

16V

ROOM=SOC

5%

01005CERM

12PF

NOSTUFF

1/32W

01005

1%

MF

511K

ROOM=SOC

5%

1.00K

ROOM=SOC01005MF

1/32W

ROOM=SOC

1.60X1.20MM-SM

24.000MHZ-30PPM-9.5PF-60OHM

CERM

ROOM=SOC

16V5%

01005

12PF

6

6

17 14 13 9 8 7

19

43 35 34 32 30 29 28 27 17 16 14 10 8 7 5

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

IN

IN

OUT

NCNCNC

NCNC

OUT

IN

IN

IN

OUT

IN

BI

BI

OUT

OUT

OUT

IN

IN

BI

SYM 1 OF 16

VDD1

2_UH

1_HS

IC0

VDD1

8_XT

AL

VDD1

8_US

B

VDD3

3_US

B

VDD_

FIXE

D_US

B

XO0XI0

CPU_TRIGGER0

USB_REXT

DROOP

SOCHOT1

WDOG

CPU_TRIGGER1

GPU_TRIGGER0GPU_TRIGGER1

USB_ID

USB_VBUS

USB_DPUSB_DM

ANALOGMUX_OUT

SSD_BFH

TESTMODE

HOLD_RESET

COLD_RESET*

JTAG_TMSJTAG_TCK

JTAG_TDI

SSD_RESET*

CFSB_AON

TST_CLKOUT

CFSB

UH1_HSIC0_STBUH1_HSIC0_DATA

JTAG_SEL

JTAG_TDOJTAG_TRST*

NC

VDD12_PCIE_REFBUF:1.08V - 1.26V @ 30mA MAX(Analog)

PCIE

LIN

K 0

PCIe Reset Pull-Downs

PCIE

LIN

K 2

PCIE

LIN

K 3

SOC - PCIE INTERFACES

(Analog)

1.62V - 1.98V @ 81mA MAX

VDD_FIXED_PCIE_REFBUF:0.765V - 0.84V @ 9mA MAXVDD_FIXED_PCIE_ANA:0.765V - 0.84V @ 131mA MAX

PCIe BB CLKREQ PU on BB domain

PCIe Clock Request Pull-Ups

7 OF 51

9.0.0

evt-1

11 OF 80

051-02221

2

1 C11242

1 C1125

2

1 C11912

1 C11922

1 C119321

R1194

2

1 C1194

2

1 C11992

1 C119821

R1198

2

1R1121

2 1 C1102

2 1 C1103

2 1 C1100

2

1R1130

2 1 C1101

21C1122

21C1121

21C1120

21C1123

AP27

AM27

AP31

AP29

AN30

AM31

AM29

AP26

AN26

AV35AW35

AV33AW33

AY32BA32

AY30BA30

BA36AY36

BA34AY34

AV31AW31

AV29AW29

AU32

AY24BA24

AV25AW25

AW26AY26

AW27AV27

AH36

AJ38AK38

AJ37

AU30AT30

AJ36

AK37AL37

AL38

U1000

2

1R1100

2

1R1101

2

1R1150

2

1R1131

21C1133

21C1132

21C1131

21C1130

PP1V8_IO

90_PCIE_WLAN_TO_AP_RXD_P

90_PCIE_AP_TO_WLAN_TXD_P90_PCIE_AP_TO_WLAN_TXD_N

90_PCIE_BB_TO_AP_RXD_N

90_PCIE_AP_TO_BB_TXD_N90_PCIE_AP_TO_BB_TXD_P

PCIE_AP_TO_NAND_RESET_L

PCIE_NAND_BI_AP_CLKREQ_L

PCIE_AP_TO_WLAN_RESET_L

PCIE_WLAN_BI_AP_CLKREQ_L

PCIE_AP_TO_BB_RESET_L

90_PCIE_NAND_TO_AP_RXD_P

90_PCIE_AP_TO_NAND_TXD_P90_PCIE_AP_TO_NAND_TXD_N

90_PCIE_NAND_TO_AP_RXD_N 90_PCIE_WLAN_TO_AP_RXD_N

PP1V2_SOC

PCIE_WLAN_BI_AP_CLKREQ_L

90_PCIE_AP_TO_WLAN_REFCLK_N90_PCIE_AP_TO_WLAN_REFCLK_P

90_PCIE_WLAN_TO_AP_RXD_C_N

PCIE_AP_TO_WLAN_RESET_L

90_PCIE_WLAN_TO_AP_RXD_C_P

90_PCIE_AP_TO_BB_TXD_C_N90_PCIE_AP_TO_BB_TXD_C_P

PCIE_AP_TO_BB_RESET_L

PCIE_NAND_BI_AP_CLKREQ_L

90_PCIE_AP_TO_NAND_REFCLK_P90_PCIE_AP_TO_NAND_REFCLK_N

90_PCIE_AP_TO_NAND_TXD_C_N90_PCIE_AP_TO_NAND_TXD_C_P

90_PCIE_NAND_TO_AP_RXD_C_N90_PCIE_NAND_TO_AP_RXD_C_P

PCIE_AP_TO_NAND_RESET_L

PP0V8_SOC_FIXED_PCIE_REFBUF

PP0V8_SOC_FIXED_S1

PP1V8_IOPP1V2_SOC_PCIE_REFBUF

90_PCIE_AP_TO_WLAN_TXD_C_N90_PCIE_AP_TO_WLAN_TXD_C_P

90_PCIE_BB_TO_AP_RXD_C_P

AP_PCIE_RCAL

90_PCIE_BB_TO_AP_RXD_C_N90_PCIE_BB_TO_AP_RXD_P

90_PCIE_AP_TO_BB_REFCLK_N90_PCIE_AP_TO_BB_REFCLK_P

PCIE_BB_BI_AP_CLKREQ_L

SOC: PCIESYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

+/-0.1PF4.7PF

NP0-C0G01005

16V

ROOM=SOC

NP0-C0G

4.7PF

01005

16V+/-0.1PF

ROOM=SOC

4UF

CER-X5R

ROOM=SOC0201

6.3V20%

1.0UF20%6.3VX5R

ROOM=SOC0201-1

20%6.3VX5R-CERM

ROOM=SOC01005

0.1UF

1/32WMF

01005ROOM=SOC

0%

0.00

6.3V20%

01005X5R-CERM

0.1UF

ROOM=SOC

4UF

CER-X5R

ROOM=SOC0201

20%6.3V

0.1UF6.3V20%

ROOM=SOC

X5R-CERM01005

ROOM=SOC01005MF

1/32W0%

0.00

100K1/32W

5%

MF01005

ROOM=SOC

50

50

50

50 7

50

50

50

50

50 7

50

50

50

50

50

50 7

50

16 7

16 7

16 4

16 4

16

16

16

16

GND_VOID01005

0.22UF

ROOM=SOC

6.3V 20%X5R

GND_VOID

0.22UF20%X5R

6.3V

ROOM=SOC01005

ROOM=SOCX5R

GND_VOID20%01005

0.22UF6.3V

1/32W5%

MF

ROOM=SOC01005

100K

0.22UF010056.3V 20%

X5RGND_VOID

ROOM=SOC

GND_VOIDX5R-CERM

20%

ROOM=SOC010056.3V

0.1UF

20%X5R-CERM

ROOM=SOC

GND_VOID 6.3V01005

0.1UF

20%X5R-CERM

ROOM=SOC010056.3VGND_VOID

0.1UF

GND_VOIDX5R-CERM

6.3V01005

0.1UF20%

ROOM=SOC

WLCSPTMIT78B0-C4

ROOM=SOC

MF1/32W

01005

5%100K

ROOM=SOC

1/32W5%

100K

MF

ROOM=SOC01005

ROOM=SOC

1%1/32WMF

200

01005

100K1/32W

5%

MF01005

ROOM=SOC

0.1UF010056.3V20%GND_VOID

ROOM=SOCX5R-CERM

X5R-CERM6.3V01005

0.1UF20%GND_VOID

ROOM=SOC

GND_VOIDX5R-CERM

ROOM=SOC

6.3V01005

0.1UF20%

GND_VOIDX5R-CERM

20%

ROOM=SOC

6.3V01005

0.1UF

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

16 7

16 7

50 7

50 7

50 7

19 14 13 9

17 14 13 9 8 6

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

OUT

BI

OUT

OUT

OUT

IN

IN

OUT

IN

IN

OUT

OUT

OUT

BI

OUT

OUT

BI

OUT

OUT

OUT

OUT

IN

IN

NC

NCNC

NCNC

NCNC

NC

SYM 2 OF 16

LINK1 LINK2

LINK3LINK0

PCIE_CLKREQ3*

PCIE_REF_CLK3_NPCIE_REF_CLK3_P

PCIE_CLKREQ2*

PCIE_RX3_N

PCIE_REF_CLK2_PPCIE_REF_CLK2_N

PCIE_PERST3*

PCIE_TX3_PPCIE_TX3_N

PCIE_RX3_P

PCIE_TX2_NPCIE_TX2_P

PCIE_PERST2*

PCIE_RX2_NPCIE_RX2_P

PCIE_REXT

PCIE_CLKREQ0*

PCIE_REF_CLK0_PPCIE_REF_CLK0_N

PCIE_TX0_NPCIE_TX0_P

PCIE_RX0_NPCIE_RX0_P

PCIE_REF_CLK1_P

PCIE_CLKREQ1*

PCIE_PERST0*

PCIE_REF_CLK1_N

PCIE_RX1_NPCIE_RX1_P

PCIE_EXT_REF_CLK_PPCIE_EXT_REF_CLK_N

PCIE_PERST1*

PCIE_TX1_PPCIE_TX1_N

VDD_

FIXE

D_PC

IE_R

EFBU

FVD

D_FI

XED_

PCIE

_REF

BUF

VDD_

FIXE

D_PC

IE_A

NAVD

D_FI

XED_

PCIE

_ANA

VDD_

FIXE

D_PC

IE_A

NA

VDD1

8_PC

IEVD

D18_

PCIE

VDD1

2_PC

IE_R

EFBU

FVD

D12_

PCIE

_REF

BUF

MIPI Reference

Disp

lay

MIPI

(Analog)1.62V - 1.98V @ 10mA MAX

ISP I2C1

ISP I2C2

ISP I2C0

ISP I2C3

FCAM

MIP

IJu

liet

MIP

I

MIPI Lane & Polarity Swapping

SOC - MIPI & ISP INTERFACES

0.765V - 0.84V @ 40mA MAX

8 OF 51

90_MIPI_AP_TO_DISPLAY_CLK_N90_MIPI_AP_TO_DISPLAY_CLK_P

90_MIPI_FCAM_TO_AP_DATA0_N

90_MIPI_FCAM_TO_AP_CLK_P90_MIPI_FCAM_TO_AP_CLK_N

90_MIPI_FCAM_TO_AP_DATA1_N

90_MIPI_FCAM_TO_AP_DATA0_P

90_MIPI_JULIET_TO_AP_DATA0_P90_MIPI_JULIET_TO_AP_DATA0_N

90_MIPI_JULIET_TO_AP_DATA1_P90_MIPI_JULIET_TO_AP_DATA1_N

90_MIPI_JULIET_TO_AP_CLK_N90_MIPI_JULIET_TO_AP_CLK_P

90_MIPI_AP_TO_DISPLAY_DATA2_P90_MIPI_AP_TO_DISPLAY_DATA2_N

90_MIPI_AP_TO_DISPLAY_DATA3_N90_MIPI_AP_TO_DISPLAY_DATA3_P

90_MIPI_AP_TO_DISPLAY_DATA1_N90_MIPI_AP_TO_DISPLAY_DATA1_P

90_MIPI_FCAM_TO_AP_DATA1_P

9.0.0

evt-1

12 OF 80

051-02221

21

R1243

21R1241

2

1R1251

2

1R1231

2

1R1232

2

1R1222

2

1R1221

2

1R1212

2

1R1211

2

1R1201

2

1R1202

G14

G12

F13

F11

AB36

AA35AC37AB34

R37

T37

U35

U36

R38

U37

V34

V36

U38

D11

A6

A7

B9

A10

A8

B6

B7

A9

B10

B8

D13

B15

B17

A16

A15

A17

B16

D12

B14

B12

A13

A14

A12

B13

AB38AA37

Y38Y34

Y36W36

V38W35

AB6

AB4AA3

Y4

AA5AA4

U1000

21R1242

21R1240

2

1 C12962

1C12902

1 C1295

2

1R1252

2

1R1250

2

1C1291

MIPID_REXTMIPI1C_REXTMIPI0C_REXT

AP_TO_FCAM_JULIET_CLK

PP1V8_IO

I2C3_ISP_SCL

AP_TO_WIDE_CLK

AP_TO_TELE_CLK

I2C2_ISP_SDA

I2C0_ISP_SDA

PP1V8_IO

I2C3_ISP_SDA

PP1V8_IO

I2C1_ISP_SDA

PP1V8_IO

I2C2_ISP_SCL

I2C1_ISP_SCL

I2C0_ISP_SCL

AP_TO_RIGEL_CLK

90_MIPI_AP_TO_DISPLAY_DATA1_P MAKE_BASE

90_MIPI_AP_TO_DISPLAY_DATA2_N MAKE_BASE

90_MIPI_AP_TO_DISPLAY_DATA3_P MAKE_BASE

90_MIPI_FCAM_TO_AP_DATA1_P MAKE_BASE

90_MIPI_JULIET_TO_AP_DATA0_P MAKE_BASE

90_MIPI_JULIET_TO_AP_DATA1_P MAKE_BASE

90_MIPI_FCAM_TO_AP_DATA1_N MAKE_BASE

MAKE_BASE90_MIPI_FCAM_TO_AP_CLK_P

90_MIPI_AP_TO_DISPLAY_CLK_P MAKE_BASE

90_MIPI_AP_TO_DISPLAY_CLK_N MAKE_BASE

90_MIPI_AP_TO_DISPLAY_DATA2_P MAKE_BASE

90_MIPI_AP_TO_DISPLAY_DATA3_N MAKE_BASE

90_MIPI_AP_TO_DISPLAY_DATA1_N MAKE_BASE

MAKE_BASE90_MIPI_FCAM_TO_AP_CLK_N

90_MIPI_JULIET_TO_AP_DATA1_N MAKE_BASE

90_MIPI_JULIET_TO_AP_DATA0_N MAKE_BASE

90_MIPI_JULIET_TO_AP_CLK_N MAKE_BASE

90_MIPI_JULIET_TO_AP_CLK_P MAKE_BASE

90_MIPI_FCAM_TO_AP_DATA0_N MAKE_BASE

PP1V8_IO

MIPID_REXT

DISPLAY_TO_AP_ALIVEAP_TO_MANY_BSYNC

MIPI1C_REXTMIPI0C_REXT

AP_DEBUG3

ISP_TO_DISPLAY_FLASH_INT

AP_TO_TELE_CLK_RAP_TO_WIDE_CLK_R

RIGEL_TO_ISP_INT

I2C3_ISP_SDA

I2C0_ISP_SCL

I2C1_ISP_SCL

I2C0_ISP_SDA

I2C2_ISP_SCLI2C2_ISP_SDA

I2C1_ISP_SDA

I2C3_ISP_SCL

AP_TO_FCAM_SHUTDOWN_L

AP_TO_WIDE_SHUTDOWN_LAP_TO_TELE_SHUTDOWN_L

AP_TO_JULIET_SHUTDOWN_L

AP_TO_FCAM_JULIET_RIGEL_CLK_R

PP0V8_SOC_FIXED_S1

90_MIPI_AP_TO_DISPLAY_DATA0_N90_MIPI_AP_TO_DISPLAY_DATA0_P

MAKE_BASE90_MIPI_FCAM_TO_AP_DATA0_P

SOC: MIPI & ISPSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

35

30

29

43

34 20 4

34

1%1/32W

01005MF

33.2

ROOM=SOC

50 28 21 20 12

32 4

4

30 33.2

MF01005

1%1/32W

ROOM=SOC

32

32

32

32

32

32

43

43

43

43

43

43

43

43

35

35

29

35 32

1%1/32W

200

01005ROOM=SOC

MF

43

35 34 31 28 8

35 34 31 28 8

32 8

32 8

30 8

30 8

29 8

29 8

43

43

35

35

35

35

1.00K

MF01005

5%1/32W

ROOM=SOC

1.00K

MF01005

5%1/32W

ROOM=SOC

1.00K

MF01005

5%1/32W

ROOM=SOC

1.00K

MF01005

5%1/32W

ROOM=SOC

1.00K

MF01005

5%1/32W

ROOM=SOC

1.00K

MF01005

5%1/32W

ROOM=SOC

1.00K

MF01005

5%1/32W

ROOM=SOC

1.00K

MF01005

5%1/32W

ROOM=SOC

WLCSPTMIT78B0-C4

ROOM=SOC

1/32W

ROOM=SOC

1%

01005

33.2

MF

33.2

MF

1%1/32W

ROOM=SOC01005

0.1UF

X5R-CERM01005

20%6.3V

ROOM=SOC

X5R-CERM01005

20%6.3V

ROOM=SOC

0.1UF 2.2UF

X5R-CERM0201

20%6.3V

ROOM=SOC

MF01005

1%1/32W

ROOM=SOC

200

MF01005

1%1/32W

ROOM=SOC

200

2.2UF

0201

20%6.3V

ROOM=SOC

X5R-CERM

8

8

8

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

35 34 31 28 8

32 8

29 8

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

35 34 31 28 8

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

30 8

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

32 8

30 8

29 8 43 35 34 32

30 29 28 27 17 16 14 10 8 7 6 5

8

8

8

17 14 13 9 7 6

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

OUT

OUT

IN

IN

OUT

NC

NCNC

OUT NC

OUT

OUT

NC

OUT

IN

IN

BI

IN

BI

IN

OUT

OUT

OUT

OUT

OUT

BI

OUT

BI

IN

IN

OUT

OUT

OUT

BI

OUT

BI

OUT

BI

OUT

BI

OUT

OUT

OUT

IN

IN

BI

BI

SYM 3 OF 16

ISP_I2C3_SCL

ISP_I2C1_SDA

ISP_I2C2_SDAISP_I2C2_SCL

ISP_I2C0_SDA

ISP_I2C1_SCL

ISP_I2C0_SCL

ISP_I2C3_SDA

SENSOR_INT

SENSOR0_CLKSENSOR1_CLKSENSOR2_CLK

SENSOR0_RSTSENSOR1_RSTSENSOR2_RSTSENSOR3_RSTSENSOR4_RST

SENSOR0_XSHUTDOWNSENSOR1_XSHUTDOWN

SENSOR1_ISTRBSENSOR0_ISTRB

MIPI0C_DNCLK

MIPI0C_REXT

MIPI0C_DPCLK

MIPI0C_DNDATA1MIPI0C_DPDATA1

MIPI0C_DNDATA0MIPI0C_DPDATA0

MIPI1C_REXT

MIPI1C_DNDATA0

MIPI1C_DNDATA1MIPI1C_DPDATA1

MIPI1C_DNCLKMIPI1C_DPCLK

MIPI1C_DPDATA0

MIPID_DPDATA0MIPID_DNDATA0

MIPID_DPDATA1MIPID_DNDATA1

MIPID_DPDATA2

MIPID_DPDATA3

MIPID_DNDATA2

MIPID_DNDATA3

DISP_TOUCH_BSYNC0DISP_TOUCH_BSYNC1

DISP_TOUCH_EB

MIPID_DNCLK

MIPID_REXT

MIPID_DPCLK

DISP_I2C_SDA

DISP_POL

DISP_I2C_SCL

VDD1

8_M

IPI

VDD_

FIXE

D_M

IPI

NC

NC

VDD12_LPDP 1.14V - 1.26V @ 72mA MAXVDD12_PLL_LPDP 1.14V - 1.26V @ 10mA MAX

VDD_FIXED_PLL_LPDP 0.765V - 0.84V @ 3mA MAXVDD_FIXED_LPDP_TX 0.765V - 0.84V @ 16mA MAXVDD_FIXED_LPDP_RX 0.765V - 0.84V @ 30mA MAX

(Analog)

SOC - LPDP

Desense for Wifi frequencies

9 OF 51

MAKE_BASE=TRUE

GNDGND

9.0.0

evt-1

13 OF 80

051-02221

R9 P9 G18

G16

T9M9

F16

F17

F15

A19B19

A20B20

A21B21

A24B24

A25B25

A26B26

B23

A23

D18

A22B22

D15D16D17D19D20D21

J4J5

K3K4

L4L5

M3M4

H6H3

G4G5

Y6Y2

U1000

2

1 C13902

1 C13952

1 C1396

2

1C1301

2

1R1300

2

1 C13942

1 C13932

1 C13912

1 C1392PP0V8_SOC_FIXED_S1

90_LPDP_WIDE_TO_AP_D0_P

90_LPDP_TELE_TO_AP_D2_N

LPDP_TELE_BI_AP_AUX

AP_LPDPRX_RCAL_NEG

PP0V8_SOC_FIXED_S1

90_LPDP_WIDE_TO_AP_D2_N90_LPDP_WIDE_TO_AP_D2_P

90_LPDP_WIDE_TO_AP_D1_P

90_LPDP_WIDE_TO_AP_D0_N

90_LPDP_TELE_TO_AP_D0_P90_LPDP_TELE_TO_AP_D0_N

90_LPDP_TELE_TO_AP_D1_P90_LPDP_TELE_TO_AP_D1_N

LPDP_WIDE_BI_AP_AUX

90_LPDP_WIDE_TO_AP_D1_N

90_LPDP_TELE_TO_AP_D2_P

PP1V2_SOC

SOC: LPDPSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

30

30

29

29

29

29

29

29

5%16V

100PF

ROOM=SOC01005

NP0-C0G

1%

ROOM=SOC

MF1/32W

300

01005-1

ROOM=SOC

5%16V

01005NP0-C0G-CERM

15PF2.2UF

X5R-CERM

ROOM=SOC0201

20%6.3V

0.01UF

ROOM=SOC01005

10%6.3VX5R

01005

20%

ROOM=SOC

6.3VX5R-CERM

0.1UF

WLCSPTMIT78B0-C4

X5R-CERM6.3V20%

0201ROOM=SOC

2.2UF

ROOM=SOC

2.2UF6.3VX5R-CERM20%

0201X5R-CERMROOM=SOC

6.3V20%2.2UF

0201

30

29

30

30

30

30

17 14 13 9 8 7 6

17 14 13 9 8 7 6

19 14 13 7

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

IN

IN

IN

IN

IN

IN

IN

NCNC

NCNC

NC

NC

SYM 4 OF 16

VDD_

FIXE

D_LP

DP_R

X

VDD_

FIXE

D_LP

DP_T

X

LPDP_TX0NLPDP_TX0P

LPDP_TX1PLPDP_TX1N

LPDP_TX2PLPDP_TX2N

LPDP_TX3PLPDP_TX3N

LPDP_CAL_DRV_OUT

LPDP_AUX_PLPDP_AUX_N

LPDP_CAL_VSS_EXT

EDP_HPDDP_WAKEUP

LPDPRX_RX_D0_P

LPDPRX_RX_D1_NLPDPRX_RX_D1_P

LPDPRX_RX_D0_N

LPDPRX_RX_D2_N

LPDPRX_RX_D3_NLPDPRX_RX_D3_P

LPDPRX_RX_D2_P

LPDPRX_RX_D4_P

LPDPRX_RX_D5_NLPDPRX_RX_D5_P

LPDPRX_RX_D4_N

LPDPRX_AUX_D0_P

LPDPRX_BYP_CLK_PLPDPRX_BYP_CLK_N

LPDPRX_AUX_D2_PLPDPRX_AUX_D1_P

LPDPRX_AUX_D4_PLPDPRX_AUX_D3_P

LPDPRX_AUX_D5_P

LPDPRX_RCAL_P

LPDPRX_RCAL_N

LPDPRX_EXT_C

VDD_

FIXE

D_PL

L_LP

DP

VDD1

2_PL

L_LP

DP

VDD1

2_LP

DP_R

X

VDD1

2_LP

DP_T

X

NCNC

NCNC

NCNC

NCNC

NC

NCNC

NCNC

BI

BI

IN

IN

IN

IN

AP I2C4

AP I2C3

SMC I2C

AP I2C1

Place series terminations close to SoC Pins

SPI: Route as Daisy-Chain. No T's Allowed

SOC - SERIAL INTERFACES

.

AP I2C0

AP I2C2

10 OF 51

CKPLUS_WAIVE=I2C_PULLUP

CKPLUS_WAIVE=I2C_PULLUP

9.0.0

evt-1

14 OF 80

051-02221

2

1R1471

2

1R1470

B2A1

A2B1

U14902

1 C1490

21

R1465

21

R1482

21

R1464

2

1R1451

2

1R145021

R1481

2

1R1431

2

1R1430

2

1R1441

2

1R1440

AW20AV21

AE37AF38AE35AE38

AE6AD5AE2AE4

AT23AW22AY22AU23

AU22BA22BA21AV22

AW15AW19

AU20AT20

AW16AY16

AL6

AM4AM5

AM3AL2

BA20

AG4

AH2

AH4AH6

AG5

AT35

AR36

AR35AR34

AT36

AH34

AG35

AG37AH38

AG36

AV23

AT24

AT26AT25

AW23

AC38AC36

B34A34

AD36AD38

AG2AG3

AF36AE36

AV19

U1000

2

1R1420

2

1R1421

2

1R1410

2

1R1411

2

1R1400

2

1R1401

21

R1461

21

R1462

21

R1480

21

R1460

335S00234

335S00234

WLCSP U1490

BOM_TABLE_ALTS

SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0

SPI_CODEC_TO_AP_MISOSPI_AP_TO_CODEC_MOSI

SPI_S4E_TO_AP_MISO_BOOT_CONFIG2

I2S_BB_TO_AP_LRCLKI2S_BB_TO_AP_BCLK

I2C2_AP_SDA

I2C1_AP_SDA

I2C0_AP_SDAI2C0_AP_SCL

SPI_AP_TO_CODEC_SCLK_R

SPI_AP_TO_S4E_MOSI_BOOT_CONFIG1

PP1V8_IO

I2C0_AP_SDA

PP1V8_IO

I2S_AP_TO_CODEC_MCLK1

I2S_CODEC_ASP3_TO_AP_DINI2S_AP_TO_CODEC_ASP3_DOUT

SPI_AP_TO_RACER_SCLK

I2S_AP_TO_SPKRAMP_TOP_MCLK

I2S_AP_TO_CODEC_ASP3_BCLKI2S_AP_TO_CODEC_ASP3_LRCLK

PP1V8_IO

I2C4_AP_SCL

I2S_AP_TO_CODEC_MCLK1_R

I2S_AP_TO_SPKRAMP_TOP_MCLK_R

SPI_AP_TO_CODEC_SCLK

SPI_RACER_TO_AP_MISOSPI_AP_TO_RACER_MOSISPI_AP_TO_RACER_SCLK_RSPI_AP_TO_RACER_CS_L

SPI_AP_TO_CODEC_CS_L

AP_TO_RACER_REF_CLK_R

PP1V8_IO

I2C0_AP_SCL

I2C1_AP_SDA

I2C1_AP_SCL

I2C1_AP_SCLI2C2_AP_SCL

I2C3_AP_SCL

PP1V8_S2

I2C3_AP_SDA

SPMI_PMU_BI_PMGR_SDATASPMI_PMGR_TO_PMU_SCLK_R SPMI_PMGR_TO_PMU_SCLK

CODEC_TO_AP_INT_L CCG2_TO_SMC_INT_L

I2C1_SMC_SDA

PMU_TO_SEP_DOUBLE_CLICK_DET

I2C4_AP_SCLI2C4_AP_SDA

I2C4_AP_SDA

I2C0_SMC_SDA

PP1V8_IO

I2C2_AP_SDAI2C2_AP_SCL

I2C0_SMC_SCL

PP1V8_S2

AP_TO_NAND_SYS_CLK

AP_TO_NAND_SYS_CLK_R

AP_TO_CCG2_SWCLKAP_BI_CCG2_SWDIO

IKTARA_TO_SMC_INT

BOARD_ID3SPI_AP_TO_S4E_SCLK_BOOT_CONFIG0_R

I2S_AP_TO_BB_DOUTI2S_BB_TO_AP_DIN

I2C3_AP_SCLI2C3_AP_SDA

I2C0_SMC_SCL

I2C1_SMC_SCL

I2C0_SMC_SDA

AP_TO_RACER_REF_CLK

I2C1_SMC_SDAI2C1_SMC_SCL

PP1V8_IO

I2C4_AP_SDAI2C4_AP_SCL

SOC: SerialSYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

U1490 U1490335S00233

1 CRITICAL COMMON

MF

5%4.7K1/32W

01005ROOM=SOC

20

1/32WMF

01005ROOM=SOC

5%4.7K

CRITICALROOM=SOC

WLCSPOMIT_TABLE

ROOM=SOC

20%0.47UF

X5R6.3V

01005

16 5 0.00

0%

MF01005

1/32W

ROOM=SOC

20

ROOM=SOC

MF01005

0.00

0%1/32W

50

MF

ROOM=SOC01005

1%1/32W

33.2

ROOM=SOC

MF01005

4.7K5%

1/32W

01005ROOM=SOC

MF

4.7K5%

1/32W

38

47 4

47 4

50 0.00

1/32W0%

ROOM=SOC01005MF

50

47 4

48 10

48 10

2.2K5%

1/32WMF

ROOM=SOC01005

ROOM=SOC

2.2K

01005

1/32WMF

5%

50 42 10

50 42 10

16 5 4

16 5

16

20 4

50 47 23 22 21 10

50 10

49 33 10

49 46 20 10

50 47 23 22 21 10

50 10

49 33 10

49 46 20 10

38

50

50 5

50

38

38

38

50

50

38

50

50

50

50

38

38

38

38

2.2K5%

1/32WMF

01005ROOM=SOC

1/32WMF

01005ROOM=SOC

5%2.2K

ROOM=SOC

WLCSPTMIT78B0-C4

ROOM=SOC

2.2K1/32W

5%

MF01005

ROOM=SOC

2.2K1/32W

5%

MF01005

01005

1/32W5%

2.2K

MF

ROOM=SOC01005

5%1/32W

2.2K

MF

ROOM=SOC

01005ROOM=SOC

1/32W

2.2K5%

MF01005

MF1/32W

5%

ROOM=SOC

2.2K

0.00

0%

ROOM=SOC01005MF

1/32W

1/32W

0.00

0%

01005ROOM=SOC

MF

01005

1/32W

0.00

MF

0%

ROOM=SOC

MF

1%

33.2

1/32W

01005ROOM=SOC

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

49 46 20 10

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

10

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

49 46 20 10

49 33 10

49 33 10

50 42 10

50 49 48 47 46 38 22 20 17 14 12 10

50 42 10

10

10

10

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

50 10

50 10

50 47 23 22 21 10

50 49 48 47 46 38 22 20 17 14 12 10

50 47 23 22 21 10

48 10

48 10

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

10

10

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_ALT_ITEM

IN

VSS

VCC

SCL SDA

NCNCNCNC

NCNC

OUT

NC

OUT

OUT

NCNC

IN

OUT

BI

OUT

IN

IN

OUT

IN

BI

OUT

IN

OUT

NCNCNCNC

OUT

BI

OUT

OUT

OUT

OUT

BI

BI

BI

BI

NC

NC

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

SYM 6 OF 16

SPMI_SDATASPMI_SCLK

I2C0_SDAI2C0_SCL

I2C1_SCLI2C1_SDA

I2C2_SDA

I2C3_SCLI2C3_SDA

SMC_I2CM0_SCL

SEP_SPI0_MISO

SMC_I2CM1_SDA

SMC_UART0_TXD

SEP_SPI0_SCLK

SEP_SPI0_MOSI

SEP_I2C_SCLSEP_I2C_SDA

I2C2_SCL

SMC_UART0_RXD

SMC_I2CM0_SDA

SMC_I2CM1_SCL

DWI_CLK

NAND_SYS_CLK

DWI_DO

CLK24M_OUT

I2S0_BCLKI2S0_LRCK

I2S0_DOUT

I2S1_LRCKI2S1_BCLKI2S1_MCK

I2S0_DIN

I2S0_MCK

I2S2_MCKI2S2_BCLK

I2S2_DIN

I2S1_DINI2S1_DOUT

I2S2_LRCK

I2S2_DOUT

SPI0_MISO

I2S3_MCK

I2S3_DOUTI2S3_DIN

I2S3_BCLKI2S3_LRCK

SPI0_SSIN

SPI1_SCLKSPI1_SSIN

SPI1_MOSISPI1_MISO

SPI0_MOSISPI0_SCLK

SPI3_MISOSPI3_MOSISPI3_SCLK

SPI2_SSINSPI2_SCLKSPI2_MOSISPI2_MISO

SPI3_SSIN

SOC - GPIO INTERFACES

11 OF 51

PP1V8_IO

PP1V8_IO

9.0.0

evt-1

15 OF 80

051-02221

21

R1500

P2R5

AF4AF5

N35N36M35K36

D31C32B32D30

B30C28B29B28

M37P36L36P34

AF2AF3

A28C30D28

AC4AB2

AK5AK4AK3AJ6AJ5AJ4AJ3V3V4V5U2U4U6T2T3T4T5R2R3R4P4P6

A32B33D29D32C34D33L35K34K38L37N37R35P38R36T35AL4

U1000

UART_BT_TO_AP_CTS_L 50

UART_GNSS_TO_AP_CTS_L

ROOM=SOC

200K

NOSTUFF

PMU_TO_AP_PRE_UVLO_LJULIET_PMU_TO_RIGEL_STROBE_R

WLAN_TO_AP_TIME_SYNC

UART_AP_DEBUG_RXDUART_AP_DEBUG_TXD

UART_AP_TO_BT_RTS_L

1%1/32WMF

01005

UART_AP_TO_GNSS_RTS_LUART_GNSS_TO_AP_RXD

PMU_TO_AP_BUTTON_POWER_KEY_LPMU_TO_AP_BUTTON_VOL_DOWN_L

BOARD_REV1BOARD_REV2BOARD_REV3

BB_TO_AP_RESET_DETECT_LAP_TO_BB_TIME_MARK

AP_TO_NFC_FW_DWLD_REQ

AP_TO_SPKRAMP_TOP_RESET_LAP_TO_BT_WAKE

AP_TO_GNSS_WAKECAMPMU_TO_AP_IRQ_L

AP_TO_BB_IPC_GPIO1

AP_TO_BB_RESET_LAP_TO_BB_COREDUMPAP_TO_NFC_DEV_WAKE

AP_TO_DISPLAY_RESET_L

UART_AP_TO_ACCESSORY_TXDUART_ACCESSORY_TO_AP_RXD

UART_AP_TO_NFC_RTS_L

UART_WLAN_TO_AP_RXDUART_AP_TO_WLAN_RTS_L

UART_AP_TO_NFC_TXDUART_NFC_TO_AP_RXD

UART_AP_TO_GNSS_TXD

UART_BT_TO_AP_RXDUART_AP_TO_BT_TXD

UART_NFC_TO_AP_CTS_L

UART_WLAN_TO_AP_CTS_L

UART_AP_TO_WLAN_TXD

AP_TO_CAMPMU_RESET_L JULIET_PMU_TO_RIGEL_STROBE

BOARD_REV0

AP_TO_WLAN_DEVICE_WAKEAP_TO_BBPMU_RADIO_ON_LPMU_TO_AP_BUTTON_VOL_UP_LSPKRAMP_TOP_TO_AP_INT_LBOARD_ID0AP_TO_RACER_RESET_L

PMU_HYDRA_TO_AP_FORCE_DFU

AP_TO_PMU_AMUX_SYNCBOARD_ID4

DFU_STATUS

SOC: GPIO & UARTSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

35 34

20 6 4

50

28

50

50

50

50

5

4

5

50

50

28

5 4

48

50

50

50

50

50

50

48

48

50

50

50

50

50

48

20

20

5

5

5

5

20

5

50 48 20

50

50

50

20

50

50

50

43

50

50

50

50

50

50

ROOM=SOC

WLCSPTMIT78B0-C4

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NC

OUT

NC

NC

IN

NC

NC

NC

NC

NC

IN

NC

IN

NCNC

IN

OUT

OUT

IN

IN

OUT

IN

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

SYM 5 OF 16

UART7_RXDUART7_TXD

UART4_TXD

UART4_CTS*

UART3_CTS*

UART2_RTS*

UART1_RTS*UART1_CTS*

UART0_TXDUART0_RXD

UART1_TXD

UART2_CTS*

UART1_RXD

TMR32_PWM0TMR32_PWM1TMR32_PWM2

UART2_RXDUART2_TXD

UART3_RXDUART3_TXD

UART4_RTS*UART4_RXD

UART3_RTS*

UART6_RXDUART6_TXD

GPIO_0GPIO_1GPIO_2GPIO_3GPIO_4GPIO_5GPIO_6GPIO_7GPIO_8GPIO_9GPIO_10

GPIO_14

GPIO_12GPIO_13

GPIO_11

GPIO_15

GPIO_20GPIO_19

GPIO_16GPIO_17GPIO_18

GPIO_23GPIO_24GPIO_25

GPIO_22GPIO_21

GPIO_26GPIO_27GPIO_28GPIO_29GPIO_30GPIO_31GPIO_32GPIO_33GPIO_34GPIO_35

GPIO_37GPIO_36

REQUEST_DFU2REQUEST_DFU1

SPI SCM

SOC - AOP1.8V @ 15mA MAX

AOP I2C Pull-Ups

AOP_PDM_CLK4

I2C1 SCM

I2C0 SCM

12 OF 51

9.0.0

evt-1

16 OF 80

051-02221

21

R1603

21

R1604

2

1 C16912

1 C1690

2

1R1622

2

1R1623

2

1R1621

2

1R1620

AP19

AP17

AP15

AP13

AC2AC5

BA18

AY19

BA17

AT15AU11

AW8BA8

AY8AT14

AT21AY17

AV20

AV8AU10AW7

AW17AW18BA16

AU19BA15

BA13

AT19BA14

AW9AV10

AV9BA9

AY14BA12AV18AW14AT18BA10AV17BA11AY13AV15AU17AW13AV14AW12AV13AT17AV16AU16AY11AV12AY10AV11AT16

AW11AW10AU13AU14

AT11U1000

21R1601

21R1602

AOP_TO_CODEC_RESET_LAP_TO_MANY_BSYNC

PMU_TO_AOP_IRQ_L

SPKRAMP_BOT_ARC_TO_AOP_INT_LAOP_TO_CODEC_CLP_ENI2S_AOP_AMPS_TO_CODEC_ASP1_DOUT

I2C1_AOP_SDAI2C1_AOP_SCL

I2C0_AOP_SDAI2C0_AOP_SCL

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_R

I2S_AOP_TO_CODEC_MCLK2_R

I2S_AOP_TO_CODEC_ASP2_DOUT

I2S_AOP_TO_CODEC_ASP2_LRCLK

I2S_CODEC_ASP2_TO_AOP_DINI2S_AOP_TO_CODEC_ASP2_BCLK

UART_AOP_TO_RACER_TXDUART_RACER_TO_AOP_RXD

AOP_TO_WLAN_CONTEXT_BAOP_TO_WLAN_CONTEXT_A

UART_AOP_TO_BB_TXDUART_BB_TO_AOP_RXD

COMPASS_TO_AOP_INT

ALS_TO_AOP_INT_LHALL3_TO_AOP_IRQ_L

PROX_BI_AP_AOP_INT_L

AOP_TO_SPKRAMP_BOT_ARC_RESET_L

RACER_TO_AOP_INT_LROMEO_TO_AOP_B2B_DETECTPHOSPHORUS_TO_AOP_INTSPI_AOP_TO_PHOSPHORUS_CS_LACCEL_GYRO_TO_AOP_INT

ACCEL_GYRO_TO_AOP_DATARDYSPI_AOP_TO_ACCEL_GYRO_CS_L

AOP_TO_DDR_SLEEP1_READY

I2S_AOP_TO_CODEC_MCLK2

PP1V8_S2

HYDRA_TO_NUB_DOCK_CONNECT

CODEC_TO_AOP_GPIO2

HYDRA_TO_NUB_INT

SWD_AP_BI_NAND_SWDIOSWD_AOP_BI_BB_SWDIO

SWD_AOP_BI_RACER_SWDIO

SWD_AOP_TO_MANY_SWCLK

PMU_TO_AOP_CLK32K

CODEC_TO_AOP_GPIO1

PP1V8_S2

HALL2_TO_AOP_IRQ_LI2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_R

I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

SPI_IMU_TO_AOP_MISO

SPI_AOP_TO_IMU_SCLK_RSPI_AOP_TO_IMU_MOSI

I2C1_AOP_SDAI2C1_AOP_SCL

I2C0_AOP_SDAI2C0_AOP_SCL

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

SPI_AOP_TO_IMU_SCLK

SOC: AOPSYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

01005

49.9

1%

MF

ROOM=SOC

1/32W

MF1/32W

ROOM=SOC

1%

49.9

01005

50

38

20%

01005X5R-CERM6.3V0.1UF

ROOM=SOCROOM=SOC0201CER-X5R6.3V20%4UF

50

36

35

50 41

48

48

50

50

36 12

36 12

38

38

50 49 41 25 12 4

50 49 41 25 12 4

1.00K5%

ROOM=SOC

1/32WMF01005

ROOM=SOC01005

5%

MF

1.00K1/32W

50

50

50 41 38

50 49 41 38

50 49 41 38

49 41 38

16 4

50

20

50 16 4

38

38

38

50

50

26 4

38

38

50

50

26 4

26 4

20

50 28 21 20 8

26 4

26 4

38

50 41

36

26

26

26 4

49 25 4

14 4

1/32W

01005ROOM=SOC

5%1.00K

MF01005

1.00K

MF

5%1/32W

ROOM=SOC

ROOM=SOC

WLCSPTMIT78B0-C4

ROOM=SOC

MF

1%

01005

1/32W

49.9

33.2

1/32WMF

01005ROOM=SOC

1%

50 49 48 47 46 38 22 20 17 14 12 10

50 49 48 47 46 38 22 20 17 14 12 10

50 49 41 25 12 4

50 49 41 25 12 4

36 12

36 12

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NC

IN

NC

OUT

NC

BI

NC

NC

IN

NC

IN

OUT

IN

IN

IN

IN

BI

OUT

NC

IN

IN

BI

OUT

OUT

OUT

IN

IN

IN

OUT

BI

BI

IN

OUT

OUT

IN

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

IN

IN

IN

IN

BI

IN

OUT

SYM 7 OF 16AOP_PDM_CLK0

RT_CLK32768

AOP_SWD_TCK_OUT

AOP_SWD_TMS0AOP_SWD_TMS1

AOP_PDM_DATA1

SWD_TMS2

DOCK_ATTENTION

AOP_PDM_DATA0

SWD_TMS3

AOP_I2CM0_SCL

AOP_I2CM1_SDAAOP_I2CM1_SCL

AOP_I2CM0_SDA

DOCK_CONNECT

AOP_FUNC_0AOP_FUNC_1

AON_DDR_RESET*

AOP_FUNC_2

AOP_FUNC_7AOP_FUNC_6

AOP_FUNC_12AOP_FUNC_11AOP_FUNC_10

AOP_FUNC_3

AOP_FUNC_9AOP_FUNC_8

AOP_FUNC_5AOP_FUNC_4

AOP_FUNC_19

AOP_FUNC_13

AOP_FUNC_18AOP_FUNC_17AOP_FUNC_16AOP_FUNC_15AOP_FUNC_14

AOP_FUNC_20AOP_FUNC_21AOP_FUNC_22AOP_FUNC_23AOP_FUNC_24

AOP_FUNC_26

AOP_SPI_MOSIAOP_SPI_MISO

AOP_FUNC_25

AOP_SPI_SCLK

AOP_UART2_RXDAOP_UART2_TXD

AOP_I2S0_BCLK

AOP_UART1_TXD

AOP_UART0_TXD

AOP_UART1_RXD

AOP_UART0_RXD

AOP_I2S0_DINAOP_I2S0_MCK

AOP_I2S0_DOUT

AOP_I2S0_LRCK

VDDI

O18

_AO

PVD

DIO

18_A

OP

VDDI

O18

_AO

PVD

DIO

18_A

OP

0.635V @ 2.6A MAX0.765V @ 4.9A MAX

(Analog)

0.735V @ 0.6A MAX1.01V @ 2.1A MAX

1.06V @ 1.1A MAX

0.675V @ 0.19A MAX0.80V @ 0.63A MAX

0.8V @ 2.8A MAX

1.06V @ 18.3A MAX0.8V @ 10.6A MAX

0.575V @ 3.4A MAX

1.06V @ 4.3A MAX

0.575V @ 1.4A MAX

1.2V @ 20mA MAX (SOC)1.2V @ 7mA MAX (GPU)1.2V @ 7mA MAX (CPU)

0.7V @ 75mA MAX

0.8V @ 10mA MAX

0.8V @ 6A MAX1.06V @ 11.0A MAX

SOC - CPU, GPU & SOC RAILS0.575V @ 2.7A MAX

(Analog)

0.8V @ 6mA MAX0.8V @ 6mA MAX

13 OF 51

9.0.0

evt-1

17 OF 80

051-02221

2

1 C17612

1 C1760

4

3

2

1

C1764

4

3

2

1

C1763

4

3

2

1

C1762

2

1 C1794

4

3

2

1

C1793

4

3

2

1

C1792

4

3

2

1

C1791

2

1 C17232

1 C17222

1 C17212

1 C1720

4

3

2

1

C1773

2

1 C1750

4

3

2

1

C1772

4

3

2

1

C1707

4

3

2

1

C1713

2

1 C17032

1

C1702

4

3

2

1

C1706

4

3

2

1

C1705

4

3

2

1

C1712

4

3

2

1

C1711

4

3

2

1

C1704

4

3

2

1

C1710

4

3

2

1

C1709

4

3

2

1

C1708

2 1

XW1790

4

3

2

1

C1732

4

3

2

1

C1733

P23

Y27Y21Y25Y19W30W28W24W22W18V27V25V21V19U30U28U24U22U18U16T27T25T21T19T15T13R28R24R22R18R16R12R10P27P25P21P19P15P13N29N18N16N12N10M21M15M13L19J20G13

F22AN24AN22AN12AM25AM13AL30AL28AL24AL22AL18AL16AL12AK27AK25AK21AK19AK15AK13AJ28AJ24AJ22AJ18AJ16AH27AH25AG28AG24AG22AF27AF25AE28AE24AE22AD29AD27AD25AD21

AD9AC30AC28AC24AC22AB27AB25AB21AA30AA28AA24AA22AA18

AA9U1000

AN20AN18AN16AM21AM19AM17AM15

M29G30K23K19K11H25H21H17H13N26

N23

N28N24N22L24M23L28L22L18L12K29K17L16J30J26J24J22J18J12H31H23H19H15H11J28G26G24G22G20F31J16F25

L20K21

W14

Y15Y13V15V13U12U10AA10

U14AF14AE20AC14

AC9AB18AA12

AH21

AH20AH18AH16AH14AH12AH10AG15

AG9AF20AE14AD15AC20AB19AB17AB15AB13AB11AA16AA14

M20L21W16

U1000

4

3

2

1

C1738

4

3

2

1

C1739

4

3

2

1

C1737

4

3

2

1

C1736

4

3

2

1

C1781

21

XW1731

4

3

2

1

C1734

4

3

2

1

C1735

2

1 C17302

1 C1731

4

3

2

1

C1782

21

XW1760

2 1

XW1701PP_SOC_S1

PP_GPU_SRAM

PP1V2_SOC

BUCK11_FB

BUCK2_FB

AP_CPU_PCORE_SENSE

AP_VDD_GPU_SENSE

TP_SOC_SENSE

BUCK1_FB

PP_GPUBUCK0_FB

PP_CPU_PCORE

PP0V8_SOC_FIXED_S1

PP_CPU_ECORE

PP0V7_VDD_LOW_S2

PP_CPU_SRAM

SOC: Power (1/3)

SYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

ROOM=SOC

4VX5R0201

4UF20%

ROOM=SOC

4VX5R0201

4UF20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

ROOM=SOC

4VX5R0201

4UF20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

6.3V

ROOM=SOC

CER-X5R

4UF

0201

20%

01005

0.1UF

ROOM=SOC

6.3VX5R-CERM20%

01005

6.3V

ROOM=SOC

0.1UF

X5R-CERM20%

X5R-CERM

0.1UF6.3V

ROOM=SOC01005

20%

0402-D2X-1

ROOM=SOC

4VX5R

20%14UF

4UF

CER-X5R6.3V

ROOM=SOC0201

20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

4VX5R

4UF20%

0201ROOM=SOCROOM=SOC

0201X5R4V20%4UF

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-10402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

4VX5R

ROOM=SOC

14UF20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

X5R0402-D2X-1

4V20%14UF

ROOM=SOC

0402-D2X-1

4VX5R

20%14UF

ROOM=SOC

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

20 18

SHORT-20L-0.05MM-SM

ROOM=SOC

OMIT

4

20 4

20 4

0402-D2X-1

14UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

17 17

17

ROOM=SOC

WLCSPTMIT78B0-C4

ROOM=SOC

WLCSPTMIT78B0-C4

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

SHORT-20L-0.05MM-SM

ROOM=SOC

NO_XNET_CONNECTION

OMIT

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

4UF

ROOM=SOC

4VX5R0201

20%

ROOM=SOC

4UF

X5R0201

20%4V

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

NO_XNET_CONNECTION

SHORT-20L-0.05MM-SM

ROOM=SOC

OMITROOM=SOC

OMIT

SHORT-20L-0.05MM-SM

17

17

19 14 9 7

17 4

17 4

17 14 9 8 7 6

18

19

17

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

OUT

OUT

OUT

OUTOUT

OUT

SYM 9 OF 16

VDD_SOC_SENSE

VDD_SOC

SYM 8 OF 16

VDD_GPU

VDD_ECPU

VDD_FIXED_PLL_GPUVDD_FIXED_PLL_SOC

VDD12_PLL_CPUVDD12_PLL_GPUVDD12_PLL_SOC

VDD_FIXED_CPU

VDD_CPU

VDD_LOW

VDD_CPU_SRAM

VDD_CPU_SENSE

VDD_GPU_SRAM

VDD_GPU_SENSE

1.8V @ 60mA MAX

DCS Voltage Sense ->

1.8V @ 1mA MAX

VDDQL Voltage Sense ->

(Analog)

1.06V - 1.17V @2.2A MAX

DDR IMPEDANCE CONTROL

0.6V @ 262mA MAX

0.8V @ 8mA MAX

0.8V @ 0.9A MAX

1.8V @ 1mA MAX

1.8V @ 200mA MAX

Place caps on SoC Corners

SOC - POWER SUPPLIES

1.06V - 1.17V @ (Inc in VDD2)

(Analog)1.2V @ 16mA MAX

0.875V @ 0.8A MAX0.730V @ 0.51A MAX0.600V @ 0.35A MAX

1.8V @ 5.3mA MAX (CPU)1.8V @ 1.1mA MAX (GPU)1.8V @ 3.3mA MAX (SOC)

Place caps on SoC Corners

14 OF 51

9.0.0

evt-1

18 OF 80

051-02221

2

1 C18622

1 C1861

2

1 C188021

R1880

2

1 C1881

2

1 C18132

1 C18122

1 C18112

1 C1810

4

3

2

1

C1801

2

1 C18052

1 C18032

1 C1802

21

XW18702

1 C1870

2

1 C18602

1 C1863

2

1 C1804

2

1 C18332

1 C18322

1 C1831

V9AF9

D23F21

Y31V31

AB31

AP25AP23

J31AD30AJ12

G21

Y16AJ9AF21T12

AN19AN13AT6H12

U1000

2

1R1871

2

1R1870

C4

A4

V39T39P39P31K31F39D39

V1T1K9H1F9F1D1

AV39AT39AP39AK31AF39AF31AD39

AV1AT1AP9AK9AH1AF1AD1

T29D9

AK29AJ11

G34E6

AN34AR6

R30K30

L10F10

AK30AE30

AP10AJ10

W1P1N39M1K39J1H39D38C38C3C2AW38AW2AV37AV2AP1AN39AM1AK39AJ1AH39AC39AA38AA2

Y37Y3B37B3

AW37AW3

AB37AB3

N38

H34

H35

G35

E4

E5

E3

AM34

AN35

AM35

AJ2

AP6

AP5

AR5

U1000

R29D8AJ29AK11

Y29Y23Y17Y9W26W20V29V23V17

U26U20T31T23T17T11R26R20R14P29P17P11N20N14M17M11F23F19

AP24AP21AP11AM23AM11AL26AL20AL14AK23AK17AJ26AJ20AJ14AH29AH23AG26AF29AF23AE26AD31AD23AC26AB29AB23

AB9AA26AA20

BA19AY20

U1000

2

1 C18402

1 C18412

1 C18422

1 C1843

2

1 C18502

1 C18512

1 C18522

1 C1853

2

1 C1830

2

1R1863

2

1R1862

2

1R1861

2

1R1860

PP1V2_LPADC

PP0V6_VDDQL_S1

DDR3_RREFDDR2_RREFDDR1_RREFDDR0_RREF

DDR0_ZQ

AOP_TO_DDR_SLEEP1_READY

LPADC_GND

PP1V8_S2

SYSTEM_ALIVE

DDR3_ZQ

PP1V8_S2

PP1V1_S2

PP1V8_LPOSC_S2PP1V8_IO

PP0V8_SOC_FIXED_S1

PP1V8_IO

PP0V8_SOC_FIXED_S1

PP1V1_S2

PP1V2_SOC

PP_DCS_S1

PP1V8_IO

PP0V6_VDDQL_S1

SOC: Power (2/3)

SYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

ROOM=SOC

4VX5R0201

4UF20%

ROOM=SOC

4VX5R0201

4UF20%

5%

ROOM=SOC

56PF

NP0-C0G-CERM01005

25V

300

5%1/32WMF

ROOM=SOC01005

ROOM=SOC01005

6.3V

0.47UF

X5R

20%

4UF

CER-X5R

ROOM=SOC

6.3V

0201

20%

ROOM=SOC

CER-X5R6.3V

4UF

0201

20%4UF

CER-X5R

ROOM=SOC

6.3V

0201

20%

0402-0.1MM

26UF

ROOM=SOC

4VX5R

20%

0402-D2X-1

ROOM=SOC

14UF4VX5R

20%

ROOM=SOC

4VX5R0201

4UF20%

ROOM=SOC

4VX5R0201

4UF20%

ROOM=SOC

4VX5R0201

4UF20%

ROOM=SOC

SHORT-20L-0.05MM-SM

OMIT

ROOM=SOC

X5R-CERM6.3V

2.2UF

0201

20%

4UF

ROOM=SOC

4VX5R0201

20%4UF

ROOM=SOC

4VX5R0201

20%

23 20 16

4UF

ROOM=SOC

4VX5R0201

20%

12 4

4UF

ROOM=SOC

4VX5R0201

20%4UF

X5R

20%

ROOM=SOC0201

4V

4UF

ROOM=SOC

4VX5R0201

20%

ROOM=SOC

WLCSPTMIT78B0-C4

01005MF1/32W1%240

ROOM=SOC01005MF1/32W1%240

ROOM=SOC

WLCSPTMIT78B0-C4

ROOM=SOC

ROOM=SOC

WLCSPTMIT78B0-C4

6.3V

2.2UF

X5R-CERM

ROOM=SOC0201

20%

ROOM=SOC

6.3VX5R-CERM

2.2UF

0201

20%

ROOM=SOC

2.2UF

X5R-CERM6.3V

0201

20%

ROOM=SOC

2.2UF6.3VX5R-CERM0201

20%

4UF

ROOM=SOC

4VX5R0201

20%

ROOM=SOC

4UF4VX5R0201

20%4UF

ROOM=SOC

4VX5R0201

20%4UF

ROOM=SOC

4VX5R0201

20%

ROOM=SOC

4VX5R0201

20%4UF

01005MF1/32W1%240

ROOM=SOC01005MF1/32W1%240

ROOM=SOC01005MF1/32W1%240

ROOM=SOC01005MF1/32W1%240

ROOM=SOC

19

18 14

50 49 48 47 46 38 22 20 17 14 12 10

50 49 48 47 46 38 22 20 17 14 12 10

42 19 17 14

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

17 14 13 9 8 7 6

43 35

34 32

30 29 28

27 17

16 14 10 8 7 6 5

17 14 13 9 8 7 6

42 19 17 14

19 13 9 7

17

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

18 14

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NC

NC

IN

IN

SYM 12 OF 16

VDD18_TSADC_CPU0VDD18_TSADC_CPU1

VDD18_LPOSCVDD18_FMON

VDD18_EFUSE2VDD18_EFUSE1

VDD18_TSADC_SOC2

VDD18_TSADC_SOC0VDD18_TSADC_SOC1

VDD18_TSADC_GPU0

VDD18_TSADC_CPU3VDD18_TSADC_CPU2

VDDIO18_GRP1

VDDIO18_GRP2

VDDIO18_GRP3

VDDIO18_GRP4

SYM 11 OF 16DDR3_RREF

DDR1_RET*DDR0_RET*

DDR2_RREFDDR1_RREFDDR0_RREF

DDR3_RET*DDR2_RET*

DDR0_ZQDDR3_ZQ

DDR1_SYS_ALIVEDDR2_SYS_ALIVEDDR3_SYS_ALIVE

DDR0_SYS_ALIVE

VDD1

VDD2

VDDQL_DDR0

VDDQL_DDR1

VDDQL_DDR2

VDDQL_DDR3

VDDIO11_RET_DDR0VDDIO11_RET_DDR1

VDDIO11_RET_DDR3VDDIO11_RET_DDR2

VDDIO12_PLL_DDR1VDDIO12_PLL_DDR0

VDDIO12_PLL_DDR3VDDIO12_PLL_DDR2

VDD_DCS_DDR0

VDD_DCS_DDR1

VDD_DCS_DDR2

VDD_DCS_DDR3

SYM 10 OF 16

VDD_FIXED_PLL_DDR3VDD_FIXED_PLL_DDR2VDD_FIXED_PLL_DDR1VDD_FIXED_PLL_DDR0

LPADC_REF_MLPADC_REF_P

VDD_FIXED

<- DDR Vss V Sense

SOC - POWER SUPPLIES

15 OF 51

9.0.0

evt-1

19 OF 80

051-02221

M2M19

P24

AG21

Y39Y35Y30Y28Y26Y24Y22Y20Y18Y14Y5Y1W39W38W37W34W31W29W27W25W23W21W19W17W15W13W9W6W3W2V37V35V30V28V26V24V22V20V18V16V14V6U39U34U31U29U27U25U23U21

U19U17U15U13U11

U9U5U3U1

T38T36T34T30T28T26T24T22T20T18T16T14T10

T6R39R34R31R27R25R23R21R19R17R15R13R11

R6R1

P37P35P30P28P26P22P20P18P16P14P12P10

P5P3

N34N27N25N21N19N17N15N13N11

N9N6N5N4N3N2N1

M39M38M36M34M28M24M22

M6M5

U1000BA39

M18M16M14M12M10L39L38L34L29L23L17L11L9L6L3L2L1K37K35K28K24K22K20K18K16K12K10K6K5K2K1J39J38J37J36J35J34J29J27J25J23J21J19J17J11J6J3J2H38H37H36H30H26H24H22H20H18H16H14H5H4H2G39G38G37G36G31G25G23G19G17G15G11G6G3G2

G1F38F37F36F35F34F30F26F24F20

F6F5F4F3F2

F18F14F12E39E38E37E36E35E34

E2E1

D37D36D35D34D27D26D25D24D22

D7D6D5D4D3D2

D14D10C39C37C36C35C33C31C29C27C26C25C24C23C22C21C20C19C18C17C16C15C14C13C12C11C10

C9C8C7C6C5C1 U1000

AL34

BA38BA37BA35BA33BA31BA29BA26BA25BA23BA7BA5BA3BA2BA1B39B38B36B35B27B18B11B5B4B2B1AY39AY38AY37AY35AY33AY31AY29AY28AY27AY25AY23AY21AY18AY15AY12AY9AY7AY5AY3AY2AY1AW39AW36AW34AW32AW30AW28AW24AW4AW1AV38AV36AV34AV32AV30AV28AV26AV24AV4AV3AU39AU38AU37AU36AU35AU34AU33AU31AU9AU6AU5AU4AU3AU29

AU27AU26AU25AU24AU21AU18AU15AU12

AU2AU1

AT38AT37AT33AT32AT31AT29AT28

AT5AT4AT3AT2

AR39AR38AR37

AR4AR3AR2AR1

AP38AP37AP36AP35AP34AP28AP22AP20AP18AP16AP12

AP4AP3AP2

AN38AN37AN36AN31AN29AN25AN23AN21AN17AN11

AN6AN5AN4AN3AN2AN1

AM39AM38AM37AM36AM30AM28AM26AM24AM22AM20AM18AM16AM14AM12

AM6AM2

AL39AL36AL35 U1000

AL31AL29AL27AL25AL23AL21AL19AL17AL15AL13AL11AL5AL3AL1AK36AK35AK34AK28AK26AK24AK22AK20AK18AK16AK14AK12AK10AK6AK2AK1AJ39AJ35AJ34AJ27AJ25AJ23AJ21AJ19AJ17AJ15AJ13AH37AH35AH28AH26AH24AH22AH19AH17AH15AH13AH11AH9AH5AH3AG39AG34AG29AG27AG25AG23AG20AG14AG6AG1AF37AF35AF30AF28AF26AF24AF22AF15AF6AE39AE34AE31AE29

AE27AE25AE23AE21AE15

AE9AE5AE3AE1

AD37AD35AD34AD28AD26AD24AD22AD20AD14

AD6AD4

AC35AC34AC31AC29AC27AC25AC23AC21AC15

AC6AC3AC1

AB39AB35AB30AB28AB26AB24AB22AB20AB16AB14AB12AB10

AB5AB1

AA39AA36AA34AA31AA29AA27AA25AA23AA21AA19AA17AA15AA13AA11

AA6AA1A39A38A37A36A35A33A31A29A27A18A11

A5A3A2A1

U1000

TP_VSS_CPU_SENSE

TP_VSS_SENSE

SOC: Power (3/3)SYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

4

4

ROOM=SOC

WLCSPTMIT78B0-C4

ROOM=SOC

WLCSPTMIT78B0-C4

ROOM=SOC

WLCSPTMIT78B0-C4

ROOM=SOC

WLCSPTMIT78B0-C4

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NC

OUT

OUT

SYM 16 OF 16

VSS_CPU_SENSE

VSS_SENSE

VSS

SYM 15 OF 16

VSSVSS

SYM 14 OF 16

VSS VSS

SYM 13 OF 16

VSSVSS

Board trace <= 0.2Ohm

1100mA MAX (1us peak power)

S4E NAND391mA MAX

932mA MAX

16 OF 51

9.0.0

evt-1

26 OF 80

051-02221

2

1 C26362

1 C2637

2

1 C26012

1 C2600

2

1 C2624

2

1 C26222

1 C2627

2

1R2601

2

1 C2641

2

1 C2652

2

1 C26352

1 C26342

1 C2632

2

1 C26112

1 C2617

2

1 C26472

1 C26452

1 C2643

2

1 C26232

1 C2612

2

1 C2630

2

1 C26032

1 C26062

1 C26092

1 C26142

1 C26202

1 C2628

2

1 C26402

1 C26422

1 C26442

1 C2646

2

1 C2631

2

1 C26492

1 C26502

1 C2651

2

1 C2629

C10K3

G2

U12

U10U8U6U4U2T13T9T7T1R10

P13

P11P7P3P1N10N4M

13M7

M5

M1

L10

K13K7K5K1J10

H13

H11H9H5H3H1F13

F11F9F7F5F1D13

D11D1C12C2B13B1A12

A10A8A6A4A2

F3P9T5N2K9J2E10

E2 R4R8R6L8L6G8

G6

R2L12

G4

E12

D3

G10

L4

R12T11

M11N12

K11J12

P5

J8N8

H7

J6M9

N6

E4

E6

D7

E8

B11B9C8B7C6B5C4B3

D5

D9

T3

M3

L2 J4G12

U2600

2

1 C2626

2

1R2600

2

1 C26212

1 C26192

1 C26162

1 C2613

2

1 C26052

1 C2602

2

1 C2610

2

1 C26182

1 C2615

2

1R2604

PP1V8_IO

PP0V9_NAND

AP_TO_NAND_RESET_L

90_PCIE_AP_TO_NAND_TXD_P

SPI_S4E_TO_AP_MISO_BOOT_CONFIG2

90_PCIE_NAND_TO_AP_RXD_P

SYSTEM_ALIVE

SWD_AP_BI_NAND_SWDIO

SPI_AP_TO_S4E_SCLK_BOOT_CONFIG090_PCIE_AP_TO_NAND_REFCLK_P

90_PCIE_AP_TO_NAND_TXD_N

PCIE_NAND_RESREF

PCIE_AP_TO_NAND_RESET_L

NAND_ANI0_VREFNAND_ANI1_VREF

SPI_AP_TO_S4E_MOSI_BOOT_CONFIG1

AP_TO_NAND_FW_STRAPPMU_TO_NAND_LOW_BATT_BOOT_L

PP3V0_NAND

PP1V8_IO

SWD_AOP_TO_MANY_SWCLK

PCIE_NAND_BI_AP_CLKREQ_L

90_PCIE_NAND_TO_AP_RXD_N

90_PCIE_AP_TO_NAND_REFCLK_N

AP_TO_NAND_SYS_CLK

NAND_ZQ_C

CKPLUS_WAIVE=MISS_P_DIFFPAIR

NAND_ZQ_N NANDSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

220PF

01005

5%10V

ROOM=NAND

C0G-CERM01005ROOM=NAND

100PF

NP0-C0G

5%16V

ROOM=NAND

4V

4UF

X5R

20%

0201ROOM=NAND

4V

4UF

0201

20%

X5R

ROOM=NAND

4V

4UF

X5R0201

20%

4

4

ROOM=NAND

4V

4UF

X5R0201

20%

ROOM=NAND

4V

4UF

X5R0201

20%

10 5

10 5

10 5 4

ROOM=NAND

3000.1%1/32MF01005

23 20 14

7

50 12 4

12 4

6

20

6

7

7

7

7

7

7 4

7 4

10

ROOM=NAND

4V

4UF

X5R0201

20%

ROOM=NAND

6.3VCERM-X5R0201

4UF20%

220PF

C0G-CERM10V5%

01005ROOM=NANDC0G-CERM

220PF10V5%

01005ROOM=NANDROOM=NAND

100PF5%16VNP0-C0G01005

220PF

ROOM=NAND01005

10V5%

C0G-CERM

ROOM=NAND

100PF

01005

16V5%

NP0-C0G

ROOM=NAND

4V

4UF

X5R0201

20%

ROOM=NAND

4V

4UF

X5R0201

20%

ROOM=NAND

4V

4UF

X5R0201

20%

NP0-C0G

5%68PF

01005ROOM=NAND

6.3V

01005

16VCERM

5%47PF

ROOM=NAND

ROOM=NANDCER-X5R0402-0.1MM

18UF6.3V20%

ROOM=NAND

C0G-CERM

5%220PF

01005

10V5%10V

01005C0G-CERM

220PF

ROOM=NAND ROOM=NAND

5%

NP0-C0G01005

100PF16V

NP0-C0G

ROOM=NAND01005

68PF5%6.3V

47PF5%

CERM01005ROOM=NAND

16V

ROOM=NAND

16V5%

01005CERM

22PF

ROOM=NAND

4V

4UF

X5R0201

20%

ROOM=NAND

4V

4UF

X5R0201

20%

ROOM=NAND

4V

4UF

X5R0201

20%

ROOM=NAND

4V

4UF

X5R0201

20%

NP0-C0G01005

68PF5%

ROOM=NAND

6.3V

ROOM=NAND

6.3VCERM-X5R0201

4UF20%

ROOM=NAND

6.3VCERM-X5R0201

4UF20%

ROOM=NAND

6.3VCERM-X5R0201

4UF20%

ROOM=NANDCER-X5R0402-0.1MM

18UF6.3V20%

CRITICALBOMOPTION=OMIT_TABLE

ROOM=NANDWFLGA

THGBX7G8D2LLFXG

ROOM=NAND

4V

4UF

X5R0201

20%

01005

1/32W0.1%

ROOM=NAND

MF

100

ROOM=NAND

CER-X5R0402-0.1MM

18UF6.3V20%

ROOM=NAND

CER-X5R0402-0.1MM

18UF6.3V20%

ROOM=NAND

CER-X5R0402-0.1MM

18UF6.3V20%

ROOM=NAND

CER-X5R0402-0.1MM

18UF6.3V20%

26UF

ROOM=NAND0402-0.1MMX5R

20%4V

26UF4V

0402-0.1MMX5R

20%

ROOM=NAND

0.1UF

01005ROOM=NANDX5R-CERM6.3V20%

47PF16VCERMROOM=NAND01005

5%16V

22PF

CERMROOM=NAND01005

5%

3.01K1%1/32WMF01005ROOM=NAND

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

19

19

43 35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

OUT

NC

NC

IN

IN

OUT

IN

IN

IN

BI

IN

IN

IN

OUT

OUT

IN

IN

BI

IN

IN

IN

AVDD

18_P

LL

CLK_IN

ANI0

_VRE

F

VSS

EXT_D2/BOOT2/SPINAND_SCLK

EXT_NCE/PERST*

EXT_NRE/JTAG_TMS

EXT_NWE/JTAG_TCK

EXT_RNB/JTAG_TDO

EXT_CLE/JTAG_TDI

EXT_ALE/JTAG_SEL

EXT_D1/BOOT1EXT_D0/BOOT0

EXT_D7/SPF

DROOP_N

WP_N

PCIE_REFCLK_M

PCIE_TX0_PPCIE_TX0_M

RESET*

TRST*

ZQ_CZQ_N

VPP

VDD_

PLL

VCC

VDDI

O

VDD

ANI1

_VRE

F

PCI_

VDD_

1PC

I_VD

D_2

PCI_

AVDD

_H

PCI_

AVDD

_CLK

_1PC

I_AV

DD_C

LK_2

EXT_D3/SWD_UID0/SPINAND_MISO

EXT_D6/UART_TX

EXT_D4/UART_RX

PCIE_REFCLK_P

PCIE_CLKREQ_N

PCI_RESREF

PCIE_RX0_PPCIE_RX0_M

EXT_D5/SWD_UID1/SPINAND_MOSI

NC

NC

BUCK

91.2A MAX (Place in TTS)

(Place in TTS)

(Place Close to Ansel)

0.625V - 1.06V

BUCK0BUCK2

1.7A MAXBUCK3

13.8A MAX4.9A MAX

1.2A MAX

1.2A MAX

13.8A MAXBU

CK5

BUCK

6BU

CK7

BUCK

8BU

CK4

0.67V - 0.92V

0.67V/0.80V

1.7A MAX

0.80V - 0.92V

2.1A MAX

BUCK1

1.03V for overdrive only

4.9A MAX

0.80V - 1.06V

17 OF 51

9.0.0

evt-1

27 OF 80

051-02221

2

1 C2763

2

1 C2745

2

1 C2724

2 1

L2750

2 1

L2740

2 1

L2770

21

L2730

21

L2741

21

L2721

2

1 C2732

2

1 C2790

2

1 C2706

21

XW2790

2

1 C2780

2

1 C2770

2

1 C27822

1 C2781

2

1 C27722

1 C2771

2 1

XW2780

2 1

L2780

2 1

XW2770

2

1 C27612

1 C27622

1 C2760

2 1

XW2760

2 1

L2760

2

1 C27522

1 C27512

1 C2750

2 1

XW2750

2

1 C2716

2

1 C2741

2

1 C2791

21

L2712

2

1 C27922 1

L27902

1 C2721

21

L2703

21

L2702

21

L2711

2

1 C2742

C2C1

B6A6

F4

B17A17

E17

W18W17W16

W14

H2H1

H4

Y3W3V3

T4

Y9W9V9

Y11W11V11

T8

D2D1

B2B1A2

F2F1

G4

Y7W7V7

Y5W5V5

T7

C9B9A9

C11B11A11

C13B13A13

B15A15

F15

U18U17U16

R18R17R16

N18N17N16

L18L17

R13

U2700

2 1

XW2740

2

1 C27442

1 C27432

1 C2740

21

XW2730

21

L2720

2

1 C2731

2

1 C27222

1 C2723

2

1 C2730

2

1 C2720

21

L2710

2

1 C27102

1 C27112

1 C27122

1 C27132

1 C27142

1 C2715

2

1 C2700

21

L2701

21

L2700

2

1 C27052

1 C27042

1 C27032

1 C27022

1 C2701

PP_CPU_SRAM

PP1V1_S2

PP0V8_SOC_FIXED_S1

PP1V25_S2

PP_GPU_SRAM

PP_DCS_S1

PP1V8_S2

BUCK2_FB

BUCK0_LX0

BUCK0_LX1

BUCK0_LX3

BUCK0_FB

BUCK1_LX0

BUCK1_LX1

BUCK1_LX2

BUCK1_FB

BUCK2_LX0

BUCK2_LX1

BUCK3_FB

BUCK3_LX0

PP1V8_IO

PP1V8_TOUCH_RACER_S2PP1V8_IMU_S2

BUCK4_LX0

BUCK4_FB

BUCK5_LX0

BUCK5_FB

BUCK6_LX0

BUCK6_FB

BUCK7_LX0

BUCK7_FB

BUCK8_LX0

BUCK8_FB

BUCK9_LX

BUCK9_FB

BUCK0_LX2

BUCK4_LX1

PP_GPU

PP_CPU_PCORE

PP_SOC_S1

SYSTEM POWER: PMU Bucks (1/4)SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

20%

X5R6.3V

15UF

0402-0.1MM-1ROOM=PMU

0402-0.1MMX5R4V

ROOM=PMU

20%26UF

0402-0.1MMX5R4V20%

ROOM=PMU

26UF

ROOM=PMUPIWA20160H-SM

1UH-20%-2.5A-0.052OHM

ROOM=PMU

1UH-20%-3.2A-0.06OHM

PIWA20160H-SM

PIWA20160H-SMROOM=PMU

1UH-20%-2.5A-0.052OHM

PIWA2016FE-SMROOM=PMU

1UH-20%-2.4A-0.06OHM

ROOM=PMU

CRITICAL

0.47UH-20%-3.3A-0.053OHM

PIWA2012FE-SM

PIWA2012FE-SM

0.47UH-20%-3.3A-0.053OHM

ROOM=PMU

CRITICAL

20%

X5R

ROOM=PMU

6.3V

0402-0.1MM-1

15UF

13

13

13

220PF

C0G-CERM10V5%

ROOM=PMU01005

26UF

0402-0.1MM

20%

X5R4V

ROOM=PMU

ROOM=PMU

SHORT-20L-0.05MM-SM

OMIT

220PF

C0G-CERM

ROOM=PMU

10V

01005

5%

10VC0G-CERM01005

5%220PF

ROOM=PMU

20%4V

ROOM=PMU

26UF

0402-0.1MMX5R

20%26UF

0402-0.1MMX5R4V

ROOM=PMU

20%26UF

X5R4V

ROOM=PMU0402-0.1MM

20%

0402-0.1MMX5R4V

ROOM=PMU

26UF

ROOM=PMU

SHORT-20L-0.05MM-SM

OMIT

PIWA20120H-SM

1UH-20%-2.5A-0.078OHM

ROOM=PMU

CRITICAL

SHORT-20L-0.05MM-SM

OMIT

ROOM=PMU

20%

X5R

ROOM=PMU

6.3V

0402-0.1MM-1

15UF15UF

0402-0.1MM-1

6.3V

ROOM=PMU

X5R

20%

C0G-CERM10V5%220PF

01005ROOM=PMU

ROOM=PMU

OMIT

SHORT-20L-0.05MM-SM

PIWA2016FE-SMROOM=PMU

CRITICAL

1UH-20%-2.4A-0.06OHM

20%26UF

0402-0.1MMX5R4V

ROOM=PMU ROOM=PMU

20%26UF

0402-0.1MMX5R4V 10V

220PF5%

ROOM=PMU01005C0G-CERM OMIT

SHORT-20L-0.05MM-SM

ROOM=PMU

X5R4V

ROOM=PMU0402-0.1MM

20%26UF

20%26UF

0402-0.1MMX5R4V

ROOM=PMU

20%26UF

X5R4V

ROOM=PMU0402-0.1MM

PINA2012-SM

CRITICAL

0.1UH-20%-7.2A-0.018OHM

ROOM=PMU

20%26UF

0402-0.1MMX5R4V

ROOM=PMU

ROOM=PMUPIWA2012FE-SM

1UH-20%-2.1A-0.1OHM

CRITICAL

20%26UF

0402-0.1MMX5R4V

ROOM=PMU

PINA1608-SM

CRITICAL

ROOM=PMU

0.1UH-20%-6.1A-0.031OHM

ROOM=PMU

CRITICAL

PINA1608-SM

0.1UH-20%-6.1A-0.031OHM

CRITICALROOM=PMU

PIWA20120H-SM

0.47UH-20%-4A-0.048OHM

20%26UF

0402-0.1MMX5R4V

ROOM=PMU

ROOM=PMUCRITICAL

WLCSPD2422B0

OMIT

SHORT-20L-0.05MM-SM

ROOM=PMU

4V

ROOM=PMU

X5R0402-0.1MM

26UF20%

ROOM=PMU0402-0.1MMX5R4V20%26UF

ROOM=PMU

10VC0G-CERM01005

220PF5%

SHORT-20L-0.05MM-SM

ROOM=PMU

OMIT

1UH-20%-3.2A-0.06OHM

PIWA20160H-SM

CRITICAL

ROOM=PMU

20%

X5R

ROOM=PMU

6.3V

0402-0.1MM-1

15UF

20%26UF

X5R4V

ROOM=PMU0402-0.1MM

4VX5R

26UF20%

ROOM=PMU0402-0.1MM

ROOM=PMU

10VC0G-CERM01005

220PF5%

5%220PF10VC0G-CERM01005ROOM=PMU

0806ROOM=PMU

CRITICAL

1UH-20%-3.6A-0.062OHM

ROOM=PMU

10V

01005

5%

C0G-CERM

220PF 26UF

X5R

20%4V

ROOM=PMU0402-0.1MM

20%26UF

X5R4V

ROOM=PMU0402-0.1MM

20%26UF

0402-0.1MMX5R4V

ROOM=PMU

20%

X5R4V

26UF

0402-0.1MMROOM=PMU

20%26UF

0402-0.1MMX5R4V

ROOM=PMU

220PF10V5%

ROOM=PMU01005C0G-CERM

ROOM=PMU

CRITICAL

PIWA2012FE-SM

0.47UH-20%-3.3A-0.053OHM

CRITICAL

ROOM=PMUPIWA20160H-SM

1UH-20%-3.2A-0.06OHM

20%26UF

X5R4V

ROOM=PMU0402-0.1MM

20%26UF

X5R4V

ROOM=PMU0402-0.1MM

20%26UF

0402-0.1MMX5R4V

ROOM=PMU

20%26UF

0402-0.1MMX5R4V

ROOM=PMU

20%

0402-0.1MMX5R4V

ROOM=PMU

26UF

13

42 19 14

14 13 9 8 7 6

27 19

13

14

50 49 48 47 46 38 22 20 14 12 10

43 35 34 32 30 29 28 27 16 14 10 8 7 6 5

50 42

49 26 25

13 4

13 4

13

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NCNCNC

IN

IN

IN

SW

ITC

H O

UT

PU

TS

SYM 2 OF 5

BUCK4_LX1

BUCK0_LX2

BUCK0_LX0

BUCK9_FB

BUCK9_LX0

BUCK8_FB

BUCK8_LX0

BUCK7_FB

BUCK7_LX0

BUCK6_FB

BUCK6_LX0

BUCK5_FB

BUCK5_LX0

BUCK4_FB

BUCK4_LX0

BUCK3_SW3BUCK3_SW2

BUCK3_SW1

BUCK3_FB

BUCK3_LX0

BUCK2_LX1

BUCK2_LX0

BUCK1_FB

BUCK1_LX3

BUCK1_LX2

BUCK1_LX1

BUCK1_LX0

BUCK0_FB

BUCK0_LX3

BUCK0_LX1

BUCK2_FB

VBUCK3_SW

BUCK113.0A MAX

1.2A MAX

BUCK10

18 OF 51

9.0.0

evt-1

28 OF 80

051-02221

2

1 C28122

1 C2813

2

1 C28012

1 C2802

2

1 C2810

2

1 C2800

21

L2811

21

L2810

2 1

XW2800

21

L2800

2

1 C2811

2

1 C2864

2

1 C28592

1 C2860

2

1 C28542

1 C2855

2

1 C2850

2

1 C28612

1 C2862

2

1 C2856

2

1 C2851

2

1 C2857

2

1 C2852

2

1 C28652

1 C2866

2

1 C2863

2

1 C2858

P7

F14L14U14

R7K5E5

H18H17

B3A3

B7A7

C18B18

Y17Y16Y15

J2J1

Y2W2V2

Y10W10V10

E2E1

Y6W6V6

D10C10B10A10

D14C14B14A14

T18T17T16T15

M18M17M16M15

J18J17

G18G17

J15

B4A4

E4

U2700

VDD_MAIN_SNS

BUCK10_FB

BUCK10_LX

BUCK11_LX0

BUCK11_LX1

BUCK11_FB

PP_CPU_ECORE

PP0V6_VDDQL_S1

PP_VDD_MAIN

SYSTEM POWER: PMU Bucks (2/4)SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

4UF6.3V20%

0201CERM-X5R

ROOM=PMU

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

20 13

20%

X5R0402-0.1MM

26UF4V

ROOM=PMU

20%

X5R0402-0.1MM

26UF4V

ROOM=PMU

20%

X5R0402-0.1MM

26UF4V

ROOM=PMU

20%

X5R0402-0.1MM

26UF4V

ROOM=PMU

01005ROOM=PMU

10VC0G-CERM

220PF5%

ROOM=PMU

10VC0G-CERM01005

220PF5%

PIWA20120H-SM

0.47UH-20%-4A-0.048OHM

CRITICAL

ROOM=PMU

CRITICAL

1UH-20%-3.2A-0.06OHM

ROOM=PMUPIWA20160H-SM

ROOM=PMU

SHORT-20L-0.05MM-SM

OMIT

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

ROOM=PMUPIWA2012FE-SM

CRITICAL

1UH-20%-2.1A-0.1OHM

20%

X5R0402-0.1MM

26UF4V

ROOM=PMU

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

CERM-X5R

20%4UF

0201

6.3V

ROOM=PMU

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

20%6.3V

18UF

0402-0.1MMCER-X5R

ROOM=PMU

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

20%6.3V

18UF

0402-0.1MMCER-X5R

ROOM=PMU

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

20%6.3V

18UF

0402-0.1MMCER-X5R

ROOM=PMU

19

20%4UF

0201CERM-X5R6.3V

ROOM=PMU

D2422B0WLCSP

ROOM=PMU

13

14

50 46 45 43 42 41 34 31 27 23 21 19

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

IN SYM 3 OF 5

BA

T/U

SB

BU

CK

INP

UT

VDD_BUCK0_01

VDD_MAIN_6

BUCK10_LX0

VDD_BUCK11

VDD_BUCK10

VDD_BUCK9

VDD_BUCK8

VDD_BUCK7

VDD_BUCK6

VDD_BUCK5

VDD_BUCK4

VDD_BUCK3

VDD_BUCK2

VDD_BUCK1_23

VDD_BUCK1_01

VDD_BUCK0_23

VDD_MAIN_4VDD_MAIN_5

VDD_MAIN_2VDD_MAIN_3

VDD_MAIN_1

VDD_MAIN_SNS

BUCK11_LX0

BUCK10_FB

BUCK11_LX1

BUCK11_FB

VPUMP: 10nF min. @4.6V

LDO2LDO1

LDO9

LDO5

LDO7LDO8

LDO6

LDO4LDO3

VBUF_1V2

LDO11

LDO13

LDO10

LDO12

LDO14

19 OF 51

9.0.0

evt-1

29 OF 80

051-02221

2

1 C29702

1 C2971

2

1 C29102

1 C2900

2 1

XW2995

2

1 C2914

Y8Y4Y18Y14Y13Y12Y1W8W4W15W12N12V8V4V18V17V16V15V12U9U8U7U6U5U4U3U15U12U11U10T9T6T5T3R8R15P9P8P18P17P16P15P11P10N9N8N15N7M11M7L6L16K18K17

K16K14

J5J16J14J13H5H3

H16G5G3G2

G16G15

G1F5F3

F18F17F16E3

E18E13E12E11D9D8

D18D17D16D15D13D12D11

C8C7C6C5C4C3

C17C16C15C12

B8B5

B16B12

A8A5

A18A16A12

A1

U2700

W1V1

D3

E14

T2P3L3P4P6

N6P2M2

L2

U1N2P5M3N3K3

M5

T1R3L4R4R6M6R2M1

L1

N1R5M4N4K4

K1

J4

K2

N5T14

U2700

2

1 C2913

2

1 C2920

2 1

XW2991

2

1 C29072

1 C2915

2 1

XW2990

2

1C29812

1C2980

2

1 C29092

1 C29112

1 C2906

2

1 C2903

2

1 C2901

2

1 C29902

1 C29912

1 C2992

PP2V5_LDO0_S2

PMU_VSS_RTC

PMU_VPUMP

PP_VDD_MAIN

PMU_LDO5_UVLO_DET

VDD_MAIN_SNS

PMU_PRE_UVLO_DET

PP1V25_S2

PP1V1_S2

PP_VDD_BOOSTPP_VDD_MAIN

PP_VDD_BOOST

PP1V8_AUDIO_VA_S2

PP0V7_VDD_LOW_S2PP3V0_NAND

PP_ACC_VAR

PP3V0_S2PP0V9_NAND

PP1V8_ALWAYS

PP3V0_CONVOY

PP1V2_LPADC

PP3V3_USB

PP1V2_CODEC_S2

PP1V2_SOC

PP2V5_LDO0_S2

PP3V0_DISPLAY

PP1V0_DISPLAY_DVDD

SYSTEM POWER: PMU LDOs (3/4)SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

OMIT_TABLE

20%6.3V

ROOM=CAM_PMU

0201

2.2UF

X5R-CERM

OMIT_TABLE

20%6.3V

0201

2.2UF

X5R-CERM

ROOM=CAM_PMU

ROOM=PMU

X5R-CERM

2.2UF

OMIT_TABLE

20%6.3V

0201

20

20

18

OMIT_TABLE

20%6.3V

0201X5R-CERM

ROOM=PMU

2.2UF

OMIT

ROOM=PMU

SHORT-20L-0.05MM-SM

OMIT_TABLE

20%6.3V

0201ROOM=PMU

X5R-CERM

2.2UF

ROOM=PMU

WLCSPD2422B0

D2422B0

ROOM=PMU

WLCSP

X5R-CERM

2.2UF

OMIT_TABLE

0201

6.3V20%

ROOM=PMU

20%6.3V

01005X5R-CERM

ROOM=PMU

47NF

OMIT

SHORT-20L-0.05MM-SM

ROOM=PMU

ROOM=PMU

OMIT_TABLE

20%6.3V

2.2UF

X5R-CERM0201

20%

X5R6.3V

01005-1

0.22UF

ROOM=PMU

OMIT

ROOM=PMU

SHORT-20L-0.05MM-SM

OMIT_TABLE

20%6.3V

2.2UF

X5R-CERM

ROOM=PMU0201

OMIT_TABLE

2.2UF

X5R-CERM

ROOM=PMU

20%6.3V

0201

20%

X5R6.3V

ROOM=PMU

1.0UF

0201-1X5R-CERM0201ROOM=PMU

OMIT_TABLE

20%6.3V

2.2UF

OMIT_TABLE

20%6.3V

ROOM=PMU0201

2.2UF

X5R-CERM

OMIT_TABLE

20%6.3V

2.2UF

0201ROOM=PMU

X5R-CERM

OMIT_TABLE

20%6.3V

0201X5R-CERM

2.2UF

ROOM=PMU

20%18UF

0402-0.1MMCER-X5R6.3V

ROOM=PMU

20%18UF

0402-0.1MMCER-X5R6.3V

ROOM=PMU

20%18UF

0402-0.1MMCER-X5R6.3V

ROOM=PMU

19

20

50 46 45 43 42 41 34 31 27 23 21 19 18

27 17

42 17 14

50 38 34 27 21 19

50 46 45 43 42 41 34 31 27 23 21 19 18

50 38 34 27 21 19

50 41 38

13

16

48 46

50 48 47 45 36

16

23 20

14

6

38

14 13 9 7

19

43

43

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NC

OUT

OUT

OUT

SYM 5 OF 5

VSS VSSLD

O

SYM 1 OF 5

LDO

INP

UT

VLDO0

TP_DET

VPP_OTP

VCC_LDOG

VDD_VBUF

VDD_LDO12

VDD_LDO14VDD_LDO13

VDD_LDO11VDD_LDO10

VDD_LDO8VDD_LDO9

VDD_LDO7

VDD_BYPASS

VDD_LDO6

VDD_LDO5VDD_LDO5

VDD_LDO4VDD_LDO3VDD_LDO2VDD_LDO1VDD_LDO0

VPUMP

VLDO14VLDO13

VLDO7VLDO8

VLDO6

VBYPASS

VLDO5VLDO4

VLDO2VLDO3

VLDO1

VBUF_1V2

VLDO9

VLDO12

VLDO10VLDO11

NC

NTCs

NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC

AP NTC

CHARGER NTC

RADIO PA NTC on MLB Bottom

FOREHEAD NTC

Ansel AMUX

REAR CAMERA NTC

COLD_RESET & SYSTEM_ALIVE

20 OF 51

9.0.0

evt-1

30 OF 80

051-02221

21

R3000

2

1R3074

21R3073

21R3072

2

1 C3071

2

1

XW3000

21

R3001

2

1 C3002

3

1

4

2

Y3000

2

1R3011

2

1

R304521

XW30452

1C3045

2

1 C3031

L12

P1R1

R9

K15

L15

E15

E16

R14

P14

L5

J3

T10

W13V13U13T13T12

V14

K13

G6

H15

L7

L8K7

M8

N13P12P13

R12

L13

M14

H6

U2

N14

R10

T11

M10M9L11L10L9K12K11K10K9K8J12J11J10J9J8H12H11H10H9G12G11G10G9F12F11

M13

H13

J6J7K6

G13F13H14G14

N10N11

H8H7F8

E10E9F7G8G7F6

E8E7E6

F10F9D7D6D5D4

R11

M12

U2700

21R3071

21R3070

2

1R3061

2

1R3062

21

C3010

21R3010

2

1 C3030

2

1 C3020

2

1R3020

2

1

R3044

2

1

R3042

2

1C3041

2

1C3042

2

1C3044

2

1

R3041

21

XW3044

21

XW3041

21

XW3042

FOREHEAD_NTC_RETURN

PMU_HYDRA_TO_AP_FORCE_DFU

PMU_TO_BBPMU_RESET_L

AP_NTC

CHARGER_NTC_RETURN

AP_NTC_RETURN

FOREHEAD_NTC

PMU_TO_SYSTEM_COLD_RESET_LSYSTEM_ALIVE

CAMPMU_TO_PMU_AMUX

CHARGER_NTC

RCAM_NTC_RETURNREAR_CAMERA_NTC

PP1V8_S2

PMU_TO_NFC_EN

PMU_TO_GNSS_EN

PP1V8_ALWAYS PP1V8_ALWAYS_XO

PMU_TO_AOP_CLK32K

PMU_TO_BT_REG_ONBT_TO_PMU_HOST_WAKE

I2C0_AP_SCLI2C0_AP_SDA

PMU_IREF

HYDRA_TO_PMU_USB_BRICK_ID

PMU_TO_AP_THROTTLE_ECORE_L

PMU_TO_AP_PRE_UVLO_L

PMU_TO_AP_BUTTON_VOL_DOWN_LPMU_TO_AP_BUTTON_POWER_KEY_L

PMU_TO_AP_BUTTON_VOL_UP_L

PMU_LDO5_UVLO_DETPMU_PRE_UVLO_DET

BUCK11_FBAP_VDD_GPU_SENSE

AP_CPU_PCORE_SENSE

PMU_VREF

PMU_TO_AP_THROTTLE_PCORE_LPMU_TO_AP_THROTTLE_GPU0_L

ACORN_TO_PMU_ADC

BUTTON_VOL_DOWN_L

BUTTON_VOL_UP_LBUTTON_RINGER_A

PMU_TO_IKTARA_RESET_L

WLAN_TO_PMU_HOST_WAKETIGRIS_TO_PMU_INT_L

NFC_TO_PMU_HOST_WAKE

PMU_TO_AP_THROTTLE_GPU1_LPMU_TO_NFC_EN_R

PMU_TO_GNSS_EN_RPMU_TO_WLAN_CLK32K

CODEC_TO_PMU_WAKE

PMU_TO_WLAN_REG_ONPMU_TO_BB_USB_VBUS_DETECT

PMU_TO_BBPMU_RESET_R_LPMU_TO_NAND_LOW_BATT_BOOT_L

PMU_TO_AP_FORCE_DFU_RPMU_TO_CCG2_RESET_L

BB_TO_PMU_PCIE_HOST_WAKE_L

PMU_TO_DISPLAY_PANICBPMU_TO_BOOST_EN

PMU_TO_IKTARA_EN_EXT_1P8V

AP_TO_PMU_WDOG_RESET

AP_TO_PMU_SOCHOT_LHYDRA_TO_PMU_HOST_RESET

PMU_TO_SYSTEM_COLD_RESET_L

PMU_TO_AP_HYDRA_ACTIVE_READY

PMU_TO_TOUCH_CLK32K_RESET_L

PMU_TO_AOP_IRQ_L

SPMI_PMGR_TO_PMU_SCLKSPMI_PMU_BI_PMGR_SDATA

AP_TO_PMU_AMUX_OUT

CAMPMU_TO_PMU_AMUX

HYDRA_TO_PMU_USB_BRICK_ID

ACC_BUCK_TO_PMU_AMUX

ACORN_TO_PMU_ADCAP_TO_PMU_AMUX_SYNCDISPLAY_TO_PMU_AMUXTOUCH_TO_AMUX_PP1V8PMU_TO_WLAN_CLK32KRIGEL_TO_ISP_INTAP_TO_PMU_TEST_CLKOUT

PMU_AMUX_BY

REAR_CAMERA_NTCFOREHEAD_NTC

RADIO_PA_NTC

CHARGER_NTCAP_NTC

PMU_TCAL

PMU_VSS_RTCTCXO_PMU_32K

PMU_VDD_REF

PMU_VDD_RTC

SYSTEM_ALIVE_RAP_TO_MANY_BSYNC

PP1V8_ALWAYS

BUTTON_POWER_KEY_L

PMU_VSS_RTC

PMU_AMUX_AY

SYSTEM_ALIVE

SYNC_MASTER=test_mlb SYNC_DATE=11/01/2016

SYSTEM POWER: PMU (4/4)

01005

100

ROOM=PMU

1/32WMF

1%

ROOM=PMU

01005

1/32W

31.6KNOSTUFF

1%

MF

34 8 4

PMU_TO_SEP_DOUBLE_CLICK_DET10

11

25

50

ROOM=PMU01005

1/32W

100

MF

5%

ROOM=PMU01005

1/32W

100

5%

MF

ROOM=PMU

1000PF10%10VX5R01005

OMIT

SHORT-20L-0.05MM-SM

ROOM=PMU

ROOM=PMU01005MF

1/32W0%

0.00

01005ROOM=PMU

6.3V20%0.1UF

X5R-CERM

CRITICALROOM=PMU

CSP32.768KHZ-10PPM

200K1/32W

01005ROOM=PMU

MF

1%

50

42 20

50 48 11

50

ROOM=PMU

I609

10KOHM-1%01005

OMIT

ROOM=PMU

SHORT-20L-0.05MM-SM

ROOM=PMU

100PF5%16V

NP0-C0G01005

21

50

43

46

43

20%

0201

6.3V

ROOM=PMU

1UF

X5R

6

18 13

38

6

50

19

50

47

50

50

50

50 20

50

16

11

11

11

6

6

11 6 4

50

50

50

50

23

25

33

25

48 20

19

13 4

13 4

28 20

49 46 10

49 46 10

50

50

10 4

12

23 20 16 14

12

48 6 4

20 6

6 4

48 20

6

10

50 28 21 12 8

6 4

48

6

D2422B0WLCSP

ROOM=PMU

CRITICAL

OMIT

ROOM=PMU

SHORT-20L-0.05MM-SM

1/32W

20.0K

ROOM=PMU

5%

MF01005

ROOM=PMU

1.00K

5%1/32WMF

01005

ROOM=PMU

100K5%1/32WMF01005

ROOM=PMU

100K5%1/32WMF01005

OMIT

SHORT-20L-0.05MM-SM

ROOM=PMU

X5R6.3V

ROOM=PMU

0.22UF

20%

0201

ROOM=PMU

200K

1%1/20WMF201

ROOM=PMU

0.22UF20%6.3VX5R0201

ROOM=PMU

100PF5%16V

NP0-C0G01005

ROOM=PMU

100PF5%

01005NP0-C0G16V

3.92K0.1%1/20WMF0201ROOM=PMU

10KOHM-1%

ROOM=PMU

01005

ROOM=PMU

10KOHM-1%01005

ROOM=PMU

100PF5%16V

NP0-C0G01005

ROOM=PMU

100PF5%16V

NP0-C0G01005

ROOM=PMU

10KOHM-1%01005

OMIT

SHORT-20L-0.05MM-SM

ROOM=PMU

20 6

23 20 16 14

28 20

50 49 48 47 46 38 22 17 14 12 10

23 20 19

42 20

50 20

20

20

50

20

20

20 19

23 20 19

20 19

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

OUT

NC

IN

IN

NC

OUT

NC

NC

NC

VDD

CLKOUT

GND

NC

NC

IN

NC

IN

NC

BI

OUT

NC

NC

NC

OUT

OUT

IN

IN

OUT

OUT

IN

NC

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

NC

IN

BI

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

INSYM 4 OF 5

AD

C

XT

AL

RE

FS

BU

TT

ON

S

AM

UX

GP

IO

NT

CR

ES

ET

S

CO

MP

AR

AT

OR

SLEEP_32K

SYS_ALIVEFORCE_SYNCDBL_CLICK_DET

GPIO9GPIO10

SCLSDA

IREF

IBAT

BRICK_ID2BRICK_ID1

VDROOP11

PRE_UVLO

BUTTONO1BUTTONO2BUTTONO3

LDO5_UVLO_DETPRE_UVLO_DET

VDROOP11_DETVDROOP1_DETVDROOP0_DET

VREF

VDROOP0VDROOP1

ADC_IN

VBAT

BUTTON1BUTTON2BUTTON3BUTTON4

FAULT_OUT*

GPIO4GPIO3

GPIO5

GPIO2GPIO1

GPIO7GPIO8

GPIO6

GPIO11

GPIO13GPIO12

GPIO14GPIO15GPIO16

GPIO19GPIO20

GPIO17GPIO18

GPIO21

GPIO24GPIO23GPIO22

GPIO25

RESET_IN1

RESET_IN3RESET_IN2

RESET*SHDN

ACTIVE_RDY

OUT_32K

IRQ*

SCLKSDATA

AMUX_A0AMUX_A1AMUX_A2AMUX_A3

AMUX_A5AMUX_A6

AMUX_A4

AMUX_A7AMUX_AY

AMUX_B0AMUX_B1AMUX_B2AMUX_B3AMUX_B4AMUX_B5AMUX_B6AMUX_B7AMUX_BY

TDEV2TDEV1

TDEV3

TDEV5TDEV4

TCAL

XTAL1XTAL2

VDD_REF

VDD_RTC

NC

NC

353S01124

BOOST

Otherwise tracks VDD_MAINWhen VDD_MAIN < 3.4, boosts to 3.4

Boost Enable Pull

21 OF 51

9.0.0

evt-1

31 OF 80

051-02221

21

R3110

B1

B4B3

A4A3

C4C3

C2

B2

D4D3D2

A2

A1

C1

D1

U3100

2

1R3100

2

1 C31132

1 C31142

1 C3115

2

1 C3190

2

1 C31102

1 C31122

1

L3100

2

1 C3111

PMU_TO_BOOST_EN

I2C0_SMC_SCL

AP_TO_MANY_BSYNC

PP_VDD_BOOST

SYS_BOOST_LX

PP_VDD_MAIN

PMU_TO_BOOST_EN

I2C0_SMC_SDA I2C0_SMC_SDA_BOOST

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

SYSTEM POWER: Boost

01005

5%

ROOM=BOOST

10VC0G-CERM

220PF

6.3V20%

ROOM=BOOST0402-0.1MMCER-X5R

18UF

18UF

ROOM=BOOST

6.3VCER-X5R0402-0.1MM

20%

ROOM=BOOST

6.3VCER-X5R0402-0.1MM

18UF20%

0.47UH-20%-4A-0.048OHM

ROOM=BOOST

PIWA20120H-SM

ROOM=BOOST

MF

1%

39.2

01005

1/32W

CSP

ROOM=BOOST

CRITICAL

SN61280E

21 20

50 47 23 22 10

50 47 23 22 10

50 28 20 12 8

1/32WMF

511K1%

01005ROOM=BOOST

ROOM=BOOST

6.3VCER-X5R0402-0.1MM

18UF20%

ROOM=BOOST

6.3VCER-X5R0402-0.1MM

18UF20%

ROOM=BOOST

6.3VCER-X5R0402-0.1MM

18UF20%

21 20

50 38 34 27 19

50 46 45 43 42 41 34 31 27 23 19 18

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

VOUT

AGNDPGND

SCL

BYP*

EN

SW

VOUT

SW

GPIO

VIN

VIN

SDA

VSEL

IN

BI

IN

IN

Rcpt: 516S00232Plug: 516S00233

Gas gauge I2C level translator<-- This one on MLB

BATTERY CONNECTOR

22 OF 51

CKPLUS_WAIVE=I2C_PULLUP

CKPLUS_WAIVE=I2C_PULLUP

9.0.0

evt-1

32 OF 80

051-02221

2

1

3

Q3200

2

1

3

Q3201

2 1

R3201

2

1 C3201

10

9

87

65

4

321

J32002 1

XW3200

2

1 C32942

1 C32932

1 C3292

2

1 C320221

R3202I2C0_SMC_BI_GG_SDA

PP_BATT_VCC

I2C0_SMC_SCL

I2C0_SMC_SDAVBATT_SENSE

I2C0_SMC_TO_GG_SCL

PP1V8_S2

I2C0_SMC_TO_GG_SCL_CONN

I2C0_SMC_BI_GG_SDA_CONN

SYSTEM POWER: B2B BatterySYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

330PF

ROOM=B2B_BATTERY01005

16VCER-X7R

10%

NP0-C0G-CERM

ROOM=B2B_BATTERY

56PF5%

01005

25V

ROOM=B2B_BATTERY

25V5%

01005

56PF

NP0-C0G-CERM

01005

33

5%

ROOM=B2B_BATTERY

MF1/32W

50 47 23 21 10

50 47 23 21 10

ROOM=B2B_BATTERY

CRITICAL

SMRV1C002UN

RV1C002UN

CRITICALROOM=B2B_BATTERY

SM

23

01005

33

5%1/32W

ROOM=B2B_BATTERY

MF

NP0-C0G-CERM

ROOM=B2B_BATTERY

25V5%

01005

56PF

B2B-BATT-RCPTF-ST-SM

ROOM=B2B_BATTERY

PLACE_NEAR=J3200:2mmNO_XNET_CONNECTION=1

ROOM=B2B_BATTERY

SHORT-20L-0.05MM-SM

220PF10V

ROOM=B2B_BATTERY01005X7R-CERM

10%

50 23 50 49 48 47 46 38 20 17 14 12 10

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

BI

IN

SD

SY

M_V

ER

_1

GSD

SY

M_V

ER

_1

G

OUT

TIGRIS2 CHARGER

BATTERY NTC

23 OF 51

9.0.0

evt-1

33 OF 80

051-02221

2 1

R3360

K

A

DZ3300

2

1R3316

2

1C33172

1C3316

2

1 C3353

2

1C33432

1 C33082

1 C3307

2

1 C33042

1 C3303

2

1 C33252

1 C3324

2

1 C33152

1 C3314

2

1

R337021

XW33702

1C3370

21

L334121

L3340

2

1 C3305

2

1 C3301

2

1 C33222

1 C3323

2

1 C3306

2

1 C33102

1 C3311

2

1 C3320

2

1 C3312

2

1C3342

F2E2D2C2B2A2

B3

H5G5F5

B4

C4

E5D5C5B5A5

D4

F4

F3G2

H6G6F6

E6D6C6B6A6

E4 H2H1G1D3

H3

E3

G3G4

H8G8F8E8D8C8A8

H7G7F7E7D7C7B7A7

H4

F1

E1D1C1B1A1

A4B8

A3

U3300

2

1 C33902

1 C3391

2

1R3350

21

C3340

B3B2B1A3A2

A1

C3C2C1

Q3350

21R3332

21R3331

2

1 C3360

2

1 C33522

1 C3351

2

1 C3361

2

1 C3313

2

1 C3350

2

1 C3302

2

1C3341

2

1R3330

PP_VBUS1_E75_RVP

PP1V8_ALWAYS

TIGRIS_LX_MID

TIGRIS_TO_PMU_INT_L

USB_VBUS_DETECT

BATTERY_NTC_RETURNBATTERY_NTC

TIGRIS_VBUS_DETECT

BATTERY_NTC

TIGRIS_BOOT

TIGRIS_LDO

I2C0_SMC_SDAI2C0_SMC_SCL

PP_VDD_MAIN

PP_VBUS2_IKTARATIGRIS_LX

PP_BATT_VCC

VBATT_SENSE

TIGRIS_ACTIVE_DIODE

PP_VBUS1_E75_RVP_RTIGRIS_TO_PMU_INT_R_L

HYDRA_TO_TIGRIS_VBUS1_VALID_L

SYSTEM_ALIVE

PP_VBUS1_E75

TIGRIS_PMID2

TIGRIS_PMID1

SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

SYSTEM POWER: Charger

10%

01005

330PF16V

ROOM=CHARGER

CER-X7R

COG

ROOM=CHARGER01005

25V5%220PF

01005

5%

ROOM=CHARGER

10V220PF

C0G-CERM

MF

5%

01005

100K1/32W

ROOM=CHARGER

10

ROOM=CHARGER01005

5%

MF1/32W

DFN10062BZT52C20LP

1/32W

ROOM=CHARGER01005

MF

1%50K

0402

25VX5R

20%

ROOM=CHARGER

4.7UF4.7UF

0402ROOM=CHARGER

25VX5R

20%

220PF

C0G-CERM10V

01005

5%

ROOM=CHARGER

10%16V

ROOM=CHARGER

330PF

CER-X7R01005

COG5%220PF25V

ROOM=CHARGER01005

5%COG

ROOM=CHARGER01005

25V220PF

01005COG5%220PF

ROOM=CHARGER

25VCOG5%220PF

ROOM=CHARGER01005

25V

01005

5%220PF

ROOM=CHARGER

COG25V

5%COG

ROOM=CHARGER01005

25V220PF

COG5%

01005

220PF25V

ROOM=CHARGER

220PF5%COG01005

ROOM=CHARGER

25V

ROOM=CHARGER

0100510KOHM-1%

I251OMIT

SHORT-20L-0.05MM-SM

ROOM=CHARGER

ROOM=CHARGER

NP0-C0G

100PF5%16V

01005

0.47UH-6.8A-0.046OHM

ROOM=CHARGER3225

CRITICALCRITICAL

ROOM=CHARGER

0.47UH-6.8A-0.046OHM

3225

ROOM=CHARGER

25VX5R402

1UF10%

ROOM=CHARGER

25VX5R402

1UF10%

01005COG25V5%220PF

ROOM=CHARGER

220PF5%25V

ROOM=CHARGER

COG01005

COG

220PF5%

01005ROOM=CHARGER

25V

20%25V

4.7UF

0402ROOM=CHARGER

CER-X5R

20%25V

ROOM=CHARGER

4.7UF

0402CER-X5R

ROOM=CHARGER

20%25V

0402

4.7UF

CER-X5R

22

20

6

48 4

20 16 14

50 47 22 21 10

50 47 22 21 10

ROOM=CHARGER01005COG5%220PF25V

ROOM=CHARGER01005

5%10V

C0G-CERM

220PF

WCSPSN2500A1YEWR

CRITICALROOM=CHARGER

6.3V18UF

0402-0.1MMCER-X5R

ROOM=CHARGER

20%6.3V18UF

0402-0.1MMCER-X5R

ROOM=CHARGER

20%

100K

ROOM=CHARGER

MF1/32W

5%

01005

NOSTUFF

10%

0201ROOM=CHARGER

NO_XNET_CONNECTION

0.047UF

25VX5R

BGA

CSD68841W

ROOM=CHARGER

CRITICAL

MF

1%1/32W

01005ROOM=CHARGER

30.1K

MF

100

ROOM=CHARGER01005

1%1/32W

10%10V

01005ROOM=CHARGER

X7R-CERM

220PF

4UF

0201CERM-X5R6.3V

ROOM=CHARGER

20%4UF

0201CERM-X5R6.3V

ROOM=CHARGER

20%

4UF

CERM-X5R

ROOM=CHARGER

6.3V

0201

20%

ROOM=CHARGER

COG01005

5%220PF25V

48 47 45

20 19

23

23

50 46 45 43 42 41 34 31 27 21 19 18

50

50 22

49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

OUT

OUT

IN

IN

IN

BI

VBUS1_DET

SYS_ALIVE

VBUS1

BATT_SNS

PMID1

PMID2PMID2

BUCK_SW

NTC

HDQ_GAUGEHDQ_HOST

ACT_DIODE

VBUS2BATT

BUCK_SW

PMID1

PMID1

NC2

AUX1

NC3

NC1

VBUS2_VALID*VBUS1_VALID*

TEST

NC0

GND AGND

BATT

INT*

BOOT

LDO

BUCK_SW

BUCK_SW

BUCK_SWBUCK_SW

BATT

BUCK_SW

BATT

BATT

PMID1PMID1

VBUS1

VBUS1VBUS1

VBUS1

VBUS2VBUS2

SDASCL

PMID2BUCK_SW

VDD_

MAI

N5

VDD_

MAI

NVD

D_M

AIN

VDD_

MAI

NVD

D_M

AIN

VDD_

MAI

N

G

S

D

Iktara Components on MLB Bottom

24 OF 51

9.0.0

evt-1

34 OF 80

051-02221

SYSTEM POWER: Iktara

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

Cyclone Filtering

Compass (Button Flex Location)

<-- This one on MLB

BUTTONS

Plug: 516S00290Rcpt: 516S00289

Cyclone + Button Connnector

25 OF 51

CKPLUS_WAIVE=I2C_PULLUP

CKPLUS_WAIVE=I2C_PULLUP

IKTARA_COIL125

IKTARA_COIL225

IKTARA_COIL225

IKTARA_COIL125

9.0.0

evt-1

35 OF 80

051-022212 1

FL3553

2 1

R3552

2 1

R3551

2

1 C3553

2

1 C3552

2

1 C3551

2

1 C35502 1

FL3550

2

1 C3500

2

1 C35102

1 C3511

2

1 C3501

2

1C3540

21

R3540

2

1C353021

R3530

2

1C3520

2

1 DZ3540

2

1 DZ3530

2

1 DZ3520

21

R3520

1211

109

87

65

4321

J3500

PP1V8_IMU_S2

I2C1_AOP_SCL

I2C1_AOP_BI_COMPASS_SDA_BTN_CONN

BUTTON_VOL_DOWN_CONN_L

BUTTON_VOL_UP_CONN_L

I2C1_AOP_TO_COMPASS_SCL_BTN_CONN

COMPASS_TO_AOP_INT_BTN_CONN

PP1V8_IMU_COMPASS_BTN_CONN

BUTTON_RINGER_A_CONN

PP1V8_IMU_COMPASS_BTN_CONN

BUTTON_RINGER_A_CONN

BUTTON_VOL_DOWN_CONN_L

BUTTON_VOL_UP_CONN_L

COMPASS_TO_AOP_INT

I2C1_AOP_SDA

BUTTON_VOL_UP_L

I2C1_AOP_BI_COMPASS_SDA_BTN_CONN

COMPASS_TO_AOP_INT_BTN_CONNI2C1_AOP_TO_COMPASS_SCL_BTN_CONN

BUTTON_VOL_DOWN_L

BUTTON_RINGER_A

MAKE_BASE=TRUE

IKTARA_COIL1

MAKE_BASE=TRUE

IKTARA_COIL2

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

SYSTEM POWER: B2B Cyclone + Button

ROOM=B2B_BUTTON

12V-33PF01005-1

01005-112V-33PFROOM=B2B_BUTTON

49 12 4

50 49 41 12 4

50 49 41 12 4

150OHM-25%-200MA-0.7DCR

01005ROOM=B2B_DOCK

ROOM=B2B_BUTTON5.5V-6.2PF0201

0.00

1/32W

01005MF

ROOM=B2B_DOCK

0%

0.00

MF01005

ROOM=B2B_DOCK

0%1/32W

ROOM=B2B_DOCK

C0G-CERM

220PF

01005

5%10V

01005

25V

56PF5%

ROOM=B2B_DOCK

NP0-C0G-CERM

01005ROOM=B2B_DOCK

56PF

NP0-C0G-CERM25V5%

220PF5%

ROOM=B2B_DOCK

10V

01005C0G-CERM

1/32W

01005ROOM=B2B_BUTTON

5%

100

MF

ROOM=B2B_DOCK01005

150OHM-25%-200MA-0.7DCR

ROOM=B2B_BUTTON

2%50V

0201C0G

220PF

2%220PF50V

0201ROOM=B2B_BUTTON

C0G

2%

C0G0201

50V

220PF

ROOM=B2B_BUTTON

2%

C0G

ROOM=B2B_BUTTON0201

50V

220PF

20

20

20

01005

5%220PF

10VC0G-CERM

ROOM=B2B_BUTTON

100

ROOM=B2B_BUTTON01005

1/32W5%

MF

01005C0G-CERM

220PF5%

ROOM=B2B_BUTTON

10V

1/32WMF

01005ROOM=B2B_BUTTON

5%

100

5%27PF

ROOM=B2B_BUTTON

0201

6.3VNP0-C0G

ROOM=B2B_BUTTON

AA36D-S04VA1F-ST-SM

49 26 17

25

25

25

25

25

25

25

25

25

25

25

25

25

25

50

50

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

BI

IN

OUT

OUT

OUT

PWR

PWR

Graphite - Accel & GyroAPN: 338S00304

Magnesium - Compass(On Dock or Button Flex)

PhosphorusBOSCH (APN:338S00188)ST (APN:338S00230)

26 OF 51

9.0.0

evt-1

36 OF 80

051-02221

2

1R3620

2

1R3601

2

1R3600

116

152

7

346

141312111098

5

U3600

2

1 C3622

68

534 7

1

2

U3620

2

1 C3620

2

1 C36022

1 C36012

1 C3600

PP1V8_IMU_S2

CARBON_REGOUT

SPI_AOP_TO_PHOSPHORUS_CS_L

ACCEL_GYRO_TO_AOP_DATARDYACCEL_GYRO_TO_AOP_INT

PHOSPHORUS_TO_AOP_INTSPI_AOP_TO_IMU_SCLK

PP1V8_IMU_S2

SPI_IMU_TO_AOP_MISOSPI_AOP_TO_IMU_MOSI

SPI_AOP_TO_ACCEL_GYRO_CS_L

SPI_IMU_TO_AOP_MISOSPI_AOP_TO_IMU_MOSI

PP1V8_IMU_S2

SPI_AOP_TO_IMU_SCLK

PP1V8_IMU_S2

SENSORSSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

ROOM=CARBON01005

MF1/32W

5%100K

01005ROOM=CARBON

100K1/32W

MF

5%

01005ROOM=CARBON

0.00

MF1/32W0%

12 4

12 4

26 12 4

12

26 12 4

26 12 4

26 12 4

26 12 4

26 12 4

12 4

12

LGAROOM=CARBON

CRITICAL

BMI262BB

ROOM=PHOSPHORUS

2.2UF

X5R-CERM0201

20%6.3V

OMIT_TABLE

BMP284AA

ROOM=PHOSPHORUS

LGACRITICAL

20%

01005ROOM=PHOSPHORUS

X5R-CERM6.3V0.1UF

2.2UF20%6.3VX5R-CERM0201ROOM=CARBON

OMIT_TABLE

ROOM=CARBON

01005X5R-CERM6.3V20%0.1UF

ROOM=CARBON

X5R-CERM20%

01005

6.3V0.1UF

49 26 25 17 49 26 25 17

49 26 25 17

49 26 25 17

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

OUT

OUT

IN

IN

IN

OUT

IN

IN

OUT

IN CSB

INT

SM

MOTION_INT

VDD

VDDI

O

MISOMOSI

GND

GND

GND

GND

GND

GND

GND

SCLK

CS*

SDI SDO

VDD VDDIO

IRQ

GND

SCK

Camera PMU

See 2831115 for C3791 removal

For GPIO pullups only

27 OF 51

9.0.0

evt-1

37 OF 80

051-02221

3

1

2

Q3700

2

1 C3702

2

1 C3798

2

1 C3796

2

1 C3797

2

1 C3790

2

1 C3795

21

XW3700

2

1C3750

2

1 C37222

1 C3721

2

1 C37202

1 C3719

2

1 C37182

1 C3717

2

1 C37152

1 C3710

2

1 C37092

1 C3704

2

1 C37012

1 C370021

L3700

J4

G1B7

B8A3

A4B1

A5A6

J2B2

H1A8

A7B3

B4

B5B6

H2

A2

A1

H3

F2

J3

U3700

G4E2C5

J8J7

H8H7

H5

U3700

CAMPMU_BUCK_LX0 PP2V85_VAR_CAM_VCM_PVDD

PP_VDD_MAIN

PP1V25_S2

PP1V8_IO

CAMPMU_ON_BUF

PP_CAM_TELE_ADCPP3V3_SVDD

CAMPMU_BUCK_FB

PP2V85_CAM_TELE_AVDDPP1V1_CAM_WIDE_DVDD

PP1V8_HAWKINGPP2V85_CAM_WIDE_AVDD

PP1V1_FCAM_DVDDPP1V1_CAM_TELE_DVDD

PP_VDD_BOOST

CAMPMU_TELE_DVDD_DISABLE_L

PP1V1_CAM_TELE_JULIET_DVDDPP_CAM_WIDE_ADCPP2V85_FCAM_AVDD

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

CAMERA: PMU (1/2)

6.3VX5R-CERM

20%

0201ROOM=CAM_PMU

2.2UF

OMIT_TABLE

0402-0.1MMX5R-CERM10V

10UF20%

ROOM=CAM_PMU

20%

X5R-CERMROOM=CAM_PMU

6.3V

0201

2.2UF2.2UF

ROOM=CAM_PMU0201X5R-CERM

20%6.3V

28

ROOM=CAM_PMU

X3-DSN1010-3DMN1017UCP3

CRITICAL

20%6.3V

18UF

0402-0.1MMCER-X5R

ROOM=CAM_PMU

01005

10%330PF

CER-X7R16V

ROOM=CAM_PMU

4UF20%

0201X5R4V

ROOM=CAM_PMU

0201

6.3V20%4UF

CERM-X5R

ROOM=CAM_PMU

20%

0201X5R

4UF4V

ROOM=CAM_PMU

20%6.3V

18UF

0402-0.1MMCER-X5R

ROOM=CAM_PMU

CER-X5R

18UF

0402-0.1MMROOM=CAM_PMU

20%6.3V

20%4UF

0201CERM-X5R6.3V

ROOM=CAM_PMU

SHORT-20L-0.05MM-SM

ROOM=CAM_PMU

OMIT

1UH-20%-2.5A-0.078OHM

CRITICAL

PIWA20120H-SMROOM=CAM_PMU

WLCSP

D2462

20%X5R

6.3V

ROOM=CAM_PMU01005

0.22UF

20%

0201

6.3V

2.2UF

X5R-CERMROOM=CAM_PMU

20%

0201

6.3V

ROOM=CAM_PMU

2.2UF

X5R-CERM

2.2UF6.3VX5R-CERMROOM=CAM_PMU

20%

0201

2.2UF20%

0201

6.3V

ROOM=CAM_PMU

X5R-CERM

2.2UF6.3V20%

0201ROOM=CAM_PMU

X5R-CERM

2.2UF

0201X5R-CERM

20%6.3V

ROOM=CAM_PMU

ROOM=CAM_PMU

WLCSP

D2462

CRITICAL

29

50 46 45 43 42 41 34 31 23 21 19 18

19 17

43 35 34 32 30 29 28 17 16 14 10 8 7 6 5

30

35 30 29 28

35 30

29

33

29

32

30

50 38 34 21 19

35 29

32

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

D SG

NC

NC

SW OUTPUTSW INPUT

SYM 2 OF 4

LDO OUTPUTLDO INPUT

VLDO9VLDO4

VLDO15VLDO10

VLDO18VLDO17

VLDO20VLDO19

VLDO22VLDO21

ON_BUF

BUCK3_SW1

VDD_LDO9VDD_LDO4_17

VDD_LDO4_17

VDD_LDO19

VDD_LDO18

VDD_LDO20_21

VDD_LDO22VDD_LDO20_21

VDD_LDO10VDD_LDO15

VBUCK3

VPUMP

BUCKS

SYM 1 OF 4

VCC MAIN

VDD_BUCK9

VDD_MAINVDD_MAIN

VDD_MAIN

VDD_BUCK9BUCK9_LX0BUCK9_LX0BUCK9_FB

Pull Downs

28 OF 51

PP1V8_IO

9.0.0

evt-1

38 OF 80

051-02221

2

1R3820

21

R380321

R3802

2

1R3801

21

R3811

21

R3810

2

1R3800

2

1 C38002

1 C3810

F4J6J1H6H4G8G7G6

F1E5D5D2C7C4C3C2

U3700

E1

C1

G5J5

C6

F8E8

F5

D8

D1E3G2G3F3F7D3D4E4D7E6F6

D6

E7

C8

U3700D2462WLCSP

WLCSPD2462

ROOM=CAM_PMU01005

6.3V

0.1UF

X5R

20%

31 8 31 34 35

8 31 34 35

11

11 28

20

X5R

0.22UF20%

01005

6.3V

ROOM=CAM_PMU

4 34

MF01005

1/32W5%

10K

ROOM=CAM_PMU

MF

10K

5%1/32W

01005ROOM=CAM_PMU

34 35

34 36

01005

5%100K

ROOM=CAM_PMU

MF1/32W

8 12 20 21 50

MF

1%

01005

33.2

1/32W

MF

49.9

1%1/32W

01005

MF01005

1%1/32W

ROOM=CAM_PMU

200K

27

CAMERA: PMU (2/2)SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

CAMPMU_TELE_DVDD_DISABLE_L

CAMPMU_TO_STROBE_DRIVER_HWEN

CAMPMU_TO_RIGEL_ENABLE

MAMA_BEAR_BI_RIGEL_STATUS_R

AP_TO_MANY_BSYNCYOGI_TO_RIGEL_STATUS_R

PP3V3_SVDD

CAMPMU_TO_PMU_AMUX

AP_TO_CAMPMU_RESET_L

CAMPMU_VRTC

CAMPMU_IREF

CAMPMU_VREF

I2C3_ISP_SDA_U3700

CAMPMU_TO_AP_IRQ_R_L

I2C3_ISP_SCL

PP1V8_IOMAKE_BASE=TRUE

AP_TO_CAMPMU_RESET_L

CAMPMU_TO_AP_IRQ_L

YOGI_TO_RIGEL_STATUS

MAMA_BEAR_BI_RIGEL_STATUS

I2C3_ISP_SDA

ROOM=CAM_PMU01005MF1/32W5%100K

27 29 30 35

5 6 7 8 10 14 16 17 27 29 30 32 34 35 43

11 28

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NC

OUT

NC

NC

NCNCNC

IN

IN

IN

OUT

OUT

IN

OUT

BI

IN OUT

NC

NC

SYM 4 OF 4

VSSVSS

VSSVSSVSSVSSVSS

VSS

VSSVSSVSSVSSVSSVSSVSS

VSS

TEMPERATURE

REFERENCE

RESET

I2C

SYM 3 OF 4

GPIO

GPIO1

GPIO3GPIO4GPIO5GPIO6

GPIO2

GPIO9GPIO10GPIO11GPIO12GPIO15

SCL

IRQ*

SDA

CRASH*

VREF

IREF

VRTC

RESET_IN

TCAL

TDEV2TDEV1

AMUX_AY

ATM

Power Filtering

ISP I2CLPDP Filters

IO Filters

<-- This one on MLBWide Camera ConnectorPlug: 516S00314Rcpt: 516S00313

29 OF 51

GND_VOID

GND_VOID

GND_VOID

GND_VOID

GND_VOID

GND_VOID

9.0.0

evt-1

39 OF 80

051-02221

21

R3905

21

FL3901

2

1 C3909

2

1 C392521

FL3903

2

1 C3928

2

1 C399521

FL3995

2

1 C39902

1 C39912

1 C3992

2

1 C3993

2

1 C3994

2

1 C3996

21

C3950

21

C3951

21

R3901

2

1 C3901

2

1 C390021

R3900

32

31

3029

2827

2625242322212019181716151413121110987654321

J3900

21

C3960

2

1 C3961

21

C3940

21

C3941

21

C3930

21

C3931

21

R3908

21

R3907

2

1 C3908

2

1 C3907

2

1 C3906

PP_CAM_VCM_PVDD_CONN

PP1V8_CAM_WIDE_VDDIO_CONN

PP3V3_SVDD

PP2V85_VAR_CAM_VCM_PVDD

90_LPDP_WIDE_TO_AP_D1_CONN_N90_LPDP_WIDE_TO_AP_D1_CONN_P

90_LPDP_WIDE_TO_AP_D0_CONN_P

90_LPDP_WIDE_TO_AP_D2_CONN_P

AP_TO_WIDE_CLK_CONN

90_LPDP_WIDE_TO_AP_D2_CONN_N

PP1V1_CAM_WIDE_DVDD_CONN

PP_CAM_WIDE_ADC

PP1V8_CAM_WIDE_VDDIO_CONNWIDE_TO_TELE_SYNC_J3900_CONNAP_TO_WIDE_SHUTDOWN_CONN_L

WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONNI2C0_ISP_TO_WIDE_RCAM_OIS_SCL_CONNI2C0_ISP_BI_WIDE_RCAM_OIS_SDA_CONN

LPDP_WIDE_BI_AP_AUX_CONN

PP1V1_CAM_WIDE_DVDD_CONN

PP_CAM_VCM_PVDD_CONNPP3V3_SVDD

PP2V85_CAM_WIDE_AVDD

90_LPDP_WIDE_TO_AP_D0_CONN_N

I2C0_ISP_SCL

WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN

I2C0_ISP_SDA

PP2V85_CAM_WIDE_AVDDPP_CAM_WIDE_ADCPP_CAM_VCM_PVDD_CONN

PP1V1_CAM_WIDE_DVDD PP1V1_CAM_WIDE_DVDD_CONN

PP1V8_IO

LPDP_WIDE_BI_AP_AUX_CONNLPDP_WIDE_BI_AP_AUX

90_LPDP_WIDE_TO_AP_D2_N

90_LPDP_WIDE_TO_AP_D2_P

90_LPDP_WIDE_TO_AP_D1_N

90_LPDP_WIDE_TO_AP_D1_P

90_LPDP_WIDE_TO_AP_D0_N

90_LPDP_WIDE_TO_AP_D2_CONN_N

90_LPDP_WIDE_TO_AP_D2_CONN_P

90_LPDP_WIDE_TO_AP_D1_CONN_N

90_LPDP_WIDE_TO_AP_D1_CONN_P

90_LPDP_WIDE_TO_AP_D0_CONN_N

90_LPDP_WIDE_TO_AP_D0_CONN_P

WIDE_AND_TELE_TO_STROBE_DRIVER_STROBE

90_LPDP_WIDE_TO_AP_D0_P

AP_TO_WIDE_SHUTDOWN_L

CKPLUS_WAIVE=I2C_PULLUP

I2C0_ISP_TO_WIDE_RCAM_OIS_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C0_ISP_BI_WIDE_RCAM_OIS_SDA_CONN

AP_TO_WIDE_CLK_CONN

AP_TO_WIDE_SHUTDOWN_CONN_L

AP_TO_WIDE_CLK

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

CAMERA: B2B Wide (WY)

GND_VOID=TRUE

0.1UF

01005

ROOM=B2B_WIDE_RCAM

6.3VX5R-CERM

20%

0.1UF

GND_VOID=TRUE

01005

ROOM=B2B_WIDE_RCAM

6.3VX5R-CERM

20%

01005

0.1UF

GND_VOID=TRUEROOM=B2B_WIDE_RCAM

6.3VX5R-CERM

20%

0.1UF

GND_VOID=TRUE

01005

ROOM=B2B_WIDE_RCAM

6.3VX5R-CERM

20%

220PF

C0G-CERM10V

ROOM=B2B_WIDE_RCAM

5%

01005

220PF10V5%

ROOM=B2B_WIDE_RCAM01005C0G-CERM

ROOM=B2B_WIDE_RCAM

MF1/32W

49.9

1%

01005

ROOM=B2B_WIDE_RCAM

0201

33-OHM-25%-1500MA

2.2UF

ROOM=B2B_WIDE_RCAM

6.3VX5R-CERM0201

20%

OMIT_TABLE

ROOM=B2B_TELE_RCAM

6.3VX5R-CERM0201

2.2UF20%

OMIT_TABLE

ROOM=B2B_TELE_CAM0201

33-OHM-25%-1500MA

15PF16V5%

ROOM=B2B_WIDE_RCAM

NP0-C0G-CERM01005

NOSTUFF

ROOM=B2B_WIDE_RCAM

0.1UF

01005

6.3VX5R-CERM20%

01005-1ROOM=B2B_WIDE_RCAM

10-OHM-750MA

01005

5%

ROOM=B2B_WIDE_RCAM

10VC0G-CERM

220PF

ROOM=B2B_WIDE_RCAM

5%

01005

10VC0G-CERM

220PF5%220PF

ROOM=B2B_WIDE_RCAM01005

10VC0G-CERM

220PF

C0G-CERM10V5%

01005ROOM=B2B_WIDE_RCAM

220PF5%

01005

10VC0G-CERM

ROOM=B2B_WIDE_RCAM

ROOM=B2B_WIDE_RCAM

5%10VC0G-CERM01005

220PF

01005

0%1/32W

0.00

ROOM=B2B_WIDE_RCAM

MF

9

31

8

8

8

8

9

9

9

9

9

9

0.1UF

GND_VOID=TRUE

01005

ROOM=B2B_WIDE_RCAM

6.3VX5R-CERM

20%

GND_VOID=TRUE

0.1UF

01005

ROOM=B2B_WIDE_RCAM

6.3VX5R-CERM

20%

01005MF

0%

0.00

1/32W

ROOM=B2B_WIDE_RCAM 5%

01005

25V

56PF

NP0-C0G-CERM

ROOM=B2B_WIDE_RCAM

25V5%56PF

01005NP0-C0G-CERM

ROOM=B2B_WIDE_RCAM

01005MF

1/32W

0.00

0%

ROOM=B2B_WIDE_RCAM

ROOM=B2B_WIDE_RCAM

AA26DK-S026VA1F-ST-SM

01005

0.1UF

ROOM=B2B_WIDE_RCAM

6.3VX5R-CERM

20%

01005ROOM=B2B_WIDE_RCAM

MF1/32W0%

0.0001005

25V5%

NP0-C0G-CERM

56PF

ROOM=B2B_WIDE_RCAM

56PF

01005

5%25V

ROOM=B2B_WIDE_RCAM

NP0-C0G-CERM

NOSTUFF

30 29

29

35 30 29 28 27

27

29

29

29

29

29

29

29

29 27

29

30

29

30 29

29

29

29

29

30 29

35 30 29 28 27

29 27

29

30 29

29 27

29 27

30 29

27 29

43 35 34 32 30 28 27 17 16 14 10 8 7 6 5

29

29

29

29

29

29

29

29

29

29

29

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

BI

OUT

IN

IN

BI

IN

IN

IN

IN

IN

BI

BI

<-- This one on MLB

Tele Camera ConnectorRcpt: 516S00313Plug: 516S00314

ISP I2C

IO Filters

Power Filtering

LPDP

30 OF 51

GND_VOID

GND_VOID

GND_VOID

GND_VOID

GND_VOID

GND_VOID

9.0.0

evt-1

40 OF 80

051-02221

2

1R4003

21

R4005

21

FL4003

2

1 C40252

1 C4028

2

1 C401721

FL4001

2

1 C40902

1 C40912

1 C4092

2

1 C4093

2

1 C4094

2

1 C4096

21

C4050

21

C4051

32

31

3029

2827

2625242322212019181716151413121110987654321

J4000

21

C4060

2

1 C4061

21

R4000

2

1 C4001

2

1 C4000

21

R4001

21

C4041

21

C4040

21

C4031

21

C4030

2

1 C4006

2

1 C4008

21

R4010

2

1 C4010

2

1 C400721

R4007

PP1V1_CAM_TELE_DVDD

AP_TO_TELE_SHUTDOWN_CONN_L

PP1V8_IO

PP1V8_CAM_TELE_VDDIO_CONN

PP_CAM_VCM_PVDD_CONN

AP_TO_TELE_CLK_CONN

PP_CAM_VCM_PVDD_CONN

PP2V85_CAM_TELE_AVDDPP_CAM_TELE_ADC

90_LPDP_TELE_TO_AP_D2_CONN_P

PP1V1_CAM_TELE_DVDD_CONN

90_LPDP_TELE_TO_AP_D0_CONN_P

90_LPDP_TELE_TO_AP_D1_CONN_N

90_LPDP_TELE_TO_AP_D2_CONN_N

WIDE_TO_TELE_SYNC_J4000_CONNAP_TO_TELE_SHUTDOWN_CONN_L

I2C1_ISP_BI_TELE_RCAM_OIS_SDA_CONNI2C1_ISP_TO_TELE_RCAM_OIS_SCL_CONN

WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONNLPDP_TELE_BI_AP_AUX_CONN

PP1V1_CAM_TELE_DVDD_CONN

PP3V3_SVDD

90_LPDP_TELE_TO_AP_D1_CONN_P

90_LPDP_TELE_TO_AP_D0_CONN_N

WIDE_AND_TELE_TO_LED_DRIVER_STROBE_EN_CONN

I2C1_ISP_SCL

WIDE_TO_TELE_SYNC_J4000_CONN

I2C1_ISP_BI_TELE_RCAM_OIS_SDA_CONNCKPLUS_WAIVE=I2C_PULLUP

PP1V8_CAM_TELE_VDDIO_CONN

90_LPDP_TELE_TO_AP_D0_CONN_P

90_LPDP_TELE_TO_AP_D2_N

LPDP_TELE_BI_AP_AUX

90_LPDP_TELE_TO_AP_D0_N

90_LPDP_TELE_TO_AP_D0_P

90_LPDP_TELE_TO_AP_D1_CONN_P

90_LPDP_TELE_TO_AP_D1_N

90_LPDP_TELE_TO_AP_D2_CONN_N

90_LPDP_TELE_TO_AP_D0_CONN_N

90_LPDP_TELE_TO_AP_D1_P

90_LPDP_TELE_TO_AP_D2_CONN_P90_LPDP_TELE_TO_AP_D2_P

I2C1_ISP_SDA

90_LPDP_TELE_TO_AP_D1_CONN_N

LPDP_TELE_BI_AP_AUX_CONN

WIDE_TO_TELE_SYNC_J3900_CONN

AP_TO_TELE_SHUTDOWN_L

AP_TO_TELE_CLK_CONNAP_TO_TELE_CLK

PP2V85_CAM_TELE_AVDD

I2C1_ISP_TO_TELE_RCAM_OIS_SCL_CONNCKPLUS_WAIVE=I2C_PULLUP

PP1V1_CAM_TELE_DVDD_CONN

PP_CAM_VCM_PVDD_CONNPP_CAM_TELE_ADC

PP3V3_SVDD

CAMERA: B2B Tele (MT)SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

MF

ROOM=B2B_TELE_RCAM

1/32W0%

0.00

01005

ROOM=B2B_TELE_CAM

20K

01005

1/32W1%

MF

ROOM=B2B_TELE_RCAM

49.9

1%

MF01005

1/32W

ROOM=B2B_TELE_CAM

33-OHM-25%-1500MA

0201

ROOM=B2B_TELE_RCAM

6.3VX5R-CERM0201

2.2UF20%

OMIT_TABLE NOSTUFF

ROOM=B2B_TELE_RCAM

5%16V

01005NP0-C0G-CERM

15PF

ROOM=B2B_TELE_RCAM01005X5R-CERM20%6.3V0.1UF

10-OHM-750MA

01005-1ROOM=B2B_TELE_RCAM

01005

220PF

ROOM=B2B_TELE_RCAM

C0G-CERM10V5%

ROOM=B2B_TELE_RCAM

220PF

C0G-CERM10V

01005

5%

ROOM=B2B_TELE_RCAM

220PF

C0G-CERM10V

01005

5%

ROOM=B2B_TELE_RCAM

220PF

C0G-CERM10V

01005

5%

220PF

C0G-CERM10V

01005

5%

ROOM=B2B_TELE_RCAM

ROOM=B2B_TELE_RCAM

10V

01005C0G-CERM

220PF5%

9

9

9

9

9

9

9

29

30 29

8

8

8

8

20%

X5R-CERM6.3V

GND_VOID

01005

0.1UF

ROOM=B2B_TELE_RCAM

20%

X5R-CERM6.3V

GND_VOIDROOM=B2B_TELE_RCAM

0.1UF

01005

ROOM=B2B_TELE_RCAM

AA26DK-S026VA1F-ST-SM

20%

X5R-CERM6.3V

ROOM=B2B_TELE_RCAM

01005

0.1UF

5%56PF

01005NP0-C0G-CERM25V

ROOM=B2B_TELE_RCAM

1/32W

ROOM=B2B_TELE_RCAM

01005MF

0.00

0%

01005

56PF5%25VNP0-C0G-CERM

ROOM=B2B_TELE_RCAM

56PF5%25VNP0-C0G-CERM

ROOM=B2B_TELE_RCAM01005

ROOM=B2B_TELE_RCAM

0.00

1/32WMF

0%

01005

20%

X5R-CERM6.3V

GND_VOID

01005

0.1UF

ROOM=B2B_TELE_RCAM

20%

X5R-CERM6.3V

GND_VOIDROOM=B2B_TELE_RCAM

01005

0.1UF

20%

X5R-CERM6.3V

GND_VOID

01005

ROOM=B2B_TELE_RCAM

0.1UF

20%

X5R-CERM6.3V

GND_VOIDROOM=B2B_TELE_RCAM

0.1UF

01005

56PF

NOSTUFF

01005ROOM=B2B_TELE_RCAM

5%25VNP0-C0G-CERM

ROOM=B2B_TELE_RCAM

10V

220PF5%

01005C0G-CERM

ROOM=B2B_TELE_RCAM01005MF

1/32W

0.00

0%

01005

5%10VC0G-CERM

220PF

ROOM=B2B_TELE_RCAM

ROOM=B2B_TELE_RCAM01005

5%10VC0G-CERM

220PF

27

30

43 35 34 32 29 28 27 17 16 14 10 8 7 6 5

30

30 29

30

30 29

35 30 27

30 27

30

30

30

30

30

30

30

30

30

30 29

30

30

35 30 29 28 27

30

30

30

30

30

30

30

30

30

30

30

30

30

35 30 27

30

30

30 29

30 27

35 30 29 28 27

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

OUT

OUT

OUT

OUT

BI

BI

IN

BI

IN

IN

BI

IN

LED STROBE DRIVERS (NEON)APN:353S00558I2C Address (7-bit): 0x63

INT 300K PD

INT 300K PD

INT 300K PD

INT 300K PD

APN:353S00868I2C Address (7-bit): 0x67

INT 300K PD

INT 300K PD

31 OF 51

9.0.0

evt-1

41 OF 80

051-02221

2

1C4196

2

1C41912

1C4192

D2

C3

B1

B2

A3B3

C1

D1

D3

A2

C2

A1

U4100

D2

C3

B1

B2

A3B3

C1

D1

D3

A2

C2

A1

U4120

2

1 C41062

1 C4105

2

1

L4100

2

1 C41212

1 C4122

2

1 C41012

1 C4102

2

1 C41262

1 C4125

2

1

L4120

STROBE_MODULE_NTC

STROBE_MODULE_NTC

PP_LED2_BOOST_OUT

LED_DRIVER1_LX

PP_STROBE_WARM_WIDE_LED

PP_STROBE_COOL_ZOOM_LED

I2C3_ISP_SCL

I2C3_ISP_SCL

I2C3_ISP_SDABB_TO_STROBE_DRIVER_GSM_BURST_IND

PP_LED1_BOOST_OUT

PP_STROBE_COOL_WIDE_LED

PP_STROBE_WARM_ZOOM_LEDWIDE_AND_TELE_TO_STROBE_DRIVER_STROBE

CAMPMU_TO_STROBE_DRIVER_HWEN

I2C3_ISP_SDABB_TO_STROBE_DRIVER_GSM_BURST_IND

WIDE_AND_TELE_TO_STROBE_DRIVER_STROBE

CAMPMU_TO_STROBE_DRIVER_HWEN

LED_DRIVER2_LX

PP_VDD_MAIN

CAMERA: Strobe DriversSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

20%18UF

CER-X5R

ROOM=STROBE20402-0.1MM

6.3V

20%6.3V

ROOM=STROBE

0402-0.1MMCER-X5R

18UF

ROOM=STROBE

220PF

C0G-CERM10V5%

01005

CRITICALROOM=STROBE2

DSBGALM3566

LM35662

CRITICAL

DSBGAROOM=STROBE2

20%18UF

0402-0.1MMCER-X5R6.3V

ROOM=STROBE

5%

ROOM=STROBE01005C0G-CERM10V

220PFCRITICAL

ROOM=STROBE

08061UH-20%-3.6A-0.062OHM

01005

5%10VC0G-CERM

220PF

ROOM=STROBE2ROOM=STROBE2

5%

01005

10VC0G-CERM

220PF

C0G-CERM

220PF10V5%

01005ROOM=STROBE

C0G-CERM

5%

ROOM=STROBE01005

10V

220PF

20%18UF

0402-0.1MMCER-X5R6.3V

ROOM=STROBE2

C0G-CERM

220PF

ROOM=STROBE01005

5%10V

ROOM=STROBE20806

CRITICAL

1UH-20%-3.6A-0.062OHM

31 28

31 29

50 36 31

35 34 31 28 8

35 34 31 28 8

35 34 31 28 8

35 34 31 28 8

50 36 31

31 29

31 28

33 31

33 31

33

33

33

33

50 46 45 43 42 41 34 27 23 21 19 18

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

TORCH/TEMPSDASCL

TX

HWEN

STROBE

GND

LED2

LED1

OUTIN

SW

TORCH/TEMPSDASCL

TX

HWEN

STROBE

GND

LED2

LED1

OUTIN

SW

IN

IN

IN

BI

IN

IN

BI

IN

IN

IN

FCAM I/O

NEW HAMPSHIRE POWER FCAM Connector<-- This one on MLB

Plug: 516S00245Rcpt: 516S00244

ISP I2C2

32 OF 51

9.0.0

evt-1

42 OF 80

051-02221

21

R4210

21

R4212

2

1 C4212

24

23

2221

2019

181716151413121110987654321

J4200

21R4221

21R4220

2

1 C4220

2

1 C4221

21

FL4204

2

1 C4205

2

1 C4203

2

1 C4201

21

FL4202

21

R4211

2

1 C4211

2

1 C4210

2

1 C4204

2

1 C4200

2

1 C4202

21

FL4200

AP_TO_FCAM_SHUTDOWN_CONN_L

I2C2_ISP_SCL

90_MIPI_FCAM_TO_AP_DATA0_P

PP1V1_FCAM_DVDD_CONN

I2C2_ISP_BI_FCAM_SAVAGE_SDA_CONNCKPLUS_WAIVE=I2C_PULLUP

I2C2_ISP_SDA

PP2V85_FCAM_AVDD_CONN

PP1V8_IO

90_MIPI_FCAM_TO_AP_DATA1_P

90_MIPI_FCAM_TO_AP_CLK_P90_MIPI_FCAM_TO_AP_CLK_N

90_MIPI_FCAM_TO_AP_DATA1_N

I2C2_ISP_TO_FCAM_SAVAGE_SCL_CONN

PP1V8_FCAM_VDDIO_CONN

AP_TO_FCAM_SHUTDOWN_CONN_LFCAM_TO_JULIET_SYNC_J4200

AP_TO_FCAM_CLK_CONN

90_MIPI_FCAM_TO_AP_DATA0_N

PP2V85_FCAM_AVDD_CONN

I2C2_ISP_BI_FCAM_SAVAGE_SDA_CONN

PP1V8_FCAM_VDDIO_CONN

FCAM_TO_JULIET_SYNC_J4530

CKPLUS_WAIVE=I2C_PULLUPI2C2_ISP_TO_FCAM_SAVAGE_SCL_CONN

PP1V1_FCAM_DVDD

PP2V85_FCAM_AVDD

AP_TO_FCAM_CLK_CONN

PP1V1_FCAM_DVDD_CONN

AP_TO_FCAM_JULIET_CLK

FCAM_TO_JULIET_SYNC_J4200

AP_TO_FCAM_SHUTDOWN_L

CAMERA: B2B FCAMSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

01005

0%

MF

ROOM=B2B_FCAM

1/32W

0.00

0.00

0%

MF01005

ROOM=B2B_FCAM

1/32W

35

100PF

NP0-C0G

ROOM=B2B_FCAM

16V

01005

5%

8

8

8 4

35 8

8

8

8

8

8

8

BB35K-RA18-3AF-ST-SM

ROOM=B2B_FCAM

0%1/32WMF

01005ROOM=B2B_FCAM

0.00

MF

0.00

ROOM=B2B_FCAM01005

0%1/32W

ROOM=B2B_FCAM

NP0-C0G-CERM5%25V56PF

01005

NP0-C0G-CERM

56PF5%25V

01005ROOM=B2B_FCAM

ROOM=B2B_FCAM

01005-1

10-OHM-750MA

220PF

C0G-CERM10V

01005

5%

ROOM=B2B_FCAM

220PF

C0G-CERM10V

ROOM=B2B_FCAM01005

5%

220PF

C0G-CERM10V

01005

5%

ROOM=B2B_FCAM

ROOM=B2B_FCAM

10-OHM-750MA

01005-1

1/32W

01005MF

0%

ROOM=B2B_FCAM

0.00

220PF5%10VC0G-CERM01005ROOM=B2B_FCAM

5%NP0-C0G-CERM

56PF

01005ROOM=B2B_FCAM

25V

X5R-CERM

ROOM=B2B_FCAM

01005

20%6.3V0.1UF

ROOM=B2B_FCAM

01005

0.1UF20%6.3VX5R-CERM

0.1UF20%6.3V

ROOM=B2B_FCAM

X5R-CERM01005

01005-1

10-OHM-750MA

ROOM=B2B_FCAM

32

32

35 32

32

43 35

34 30 29 28 27 17 16 14 10 8 7 6 5

35 32

32

32

32

32

32

35 32

32

35 32

27

27

32

32

32

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

BI

IN

IN

IN

OUT

OUT

OUT

OUT

BI

BI

MIC2 (ANC REF)

Plug: 516S00268

Strobe Connector

Strobe Filtering

Rcpt: 516S00267 <-- This one on MLB

HAWKING

Power Key Button

33 OF 51

GND33

GND

CKPLUS_WAIVE=MISS_N_DIFFPAIR

MAKE_BASE=TRUE

GND 33

9.0.0

evt-1

43 OF 80

051-02221

1817

1615

1413

1211

10987654321

J4300

2

1C4326

2

1C4324

2

1C4322

2

1C4320

2

1 C4330

21

FL4330

2

1R4330

2 1

FL4307

2 1

FL4306

21

FL4303

2 1

FL4305

2

1 C43032

1 C4304

2

1 C4307

2

1 C4306

2

1 C4305

21

C4301

21

C4300

21

FL4301

2

1 C4302

2 1

R4309

21

R4308

2

1 C4309

2

1 C4308

2

1C431021

R4310

2

1

DZ4310

REARMIC2_TO_CODEC_AIN2_CONN_N

BUTTON_POWER_KEY_L

BUTTON_POWER_KEY_CONN_L

PP_STROBE_COOL_ZOOM_LEDPP_STROBE_COOL_ZOOM_LED

PP_STROBE_WARM_ZOOM_LED

REARMIC2_TO_CODEC_BIAS_FILT_RET

PP_STROBE_WARM_WIDE_LED

STROBE_MODULE_NTC_CONNHAWKING_TO_CODEC_AIN5_P_CONN

PP1V8_HAWKING_CONNI2C1_AP_TO_MIC2_SCLI2C1_AP_BI_MIC2_SDA

PP_CODEC_TO_REARMIC2_BIAS_CONN

REARMIC2_TO_CODEC_AIN2_CONN_PREARMIC2_TO_CODEC_AIN2_CONN_N

PP_STROBE_COOL_ZOOM_LED

PP_STROBE_WARM_WIDE_LED

PP_STROBE_COOL_WIDE_LED

PP_STROBE_WARM_ZOOM_LED

PP_STROBE_COOL_WIDE_LED

I2C1_AP_SCL

I2C1_AP_SDA I2C1_AP_BI_MIC2_SDA

I2C1_AP_TO_MIC2_SCL

HAWKING_TO_CODEC_AIN5_C_P

STROBE_MODULE_NTC

REARMIC2_TO_CODEC_AIN2_N

HAWKING_TO_CODEC_AIN5_N

STROBE_MODULE_NTC_CONN

REARMIC2_TO_CODEC_AIN2_P

HAWKING_TO_CODEC_AIN5_P_CONN

PP1V8_HAWKING_CONN

PP_CODEC_TO_REARMIC2_BIAS_CONN

REARMIC2_TO_CODEC_AIN2_CONN_P

BUTTON_POWER_KEY_CONN_L

PP_CODEC_TO_REARMIC2_BIAS

PP1V8_HAWKING

HAWKING_TO_CODEC_AIN5_P

CAMERA: B2B Strobe + Hold ButtonSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

31

20

ROOM=B2B_STROBE

AA36D-S010VA1F-ST-SM

01005

5%

ROOM=B2B_STROBE

10VC0G-CERM

220PF

ROOM=B2B_STROBE01005

5%10V

C0G-CERM

220PF

ROOM=B2B_STROBE01005

5%10V

C0G-CERM

220PF

01005ROOM=B2B_STROBE

5%10V

C0G-CERM

220PF

220PF10V

01005

5%

ROOM=B2B_STROBE

C0G-CERM

150OHM-25%-200MA-0.7DCR

ROOM=B2B_STROBE

01005

ROOM=B2B_STROBE01005

MF1/32W0.5%27K

37

37

37

37

150OHM-25%-200MA-0.7DCR

ROOM=B2B_STROBE

01005

150OHM-25%-200MA-0.7DCR

ROOM=B2B_STROBE

01005

150OHM-25%-200MA-0.7DCR

01005ROOM=B2B_STROBE

150OHM-25%-200MA-0.7DCR

01005ROOM=B2B_STROBE

OMIT_TABLE

X5R-CERM0201

6.3V20%2.2UF

ROOM=B2B_STROBE ROOM=B2B_STROBE01005

5%10VC0G-CERM

220PF

ROOM=B2B_STROBE

NP0-C0G-CERM

56PF25V

01005

5%

ROOM=B2B_STROBE

NP0-C0G-CERM25V

56PF

01005

5%

ROOM=B2B_STROBE

5%

01005

10VC0G-CERM

220PF

ROOM=B2B_STROBE

CER-X5R

0.22UF

01005

10%6.3V

ROOM=B2B_STROBE

0.22UF

10%6.3V

CER-X5R01005

150OHM-25%-200MA-0.7DCR

01005ROOM=B2B_STROBE

5.5V-6.2PFROOM=B2B_STROBE

0201

01005

5%25V

56PF

NP0-C0G-CERM

ROOM=B2B_STROBE

49 10

49 10

0.00

0%1/32W

ROOM=B2B_STROBE

MF01005

0.00

ROOM=B2B_STROBE

0%

MF1/32W

01005

NP0-C0G-CERM01005

5%25V56PF

ROOM=B2B_STROBE

25V56PF5%NP0-C0G-CERM01005ROOM=B2B_STROBE

0201NP0-C0G

27PF5%

6.3V

ROOM=B2B_STROBE

ROOM=B2B_STROBE01005MF

5%1/32W

100

33

33

33 31 33 31

33 31

38

33 31

33

33

33

33

33

33

33

33

33 31

33 31

33 31

33 31

33 31

33

33

33

33

33

33

33

33

38

27

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

OUT

PWR

SIGNAL

PWR

OUT

OUT

OUT

OUT

IN

IN

Rigel Driver

Terminate @ Cap via on VDD_MAIN plane.

34 OF 51

9.0.0

evt-1

44 OF 80

051-02221

2

1 C4498

21

R4400 2

1 C4412

2

1 C4401

2 1

XW4400

2

1 C4497

C8C7

E1D2D1

E10D9D10K8

K7K6K5K4

H5 A3 A2 A1 A9 A8 A10

F2 F1 E2 F9 F10

E9F5H8 C5

B2B1

B9B10

G9

G2

J3J2J1

K10J10H10

H4

B8

B5

B7

B6

D4

A4

A6A5

J8 J7 J6 J5 J4 C2 C1 C9 C10

G6G5

C4

G4

A7

H7

G10

G1

K3K2K1

H3H2H1

J9K9H9

B4

G7 E6 F8 E5 F3 D7 D6 D5 C3C6G8

G3 H6 F6

B3

D3

D8

E3

E8

U44002

1 C4400

21

L4400

2

1 C4421

2

1 C441121

L4401

2

1 C44202

1 C4405

2

1 C4410

2

1C4494

2

1C4493

2

1C4492

2

1C4491

2

1C4490

2

1 C44962

1 C4495

2

1C4422

I2C3_ISP_SDA

RIGEL_LSCP

I2C3_ISP_SCLI2C3_ISP_SDA_U4400

RIGEL_TO_ISP_INT

AP_TO_RIGEL_CLK

PP_ROMEO_A_ANODE

PP_ROMEO_B_ANODE

PP_ROMEO_SPARSE_ANODE

PP_ROSALINE_ANODE

PP_RIGEL_BUCK_BOOST_B

PP_ROMEO_DENSE_ANODE

RIGEL_VLXB

RIGEL_BOOSTSDA

RIGEL_BOOSTSDBRIGEL_BULKSDB

RIGEL_VCXB

RIGEL_VCXA

RIGEL_BULKSDA

RIGEL_VLXA

JULIET_PMU_TO_RIGEL_STROBE

MAMA_BEAR_BI_RIGEL_STATUS

CAMPMU_TO_RIGEL_ENABLEYOGI_TO_RIGEL_STATUS

ROMEO_TO_RIGEL_VCSEL_NTC

PP_VDD_BOOST

PP1V8_IOPP_VANA

PP_RIGEL_VINCORE

PP_VDD_MAIN

PP_RIGEL_BUCK_BOOST_APP_ROMEO_CATHODE

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

PEARL: Power

ROOM=RIGEL

5%220PF

C0G-CERM10V

01005

01005

10VC0G-CERM

220PF5%

ROOM=RIGEL

SHORT-20L-0.05MM-SM

OMIT

ROOM=RIGEL

ROOM=RIGEL

CER-X5R0402-0.1MM

18UF6.3V20%

35 31 28 8

35 31 28 8

20 8 4

8

35 11

28 4

35

CRITICAL

STB600B0WLCSP

ROOM=RIGEL

20%

X5R

ROOM=RIGEL0402

4.7UF16V

ROOM=RIGELPIWA20120H-SM

0.47UH-20%-4A-0.048OHM

X5R6.3V

01005ROOM=RIGEL

10%0.01UF

20%

X5R

ROOM=RIGEL0402

16V

4.7UFROOM=RIGEL

PIWA20120H-SM

0.47UH-20%-4A-0.048OHM

X5R6.3V10%

ROOM=RIGEL01005

0.01UF

20%

X5R0402

4.7UF16V

ROOM=RIGEL

20%

X5RROOM=RIGEL

4.7UF

0402

16V

ROOM=RIGEL

6.3VCERM-X5R

0201

4UF20%

ROOM=RIGEL

6.3VCERM-X5R

0201

4UF20%

6.3V

ROOM=RIGEL

CERM-X5R0201

4UF20%

ROOM=RIGEL

6.3VCERM-X5R

0201

4UF20%

1.0UF10V20%

0201-1X5R-CERM

ROOM=RIGEL

1.0UF

X5R-CERM

ROOM=RIGEL0201-1

10V20%

1.0UF

0201-1X5R-CERM10V20%

ROOM=RIGEL

X5R6.3V

ROOM=RIGEL01005

0.01UF10%

CERM-X5R6.3V

4UF20%

0201ROOM=RIGEL

35 28

36 28

1%

01005

1/32WMF

33.2

35

35

35

36

35 4

50 38 27 21 19

43 35 32 30 29 28 27 17 16 14 10 8 7 6 5

50 46 45 43 42 41 31 27 23 21 19 18

35 4

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

IN

OUT

IN

IN

IN

IN

LSCP

PD1PD0

SCLSDA

INT

MCLK

TEST

TESTMODE2

VINS

UBIOUT2

IOUT3

IOUT4

IOUT2

IOUT1IOUT1IOUT1

IOUT2

VBBOUTBVBBOUTBVBBOUTB

IOUT0IOUT0IOUT0

VLXBVLXB

VLXB

BOOSTSDA

BOOSTSDBBULKSDB

VCXBVCXB

VCXAVCXA

BULKSDA

VBBOUTA

VBBOUTA

VLXA

VLXAVLXA

PGND

B

PGND

APG

NDA

GND

S

GND

SG

NDS

PGND

B

GND

S

GND

S

GND

SG

NDS

GND

S

GND

S

GND

CORE

2

GND

CORE

GND

D

GND

CORE

3

PGND

K

PGND

KPG

NDK

GND

CORE

4

PGND

KPG

NDK

TESTMODE

STROBETHROTXEF0

ENA

OTPHV

TAMP

XEF1

NTC

VKVKVKVK

VINS

DAVI

NSDA

VINS

DA

VINS

UAVI

NSUA

VINS

UA

VINS

DB

VINS

DB

VANA

VINV

CORE

2

VDDI

O

VCC4

VCC3

VIN_

LVT

VINS

UBVI

NSUB

VINS

DB

VINC

ORE

VKVBBOUTA

BI

BI

Romeo Power Filtering

ISP I2C3

Romeo I/O

Juliet Power and I/O

Romeo Connector<-- This one on MLB

Plug: 516S00268Rcpt: 516S00267

<-- This one on MLBPlug: 516S00245Rcpt: 516S00244

Juliet Connector

35 OF 51

9.0.0

evt-1

45 OF 80

051-02221

21

R4563

21

R4560

2

1 C45972

1 C4596

2

1 C457021

XW4570

2

1 C457221

FL4572

2

1 C455421

FL4554

2

1 C45742

1 C457521

FL4574

2

1 C4564

21

FL4561

2

1 C4563

2

1C4562

2

1 C4560

2

1 C455621

FL4556

21

FL4555

2

1 C4555

2

1 C4571

2

1 C4573

2

1 C45932

1 C45942

1 C45952

1 C4592

2

1 C455221

R4552

21

R4553

2

1 C4553

1817

1615

1413

1211

10987654321

J4500

24

23

2221

2019

181716151413121110987654321

J4530AP_TO_JULIET_SHUTDOWN_L_CONN

PP_ROMEO_DENSE_ANODEPP_ROMEO_SPARSE_ANODEPP_ROMEO_CATHODEPP3V3_SVDD

PP_ROMEO_B_ANODEPP_ROMEO_A_ANODE

AP_TO_FCAM_JULIET_CLK

JULIET_PMU_TO_RIGEL_STROBE

PP_ROMEO_DENSE_ANODE

PP_ROMEO_SPARSE_ANODE

PP_ROMEO_CATHODE

PP_ROMEO_CATHODE

PP3V3_SVDDROMEO_TO_RIGEL_VCSEL_NTC_CONNMAMA_BEAR_BI_RIGEL_STATUS_CONNI2C3_ISP_TO_MAMA_BEAR_SCL_CONN

I2C2_ISP_TO_FCAM_SAVAGE_SCL_CONNI2C2_ISP_BI_FCAM_SAVAGE_SDA_CONN

AP_TO_JULIET_SHUTDOWN_L_CONN

FCAM_TO_JULIET_SYNC_J4530JULIET_PMU_TO_RIGEL_STROBE_CONN

PP_ROMEO_DENSE_ANODE

PP1V8_JULIET_VDDIO_CONN

PP2V85_JULIET_AVDD_CONN

PP2V85_JULIET_AVDD_CONN

PP1V8_JULIET_VDDIO_CONNPP1V8_IO

PP2V85_CAM_TELE_AVDD

PP1V1_JULIET_DVDD_CONN

ROMEO_TO_AOP_B2B_DETECT

I2C3_ISP_TO_MAMA_BEAR_SCL_CONNCKPLUS_WAIVE=I2C_PULLUP

I2C3_ISP_SDA

ROMEO_TO_RIGEL_VCSEL_NTC

MAMA_BEAR_BI_RIGEL_STATUS

PP_ROMEO_CATHODE

PP_ROMEO_SPARSE_ANODE

PP_ROMEO_CATHODE

I2C3_ISP_BI_MAMA_BEAR_SDA_CONNROMEO_TO_AOP_B2B_DETECT_CONN

PP_ROMEO_B_ANODEPP_ROMEO_A_ANODE

MAMA_BEAR_BI_RIGEL_STATUS_CONN

AP_TO_JULIET_CLK_CONN

I2C3_ISP_BI_MAMA_BEAR_SDA_CONNCKPLUS_WAIVE=I2C_PULLUP

ROMEO_TO_AOP_B2B_DETECT_CONN

FCAM_TO_JULIET_SYNC_J4530

ROMEO_TO_RIGEL_VCSEL_NTC_CONN I2C3_ISP_SCL

AP_TO_JULIET_CLK_CONN

90_MIPI_JULIET_TO_AP_DATA0_N90_MIPI_JULIET_TO_AP_DATA0_P

PP1V1_JULIET_DVDD_CONN

90_MIPI_JULIET_TO_AP_CLK_P90_MIPI_JULIET_TO_AP_CLK_N

90_MIPI_JULIET_TO_AP_DATA1_P90_MIPI_JULIET_TO_AP_DATA1_N

JULIET_PMU_TO_RIGEL_STROBE_CONN

AP_TO_JULIET_SHUTDOWN_L

PP1V1_CAM_TELE_JULIET_DVDD

PEARL: B2B Romeo + Juliet

SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

10V

220PF5%

C0G-CERM01005ROOM=B2B_PEARL

25V

01005

5%56PF

NP0-C0G-CERM

ROOM=B2B_PEARL

ROOM=B2B_PEARL01005

0.00

0%1/32WMF

ROOM=B2B_PEARL01005

1/32W0%

0.00

MF

ROOM=B2B_PEARL01005

25V5%56PF

NP0-C0G-CERM

ROOM=B2B_PEARL

AA36D-S010VA1F-ST-SM

ROOM=B2B_PEARL

F-ST-SMBB35K-RA18-3A

0%

MF

ROOM=B2B_PEARL01005

1/32W

0.00

1/32W

ROOM=B2B_PEARL01005MF

0%

0.00

ROOM=B2B_PEARL

220PF

01005C0G-CERM10V5%

220PF10VC0G-CERM01005ROOM=B2B_PEARL

5%

0.1UF

ROOM=B2B_PEARL

6.3V

01005

20%X5R-CERM

ROOM=B2B_PEARL

SHORT-01005

0.1UF

X5R-CERM20%6.3V

01005ROOM=B2B_PEARL

10-OHM-750MA

01005-1ROOM=B2B_PEARL

32

32

12

ROOM=B2B_PEARL

5%

01005

10VC0G-CERM

220PF

01005

150OHM-25%-200MA-0.7DCR

ROOM=B2B_PEARL

ROOM=B2B_PEARL

X5R-CERM20%6.3V

01005

0.1UF

ROOM=B2B_PEARL

220PF

C0G-CERM01005

5%10V

10-OHM-750MA

01005-1ROOM=B2B_PEARL

35 32

5%

ROOM=B2B_PEARL01005

10VC0G-CERM

220PF

34 11

32 8

8

ROOM=B2B_PEARL

01005

150OHM-25%-200MA-0.7DCR

ROOM=B2B_PEARL

220PF

01005

5%10VC0G-CERM

01005

25V

ROOM=B2B_PEARL

NP0-C0G-CERM

56PF5%

220PF

C0G-CERM

ROOM=B2B_PEARL01005

5%10V

34 28

34

34 31 28 8

34 31 28 8

ROOM=B2B_PEARL

C0G-CERM

5%10V

220PF

01005

01005

ROOM=B2B_PEARL

150OHM-25%-200MA-0.7DCR

01005

ROOM=B2B_PEARL

150OHM-25%-200MA-0.7DCR

01005C0G-CERM10V

220PF

ROOM=B2B_PEARL

5%

ROOM=B2B_PEARL

C0G-CERM

220PF10V5%

01005

ROOM=B2B_PEARL

C0G-CERM

220PF10V5%

01005

5%

01005C0G-CERM10V

220PF

ROOM=B2B_PEARL

5%10V

220PF

C0G-CERM01005ROOM=B2B_PEARL

C0G-CERM

ROOM=B2B_PEARL

220PF

01005

10V5%

35

35 34 4

35 34

35 34 4

35 30 29 28 27

35 34

35 34

35 34 4

35 34

35 34 4

35 34 4

35 30 29 28 27

35

35

35

35

35 32

35

35 34 4

35

35

35

35

43 34 32 30

29 28

27 17 16 14

10 8 7 6 5

30 27

35

35

35 34 4

35 34

35 34 4

35

35

35 34

35 34

35

35

35

35

35

35

8

8

35

8

8

8

8

35

27

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

PWR

SIGNAL

PWR

IN

BI

OUT

IN

OUT

IN

IN

IN

OUT

BI

IN

PROX/ALS I/O

Plug: 516S00326

MIC3

AOP I2C

PROX & ALS POWER

<-- This one on MLBRcpt: 516S00325

Rosaline + Misc ConnectorYogi Signals

SPEAKER2

36 OF 51

9.0.0

evt-1

46 OF 80

051-02221

2

1 C4635

2

1 C4636

2

1R461921

FL4619

21

XW4600

2

1 C4660

2

1C4634

2

1C4633

2

1C4631

2

1 C4632

2

1 C4630

2 1

FL4644

2

1 DZ4644

2

1 DZ464321

FL4643

2

1 C465021

FL4650

21

R4601

21

R4600

2

1 C4601

2

1 C4600

2

1 C46182 1

FL4618

2

1 C4617

21

R4611

2

1 C46132

1 C4614

2

1 DZ46422 1

FL4642

21

FL4641

2

1 DZ4641

21

FL4640

2

1 DZ4640

21

R4634

21

R4633

21

R4617

34

33

3231

3029

28272625242322212019181716151413121110987654321

J4600

01005

NOSTUFF

150OHM-25%-200MA-0.7DCRBB_TO_STROBE_DRIVER_GSM_BURST_IND_CONN

ROOM=B2B_PEARL

1/32W0%0.00

ROOM=B2B_PEARL01005

ROOM=B2B_PEARL

150OHM-25%-200MA-0.7DCR

PROX_BI_AP_AOP_INT_L

ROOM=B2B_PEARL

01005MF

10%

10%

BB_TO_STROBE_DRIVER_GSM_BURST_IND

AA26DK-S028VA1

ROOM=B2B_PEARL

F-ST-SM

ROOM=B2B_PEARL

150OHM-25%-200MA-0.7DCR

01005

37

37

5%10VC0G-CERM01005ROOM=B2B_PEARL

220PF

ROOM=B2B_PEARL

C0G-CERM

220PF

01005

10V5%

5%220PF

01005C0G-CERM

10V

ROOM=B2B_PEARL

C0G-CERM01005

10V5%

220PF

220PF10V

C0G-CERM

ROOM=B2B_PEARL

5%

01005

C0G-CERM

220PF

ROOM=B2B_PEARL01005

5%10V

ROOM=B2B_PEARL

SHORT-20L-0.05MM-SM

31 50

820PF10V

MF

0%

0.00

1/32W

01005ROOM=B2B_PEARL

820PF10VX5R01005ROOM=B2B_PEARL

01005ROOM=B2B_PEARL

MF1/32W0%

0.00

6.8V-100PF01005ROOM=B2B_PEARL

01005ROOM=B2B_PEARL

150OHM-25%-200MA-0.7DCR

6.8V-100PFROOM=B2B_PEARL

01005

ROOM=B2B_PEARL01005

150OHM-25%-200MA-0.7DCR

ROOM=B2B_PEARL

01005

6.8V-100PF01005ROOM=B2B_PEARL

220PF5%10V

01005ROOM=B2B_PEARL

C0G-CERM6.3V

ROOM=B2B_PEARL

0201

2.2UF

X5R-CERM

20%

0%

0.00

ROOM=B2B_PEARL01005MF

1/32W

5%10V

01005

220PF

C0G-CERM10V5%

ROOM=B2B_PEARL

25VNP0-C0G-CERM01005

56PF5%

56PF

NP0-C0G-CERM

ROOM=B2B_PEARL01005

25V5%

ROOM=B2B_PEARL

1/32WMF

01005

0.00

0%

0.00

0%1/32WMF

01005ROOM=B2B_PEARL

240

1%

12

12

12

12

37

50

50

36 50

36 50

01005

150OHM-25%-200MA-0.7DCR

ROOM=B2B_PEARL

28 34

220PF

C0G-CERM10V

01005

5%

ROOM=B2B_PEARL

ROOM=B2B_PEARL

150OHM-25%-200MA-0.7DCR

01005

ROOM=B2B_PEARL010056.8V-100PF

ROOM=B2B_PEARL

6.8V-100PF01005

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

PEARL: B2B Rosaline + Misc

CODEC_AOUT_TO_HAC_CONN_P

CODEC_AOUT_TO_HAC_N CODEC_AOUT_TO_HAC_CONN_N

FRONTMIC3_TO_CODEC_AIN3_CONN_N

CKPLUS_WAIVE=I2C_PULLUP

I2C0_AOP_TO_PROX_ALS_YOGI_SCL_CONN

PP3V0_S2

PP_ROSALINE_ANODE

PP3V0_YOGI_PROX_ALS_CONN

SPKRAMP_TOP_TO_COIL_OUT_NEGCODEC_AOUT_TO_HAC_CONN_P

PP_ROSALINE_ANODE

FRONTMIC3_TO_CODEC_AIN3_CONN_N

FRONTMIC3_TO_CODEC_BIAS_FILT_RET

COIL_TO_SPKRAMP_TOP_VSENSE_POS_CONN

SPKRAMP_TOP_TO_COIL_OUT_POS

YOGI_TO_RIGEL_STATUS_CONNI2C0_AOP_SCL

I2C0_AOP_BI_PROX_ALS_YOGI_SDA_CONNCKPLUS_WAIVE=I2C_PULLUP

I2C0_AOP_SDA

PP_CODEC_TO_FRONTMIC3_BIAS

CODEC_AOUT_TO_HAC_CONN_NSPKRAMP_TOP_TO_COIL_OUT_NEG

COIL_TO_SPKRAMP_TOP_VSENSE_NEG_CONN

I2C0_AOP_TO_PROX_ALS_YOGI_SCL_CONN

PROX_BI_AP_AOP_INT_CONN_L

PP_CODEC_TO_FRONTMIC3_BIAS_CONNFRONTMIC3_TO_CODEC_AIN3_CONN_P

YOGI_TO_RIGEL_STATUS_CONN

I2C0_AOP_BI_PROX_ALS_YOGI_SDA_CONN

ALS_TO_AOP_INT_CONN_L

PP_ROSALINE_ANODEBB_TO_STROBE_DRIVER_GSM_BURST_IND_CONN

SPKRAMP_TOP_TO_COIL_OUT_POS

COIL_TO_SPKRAMP_TOP_VSENSE_NEG

FRONTMIC3_TO_CODEC_AIN3_N

PP_CODEC_TO_FRONTMIC3_BIAS_CONN

COIL_TO_SPKRAMP_TOP_VSENSE_NEG_CONN

YOGI_TO_RIGEL_STATUS

SPKRAMP_TOP_TO_COIL_OUT_POS

COIL_TO_SPKRAMP_TOP_VSENSE_POSNOSTUFF

NOSTUFF

OMIT

OMIT_TABLE

CODEC_AOUT_TO_HAC_P

FRONTMIC3_TO_CODEC_AIN3_P

37

150OHM-25%-200MA-0.7DCRFRONTMIC3_TO_CODEC_AIN3_CONN_P

COIL_TO_SPKRAMP_TOP_VSENSE_POS_CONN

ROOM=B2B_PEARL01005X5R

SPKRAMP_TOP_TO_COIL_OUT_NEG

ROOM=B2B_PEARL

PP3V0_YOGI_PROX_ALS_CONN

PROX_BI_AP_AOP_INT_CONN_L

ROOM=B2B_PEARL

C0G-CERM

220PF

ALS_TO_AOP_INT_CONN_L01005

ALS_TO_AOP_INT_L

ROOM=B2B_PEARL01005MF

1/32W

36

36

36

36

36

19 45 47 48 50

34 36

36

36 50

36

34 36

36

38

36

36 50

36

36

38

36

36

36 50

36

36

36

36

36

36

36

36

34 36

36

36 50

36

36

36

36

36

36

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

BI

IN

IN

OUT

OUT

OUT

OUT

OUT

BI

BI

IN

INOUT

OUT

CALLAN AUDIO CODEC (ANALOG INPUTS & OUTPUTS)

37 OF 51

9.0.0

evt-1

47 OF 80

051-02221

2

1R4710

F9F10

B9A10

B10B11

G1

E1F1

F8E9

D9D10

E10E11

D8B8

K8L8

C2D3

F4E3

F3G4

G3G2

K5L5

K6L6

K4L4

K3L3

U4700

21

C4701

21

R4701

21

R4700

21

C4700

90_MIKEYBUS_DATA_P

90_MIKEYBUS_DATA_N

FRONTMIC3_TO_CODEC_AIN3_P

90_MIKEYBUS_CODEC_DATA_N90_MIKEYBUS_CODEC_DATA_P

CODEC_AOUT_TO_HAC_NCODEC_AOUT_TO_HAC_PLOWERMIC1_TO_CODEC_AIN1_P

LOWERMIC1_TO_CODEC_AIN1_N

REARMIC2_TO_CODEC_AIN2_PREARMIC2_TO_CODEC_AIN2_N

FRONTMIC3_TO_CODEC_AIN3_N

LOWERMIC4_TO_CODEC_AIN4_NLOWERMIC4_TO_CODEC_AIN4_P

PDM_CODEC_TO_SPKRAMP_TOP_DATA

PDM_CODEC_TO_ARC_CLK

MIKEYBUS_REFERENCE

HAWKING_TO_CODEC_AIN5_PHAWKING_TO_CODEC_AIN5_N

PDM_CODEC_TO_SPKRAMP_TOP_CLK

PDM_CODEC_TO_ARC_DATA

AUDIO: CODEC (1/2)SYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

100PF

01005

5%16V

NP0-C0G

ROOM=CODEC

ROOM=CODEC01005

20.0

1/32WMF

5%

01005

20.0

1/32WMF

5%

ROOM=CODEC

ROOM=CODEC01005

5%16V

NP0-C0G

100PF

36

36

41 4

41 4

49 48

48

50

50

33

33

49

49

36

36

33

33

49

49

100

ROOM=CODEC01005MF1/32W5%

ROOM=CODECCRITICAL

WLCSPCS42L75

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NCNC

NCNC

OUT

OUT

OUT

OUT

NCNC

INBI

BI

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

NCNC

NCNC

SYM 1 OF 3

AOUT-AOUT+

AIN3+

MBUS_REF

DNDP

AIN1+AIN1-

AIN2+AIN2-

AIN3-

AIN4+

AIN5+AIN5-

AIN6+AIN6-

AIN7+AIN7-

AIN8+AIN8-

DMIC1_CLKDMIC1_DATA

DMIC3_DATA

DMIC2_CLK

DMIC3_CLK

DMIC2_DATA

DMIC4_CLKDMIC4_DATA

PDMOUT1_CLKPDMOUT1_DATA

PDMOUT2_CLKPDMOUT2_DATA

PDMOUT3_CLKPDMOUT3_DATA

AIN4-

NCNC

NCNC

NCNC

CALLAN AUDIO CODEC (POWER & I/O)

38 OF 51

9.0.0

evt-1

48 OF 80

051-02221

21

R4831

2

1R4800

21

R4830

2

1 C4822

2

1 C48232

1 C4824

2

1 C4825

2 1

XW4802

2

1 C4821

E4

H3

J5J3G10

B2B3

C3A3

J4

C8B7

A5B4A4

E7

F7E8D7

D4

E5E6

J8J7J6H7H6H2H1G7G6G5F5H4

H5

C7

F6

A7

D11C10

C11C9

C5D6

C4D5

B6B5

A6C6

U4700

G11

B1 F2L9A2 A9C1 K2J2J1G9G8

H10H11

H8H9

J9K9

J10J11

K10K11

D1D2

L11

L10L7L1K7F11E2A11A8A1

K1L2

U4700

2

1 C4805

2

1 C4809

2

1 C48122

1 C4814

2

1 C4817

21

C4802

2

1 C48152

1 C4813

2

1 C4820

2

1 C4811

21

C4801

21

C4804

21

C4803

2

1 C4808

CODEC_AGND

PP_CODEC_TO_LOWERMIC4_BIAS

CODEC_LP_FILTPCODEC_LP_FILTN

CODEC_FILTP

PP1V8_S2

PP_CODEC_TO_FRONTMIC3_BIAS

REARMIC2_TO_CODEC_BIAS_FILT_RET

LOWERMIC1_BIAS_FILT_IN

PP_CODEC_TO_REARMIC2_BIASREARMIC2_BIAS_FILT_IN

FRONTMIC3_BIAS_FILT_IN

LOWERMIC4_BIAS_FILT_IN

LOWERMIC1_TO_CODEC_BIAS_FILT_RET

LOWERMIC4_TO_CODEC_BIAS_FILT_RET

FRONTMIC3_TO_CODEC_BIAS_FILT_RET

PP_CODEC_TO_LOWERMIC1_BIAS

PP1V8_AUDIO_VA_S2

PP_VDD_BOOST

PP1V2_CODEC_S2

PP1V8_S2

I2S_CODEC_ASP2_TO_AOP_DIN

I2S_CODEC_ASP3_TO_AP_DIN

CODEC_TO_AOP_GPIO2CODEC_TO_AOP_GPIO1

AOP_TO_CODEC_CLP_EN

I2S_AP_TO_CODEC_ASP3_DOUT

I2S_AP_TO_CODEC_ASP3_BCLK

SPI_AP_TO_CODEC_SCLKSPI_AP_TO_CODEC_CS_L

CODEC_TO_AP_INT_L

CODEC_TO_PMU_WAKE

I2S_AP_TO_CODEC_ASP3_LRCLK

I2S_AOP_TO_CODEC_ASP2_DOUTI2S_AOP_TO_CODEC_ASP2_LRCLKI2S_AOP_TO_CODEC_ASP2_BCLK

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

I2S_AOP_TO_CODEC_MCLK2

SPI_CODEC_TO_AP_MISO

I2S_AP_TO_CODEC_MCLK1

CODEC_AGND

AOP_TO_CODEC_RESET_L

I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

SPI_AP_TO_CODEC_MOSI

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_RI2S_AOP_AMPS_TO_CODEC_ASP1_DOUT

CODEC_TO_SPKRAMP_BOT_ARC_MCLK_R

CODEC_TO_SPKRAMP_BOT_ARC_MCLK

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

AUDIO: CODEC (2/2)

ROOM=CODEC0201X5R-CERM

2.2UF6.3V20%

OMIT_TABLE

2.2UF

ROOM=CODEC0201X5R-CERM6.3V20%

OMIT_TABLE

ROOM=CODEC01005X5R-CERM

0.1UF6.3V20%

0.1UF

X5R-CERM

ROOM=CODEC01005

20%6.3V

X5RROOM=CODEC0201-1

1.0UF6.3V20%

ROOM=CODEC

X5R-CERM1

4.7UF

402

6.3V20%

01005ROOM=CODEC

X5R-CERM6.3V20%0.1UF

X5R-CERM

0.1UF6.3V20%

01005ROOM=CODEC

0.1UF

ROOM=CODEC01005X5R-CERM20%6.3V

20%

ROOM=CODEC

10V

0402-0.1MMX5R-CERM

10UF

OMIT_TABLE

4.7UF

ROOM=CODEC402

X5R-CERM16.3V20%

ROOM=CODEC402

4.7UF

X5R-CERM16.3V20%

4.7UF

402ROOM=CODEC

X5R-CERM16.3V20%

20%10UF

0402-0.1MMROOM=CODEC

10VX5R-CERM

OMIT_TABLE

01005MF

ROOM=CODEC

1/32W1%

49.9

01005ROOM=CODEC

MF

100K5%

1/32W

12

33.2

MF01005

ROOM=CODEC

1%1/32W

50 41

12

12

12

12

50 49 41 12

50 49 41 12

49 41 12

12

12

12

10

10

10

10

10

20

10

12

50 41 12

10

10

10

10

49

36

33

49

1.0UF

ROOM=CODEC0201-1X5R6.3V20%

1.0UF

0201-1X5R6.3V20%

ROOM=CODEC ROOM=CODEC

X5R

1.0UF6.3V20%

0201-1

1.0UF

0201-1ROOM=CODEC

X5R6.3V20%

ROOM=CODEC

SHORT-10L-0.1MM-SM

ROOM=CODEC0201-1

6.3V1.0UF

X5R20%

CRITICAL

CS42L75

ROOM=CODEC

WLCSP

WLCSPCS42L75

ROOM=CODECCRITICAL

38

49

50 49 48 47 46 38 22 20 17 14 12 10

36

33

49

50 41 19

50 34 27 21 19

50 49 48 47 46 38 22 20 17 14 12 10

38

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

OUT

OUT

OUT

NCNC

NCNC

IN

IN

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

IN

NCNC

OUT

OUT

OUT

OUT

IN

IN

IN

OUT

IN

IN

IN

IN

NCNC

SYM 3 OF 3

GNDAGNDAGNDA

TSTITSTI

GNDAGNDA

GNDAGNDA

GNDAGNDA

GNDA

GNDAGNDA

RESET*

ASP2_SDOUT

ASP3_SDOUT

GPIO2GPIO1

JTAG_TDIJTAG_TDO

CLP_EN

SW2_CLKSW2_SD

SW1_SDSW1_CLK

DIGLDO_PULLDNDIGLDO_EN

ASP3_SDIN

ASP3_SCLK

CCLKCS*

INT*

WAKE*

JTAG_TCKJTAG_TMS

ASP3_LRCK/FSYNC

ASP2_SDINASP2_LRCK/FSYNCASP2_SCLK

ASP1_SDOUT

ASP1_LRCK/FSYNCASP1_SDIN

MCLK_OUT

ASP1_SCLK

MOSI

TSTIMCLK2_IN

MISO

MCLK1_IN

SYM 2 OF 3

FILT-FILT+

LP_FILT-LP_FILT+

VP_M

BUSVAVAVAVP

VD_F

ILT

VD_F

ILT VLVD

VL_S

W

MIC2_BIAS

MIC1_BIAS_FILT

GNDD

MIC2_BIAS_FILT

MIC5_BIASMIC5_BIAS_FILT

MIC4_BIASMIC4_BIAS_FILT

MIC6_BIAS_FILTMIC6_BIAS

MIC3_BIASMIC3_BIAS_FILT

MIC1_BIAS

GNDP

NCNCNCNC

South Speaker Amplifier on MLB Bottom

39 OF 51

9.0.0

evt-1

49 OF 80

051-02221

SYNC_DATE=08/25/2015

AUDIO: Speaker Amp Bottom

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

North Speaker Amplifier on MLB Bottom

40 OF 51

9.0.0

evt-1

50 OF 80

051-02221

AUDIO: Speaker Amp TopSYNC_DATE=08/25/2015

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

Pull Downs

0x82I2C ADDRESS: 1000 001x

ARC DRIVER

APN: 338S00296

41 OF 51

PP1V8_AUDIO_VA_S2

9.0.0

evt-1

51 OF 80

051-02221

21

L5100

2

1 C5136

E2E3

A5

B1A1

D1C1

F5

B2A2

B6

D7

D6

C7

E6

A6

D5

E7

F7

D2C2

B7

C6

F1E1

A7

D4D3C5C4C3B4B3A4A3 F2E4B5

F4

F6

F3

E5

U5100

2

1 C5128

2

1R5108

2

1C51302

1C51312

1C5125

2

1 C5126

2

1 C51272

1 C5134

2

1 C51352

1 C51372

1 C51242

1 C5138

2

1C51292

1 C5142

2

1 C5139

PP1V8_AUDIO_VA_S2MAKE_BASE=TRUE

SPKRAMP_BOT_ARC_TO_AOP_INT_L

I2C1_AOP_SCL

I2C1_AOP_SDA

PP_VDD_MAIN

PP_ARC1_VBOOST

PP1V8_AUDIO_VA_S2

ARC1_LX

ARC1_ISENSE_POS

I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT

PDM_CODEC_TO_ARC_CLK

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

CODEC_TO_SPKRAMP_BOT_ARC_MCLK

AOP_TO_SPKRAMP_BOT_ARC_RESET_L

ARC1_TO_SOLENOID1_OUT_NEGARC1_TO_SOLENOID1_OUT_POS

SOLENOID1_TO_ARC1_VSENSE_NEGSOLENOID1_TO_ARC1_VSENSE_POS

ARC1_ISENSE_NEG

ARC1_FILT

AOP_TO_SPKRAMP_BOT_ARC_RESET_L

PDM_CODEC_TO_ARC_DATA

ARC: DriverSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

01005X5R10V

470PF

ROOM=ARC_CTRL

10%

50 38 12

37 4

37 4

49 38 12

50 49 38 12

50 49 38 12

50 38

50 41 12

49

49

50 12

50 49 25 12 4

50 49 25 12 4

MEFE2016T-SMROOM=ARC_CTRL

CRITICAL

1.2UH-20%-3A-0.11OHM

2.2UF20%

0201

6.3VX5R-CERM

ROOM=ARC_CTRL

WLCSP

ROOM=ARC_CTRL

CS35L26C-A1

CRITICAL

20%

0402-0.1MM

10UF

X5R-CERM10V

ROOM=ARC_CTRL

X5R6.3V

ROOM=ARC_CTRL

10%

01005

0.01UF

MF

5%100K1/32W

01005ROOM=ARC_CTRL

6.3VCER-X5R

20%18UF

0402-0.1MMROOM=ARC_CTRL ROOM=ARC_CTRL

20%6.3V

CER-X5R0402-0.1MM

18UF20%4UF

0201

6.3V

ROOM=ARC_CTRL

CERM-X5R

ROOM=ARC_CTRL01005

220PF5%10VC0G-CERM

01005

0.1UF

ROOM=ARC_CTRL

X5R-CERM6.3V20%

0201

6.3V20%2.2UF

X5R-CERM

ROOM=ARC_CTRL

0201X5R-CERM

10%16V

ROOM=ARC_CTRL

0.1UF20%

0402-0.1MM

10UF

X5R-CERM10V

ROOM=ARC_CTRL

20%

0402-0.1MM

10UF

X5R-CERM10V

ROOM=ARC_CTRL

20%

0402-0.1MM

10UF

X5R-CERM10V

ROOM=ARC_CTRL

01005X5R10V

ROOM=ARC_CTRL

470PF10%

50 41 38 19

50 46 45 43 42 34 31 27 23 21 19 18 50 41 38 19

49

49

50 41 12

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

NC

IN

IN

OUT

IN

IN

IN

IN

IN

IN

BI

IN

BI

VP

PDM_CLK0

AD0/PDM_CLK1

VBST_A

SWSW

FILT+

GNDP GNDA

ISNS+ISNS-

VSNS+VSNS-

OUT+OUT-

VBST_A

VBST_BVBST_B

SDA

ALIVE/SYNC

MCLK

SCLK

LRCK/FSYNC

SDIN

SDOUT

SCL

VA

PDM_DATA0

PDM_DATA1 AD1

INT*

RESET*

Charge Pump 2 Caps

Charge Pump 1 Caps

Acorn PMU

Charge Pump 3 Caps

42 OF 51

9.0.0

evt-1

56 OF 80

051-02221

2

1 C5650

2

1 C5660

2

1 C5692

2

1 C5652

2

1 C5654

G4

H3B4

E1D1F1

E4

D4

A4

A2

A1

H2H4

B1

F4

C1

G3G2

H1

F3F2

E2E3

D2D3

C2C4

A3C3

B2B3

G1

U5600

2

1 C5611

2

1 C56122

1 C56512

1 C5642

2

1 C56412

1 C5621

2

1 C5631

2

1 C5632

2

1 C56402

1 C56452

1 C5655

2

1 C5653

2

1 C5691

2

1 C5690

2 1

L5600

ACORN_CP3_CAP2_NEG

ACORN_CP1_CAP1_NEGACORN_CP1_CAP1_POS

ACORN_CP1_CAP2_NEG

ACORN_CP2_CAP_NEG

ACORN_CP3_CAP1_POSACORN_CP3_CAP1_NEG

ACORN_CP1_CAP2_POS

ACORN_CP2_CAP_POS

ACORN_CP3_CAP2_POSACORN_LX

PP_VDD_MAIN

PP_BOOST1_ACORN

PP5V45_BOOST2_ACORN

ACORN_TO_PMU_ADC

I2C3_AP_SDA

ACORN_CP3_CAP2_NEG

ACORN_CP3_CAP1_POSACORN_CP3_CAP1_NEG

ACORN_CP3_CAP2_POS

PP5V25_TOUCH_VDDH

ACORN_CP1_CAP2_NEG

PP10V0_RACER

ACORN_CP2_CAP_NEGACORN_CP2_CAP_POS

PN6V7_RACER

ACORN_CP1_CAP1_POSACORN_CP1_CAP1_NEG

ACORN_CP1_CAP2_POS

PP3V5_RACER

PP1V1_RACER

I2C3_AP_SCL

TOUCH_TO_ACORN_PP5V25_ENRACER_TO_ACORN_ORB_SCAN

PP1V8_TOUCH_RACER_S2

PP_CP1_OUT_ACORN

PP1V1_S2

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

CG: Power Supplies - Touch & Display

0.22UF6.3VX5R01005

20%

ROOM=ACORN

0.22UF6.3VX5R01005

20%

ROOM=ACORN

0402X5R16V20%4.7UF

ROOM=ACORN

CERM-X5R

4UF6.3V

0201

20%

ROOM=ACORN0402-0.1MM

10UF20%10VX5R-CERM

ROOM=ACORN

5%

C0G01005

16V

220PF

ROOM=ACORN

6.3V

01005

1000PF10%

X5R-CERM

ROOM=ACORN

01005

20%

X5R-CERM

0.1UF6.3V

ROOM=ACORN

5%220PF

01005C0G16V

ROOM=ACORN0402-0.1MM

20%10VX5R-CERM

10UF

OMIT_TABLE

ROOM=ACORN

5%220PF

C0G01005

16V

ROOM=ACORN

20

50 10

50 10

4UF6.3V

0201

20%

CERM-X5R

ROOM=ACORN

50

50

CER0402

6.3V20%4.7UF

ROOM=ACORN

CRITICAL

ROOM=ACORNDSBGA

LM3373A1YKA

0.22UF6.3VX5R01005

20%

ROOM=ACORN

0.22UF6.3VX5R01005

20%

ROOM=ACORN

6.3V20%

0201CERM-X5R

4UF

ROOM=ACORN

CERM-X5R

4UF6.3V

0201

20%

ROOM=ACORN

10UF10VX5R-CERM

20%

OMIT_TABLE

0402-0.1MMROOM=ACORN

16VCER-X5R0201

1UF20%

ROOM=ACORN

PIWA2012FE-SMROOM=ACORN

1.5UH-20%-1.6A-0.18OHM

42

42

42

42

42

42

42

42

42

42

50 46 45 43 41 34 31 27 23 21 19 18

42

42

42

42

50

42

50

42

42

50

42

42

42

50

50

50 17

19 17 14

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

BI

IN

IN

IN

LOAD SWITCH

LDO1

CP1

CP2

LDO2

CP3

VC

VA

AGND

C2+

C1-C1+

VN

C3+C3-

VP

C2-

VH

EN2

C5+

C4-C4+

EN1

HWEN

C5-

SCLSDA

AMUX

CP23

_GND

CP1_

GND

SIDO

_GND

VJ

VK

VL

VG

VB

IN

SW

Display MIPI

Rcpt: 516S00210 <-- This one on MLB

Display Flex Connector

Plug: 516S00211Display Control Signals

Display Power

43 OF 51

NO_TEST=1

NO_TEST=1

NO_TEST=1

NO_TEST=1

NO_TEST=1

NO_TEST=1

9.0.0

evt-1

57 OF 80

051-02221

21

XW5785

21

XW5784

21

FL5783

2

1 C57862

1 C5785

2

1 C57022 1

FL5702

2

1 C57032 1

FL5703

2

1 C57042 1

FL5704

2

1 C5784

2

1 C5783

2

1 C57822 1

FL5782

2 1

FL5780

2

1 C5781

2

1R57002 1

FL5700

2

1 C5701

2

1 C5700

21

R5701

4

3 2

1

L5710

4

3 2

1

L5700

4

3 2

1

L5740

4

3 2

1

L5720

4

3 2

1

L5730

3837

3635

34333231302928272625242322212019181716151413121110987654321

J5700

DISPLAY_TO_AP_ALIVE_CONN

PP1V8_DISPLAY_CONN

PP1V0_DISPLAY_DVDD_CONN

90_MIPI_AP_TO_DISPLAY_CLK_CONN_P

90_MIPI_AP_TO_DISPLAY_DATA2_N

PMU_TO_DISPLAY_PANICB

90_MIPI_AP_TO_DISPLAY_DATA3_CONN_P

MTEST

90_MIPI_AP_TO_DISPLAY_DATA2_CONN_N90_MIPI_AP_TO_DISPLAY_DATA2_CONN_P

NC_DISPLAY_PIFAPP1V0_DISPLAY_DVDD_CONN

ISP_TO_DISPLAY_FLASH_INT_CONNNC_SPI_AP_TO_DISPLAY_FLASH_MOSI

AP_TO_DISPLAY_RESET_CONN_L

90_MIPI_AP_TO_DISPLAY_DATA3_N

PMU_TO_DISPLAY_PANICB_CONN

MTEST

90_MIPI_AP_TO_DISPLAY_DATA1_P

DISPLAY_TO_AP_ALIVE

DISPLAY_TO_PMU_AMUX

DISPLAY_TO_AP_ALIVE_CONN

PMU_TO_DISPLAY_PANICB_CONN PP3V0_DISPLAY_CONNNC_SPI_AP_TO_DISPLAY_FLASH_SCLK

ISP_TO_DISPLAY_FLASH_INT_CONN

90_MIPI_AP_TO_DISPLAY_DATA3_CONN_N

AP_TO_DISPLAY_RESET_CONN_L

90_MIPI_AP_TO_DISPLAY_DATA1_N

90_MIPI_AP_TO_DISPLAY_DATA3_CONN_P90_MIPI_AP_TO_DISPLAY_DATA3_P

AP_TO_DISPLAY_RESET_L

90_MIPI_AP_TO_DISPLAY_DATA0_CONN_P

90_MIPI_AP_TO_DISPLAY_CLK_CONN_N

ISP_TO_DISPLAY_FLASH_INT

90_MIPI_AP_TO_DISPLAY_DATA1_CONN_N

90_MIPI_AP_TO_DISPLAY_DATA1_CONN_P

90_MIPI_AP_TO_DISPLAY_DATA0_CONN_N

PP1V8_IO

90_MIPI_AP_TO_DISPLAY_DATA0_CONN_N90_MIPI_AP_TO_DISPLAY_DATA0_CONN_P

90_MIPI_AP_TO_DISPLAY_DATA1_CONN_N90_MIPI_AP_TO_DISPLAY_DATA1_CONN_P

DISPLAY_TO_PMU_AMUX_CONN

NC_SPI_DISPLAY_FLASH_CS_LNC_PP_VPPNC_SPI_DISPLAY_FLASH_TO_AP_MISO

90_MIPI_AP_TO_DISPLAY_CLK_CONN_P90_MIPI_AP_TO_DISPLAY_CLK_CONN_N

90_MIPI_AP_TO_DISPLAY_DATA3_CONN_N

PP1V0_DISPLAY_DVDD90_MIPI_AP_TO_DISPLAY_DATA2_CONN_P

90_MIPI_AP_TO_DISPLAY_DATA2_CONN_N

90_MIPI_AP_TO_DISPLAY_DATA0_P

PP_VDD_MAIN

PP3V0_DISPLAY_CONN

PP1V8_DISPLAY_CONN

PP_VDD_MAIN_HILO_CONNPP_VDD_MAIN_HILO_CONN

PP3V0_DISPLAY

PP_VDD_MAIN_HILO_CONN

90_MIPI_AP_TO_DISPLAY_CLK_P

90_MIPI_AP_TO_DISPLAY_CLK_N

90_MIPI_AP_TO_DISPLAY_DATA2_P

90_MIPI_AP_TO_DISPLAY_DATA0_N

DISPLAY_TO_PMU_AMUX_CONN

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

CG: B2B Display

33-OHM-25%-1500MA

0201ROOM=B2B_DISPLAY

ROOM=B2B_DISPLAY

220PF10VC0G-CERM

5%

01005

ROOM=B2B_DISPLAY

61.9K

01005MF

1/32W1%

ROOM=B2B_DISPLAY

01005

150OHM-25%-200MA-0.7DCR

C0G-CERM

ROOM=B2B_DISPLAY

220PF10V5%

01005

ROOM=B2B_DISPLAY

220PF

C0G-CERM10V5%

01005

01005ROOM=B2B_DISPLAY

10

5%

MF1/32W

65OHM-0.7-2GHZ-3.4OHM

GND_VOID

CRITICAL

ROOM=B2B_DISPLAY

TAM0605

GND_VOID

TAM0605

ROOM=B2B_DISPLAY

65OHM-0.7-2GHZ-3.4OHMCRITICAL

GND_VOID

CRITICAL

TAM060565OHM-0.7-2GHZ-3.4OHM

ROOM=B2B_DISPLAY

GND_VOID

TAM0605

ROOM=B2B_DISPLAY

CRITICAL65OHM-0.7-2GHZ-3.4OHM

F-ST-SMROOM=B2B_DISPLAY

BM28P0.6-34DS/2-0.35V

GND_VOID

65OHM-0.7-2GHZ-3.4OHMCRITICAL

TAM0605

ROOM=B2B_DISPLAY

SHORT-0201

ROOM=B2B_DISPLAY

ROOM=B2B_DISPLAY

SHORT-0201

01005

FERR-70OHM-25%-0.300A

ROOM=B2B_DISPLAY

ROOM=B2B_DISPLAY

10V5%220PF

C0G-CERM01005

ROOM=B2B_DISPLAY01005C0G-CERM10V5%220PF

8

01005NP0-C0G-CERM25V56PF5%

ROOM=B2B_DISPLAY

01005ROOM=B2B_DISPLAY

150OHM-25%-200MA-0.7DCR

20

ROOM=B2B_DISPLAY01005

5%56PF25VNP0-C0G-CERM

ROOM=B2B_DISPLAY

01005

150OHM-25%-200MA-0.7DCR

8

220PF

C0G-CERM10V5%

01005ROOM=B2B_DISPLAY

01005

150OHM-25%-200MA-0.7DCR

ROOM=B2B_DISPLAY

11

20

8

8

8

8

8

8

8

8

8

8

ROOM=B2B_DISPLAY

5%10V

220PF

01005C0G-CERM

C0G-CERM10V

ROOM=B2B_DISPLAY01005

220PF5%

220PF

C0G-CERM

ROOM=B2B_DISPLAY

10V5%

01005

33-OHM-25%-1500MA

ROOM=B2B_DISPLAY

0201

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43 43

43

43

43

43

43

43

43

43

43

35 34 32 30 29 28 27 17 16 14 10 8 7 6 5

43

43

43

43

43

43

43

43

19 43

43

50 46 45 42 41 34 31 27 23 21 19 18

43

43

43 43

19

43

43

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

SYM_VER-2

SYM_VER-2

SYM_VER-2

SYM_VER-2

SIG

PWR

PWR

SYM_VER-2

OUT

IN

IN

IN

IN

IN

IN

BI

BI

IN

IN

IN

IN

IN

IN

Orb + Touch Connector on MLB Bottom

44 OF 51

9.0.0

evt-1

58 OF 80

051-02221

CG: B2B Orb & TouchSYNC_DATE=08/25/2015

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

To Hydra and E75

VDD_MAIN OV CUT-OFF CIRCUIT

45 OF 51

9.0.0

evt-1

59 OF 80

051-02221

2

1R5902

2

1R5901

2

1 C5902

2 1XW5900

2

1C5900 K A

DZ5900

21

R5903

2

1

7

84

3

5

6

U5900

PP_VDD_MAIN

OV_VMON_INA

PP_VBUS1_E75_RVP

PP3V0_S2

PP_HYDRA_ACC1_R PP_HYDRA_ACC1PP_VDD_MAIN_VMON

I/O: Overvoltage Cut-Off Circuit

SYNC_DATE=01/10/2017SYNC_MASTER=sync

100K

MF1/32W

01005

1%

ROOM=OV_CUTOFF

ROOM=OV_CUTOFF

1.3M

MF1/20W1%

0201

5%16V

01005

NOSTUFF

15PF

NP0-C0G-CERM

ROOM=OV_CUTOFF

OMITSHORT-20L-0.05MM-SM

ROOM=SOC

ROOM=OV_CUTOFF

0.47UF

0201X5R25V20%

0201

RB521ES-30

1/32WMF

0%

0.00

ROOM=OV_CUTOFF01005

CRITICAL

X2QFNTPS3700RUG

ROOM=OV_CUTOFF

50 46 43 42 41 34 31 27 23 21 19 18 48 47 23

50 48 47 36 19

49 48

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NCNC

NC

NC1NC0

INA

INB

GND

OUTB

OUTA

VDD

I2C ADDRESS: 0x52

ACCESSORY BUCK

To Hydra

46 OF 51

9.0.0

evt-1

61 OF 80

051-02221

2

1 C61172

1

XW6110 2

1 C61112

1 C61102

1 C6112

2

1R611621

L6110

2

1C6100

A2

B2A1

B1

C2

C1

U6110

A1A2

B2

B1U6100

ACC_BUCK_TO_PMU_AMUX

PP_VDD_MAIN

ACC_BUCK_SW PP_ACC_VAR

PP1V8_S2

ACC_BUCK_FBI2C0_AP_SCL

I2C0_AP_SDA

PP_VDD_MAIN_ACC_BUCK_VIN

I/O: Accessory BuckSYNC_DATE=10/17/2016SYNC_MASTER=test_mlb

ROOM=ACC_BUCK

WLCSP-COMBOFPF1204UCX

CRITICAL

ROOM=ACC_BUCK

CER-X5R6.3V20%18UF

0402-0.1MM

20

49 20 10

49 20 10

SHORT-20L-0.05MM-SM

OMIT

ROOM=ACC_BUCK

0.1UF6.3V

01005

20%X5R-CERM

ROOM=ACC_BUCK

5%16VNP0-C0G01005ROOM=ACC_BUCK

100PF 18UF20%6.3VCER-X5R0402-0.1MMROOM=ACC_BUCK ROOM=ACC_BUCK

10K5%1/32WMF01005

ROOM=ACC_BUCK

0.47UH-20%-2.52A-0.08OHMCRITICAL

PIGA1608-SM

0201CER-X5R

4UF20%6.3V

ROOM=ACC_BUCK

CSPFAN53741

ROOM=ACC_BUCK

CRITICAL

50 45 43 42 41 34 31 27 23 21 19 18

48 19

50 49 48 47 38 22 20 17 14 12 10

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

VIN

GND

VOUT

ON

OUT

BI

IN

VIN

FB

SW

GND

SDA

SCL

USB-PD

47 OF 51

9.0.0

evt-1

62 OF 80

051-02221

2

1 C6210

21

R6200

2

1R6210

2

1R6211 2

1 C6200

2

1 C62902

1 C6291

2

1 C6292

B1

D4 C1E1E3 C4 E4A1

E2D1

B3

A2A3

D3

D2

C3

C2

B2

A4B4

U6200

PP_VBUS1_E75_RVP

I2C0_SMC_SDA

PP1V8_VCCD_CCG2

PMU_TO_CCG2_RESET_L

CCG2_TO_HYDRA_CC

PP3V0_S2PP1V8_S2

AP_TO_CCG2_SWCLKAP_BI_CCG2_SWDIO

I2C0_SMC_SDA_CCG2_RI2C0_SMC_SCL

PP5V0_USB_RVP_R

CCG2_TO_SMC_INT_L

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

I/O: USB PD

20%22NF6.3V

ROOM=USB_PD

X5R-CERM01005 50 23 22 21 10

1/32W1%

MF01005

43.2 20

48

ROOM=USB_PD

MF

1%499K

201

1/20W

MF

1%

ROOM=USB_PD

1/32W

50K

01005

ROOM=USB_PD01005

10VC0G-CERM

220PF5%

10 4

10 4

10 4

50 23 22 21 10

X5R

ROOM=USB_PD0201-1

6.3V20%1.0UF

0201-1ROOM=USB_PD

6.3V20%

X5R

1.0UF

1.0UF

0201-1X5R6.3V20%

ROOM=USB_PD

ROOM=USB_PD

CSP

CRITICAL

CG8740AAT

48 45 23

50 48 45 36 19

50 49 48 46 38 22 20 17 14 12 10

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NC

NCNC

BI

NC

IN

NCOUT

BI

IN

OUT

IN

VSS

XRES

VDDI

O

VDDD

VCCD

VCO

NN2

VCO

NN1

GPIO_C3GPIO_D3GPIO_C2GPIO_D2GPIO_B2

I2C_0_SCLI2C_0_SDA

SWD_IOSWD_CLK

VSS

RD1

CC2CC1

NC

NC

From Tigris2

I2C Address: 0011010X

Hydra

48 OF 51

GNDMAKE_BASE=TRUE

9.0.0

evt-1

63 OF 80

051-02221

2

1 C63122

1 C6311

H5H4

D3D4

B3B4

B1A1

F2E2

D1C1

E4

G5G4

H3

G6

F1E1

F7

F6

H2

G2

H7H6H1G7E3 F4

A3

C3

G1

A4

C4

C2D2

G3

A2B2

F5

F3

E6D6C6B6A6

E7D7C7B7A7E5D5C5B5A5

U6300

21

L6301

21

L6300

21R6300

2

1 C6300

2

1 C63912

1 C6390

2

1 C6330

2

1 C6395

90_USB_AP_DATA_N

HYDRA_TO_PMU_USB_BRICK_ID

HYDRA_BYPASSHYDRA_TO_NUB_INT

I2C1_SMC_SDAI2C1_SMC_SCL

HYDRA_TO_PMU_HOST_RESETPMU_TO_AP_HYDRA_ACTIVE_READY

HYDRA_CON_DETECT_L

90_HYDRA_DP2_CONN_P90_HYDRA_DP2_CONN_N

90_HYDRA_DP1_CONN_P90_HYDRA_DP1_CONN_N

PP_HYDRA_ACC1PP_VBUS1_E75_RVP

HYDRA_TO_NUB_DOCK_CONNECT

PMU_HYDRA_TO_AP_FORCE_DFU

SWD_DOCK_BI_AP_SWDIOSWD_DOCK_TO_AP_SWCLK

UART_AP_TO_ACCESSORY_TXD

90_USB_AP_DATA_L_N

HYDRA_TO_PMU_USB_BRICK_ID_R

CCG2_TO_HYDRA_CC

HYDRA_TO_TIGRIS_VBUS1_VALID_L

PP_HYDRA_ACC2

PP_ACC_VAR

PP1V8_S2

PP3V0_S2

90_MIKEYBUS_DATA_N

90_USB_BB_DATA_P

UART_AP_DEBUG_RXDUART_AP_DEBUG_TXD

UART_ACCESSORY_TO_AP_RXD

90_USB_AP_DATA_L_P

90_USB_BB_DATA_N

90_MIKEYBUS_DATA_P

90_USB_AP_DATA_P

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

I/O: Hydra

1.0UF20%

0201-1X5R6.3V

ROOM=HYDRA

ROOM=HYDRA

6.3VX5R01005

0.01UF10%

CER-X5R

ROOM=HYDRA

25V

0.47UF20%

0201

47

37

37

12

CER-X5R

ROOM=HYDRA

25V20%

0201

0.47UF

50 20 11

10

20 6 4

12

20

23 4

49

10

49

49

49

49

50

50

11

11

11

11

6

6

6

6

20

ROOM=HYDRA

WLCSPCBTL1612A1

CRITICAL

GND_VOID

15NH-250MA

0201ROOM=HYDRA

ROOM=HYDRA

15NH-250MA

GND_VOID 0201

01005ROOM=HYDRA

1/32W

6.34K

1%

MF0.01UF10%6.3VX5R

ROOM=HYDRA01005

ROOM=HYDRA

0.1UF6.3VX5R-CERM

20%

01005

1.0UF

X5R6.3V20%

0201-1ROOM=HYDRA

49 45

47 45 23

49

46 19

50 49 47 46 38 22 20 17 14 12 10

50 47 45 36 19

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

NC

BI

BI

OUT

OUT

IN

IN

OUT

OUT

OUT

IN

BI

BI

BI

BI

BI

BI

BI

IN

OUT

IN

OUT

OUT

BI

BI

BI

OUT VDD1V8ACC_PWR

DVSS1

VDD3V0

UART1_TXUART1_RX

ACC2ACC2

POW_GATE_EN*

CC0

DIG_DPDIG_DN

USB1_DP

BRICK_ID

USB1_DN

USB0_DNUSB0_DP

UART0_RXUART0_TX

UART2_TXUART2_RX

JTAG_CLKJTAG_DIO

EXT_SW_EN

FORCE_DFU

DOCK_CONNECT

CC1

DVSS

P_INACC1

ACC1ACC1

ACC1ACC1

ACC2

ACC2ACC2

DN1DP1

DN2DP2

CON_DET_L

SWITCH_ENHOST_RESET

SCLSDA

INTBYPASS

NC

LOWER MIC1 + LOWER MIC4

<-- This one on MLBPlug: 516S00037

Hydra

Rcpt: 516S00038DOCK FLEX CONNECTOR

Compass (Dock Flex Location)

ARC

SOUTH SPEAKER

49 OF 51

CKPLUS_WAIVE=I2C_PULLUP

CKPLUS_WAIVE=I2C_PULLUP

9.0.0

evt-1

64 OF 80

051-02221

2

1C6486

2

1C64722

1C6473

2

1C64962

1C64972

1C64952 1

R6421

2 1

R6420

2 1

R6419

2

1 C64332 1

FL6433

2 1

R6431

2

1 C6432

2

1 C6431

2

1 C64302 1

FL6430

2 1

R6432

2

1C6484

2 1

R6465

2

1 C6466

2

1 C6465

2 1

R6466

2

1 C6421

2

1 C6420

2

1 C6419

4847

4645

4443

424140393837363534333231302928272625242322212019181716151413121110987654321

J6400

2 1

R6418

2

1 C6418

2 1

R6416

2

1 C6416

2

1C6492

2

1 C6482

2

1 C6483

2

1 C6485

2 1

FL6482

2

1C64702

1C6471

2

1 C6413

2

1C64942

1C64932

1C64912

1C6490

2

1 C64002 1

FL6400

2

1 C6450

2

1 C6452

2 1

FL6450

2 1

FL6452

2 1

FL6454

2

1 C6454

2

1 C6460

2

1 C6462

2 1

FL6460

2 1

FL6462

2 1

FL6464

2

1 C6464

2

1 C64802 1

FL6480

2

1 C6410

2

1 C641121

FL6411

2 1

R6410

21

FL6413

COIL_TO_SPKRAMP_BOT_VSENSE_NEG_CONN

PP_CODEC_TO_LOWERMIC4_BIAS_CONNLOWERMIC4_TO_CODEC_BIAS_FILT_RETLOWERMIC4_TO_CODEC_AIN4_CONN_N

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_CONNI2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_CONN

90_HYDRA_DP1_CONN_NCOIL_TO_SPKRAMP_BOT_VSENSE_NEG_CONN90_HYDRA_DP1_CONN_P

SPKRAMP_BOT_TO_COIL_OUT_POS

PP1V8_SAKONNET_CONN

I2C0_AP_BI_SAKONNET_SDA_CONNCKPLUS_WAIVE=I2C_PULLUP

LOWERMIC4_TO_CODEC_AIN4_N

PP1V8_SAKONNET_CONN

I2C0_AP_BI_SAKONNET_SDA_CONN

LOWERMIC4_TO_CODEC_AIN4_CONN_N

LOWERMIC4_TO_CODEC_AIN4_CONN_PLOWERMIC4_TO_CODEC_AIN4_P

LOWERMIC1_TO_CODEC_AIN1_N

LOWERMIC1_TO_CODEC_AIN1_P

COIL_TO_SPKRAMP_BOT_VSENSE_POS_CONN

PP_CODEC_TO_LOWERMIC1_BIAS

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_CONN

I2C0_AP_TO_SAKONNET_SCL_CONN

I2C1_AP_SDACKPLUS_WAIVE=I2C_PULLUP

I2C1_AP_BI_MIC1_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C1_AP_TO_MIC1_SCL_CONN

PP_CODEC_TO_LOWERMIC4_BIAS_CONN

I2C1_AP_SCL

PP_CODEC_TO_LOWERMIC4_BIAS

PP_HYDRA_ACC1_CONN

LOWERMIC1_TO_CODEC_AIN1_CONN_N

PP_CODEC_TO_LOWERMIC1_BIAS_CONN

LOWERMIC1_TO_CODEC_AIN1_CONN_P

LOWERMIC4_TO_CODEC_AIN4_CONN_PPP1V8_IMU_COMPASS_DOCK_CONNI2C1_AOP_BI_COMPASS_SDA_DOCK_CONNI2C1_AOP_TO_COMPASS_SCL_DOCK_CONN

PP_HYDRA_ACC2_CONN

I2C1_AOP_SDA

I2C1_AOP_SCL

PP1V8_IMU_S2

I2C1_AOP_BI_COMPASS_SDA_DOCK_CONN

COMPASS_TO_AOP_INT_DOCK_CONNCOMPASS_TO_AOP_INT

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

I2C0_AP_SCL

PP1V8_S2

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

PP_HYDRA_ACC1

PP_HYDRA_ACC2

ARC1_TO_SOLENOID1_OUT_NEG

PP_HYDRA_ACC2_CONN

HYDRA_CON_DETECT_CONN_LMIKEYBUS_REFERENCEPP_HYDRA_ACC1_CONN

90_HYDRA_DP2_CONN_P90_HYDRA_DP2_CONN_N

COIL_TO_SPKRAMP_BOT_VSENSE_POS_CONN

SPKRAMP_BOT_TO_COIL_OUT_NEGI2C0_AP_TO_SAKONNET_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

COMPASS_TO_AOP_INT_DOCK_CONN

LOWERMIC1_TO_CODEC_AIN1_CONN_N

I2C1_AP_TO_MIC1_SCL_CONNI2C1_AP_BI_MIC1_SDA_CONN

LOWERMIC1_TO_CODEC_BIAS_FILT_RETPP_CODEC_TO_LOWERMIC1_BIAS_CONN

LOWERMIC1_TO_CODEC_AIN1_CONN_P

ARC1_TO_SOLENOID1_OUT_POS

PP_VBUS1_E75

SOLENOID1_TO_ARC1_VSENSE_POSSOLENOID1_TO_ARC1_VSENSE_NEG

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK_CONN

I2C0_AP_SDA

PP1V8_IMU_COMPASS_DOCK_CONN

I2C1_AOP_TO_COMPASS_SCL_DOCK_CONN

HYDRA_CON_DETECT_L

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT_CONN

ARC1_TO_SOLENOID1_OUT_POS

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK_CONN

ARC1_TO_SOLENOID1_OUT_NEG

SPKRAMP_BOT_TO_COIL_OUT_NEG

SPKRAMP_BOT_TO_COIL_OUT_POS

COIL_TO_SPKRAMP_BOT_VSENSE_NEG

COIL_TO_SPKRAMP_BOT_VSENSE_POS

HYDRA_CON_DETECT_CONN_L

I2S_AOP_AMPS_TO_CODEC_ASP1_DOUT

I/O: B2B DockSYNC_MASTER=test_mlb SYNC_DATE=10/13/2016

01005ROOM=B2B_DOCK

5%

COG25V

220PF

ROOM=B2B_DOCK

25VCOG

01005

5%220PF

ROOM=B2B_DOCK

10%

0201X5R25V

0.1UF0.1UF10%25VX5R

0201ROOM=B2B_DOCK

220PF5%

01005

10V

ROOM=B2B_DOCK

C0G-CERM

01005

150OHM-25%-200MA-0.7DCR

ROOM=B2B_DOCK

5%25V

ROOM=B2B_DOCK01005NP0-C0G-CERM

56PF

5%

ROOM=B2B_DOCK01005NP0-C0G-CERM25V

56PF

ROOM=B2B_DOCK01005

150OHM-25%-200MA-0.7DCR

150OHM-25%-200MA-0.7DCR

01005ROOM=B2B_DOCK

01005ROOM=B2B_DOCK

150OHM-25%-200MA-0.7DCR

5%

ROOM=B2B_DOCK01005

10VC0G-CERM

220PF

ROOM=B2B_DOCK

NP0-C0G-CERM

56PF

01005

5%25V

5%25V

01005ROOM=B2B_DOCK

NP0-C0G-CERM

56PF

01005ROOM=B2B_DOCK

150OHM-25%-200MA-0.7DCR

ROOM=B2B_DOCK

150OHM-25%-200MA-0.7DCR

01005

01005ROOM=B2B_DOCK

150OHM-25%-200MA-0.7DCR

220PF5%

01005C0G-CERM10V

ROOM=B2B_DOCK

NOSTUFF

ROOM=B2B_DOCK

C0G-CERM10V

01005

5%220PF

01005

150OHM-25%-200MA-0.7DCR

ROOM=B2B_DOCK

ROOM=B2B_DOCK01005

10-OHM-1.1A

10%

ROOM=B2B_DOCK01005X5R10V

820PF

820PF10%

X5R01005

ROOM=B2B_DOCK

10V

ROOM=B2B_DOCK

820PF10%

X5R01005

10V

0.1UF10%

ROOM=B2B_DOCK

X5R25V

0201

25VX5R

0.1UF

0201ROOM=B2B_DOCK

10%0.1UF

10%25VX5R

0201ROOM=B2B_DOCK

49.9

1%1/32WMF

01005ROOM=B2B_DOCK

ROOM=B2B_DOCK01005

1/32W1%

49.9

MF

ROOM=B2B_DOCK01005MF

1/32W1%

49.9

NOSTUFF

220PF

C0G-CERM

ROOM=B2B_DOCK01005

5%10V

150OHM-25%-200MA-0.7DCR

NOSTUFF

01005ROOM=B2B_DOCK

NOSTUFF

0.00

0%1/32WMF

01005ROOM=B2B_DOCK

ROOM=B2B_DOCK

NP0-C0G-CERM

56PF

NOSTUFF

01005

25V5%

NOSTUFF

01005ROOM=B2B_DOCK

NP0-C0G-CERM25V5%56PF

NOSTUFF

ROOM=B2B_DOCK

220PF5%10V

01005C0G-CERM

100

01005MF

5%

ROOM=B2B_DOCK

1/32W

ROOM=B2B_DOCK

150OHM-25%-200MA-0.7DCR

NOSTUFF

01005

01005ROOM=B2B_DOCK

NOSTUFF

0.00

1/32WMF

0%

37

37

37

46 20 10

46 20 10

48

37

33 10

33 10

50

50

01005

10%

X5R

ROOM=B2B_DOCK

10V

820PF

50 49

50 49

MF01005

0%

ROOM=B2B_DOCK

1/32W

0.00

01005

5%

ROOM=B2B_DOCK

NP0-C0G-CERM25V

56PF

NP0-C0G-CERM

56PF5%

01005ROOM=B2B_DOCK

25V

0%

ROOM=B2B_DOCK

MF01005

1/32W

0.00

68PF5%25VNP0-C0G-CERM

ROOM=B2B_DOCK01005

NP0-C0G-CERM01005ROOM=B2B_DOCK

68PF25V5%

NP0-C0G-CERM

68PF

01005

5%25V

ROOM=B2B_DOCK

41 38 12

50 41 38 12

50 41 38 12

F-ST-SMBM28P0.6-44DS-0.35V

ROOM=B2B_DOCK

ROOM=B2B_DOCK01005

1/32W0%

0.00

MF5%25V

56PF

NP0-C0G-CERM01005ROOM=B2B_DOCK

ROOM=B2B_DOCK

1/32WMF

0%

01005

0.00

ROOM=B2B_DOCK

5%25V

01005NP0-C0G-CERM

56PF

16VNP0-C0G01005

27PF5%

ROOM=B2B_DOCK

ROOM=B2B_DOCK

10%

0201

0.1UF

X5R25V

NOSTUFF

5%220PF

ROOM=B2B_DOCK

C0G-CERM10V

01005

5%220PF

C0G-CERM

ROOM=B2B_DOCK

10V

01005

220PF5%

C0G-CERM01005

10V

ROOM=B2B_DOCK

150OHM-25%-200MA-0.7DCR

ROOM=B2B_DOCK01005

C0G-CERM01005

10V

220PF

ROOM=B2B_DOCK

5%220PF

C0G-CERM01005

ROOM=B2B_DOCK

5%10V

5%

01005ROOM=B2B_DOCK

220PF

C0G-CERM10V

01005C0G-CERM

ROOM=B2B_DOCK

5%220PF10V

ROOM=B2B_DOCK

22-OHM-25%-1800MA

0201

49

49

38

49

49

49

48 49

48

50 49

49

49

49

49

49

49

49

38

49

49

49

49

49 38

49

49

49

49

49

49

49

49

49

26 25 17

49

49

50 48 47 46 38 22 20 17 14 12 10

48 45

48

49 41

49

49

37

49

48

48

49

50 49

49

49

49

49

49

38

49

49

49 41

23

41

41

49

49

49

49

49 41

49

49 41

49

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

BI

IN

OUT

OUT

OUT

IN

BI

OUT

OUT

IN

BI

OUT

OUT

IN

IN

BI

IN

IN

50 OF 51

9.0.0

evt-1

65 OF 80

051-02221

G248G247G246G245G244G243G242G241G240G239G238G237G236G235G234G233G232G231G230G229G228G227G226G225G224G223G222G221G220G219G218G217G216G215G214G213G212G211G210G209G208G207G206G205G204G203G202G201G200G199G198G197G196G195G194G193G192G191G190G189G188G187

G186G185G184G183G182G181G180G179G178G177G176G175G174G173G172G171G170G169G168G167G166G165G164G163G162G161G160G159G158G157G156G155G154G153G152G151G150G149G148G147G146G145G144G143G142G141G140G139G138G137G136G135G134G133G132G131G130G129G128G127G126G125 J_INT_BOT

G124G123G122G121G120G119G118G117G116G115G114G113G112G111G110G109G108G107G106G105G104G103G102G101G100G99G98G97G96G95G94G93G92G91G90G89G88G87G86G85G84G83G82G81G80G79G78G77G76G75G74G73G72G71G70G69G68G67G66G65G64G63

G62G61G60G59G58G57G56G55G54G53G52G51G50G49G48G47G46G45G44G43G42G41G40G39G38G37G36G35G34G33G32G31G30G29G28G27G26G25G24G23G22G21G20G19G18G17G16G15G14G13G12G11G10

G9G8G7G6G5G4G3G2G1 J_INT_BOT

S172S171S170S169S168S167S166S165S164S163S162S161S160S159S158S157S156S155S154S153S152S151S150S149S148S147S146S145S144S143S142S141S140S139S138S137S136S135S134S133S132S131S130S129S128S127S126S125S124S123S122S121S120S119S118S117S116S115S114S113S112S111S110S109S108S107S106S105S104S103S102S101S100S99S98S97S96S95S94S93S92S91S90S89S88S87

S86S85S84S83S82S81S80S79S78S77S76S75S74S73S72S71S70S69S68S67S66S65S64S63S62S61S60S59S58S57S56S55S54S53S52S51S50S49S48S47S46S45S44S43S42S41S40S39S38S37S36S35S34S33S32S31S30S29S28S27S26S25S24S23S22S21S20S19S18S17S16S15S14S13S12S11S10

S9S8S7S6S5S4S3S2S1 J_INT_BOT

PMU_TO_IKTARA_EN_EXT_1P8VIKTARA_TO_SMC_INTI2C0_SMC_SCLI2C0_SMC_SDABB_TO_STROBE_DRIVER_GSM_BURST_IND

PCIE_AP_TO_BB_RESET_LI2S_AP_TO_SPKRAMP_TOP_MCLK

90_PCIE_AP_TO_WLAN_REFCLK_N90_PCIE_WLAN_TO_AP_RXD_N

90_PCIE_WLAN_TO_AP_RXD_P90_PCIE_AP_TO_BB_TXD_N

90_PCIE_AP_TO_BB_REFCLK_N

90_PCIE_AP_TO_BB_REFCLK_P90_PCIE_BB_TO_AP_RXD_P90_PCIE_BB_TO_AP_RXD_N90_PCIE_AP_TO_BB_TXD_P

AP_TO_BB_TIME_MARK

AP_TO_GNSS_WAKE

PP1V1_RACER

PP_VDD_MAIN

PP1V8_S2

IKTARA_COIL2

PP_VBUS2_IKTARA

PP_BATT_VCC

IKTARA_COIL1

AOP_TO_WLAN_CONTEXT_BPMU_TO_GNSS_EN

PP3V5_RACER

PP1V8_TOUCH_RACER_S2

PP1V8_S2UART_WLAN_TO_AP_CTS_LUART_WLAN_TO_AP_RXDUART_AP_TO_WLAN_RTS_LUART_AP_TO_WLAN_TXDPP_VDD_BOOSTUART_BT_TO_AP_RXDUART_AP_TO_BT_TXDUART_BT_TO_AP_CTS_LUART_AP_TO_BT_RTS_L

I2C1_AOP_SCLI2C1_AOP_SDASWD_AOP_BI_BB_SWDIO

AOP_TO_SPKRAMP_BOT_ARC_RESET_LSPKRAMP_BOT_ARC_TO_AOP_INT_LAP_TO_WLAN_DEVICE_WAKEAP_TO_BBPMU_RADIO_ON_LBB_TO_AP_RESET_DETECT_LI2S_AP_TO_BB_DOUTI2S_BB_TO_AP_BCLKI2S_BB_TO_AP_LRCLKI2S_BB_TO_AP_DINPMU_TO_IKTARA_RESET_LI2S_CODEC_ASP1_TO_AOP_AMPS_LRCLKI2S_CODEC_ASP1_TO_AOP_AMPS_DINI2S_CODEC_ASP1_TO_AOP_AMPS_BCLKPCIE_AP_TO_WLAN_RESET_LPCIE_WLAN_BI_AP_CLKREQ_LBOARD_ID3

HALL3_TO_AOP_IRQ_LAP_TO_BB_RESET_LAP_TO_BB_IPC_GPIO1PP_CPU_PCORE_LVCCPP_GPU_LVCCPP1V8_AUDIO_VA_S2I2C2_AP_SCLI2C2_AP_SDASPKRAMP_TOP_TO_AP_INT_LAP_TO_SPKRAMP_TOP_RESET_L

PDM_CODEC_TO_SPKRAMP_TOP_DATAPDM_CODEC_TO_SPKRAMP_TOP_CLK

90_PCIE_AP_TO_WLAN_REFCLK_P

UART_GNSS_TO_AP_CTS_LUART_AP_TO_GNSS_RTS_L

UART_GNSS_TO_AP_RXDPP_VDD_MAIN

BB_TO_PMU_PCIE_HOST_WAKE_LPMU_TO_BBPMU_RESET_L

PMU_AMUX_AY

UART_BB_TO_AOP_RXD

AOP_TO_WLAN_CONTEXT_AUART_AOP_TO_BB_TXD

BT_TO_PMU_HOST_WAKEPMU_TO_BT_REG_ON

PMU_TO_WLAN_CLK32KWLAN_TO_PMU_HOST_WAKE

PMU_TO_WLAN_REG_ONPMU_AMUX_BY

CODEC_TO_SPKRAMP_BOT_ARC_MCLK

PMU_HYDRA_TO_AP_FORCE_DFUAP_TO_BT_WAKE

PMU_TO_BB_USB_VBUS_DETECT

WLAN_TO_AP_TIME_SYNCRADIO_PA_NTC

AP_TO_MANY_BSYNCTOUCH_TO_AMUX_PP1V8

UART_RACER_TO_AOP_RXDHALL2_TO_AOP_IRQ_LAP_TO_RACER_REF_CLK

UART_AOP_TO_RACER_TXD

PP5V25_TOUCH_VDDHRACER_TO_ACORN_ORB_SCAN

I2C3_AP_SCL

TOUCH_TO_ACORN_PP5V25_ENI2C3_AP_SDA

PN6V7_RACERPMU_TO_TOUCH_CLK32K_RESET_L

PP10V0_RACERAP_TO_RACER_RESET_LRACER_TO_AOP_INT_L

SWD_AOP_TO_MANY_SWCLKSWD_AOP_BI_RACER_SWDIO

SPI_AP_TO_RACER_CS_LSPI_RACER_TO_AP_MISOSPI_AP_TO_RACER_MOSISPI_AP_TO_RACER_SCLK

PP3V0_S2

90_USB_BB_DATA_P90_USB_BB_DATA_N

PMU_TO_NFC_ENNFC_TO_PMU_HOST_WAKEAP_TO_NFC_FW_DWLD_REQUART_AP_TO_NFC_RTS_L

PCIE_BB_BI_AP_CLKREQ_LSPKRAMP_TOP_TO_COIL_OUT_POSSPKRAMP_TOP_TO_COIL_OUT_NEG

COIL_TO_SPKRAMP_TOP_VSENSE_POS

COIL_TO_SPKRAMP_BOT_VSENSE_POSCOIL_TO_SPKRAMP_TOP_VSENSE_NEG

COIL_TO_SPKRAMP_BOT_VSENSE_NEGSPKRAMP_BOT_TO_COIL_OUT_POSSPKRAMP_BOT_TO_COIL_OUT_NEG

AP_TO_NFC_DEV_WAKEUART_NFC_TO_AP_CTS_LUART_AP_TO_NFC_TXDUART_NFC_TO_AP_RXD

AP_TO_BB_COREDUMP

UART_AP_TO_GNSS_TXD

90_PCIE_AP_TO_WLAN_TXD_P

90_PCIE_AP_TO_WLAN_TXD_N

SYNC_DATE=10/13/2016SYNC_MASTER=test_mlb

I/O: Interposer (Bottom)

SMT-PAD

INTERPOSER-BOT-D22SMT-PADINTERPOSER-BOT-D22

INTERPOSER-BOT-D22SMT-PAD

20

10

47 23 22 21 10

47 23 22 21 10

36 31

7

10

7

7

7

7

7

7

7

7

7

11

11

42

50 46 45 43 42 41 34 31 27 23 21 19 18

50 49 48 47 46 38 22 20 17 14 12 10

25

23

23 22

25

12

20

42

42 17

50 49 48 47 46 38 22 20 17 14 12 10

11

11

11

11

38 34 27 21 19

11

11

11

11

49 41 25 12 4

49 41 25 12 4

12

41 12

41 12

11

11

11

10

10

10

10

20

49 41 38 12

41 38 12

49 41 38 12

7

7

10 5

12

11

11

4

4

41 38 19

10

10

11

11

37

37

7

11

11

11

50 46 45 43 42 41 34 31 27 23 21 19 18

20

20

20

12

12

12

20

20

20

20

20

20

41 38

48 20 11

11

20

11

20

28 21 20 12 8

20

12

12

10

12

42

42

42 10

42

42 10

42

20

42

11

12

16 12 4

12

10

10

10

10

48 47 45 36 19

48

48

20

20

11

11

7

36

36

36

49

36

49

49

49

11

11

11

11

11

11

7

7

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

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DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

SYM 2 OF 3

GND

IOG127

IOG237IOG236

IOG238IOG239IOG240IOG241IOG242IOG243IOG244IOG245IOG246IOG247IOG248

IOG212IOG213IOG214IOG215IOG216IOG217

IOG219IOG218

IOG220IOG221IOG222IOG223IOG224IOG225IOG226IOG227IOG228IOG229IOG230IOG231IOG232IOG233IOG234IOG235

IOG187IOG188IOG189IOG190IOG191IOG192IOG193IOG194

IOG196IOG195

IOG197IOG198IOG199IOG200IOG201IOG202IOG203

IOG205IOG206

IOG204

IOG207IOG208IOG209IOG210IOG211

IOG156IOG155

IOG186IOG185IOG184IOG183IOG182IOG181IOG180IOG179IOG178IOG177IOG176IOG175IOG174IOG173IOG172IOG171IOG170IOG169IOG168IOG167IOG166IOG165IOG164IOG163IOG162IOG161IOG160IOG159

IOG154IOG153IOG152IOG151IOG150IOG149IOG148IOG147

IOG141IOG140IOG139IOG138IOG137IOG136

IOG134IOG133IOG132IOG131IOG130IOG129IOG128

IOG126IOG125

IOG142IOG143IOG144IOG145IOG146

IOG157IOG158

IOG135

SYM 1 OF 3

GND

IOG4

IOG1

IOG103IOG104IOG105IOG106IOG107IOG108IOG109IOG110IOG111

IOG113IOG112

IOG114IOG115IOG116IOG117IOG118IOG119IOG120IOG121IOG122IOG123IOG124

IOG86

IOG91IOG90

IOG93IOG92

IOG84IOG85

IOG87IOG88IOG89

IOG95IOG94

IOG96IOG97IOG98IOG99

IOG100IOG101IOG102

IOG82

IOG76IOG75

IOG66

IOG63IOG64IOG65

IOG67IOG68IOG69IOG70

IOG72IOG71

IOG73IOG74

IOG77IOG78IOG79

IOG81IOG80

IOG83

IOG12

IOG18

IOG62IOG61IOG60IOG59IOG58IOG57IOG56IOG55IOG54IOG53IOG52IOG51IOG50IOG49IOG48IOG47IOG46IOG45IOG44IOG43IOG42IOG41IOG40IOG39IOG38IOG37IOG36IOG35IOG34IOG33IOG32IOG31IOG30IOG29IOG28IOG27IOG26IOG25IOG24IOG23IOG22IOG21

IOG5

IOG3IOG2

IOG10IOG9IOG8IOG7IOG6

IOG15IOG14IOG13

IOG11

IOG17IOG16

IOG19IOG20

SYM 3 OF 3

SIGNAL

IOS1

IOS154

IOS167IOS166IOS165IOS164IOS163IOS162IOS161

IOS159IOS160

IOS158IOS157IOS156IOS155

IOS168IOS169IOS170IOS171IOS172

IOS153IOS152

IOS150IOS151

IOS149IOS148

IOS144IOS143IOS142IOS141IOS140IOS139IOS138

IOS136IOS137

IOS135IOS134IOS133IOS132IOS131

IOS145

IOS147IOS146

IOS126IOS125IOS124IOS123IOS122IOS121IOS120

IOS118IOS119

IOS117

IOS115IOS114

IOS127

IOS130IOS129IOS128

IOS110IOS109IOS108IOS107

IOS104

IOS106IOS105

IOS103IOS102IOS101IOS100

IOS99IOS98IOS97

IOS95IOS96

IOS94

IOS92IOS91IOS90IOS89IOS88IOS87

IOS4

IOS15

IOS31IOS30

IOS2IOS3

IOS5

IOS8IOS9IOS10IOS11IOS12IOS13IOS14

IOS16IOS17IOS18IOS19IOS20IOS21IOS22IOS23IOS24IOS25IOS26IOS27IOS28IOS29

IOS32IOS33IOS34IOS35IOS36IOS37IOS38IOS39IOS40IOS41IOS42IOS43IOS44IOS45IOS46IOS47IOS48IOS49IOS50IOS51IOS52IOS53IOS54IOS55IOS56IOS57IOS58IOS59IOS60IOS61IOS62IOS63IOS64IOS65IOS66IOS67IOS68IOS69IOS70IOS71IOS72IOS73IOS74IOS75IOS76IOS77IOS78IOS79IOS80IOS81IOS82IOS83IOS84IOS85IOS86

IOS116

IOS113

IOS111IOS112

IOS7IOS6

IOS93

NC

NC

NC

NC

Radios on MLB Bottom

51 OF 51

9.0.0

evt-1

80 OF 80

051-02221

RADIOSSYNC_DATE=06/04/2015

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

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A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

Sub DesignsBOM:639-03229MCO:056-04080

X893 MLB Bottom: EVT

1 OF 34

LAST_MODIFICATION=Tue Apr 11 16:10:11 2017

BOOTSTRAPPINGSYSTEM: Mechanical Components

151413121110

8

SYSTEM: Testpoints (Bottom)

mlb_botmlb_bot

AUDIO: Speaker Amp Bottom

SYSTEM:BOM TablesTABLE OF CONTENTS

SYSTEM POWER: Iktara34

RADIO_MLB

I/O: Interposer (Top)CG: B2B Luna & Touch

test_mlbmlb_bot

mlb_bot

01/30/2014

9

30

TEST POINTS & SIMGNSS

163

BASEBAND POWER5

ET MODULATORTDD TRANSMITFDD TRANSMIT

DIVERSITY RECEIVE LNA'S

3332

1211

222120

TRANSCEIVERS

10

272625

2829

1

WiFiANTFeeds

SymbolPorts

13

1 1

04/04/2017

04/04/2017

UPPER ANTENNA FEEDS

page1NFC

67

1718

2324

31

34

7

58

12

4

678

141516

45175

07/29/2016

04/04/2017

04/04/2017

07/29/2016

9

19

RF CONNECTORS AND MC

22

80

mlb_bot

04/04/2017mlb_bot

WIFI

BASEBAND PMIC

04/04/201701/17/2017

4

4950

RADIOS

BASEBAND MEMORY/DEBUGBASEBAND

66

55

5

311/03/201612/01/201603/08/2017

64

AUDIO: Speaker Amp TopHALL EFFECT

Guinness

17

DIVERSITY RECEIVE ASM'SLOWER ANTENNA & COUPLERSPRIMARY RECEIVE

SCH,MLB,BOT,X893051-02247

2017-04-1100084489387 ENGINEERING RELEASED

1 OF 80

evt-1

7.0.0

CR-1 : @MLB_BOT_LIB.MLB_BOT(SCH_1):PAGE1

TABLE OF CONTENTS

0.20.0WIFI_MLBD22 S 2017_04_04_09:54:33

0.22.0NFC_MLBD22 2017_03_22_22:11:23S

RADIO_MLB 0.115.0D221 S 2017_04_05_18:48:43

SYNC_DATE=07/29/2016

820-00869 1 PCB,MLB_BOT,X893 PCB NO COMMON

051-02247 SCH1 SCH,MLB_BOT,X893 NO COMMON

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

TABLE_5_ITEM

TABLE_HIERARCHY_CONFIG_HEAD

SOURCE PROJECT SUB-DESIGN NAME VERSION SOFTHARD/ SYNC_DATE/TIME

TABLE_HIERARCHY_CONFIG_ITEM

TABLE_HIERARCHY_CONFIG_ITEM

TABLE_HIERARCHY_CONFIG_ITEM

DATESYNCCONTENTSCSAPAGEDATESYNCCONTENTSCSAPAGE

BRANCH

8

REVISION

ECNREV DESCRIPTION OF REVISION2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

CKAPPD

2 1

124567

B

D

6 5 4 3

C

A

PAGE

C

A

D

DATE

SHEET

DSIZEDRAWING NUMBER

7

B

3

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

8

IV ALL RIGHTS RESERVED

II NOT TO REPRODUCE OR COPY IT

PROPRIETARY PROPERTY OF APPLE INC.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

DRAWING TITLE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

Global Inductors

Global Ferrites

Global R/C Alternates

Touch/Luna B2B

Soft-Term Cap Sub BOMs

Multi-Vendor Criticals

Global Capacitors

EEEE Codes Iktara

2 OF 34

7.0.0

evt-1

2 OF 80

051-02247

132S00021

2

685-00184

SUBBOM,MLB,BOT,DIODES,DIODES,X893

DIODES,SHOTTKY DIODE,30V,2A,0603

ONSEMI,SHOTTKY DIODE,30V,2A,0603

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

BOM_TABLE_ALTS

138S00141

138S00141

138S00166

EEEE FOR (MLB_BOT, 639-03229)

371S00133

0402-3T,10.5uF@1V, SEMCOALL

138S00149

138S00149

138S00149

CAP,CER,0.082UF,10%,50V,X7R,0402

NOSTUFF

COMMON

BOM_TABLE_ALTS

C3455,C3466

371S00132

685-00184

4

CRITICALCAP,CER,0.022UF,50V,X7R,10%,0402

SYSTEM:BOM Tables

SYNC_DATE=03/08/2017SYNC_MASTER=

NO COMMON8 C3452,C3453,C3454,C3456,C3461,C3462,C3463,C3464

CRITICAL132S0423 2 C3451,C3465CAP,CER,0.022UF,50V,X7R,10%,0402

132S0423

SUBBOM_DS685-00185 SUBBOM,MLB,BOT,DIODES,ONSEMI,X893

1 SUBBOM_DS COMMONCRITICAL

CRITICALD3400,D3401,D3402,D3403 DIODES_DS

4 CRITICALD3400,D3401,D3402,D3403 ONSEMI_DS

0402-3T,10.5uF@1V138S00149

0402-3T,10.5uF@1V, TYALL138S00151

IND,1.2UH,3A,2016,0.65ZALL152S00651152S00653

138S00145 138S00146 ALL 0402,5.1uF@3V, Kyocera

138S00146 ALL138S00165 0402,5.1uF@3V, Taiyo

0201,1.1uF@3V, KyoceraALL138S00140

ALL 0201,1.1uF@3V, SEMCO138S00142

685-00160 685-00159 SUBBOM_CAP SUBBOM,MLB,BOT,CAP,SOFT,X893

152S00652 IND,1.2UH,3A,2016,0.8ZALL152S00654

CAP,CER,X5R,0.22UF,20%,6.3V,01005ALL132S0400132S0436

CAP,CER,X5R,2.2UF,20%,6.3V,0201ALL138S0831138S00049

CAP,CER,X5R,0.22UF,20%,6.3V,20%ALL138S0706138S0739

CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDKALL138S0986138S00024

CAP,CER,1UF,20%,10V,X5R,0201,KYOCERAALL138S0739138S0945

CAP,CER,1UF,20%,10V,X5R,0201,MURATAALL138S0739138S0706

CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYOALL138S0652138S0648

FERR BD,150 OHM,25%,200MA,0.7 DCR,01005ALL155S0610155S00200

IND,MLD,0.47UH,20%,2.5A,80MO,1608ALL152S00557152S00558

FERR BD,150 OHM,25%,200MA,0.7 DCR,01005ALL155S0610155S00194

CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO138S0652

0201,3uF@1V138S00139

ALL138S00144 0402,16uF@1V, Taiyo138S00163

138S00139138S00138 ALL 0201,3uF@1V, Kyocera

138S00164 ALL138S00139 0201,3uF@1V, Taiyo

0201,1.1uF@3V, TaiyoALL138S00141

0402,16uF@1V138S00144

138S00146 0402,5.1uF@3V

0402,16uF@1V, Kyocera138S00143 ALL138S00144

685-00159 1 SUBBOM,MLB,BOT,CAP,TYPICAL,X893 SUBBOM_CAP CRITICAL COMMON

138S00159 1 CAP,SOFT-TERM,2.2UF,6.3V,0201,KYOCERA C5890 CRITICAL SOFT_CAP

138S0831 1 CAP,TYPICAL,2.2UF,6.3V,0201,MURATA C5890 CRITICAL TYPICAL_CAP

138S00150

ALL138S00148 0402-3T,10.5uF@1V, Kyocera

825-7691 1 COMMONEEEE_HM07 NO

138S00141 0201,1.1uF@3V

IND,MLD,0.47UH,20%,2.5A,80MO,1608152S00557

FERR BD,150 OHM,25%,200MA,0.7 DCR,01005155S0610

CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK138S0986

CAP,CER,1UF,20%,10V,X5R,0201,MURATA138S0739

CAP,CER,X5R,0.22UF,20%,6.3V,20%138S0706

CAP,CER,X5R,0.22UF,20%,6.3V,01005132S0400

CAP,CER,X5R,2.2UF,20%,6.3V,0201138S0831

152S00652 IND,1.2UH,3A,2016,0.8Z

IND,1.2UH,3A,2016,0.65Z152S00651

CAP,CER,X5R,0.01UF,10%,6.3V,01005132S0245

CAP,CER,X5R,470PF,10%,10V,01005132S0275

CAP,CER,X5R,0.1UF,10%,16V,0201132S0288

THERMISTOR,NTC,10K OHM,1%,B=3435,01005107S0257

RES,MF,1/20W,2M OHM,5,0201,SMD117S0055

CAP,CER,C0G,220PF,5%,10V,01005131S00053

CAP,CER,X5R,1UF,10%,25V,0402132S0663

CAP,CER,X5R,1UF,10%,25V,0402138S0683

CAP,CER,X5R,10UF,20%,10V,0402,H=0.65MM138S0979 CAP,CER,0.1UF,10%,50V,X7R,0402132S00008

CAP,CER,27PF,5%,C0G,25V,0201131S0804

CAP,CER,NP0/C0G,100PF,5%,16V,01005131S0307

TABLE_5_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_ALT_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_ALT_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_CRITICAL_ITEM

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

TABLE_ALT_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_CRITICAL_ITEM

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_ALT_ITEM

TABLE_ALT_ITEM

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD TABLE_5_ITEM

TABLE_CRITICAL_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

TABLE_CRITICAL_ITEM

TABLE_CRITICAL_ITEM

CRITICAL PART# COMMENTTABLE_CRITICAL_HEAD

TABLE_ALT_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICAL

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

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BRANCH

SHEET

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DRAWING NUMBER

1

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35 4

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D

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C

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APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

FIDUCIALS

3 OF 34

7.0.0

evt-1

4 OF 80

051-02247

1

FD0415

1

FD0406

1

FD0413

1

FD0414

1

FD0411

1

FD0412

1

FD0402

1

FD0403

1

FD0404

1

FD0405

1

FD0410

1

FD0401

1

SB0400

SYNC_DATE=12/01/2016

SYSTEM: Mechanical Components

0P5SQ-SMP3SQ-NSP

ROOM=ASSEMBLY

FID

FID0P5SQ-CROSS-NSP

ROOM=ASSEMBLY

ROOM=ASSEMBLY

0P5SQ-SMP3SQ-NSPFID

0P5SQ-SMP3SQ-NSP

ROOM=ASSEMBLY

FID

FID0P5SQ-SMP3SQ-NSP

ROOM=ASSEMBLY

FID0P5SQ-SMP3SQ-NSP

ROOM=ASSEMBLY

0P5SQ-CROSS-NSP

ROOM=ASSEMBLY

FID

0P5SQ-CROSS-NSP

ROOM=ASSEMBLY

FID

FID0P5SQ-CROSS-NSP

ROOM=ASSEMBLY

ROOM=ASSEMBLY

0P5SQ-CROSS-NSPFID

ROOM=ASSEMBLY

FID0P5SQ-SMP3SQ-NSP

0P5SQ-CROSS-NSP

ROOM=ASSEMBLY

FID

CRITICAL

ROOM=ASSEMBLY

STDOFF-SUBMERGED-X891

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

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BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

D221 Selected (BOARD_ID3) ->

BOOTSTRAPPING:BOARD ID[3]

4 OF 34

CKPLUS_WAIVE=SINGLE_NODENET

7.0.0

evt-1

6 OF 80

051-02247

21

R0630BOARD_ID3

PP1V8_S2

BOOTSTRAPPING

SYNC_DATE=11/03/2016SYNC_MASTER=

1.00K

5%

01005ROOM=SOC

MF1/32W

11

12 11 9 6

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

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DRAWING NUMBER

1

3 245

35 4

678

D

67

C

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8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

Test Points

COIL

LVCC

VDD_MAIN

DFUFORCE DFU

Iktara Debug

AMUX

Probe Points

ANALOG MUX B OUTPUT

ANALOG MUX A OUTPUT

VBATT

Stockholm GND TP

5 OF 34

7.0.0

evt-1

7 OF 80

051-02247

1TP0790

TP0780

TP0731

TP0730

TP0750

TP0751

TP0752

TP0753

TP0754

TP0755

TP0756

TP0757

TP0758

TP0759

TP0760

TP0761

TP0762

TP0763

TP0764

TP0766

TP0767

TP0768

TP0771

TP0772

1TP0721

1TP0720

1TP0522

1TP0515

1TP0710

1TP07091TP0705

1TP0706

1TP0703

1TP0702

1TP0708

1TP0707

1TP0701

1TP0700

1

PP0704

1

PP0700

1

PP0701

1

PP0703

1

PP0702

1TP0715

1TP0713

1TP0714

GND

GND

PP5V25_TOUCH_VDDH

PP1V8_TOUCH_RACER_S2

AP_TO_MANY_BSYNC

PP_VDD_MAIN

I2C3_AP_SCL

I2C3_AP_SDA

PP_CPU_PCORE_LVCC

PP_GPU_LVCC

IKTARA_COIL1

IKTARA_COIL2

TOUCH_TO_AMUX_PP1V8

PN6V7_RACER

PP3V5_RACER

PMU_TO_TOUCH_CLK32K_RESET_L

HALL2_TO_AOP_IRQ_L

RACER_TO_ACORN_ORB_SCAN

SPI_AP_TO_RACER_CS_L

PMU_AMUX_AY

PMU_AMUX_BY

PMU_TO_IKTARA_EN_EXT_1P8V

IKTARA_GPIO3

IKTARA_GPIO4

IKTARA_TO_SMC_INT

PMU_HYDRA_TO_AP_FORCE_DFU

PP_BATT_VCC

IKTARA_ANA1

PP10V0_RACER

PP1V1_RACER

TOUCH_TO_ACORN_PP5V25_EN

UART_RACER_TO_AOP_RXD

AP_TO_RACER_RESET_L

RACER_TO_AOP_INT_L

UART_AOP_TO_RACER_TXD

SPI_AP_TO_RACER_MOSI

SYSTEM: Testpoints (Bottom)SYNC_DATE=01/17/2017SYNC_MASTER=test_mlb

SMROOM=TEST

P2MM-NSM

ROOM=TESTSM

P2MM-NSM

SMP2MM-NSM

ROOM=TEST

TP-P55ROOM=TEST

SMP2MM-NSM

ROOM=TEST

TP-P55ROOM=TEST

ROOM=TESTTP-P55

ROOM=TESTTP-P55

ROOM=TESTTP-P55

TP-P55ROOM=TEST

ROOM=TESTTP-P55

ROOM=TESTTP-P55

ROOM=TESTTP-P55

TP-P55ROOM=TEST

ROOM=TESTTP-P55

ROOM=TESTTP-P55

TP-P55ROOM=TEST

TP-P55ROOM=TEST

TP-P55ROOM=TEST

TP-P55ROOM=TEST

TP-P55ROOM=TEST

TP-P55ROOM=TEST

ROOM=TESTTP-P55

TP-P55ROOM=TEST

TP-P55ROOM=TEST

ROOM=TESTTP-P55

TP-P55ROOM=TEST

TP-P55ROOM=TEST

TP-P55ROOM=TEST

ROOM=TESTTP-P55

TP-P55ROOM=TEST

ROOM=TESTTP-P55

ROOM=TESTTP-P55

ROOM=TESTTP-P55

TP-P55ROOM=TEST

ROOM=TESTTP-P55TP-P55

ROOM=TEST

TP-P55ROOM=TEST

ROOM=TESTTP-P55

TP-P55ROOM=TEST

TP-P55ROOM=TEST

TP-P55ROOM=TEST

ROOM=TESTTP-P55

ROOM=TESTTP-P55

11 6

6

6

6

11 6

P2MM-NSM

ROOM=TESTSM

ROOM=TESTTP-P55

11 10

11 10

12 11 10

12 11 8 7 6

11 10

11 10

11

11

11 6

11 6

11 10

11 10

11 10

11 10

11 10

11 10

11 10

11

11

11

11 11 10

11 10

11 10

11 10

11 10

11 10

11 10

11 10

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

PP

PP

PP

A

PP

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

A

AA

A

A

A

A

A

A

A

IN

IN

IN

IN

IN

PP

A

Pull-Ups

To Coil

To Coil

Iktara

6 OF 34

7.0.0

evt-1

34 OF 80

051-02247

2

1R3408

2

1R3406

21

R3422

K

A

D3401K

A

D3402K

A

D3403K

A

D3400

2

1R3460

2

1R3450

2

1C3402

2

1 C34512

1 C34522

1 C34532

1 C34542

1 C34552

1 C3456

2

1 C34662

1 C34652

1 C34642

1 C34632

1 C34622

1 C3461

21

XW3402

21

R3421

21

R3420

2

1

XW3400

2

1

XW3401

2

1C3445

2

1 C3443

2

1 C3444

E5E6

J7

H4

J5

J6

E7

F4

F3

F6

D7D6D5D4D3D2D1 E1

G1

L1K1J1H1F1 E4

F7

H7

E3

G7

L2K2J2

L4L5

B4A7A6A5A4A3A2A1

J4

G6

L3K3J3

K4

H5

K6K7

K5

L6H6

G5

C3

C5

B3

B5

H2

C1

C7

F5L7H3G4C4

G2G3F2E2

C2B2B1

C6B7B6

U3400

2

1R3407

2

1 C3415

2

1 C34162

1 C34172

1 C3418

2

1 C34422

1 C341321

R3401

2

1 C3419

2

1C34122

1C3411

2

1C34412

1C3440

21

C34042

1 C3406

2

1 C3403

21

C3405

2

1 C3407

PP_VBUS2_IKTARA

IKTARA_AC1

IKTARA_COMM1

IKTARA_COIL2

IKTARA_COIL1

PP1V5_VDIG_CORE_IKTARA

PP1V8_IKTARA

PP5V0_VDD_IKTARA

PP_IKTARA_VRECT

IKTARA_VOUT_SNS

PP5V0_VMID_AUX_IKTARA

I2C0_SMC_SDAI2C0_SMC_SCL

IKTARA_TO_SMC_INTPMU_TO_IKTARA_RESET_R_L

IKTARA_GPIO4

IKTARA_GPIO7

PMU_TO_IKTARA_EN_EXT_1P8V_R

PP1V8_S2

IKTARA_COMM2

PMU_TO_IKTARA_EN_EXT_1P8VPP_VDD_MAIN

PP1V8_IKTARA

PMU_TO_IKTARA_RESET_L

PP_VDD_MAIN

PP_IKTARA_VRECT_SENSE

PP_IKTARA_VMID_SENSE

IKTARA_BOOT1

IKTARA_ANA1

PP_VDD_MAIN_IKTARA

PP_IKTARA_VMID

IKTARA_GPIO3

PP_VDD_MAIN

IKTARA_BOOT2

IKTARA_AC2

SYNC_DATE=04/04/2017SYNC_MASTER=mlb_bot

SYSTEM POWER: Iktara

5%25V

220PF

ROOM=IKTARA01005COG

5%220PF

ROOM=IKTARA01005COG25V

5%

COG01005

220PF25V

ROOM=IKTARA

WLCSP

CRITICAL

ROOM=IKTARA

BC59355A2

01005

1/32W5%

MF

10K

ROOM=IKTARA

ROOM=IKTARA

X5R25V

1UF10%

402

ROOM=IKTARA

20%6.3VX5R-CERM

2.2UF

0201-2

20%6.3V

0201CERM-X5R

ROOM=IKTARA

4UF20%

0201

6.3VX5R

ROOM=IKTARA

1UF

11

11

11 5

11 5

20%2.2UF

ROOM=IKTARA0402-4X5R25V

0402-4

20%25VX5R

ROOM=IKTARA

2.2UFROOM=IKTARA

1%

0.020

0402

1/6WMF

20%6.3V

0201X5R

1UF

ROOM=IKTARA

20%

0402-4

2.2UF25VX5R

ROOM=IKTARA

20%2.2UF

0402-4

25VX5R

ROOM=IKTARA

20%2.2UF

0402-4

25VX5R

ROOM=IKTARA

20%2.2UF

0402-4

25VX5R

ROOM=IKTARA

0.1UF

16V10%

0201X5R-CERM

ROOM=IKTARA

0402X7R50V10%0.033UF

ROOM=IKTARA

10%50VX5R

ROOM=IKTARA

2200PF

0201

MF

5%

ROOM=IKTARA01005

1/32W

1.00K

MF1/20W

2M5%

201ROOM=IKTARA

0%

0.00

1/32WMF

01005ROOM=IKTARA

OMIT_TABLE

NSR20F30NXDSN2

ROOM=IKTARA

OMIT_TABLE

DSN2

ROOM=IKTARANSR20F30NX

OMIT_TABLE

NSR20F30NXROOM=IKTARA

DSN2

ROOM=IKTARANSR20F30NX

OMIT_TABLE

DSN2

201

1/20W

100K

MF

1%

100K

MF201

1%1/20W

50V

2200PF

X5R10%

ROOM=IKTARA0201

NOSTUFF

OMIT_TABLE

0.1UF10%50VCER-X7R0402

ROOM=IKTARA

10%50V

0.1UF

OMIT_TABLE

ROOM=IKTARA0402CER-X7R

0.1UF

ROOM=IKTARA0402CER-X7R50V10%

OMIT_TABLE

10%0.1UF50V

ROOM=IKTARA0402CER-X7R

OMIT_TABLE

ROOM=IKTARA

10%50VCER-X7R0402

0.1UF

OMIT_TABLE OMIT_TABLE

ROOM=IKTARA

10%50V

0402CER-X7R

0.1UF

ROOM=IKTARA

10%0.1UF50VCER-X7R0402

OMIT_TABLE

ROOM=IKTARA0402CER-X7R50V

OMIT_TABLE

10%0.1UF

ROOM=IKTARA

CER-X7R10%0.1UF50V

0402

OMIT_TABLEOMIT_TABLE

ROOM=IKTARA0402

10%50VCER-X7R

0.1UF0.1UF

CER-X7R0402

10%50V

OMIT_TABLE

ROOM=IKTARA

10%50V

0402CER-X7R

0.1UF

OMIT_TABLE

ROOM=IKTARA

ROOM=IKTARA

SHORT-20L-0.05MM-SM

OMIT

5

5

5

11

01005MF

1/32W5%

100

ROOM=IKTARA

ROOM=IKTARA01005MF

1/32W5%

100

SHORT-10L-0.05MM-SM

ROOM=IKTARA

SHORT-10L-0.05MM-SM

ROOM=IKTARA

16V

0201

0.1UF

10%

X5R-CERM

ROOM=IKTARA

0.033UF

0402

10%50VX7R

ROOM=IKTARA

11

11 5

11 5

6

12 11 9 4

12 11 8 7 6 5

6

12 11 8 7 6 5

12 11 8 7 6 5

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

BOOT1_VDD

AC1AC1

BOOT2_VDD

COMM2

CLAMP2

GPIO3/SWDIO

VMID_AUX_SW_VDD

SW

OTP_WREN

AC1

AC2

AC2AC2

COMM1

VDIG_CORE_VDD

VDD5V

SDASCLINT

RESET*

GPIO1GPIO2

GPIO6GPIO7

VSYS_ANA_VDD

AVSSPGNDRGND

VMID_AUX_VDD

GPIO5

EN_EXT_1P8

VDDO

VSYS_1P8_VDD

GPIO4/SWCLK

CLAMP1

VREC

T_VD

DVR

ECT_

VDD

VREC

T_VD

DVR

ECT_

VDD

VREC

T_S

VREC

T_VD

D

VREC

T_VD

DVR

ECT_

VDD

VMID

_S

VMID

_R_V

DD

VMID

_VDD

VMID

_VDD

VMID

_VDD

VMID

_VDD

VAUX_1P8_VDD

ANA3ANA2ANA1

ANA4

REFBP

DIGTEST

BOOTB_VDD

SWSW

VOUT

HV_GPO2HV_GPO1

IN

BI

OUT

IN

NC

NC

NCNC

NC

NC

NC

NC

NC

NC

OUT

OUT

OUT

IN

I2C ADDRESS: 1000 000x0x80

South Speaker AmplifierAPN: 338S00295

7 OF 34

7.0.0

evt-1

49 OF 80

051-02247

21

L4900

2

1 C4929

E2E3

A5

B1A1

D1C1

F5

B2A2

B6

D7

D6

C7

E6

A6

D5

E7

F7

D2C2

B7

C6

F1E1

A7

D4D3C5C4C3B4B3A4A3 F2E4B5

F4

F6

F3

E5

U4900

2

1 C4930

2

1C49072

1C49052

1C49092

1C4914

2

1 C4927

2

1 C49252

1 C4926

2

1 C49282

1 C49032

1 C49042

1 C4931

2

1C49222

1 C4934

2

1 C4932

SPKRAMP_BOT_TO_COIL_OUT_POS

SPKRAMP_BOT_FILT

SPKRAMP_BOT_TO_COIL_OUT_NEG

COIL_TO_SPKRAMP_BOT_VSENSE_POSCOIL_TO_SPKRAMP_BOT_VSENSE_NEG

CODEC_TO_SPKRAMP_BOT_ARC_MCLK

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

SPKRAMP_BOT_LX

I2C1_AOP_SDA

I2C1_AOP_SCL

SPKRAMP_BOT_ARC_TO_AOP_INT_L

AOP_TO_SPKRAMP_BOT_ARC_RESET_L

SPKRAMP_BOT_TO_SPKRAMP_TOP_SYNCSPKRAMP_BOT_ISENSE_NEGSPKRAMP_BOT_ISENSE_POS

PP_SPKRAMP_BOT_VBOOST

PP1V8_AUDIO_VA_S2PP_VDD_MAIN

AUDIO: Speaker Amp BottomSYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017

01005X5R

470PF10%

ROOM=SPKAMP1

10V

11

11

11 8

11 8

11 8

11

8

11

01005X5R

470PF10%

ROOM=SPKAMP1

10V

11

11

11

MEHK2016T-SMROOM=SPKAMP1

CRITICAL

1.2UH-20%-3A-0.077OHM

20%

0201

6.3V

ROOM=SPKAMP1

2.2UF

X5R-CERM

ROOM=SPKAMP1

CRITICAL

WLCSP

CS35L26B-A1

X5R6.3V

ROOM=SPKAMP101005

0.01UF10%

20%6.3V

18UF

0402-0.1MMROOM=SPKAMP1

CER-X5R

ROOM=SPKAMP10402-0.1MM

CER-X5R6.3V

18UF20% 20%

6.3V

0402-0.1MMCER-X5R

ROOM=SPKAMP1

18UF

20%

0402-0.1MMROOM=SPKAMP1

10VX5R-CERM

10UF

20%

CERM-X5R6.3V

0201ROOM=SPKAMP1

4UF

01005ROOM=SPKAMP1C0G-CERM10V5%220PF

20%6.3V

0.1UF

01005ROOM=SPKAMP1X5R-CERM

20%

0201

6.3V

2.2UF

ROOM=SPKAMP1X5R-CERM

0201

10%16VX5R-CERMROOM=SPKAMP1

0.1UF20%

0402-0.1MMROOM=SPKAMP1

10VX5R-CERM

10UF20%

0402-0.1MMROOM=SPKAMP1

10VX5R-CERM

10UF20%

0402-0.1MMROOM=SPKAMP1

10VX5R-CERM

10UF

11

11

11 8 12 11 8 6 5

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NC

NC

IN

IN

BI

IN

IN

IN

BI

IN

BI

IN

BI

VP

PDM_CLK0

AD0/PDM_CLK1

VBST_A

SWSW

FILT+

GNDP GNDA

ISNS+ISNS-

VSNS+VSNS-

OUT+OUT-

VBST_A

VBST_BVBST_B

SDA

ALIVE/SYNC

MCLK

SCLK

LRCK/FSYNC

SDIN

SDOUT

SCL

VA

PDM_DATA0

PDM_DATA1 AD1

INT*

RESET*

0x80

Pull Downs

North Speaker AmplifierI2C ADDRESS: 1000 000x

APN: 338S00295

8 OF 34

7.0.0

evt-1

50 OF 80

051-02247

2

1 C5018

E2E3

A5

B1A1

D1C1

F5

B2A2

B6

D7

D6

C7

E6

A6

D5

E7

F7

D2C2

B7

C6

F1E1

A7

D4D3C5C4C3B4B3A4A3 F2E4B5

F4

F6

F3

E5

U5000

2

1R5001

2

1 C5019

2

1C50002

1 C5001

2

1 C50112

1 C5012

2

1C5027

2

1 C50242

1 C50252

1 C50062

1 C500821

L5000

2

1C50262

1C50282

1 C50162

1C50292

1 C5015

SPKRAMP_TOP_TO_COIL_OUT_POS

SPKRAMP_TOP_ISENSE_POS

SPKRAMP_TOP_TO_COIL_OUT_NEG

PP_SPKRAMP_TOP_VBOOST

SPKRAMP_TOP_FILT

SPKRAMP_TOP_ISENSE_NEG

COIL_TO_SPKRAMP_TOP_VSENSE_POSCOIL_TO_SPKRAMP_TOP_VSENSE_NEG

PP1V8_AUDIO_VA_S2

AP_TO_SPKRAMP_TOP_RESET_L

SPKRAMP_BOT_TO_SPKRAMP_TOP_SYNC

AP_TO_SPKRAMP_TOP_RESET_L

I2C2_AP_SDA

I2C2_AP_SCL

SPKRAMP_TOP_TO_AP_INT_L

I2S_AP_TO_SPKRAMP_TOP_MCLK

I2S_CODEC_ASP1_TO_AOP_AMPS_LRCLK

I2S_CODEC_ASP1_TO_AOP_AMPS_BCLK

PDM_CODEC_TO_SPKRAMP_TOP_DATA

PDM_CODEC_TO_SPKRAMP_TOP_CLK

I2S_CODEC_ASP1_TO_AOP_AMPS_DIN

SPKRAMP_TOP_LX

PP_VDD_MAIN

AUDIO: Speaker Amp TopSYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017

11

11

11

11

11 8

11 7

11 7

11 7

11

11

11

11

7

X5R-CERM

ROOM=SPKAMP2

2.2UF6.3V

0201

20%

ROOM=SPKAMP2

CRITICAL

WLCSP

CS35L26B-A1

01005ROOM=SPKAMP2

1/32W5%100K

MF

0.01UF10%

ROOM=SPKAMP201005

6.3VX5R

10V10%

ROOM=SPKAMP2

470PF

X5R01005

10V10%

ROOM=SPKAMP2

470PF

X5R01005

X5R-CERM16V10%0.1UF

ROOM=SPKAMP20201

10V

01005

5%

C0G-CERM

220PF

ROOM=SPKAMP2

CER-X5R0402-0.1MM

18UF6.3V20%

ROOM=SPKAMP2

10UF

X5R-CERM10V

ROOM=SPKAMP20402-0.1MM

20%10UF

X5R-CERM10V

ROOM=SPKAMP20402-0.1MM

20%10UF

X5R-CERM10V

ROOM=SPKAMP20402-0.1MM

20%10UF

X5R-CERM10V

ROOM=SPKAMP20402-0.1MM

20%

MEFE2016T-SMROOM=SPKAMP2

CRITICAL

1.2UH-20%-3A-0.11OHM

ROOM=SPKAMP2

CER-X5R0402-0.1MM

18UF6.3V20% 20%

ROOM=SPKAMP20402-0.1MM

CER-X5R6.3V

18UF

X5R-CERM

ROOM=SPKAMP2

2.2UF6.3V

0201

20%

ROOM=SPKAMP2

6.3VCERM-X5R

0201

4UF20%

X5R-CERM

0.1UF

ROOM=SPKAMP201005

6.3V20%

11

11

11 7

11 8

12 11 7 6 5

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

IN

IN

IN

IN

IN

IN

BI

BI

IN

BI

IN

BI

VP

PDM_CLK0

AD0/PDM_CLK1

VBST_A

SWSW

FILT+

GNDP GNDA

ISNS+ISNS-

VSNS+VSNS-

OUT+OUT-

VBST_A

VBST_BVBST_B

SDA

ALIVE/SYNC

MCLK

SCLK

LRCK/FSYNC

SDIN

SDOUT

SCL

VA

PDM_DATA0

PDM_DATA1 AD1

INT*

RESET*

APN:353S3697Hall Effect

9 OF 34

7.0.0

evt-1

55 OF 80

051-02247

2

1 C5530

21

5

34

U5530HALL3_TO_AOP_IRQ_L

PP1V8_S2

HALL EFFECTSYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017

11

20%6.3VX5R-CERM

ROOM=HALL01005

0.1UF

ROOM=HALLDFN

AK8789

CRITICAL

12 11 6 4

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NCOUT

PADTHRM

VSS

OUT2OUT1

VDD

Touch And Racer Power

Hall Effect

<-- This one on MLB

AP I2C Filters

Luna + Touch ConnectorRcpt: 516S00325Plug: 516S00326

Touch and Misc I/O

Racer I/O

10 OF 34

7.0.0

evt-1

58 OF 80

051-02247

21

FL5809

2 1

R5844

21

C5860

2

1 C58412 1

FL5841

2

1 C58472 1

FL5847

2

1 C5844

2 1

R5820

2 1

R5821

2

1 C5820

2

1 C5821

2

1 C58052 1

FL5805

2

1 C58042 1

FL5804

21

R5801

2

1 C58002 1

FL5800

2

1 C58962 1

FL58962

1 C58952 1

FL58952

1 C58942 1

FL58942

1 C58932 1

FL5893

34

33

3231

3029

28272625242322212019181716151413121110987654321

J5800

2

1 C5842

2 1

FL5810

2

1 C5810

2

1 C5809

21

R5807

2

1 C5807

2 1

FL5806

2

1 C5806

2 1

R5842

2 1

FL5850

2

1 C5850

2 1

FL5840

2

1 C5840

2

1 C58032 1

FL5803

2 1

FL5802

2

1R58452 1

FL5845

2

1 C5802

2

1 C5845

2 1

FL5891

2

1C589021

FL5890

2

1 C5892

2

1 C5891

AP_TO_TOUCH_BSYNC_CONN

PP3V5_RACER

PP10V0_RACER_CONN

PP1V1_RACER_CONN

PP5V25_TOUCH_VDDH_CONN

PP1V8_TOUCH_RACER_CONN

PN6V7_RACER_CONN

PP1V1_RACER

I2C3_AP_BI_TOUCH_EEPROM_SDA_CONN

I2C3_AP_TO_TOUCH_EEPROM_SCL_CONN

HALL2_TO_AOP_IRQ_L HALL2_TO_AOP_IRQ_CONN_L

I2C3_AP_SCL

SPI_RACER_TO_AP_MISO

I2C3_AP_SDA

AP_TO_MANY_BSYNCSPI_RACER_TO_AP_MISO_CONN

AP_TO_RACER_REF_CLK_CONN

AP_TO_RACER_RESET_CONN_L

SWD_AOP_TO_RACER_CONN

PP3V5_RACER_CONN

AP_TO_RACER_RESET_L

AP_TO_RACER_REF_CLK

RACER_TO_AOP_INT_L

AP_TO_TOUCH_BSYNC_CONNPP3V5_RACER_CONNPN6V7_RACER_CONN

SPI_AP_TO_RACER_MOSI_CONNSPI_RACER_TO_AP_MISO_CONN

RACER_TO_AOP_INT_CONN_LPP10V0_RACER_CONN

UART_RACER_TO_AOP_RXD_CONNUART_AOP_TO_RACER_TXD_CONN

PP1V8_TOUCH_RACER_CONN

PP1V1_RACER_CONN

PP5V25_TOUCH_VDDH_CONNTOUCH_TO_ACORN_PP5V25_EN_CONN

SPI_AP_TO_RACER_SCLK_CONNSPI_AP_TO_RACER_CS_CONN_L

HALL2_TO_AOP_IRQ_CONN_L

PMU_TO_TOUCH_CLK32K_RESET_CONN_L

AP_TO_RACER_RESET_CONN_LRACER_TO_ACORN_ORB_SCAN_CONNSWD_AOP_TO_RACER_CONNSWD_AOP_BI_RACER_SWDIO_CONN

AP_TO_RACER_REF_CLK_CONN

TOUCH_TO_AMUX_PP1V8_CONNI2C3_AP_TO_TOUCH_EEPROM_SCL_CONNI2C3_AP_BI_TOUCH_EEPROM_SDA_CONN

RACER_TO_ACORN_ORB_SCAN_CONNRACER_TO_ACORN_ORB_SCAN

UART_RACER_TO_AOP_RXD TOUCH_TO_AMUX_PP1V8

SWD_AOP_BI_RACER_SWDIO_CONN

PP10V0_RACER

PN6V7_RACER

SWD_AOP_TO_MANY_SWCLK

SWD_AOP_BI_RACER_SWDIO

PMU_TO_TOUCH_CLK32K_RESET_L

UART_AOP_TO_RACER_TXD TOUCH_TO_ACORN_PP5V25_EN_CONN

PP1V8_TOUCH_RACER_S2

PP5V25_TOUCH_VDDH

PMU_TO_TOUCH_CLK32K_RESET_CONN_L

TOUCH_TO_AMUX_PP1V8_CONN

UART_AOP_TO_RACER_TXD_CONN TOUCH_TO_ACORN_PP5V25_EN

AP_TO_RACER_REF_CLK_C

RACER_TO_AOP_INT_CONN_L

UART_RACER_TO_AOP_RXD_CONN

SPI_AP_TO_RACER_CS_CONN_L

SPI_AP_TO_RACER_SCLK_CONNSPI_AP_TO_RACER_SCLK

SPI_AP_TO_RACER_CS_L

SPI_AP_TO_RACER_MOSI SPI_AP_TO_RACER_MOSI_CONN

CG: B2B Luna & TouchSYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017

MF

ROOM=B2B_TOUCH_ORB

0%

0.00

1/32W

01005

ROOM=B2B_TOUCH_ORB

49.9

1%1/32W

01005MF

ROOM=B2B_TOUCH_ORB

C0G0201

27PF

25V5%

11 5

ROOM=B2B_TOUCH_ORB01005

220PF5%10VC0G-CERM

150OHM-25%-200MA-0.7DCR

ROOM=B2B_TOUCH_ORB

01005

12 11 5

5%

01005

16V

ROOM=B2B_TOUCH_ORB

NP0-C0G

100PFROOM=B2B_TOUCH_ORB

01005

150OHM-25%-200MA-0.7DCR

12 11

NP0-C0G5%100PF

01005

16V

ROOM=B2B_TOUCH_ORB

11 5

11 5

MF

0%

ROOM=B2B_TOUCH_ORB01005

1/32W

0.00

1/32WMF

0%

ROOM=B2B_TOUCH_ORB01005

0.00

11 5

11 5

11 5

11

11

11 5

11

11 5

11 5

11 5

11 5

11 5

11

11 5

NP0-C0G-CERM

56PF5%25V

01005ROOM=B2B_TOUCH_ORB

56PF25VNP0-C0G-CERM

ROOM=B2B_TOUCH_ORB

5%

01005

25V5%NP0-C0G-CERM

56PF

ROOM=B2B_TOUCH_ORB

01005

150OHM-25%-200MA-0.7DCR

01005ROOM=B2B_TOUCH_ORB

5%

01005

56PF25VNP0-C0G-CERM

ROOM=B2B_TOUCH_ORB

ROOM=B2B_TOUCH_ORB

150OHM-25%-200MA-0.7DCR

01005

0.00

0%

ROOM=B2B_TOUCH_ORB01005MF

1/32W

220PF

C0G-CERM10V5%

ROOM=B2B_TOUCH_ORB01005

ROOM=B2B_TOUCH_ORB

01005

150OHM-25%-200MA-0.7DCR

10V220PF

01005ROOM=B2B_TOUCH_ORB

C0G-CERM5%

0201ROOM=B2B_TOUCH_ORB

33-OHM-25%-1500MA

C0G-CERM01005ROOM=B2B_TOUCH_ORB

5%10V220PF

01005ROOM=B2B_TOUCH_ORB

150OHM-25%-200MA-0.7DCR

ROOM=B2B_TOUCH_ORB

220PF5%

01005

10VC0G-CERM

ROOM=B2B_TOUCH_ORB

0201

33-OHM-25%-1500MA

220PF5%

ROOM=B2B_TOUCH_ORB

10VC0G-CERM01005

33-OHM-25%-1500MA

0201ROOM=B2B_TOUCH_ORB

AA26DK-S028VA1F-ST-SM

ROOM=B2B_TOUCH_ORB

ROOM=B2B_TOUCH_ORB

01005

16VNP0-C0G

100PF5%

ROOM=B2B_TOUCH_ORB

150OHM-25%-200MA-0.7DCR

01005

NP0-C0G-CERM

56PF5%25V

01005ROOM=B2B_TOUCH_ORB

25V5%NP0-C0G-CERM01005

ROOM=B2B_TOUCH_ORB

NOSTUFF

56PF

MF

0%

ROOM=B2B_TOUCH_ORB01005

0.00

1/32W

25V

ROOM=B2B_TOUCH_ORB

5%

01005NP0-C0G-CERM

56PF

NOSTUFF

01005ROOM=B2B_TOUCH_ORB

150OHM-25%-200MA-0.7DCR

5%25V

ROOM=B2B_TOUCH_ORB01005NP0-C0G-CERM

56PF

33.2

MF

ROOM=B2B_TOUCH_ORB01005

1/32W1%

ROOM=B2B_TOUCH_ORB

01005

150OHM-25%-200MA-0.7DCR

5%220PF

ROOM=B2B_TOUCH_ORB01005

10VC0G-CERM

01005ROOM=B2B_TOUCH_ORB

150OHM-25%-200MA-0.7DCR

ROOM=B2B_TOUCH_ORB01005

5%10VC0G-CERM

220PF

ROOM=B2B_TOUCH_ORB

25V56PF5%

01005NP0-C0G-CERM

01005ROOM=B2B_TOUCH_ORB

150OHM-25%-200MA-0.7DCR

ROOM=B2B_TOUCH_ORB

01005

150OHM-25%-200MA-0.7DCR

NOSTUFF

ROOM=B2B_TOUCH_ORB

1%1/32W

01005MF

10K

150OHM-25%-200MA-0.7DCR

01005ROOM=B2B_TOUCH_ORB

220PF10V5%

01005C0G-CERM

ROOM=B2B_TOUCH_ORB

NP0-C0G-CERM5%

ROOM=B2B_TOUCH_ORB01005

25V56PF

150OHM-25%-0.28A-0.69OHM

ROOM=B2B_TOUCH_ORB

01005

OMIT_TABLE

ROOM=B2B_TOUCH_ORB

2.2UF

X5R-CERM6.3V20%

0201

33-OHM-25%-1500MA

0201ROOM=B2B_TOUCH_ORB

C0G-CERM01005

5%

ROOM=B2B_TOUCH_ORB

10V220PF

220PF

C0G-CERM

ROOM=B2B_TOUCH_ORB

10V

01005

5%

10

11 5

10

10

10

10

10

11 5

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

11 5

11 5

10

11 5

11 5

10

10

10

10

10

10

10

10

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

OUT

IN

IN

IN

OUT

OUT

IN

IN

BI

OUT

IN

IN

IN

OUT

OUT

IN

OUT

IN

IN

11 OF 34

NC_PP_VDD_BOOST12

7.0.0

evt-1

66 OF 80

051-02247

S172S171S170S169S168S167S166S165S164S163S162S161S160S159S158S157S156S155S154S153S152S151S150S149S148S147S146S145S144S143S142S141S140S139S138S137S136S135S134S133S132S131S130S129S128S127S126S125S124S123S122S121S120S119S118S117S116S115S114S113S112S111S110S109S108S107S106S105S104S103S102S101S100S99S98S97S96S95S94S93S92S91S90S89S88S87

S86S85S84S83S82S81S80S79S78S77S76S75S74S73S72S71S70S69S68S67S66S65S64S63S62S61S60S59S58S57S56S55S54S53S52S51S50S49S48S47S46S45S44S43S42S41S40S39S38S37S36S35S34S33S32S31S30S29S28S27S26S25S24S23S22S21S20S19S18S17S16S15S14S13S12S11S10

S9S8S7S6S5S4S3S2S1 J_INT_TOP

G124G123G122G121G120G119G118G117G116G115G114G113G112G111G110G109G108G107G106G105G104G103G102G101G100G99G98G97G96G95G94G93G92G91G90G89G88G87G86G85G84G83G82G81G80G79G78G77G76G75G74G73G72G71G70G69G68G67G66G65G64G63

G62G61G60G59G58G57G56G55G54G53G52G51G50G49G48G47G46G45G44G43G42G41G40G39G38G37G36G35G34G33G32G31G30G29G28G27G26G25G24G23G22G21G20G19G18G17G16G15G14G13G12G11G10

G9G8G7G6G5G4G3G2G1 J_INT_TOP

G248G247G246G245G244G243G242G241G240G239G238G237G236G235G234G233G232G231G230G229G228G227G226G225G224G223G222G221G220G219G218G217G216G215G214G213G212G211G210G209G208G207G206G205G204G203G202G201G200G199G198G197G196G195G194G193G192G191G190G189G188G187

G186G185G184G183G182G181G180G179G178G177G176G175G174G173G172G171G170G169G168G167G166G165G164G163G162G161G160G159G158G157G156G155G154G153G152G151G150G149G148G147G146G145G144G143G142G141G140G139G138G137G136G135G134G133G132G131G130G129G128G127G126G125 J_INT_TOP

UART_AP_TO_GNSS_TXD

AP_TO_BB_COREDUMP

UART_NFC_TO_AP_RXDUART_AP_TO_NFC_TXD

UART_NFC_TO_AP_CTS_LAP_TO_NFC_DEV_WAKE

SPKRAMP_BOT_TO_COIL_OUT_NEGSPKRAMP_BOT_TO_COIL_OUT_POS

COIL_TO_SPKRAMP_BOT_VSENSE_NEG

COIL_TO_SPKRAMP_TOP_VSENSE_NEGCOIL_TO_SPKRAMP_BOT_VSENSE_POS

COIL_TO_SPKRAMP_TOP_VSENSE_POSSPKRAMP_TOP_TO_COIL_OUT_NEGSPKRAMP_TOP_TO_COIL_OUT_POS

PCIE_BB_BI_AP_CLKREQ_L

UART_AP_TO_NFC_RTS_LAP_TO_NFC_FW_DWLD_REQNFC_TO_PMU_HOST_WAKE

PMU_TO_NFC_EN

90_USB_BB_DATA_N90_USB_BB_DATA_P

PP3V0_S2

SPI_AP_TO_RACER_SCLKSPI_AP_TO_RACER_MOSISPI_RACER_TO_AP_MISOSPI_AP_TO_RACER_CS_L

SWD_AOP_BI_RACER_SWDIOSWD_AOP_TO_MANY_SWCLK

RACER_TO_AOP_INT_LAP_TO_RACER_RESET_L

PP10V0_RACERPMU_TO_TOUCH_CLK32K_RESET_L

PN6V7_RACER

I2C3_AP_SDATOUCH_TO_ACORN_PP5V25_EN

I2C3_AP_SCL

RACER_TO_ACORN_ORB_SCANPP5V25_TOUCH_VDDH

UART_AOP_TO_RACER_TXD

AP_TO_RACER_REF_CLKHALL2_TO_AOP_IRQ_L

UART_RACER_TO_AOP_RXD

TOUCH_TO_AMUX_PP1V8AP_TO_MANY_BSYNC

RADIO_PA_NTCWLAN_TO_AP_TIME_SYNC

PMU_TO_BB_USB_VBUS_DETECT

AP_TO_BT_WAKEPMU_HYDRA_TO_AP_FORCE_DFU

CODEC_TO_SPKRAMP_BOT_ARC_MCLKPMU_AMUX_BY

PMU_TO_WLAN_REG_ONWLAN_TO_PMU_HOST_WAKE

PMU_TO_WLAN_CLK32KPMU_TO_BT_REG_ON

BT_TO_PMU_HOST_WAKE

UART_AOP_TO_BB_TXDAOP_TO_WLAN_CONTEXT_A

UART_BB_TO_AOP_RXD

PMU_AMUX_AYPMU_TO_BBPMU_RESET_L

BB_TO_PMU_PCIE_HOST_WAKE_LPP_VDD_MAIN

I2C0_SMC_SDA

UART_AP_TO_GNSS_RTS_LUART_GNSS_TO_AP_CTS_L

AP_TO_GNSS_WAKE

90_PCIE_WLAN_TO_AP_RXD_P

90_PCIE_WLAN_TO_AP_RXD_N90_PCIE_AP_TO_WLAN_REFCLK_N

90_PCIE_AP_TO_WLAN_REFCLK_P90_PCIE_AP_TO_WLAN_TXD_N

90_PCIE_AP_TO_WLAN_TXD_P

PMU_TO_IKTARA_EN_EXT_1P8VIKTARA_TO_SMC_INTI2C0_SMC_SCL

PDM_CODEC_TO_SPKRAMP_TOP_CLKPDM_CODEC_TO_SPKRAMP_TOP_DATAPCIE_AP_TO_BB_RESET_LI2S_AP_TO_SPKRAMP_TOP_MCLKAP_TO_SPKRAMP_TOP_RESET_LSPKRAMP_TOP_TO_AP_INT_LI2C2_AP_SDAI2C2_AP_SCLPP1V8_AUDIO_VA_S2PP_GPU_LVCCPP_CPU_PCORE_LVCCAP_TO_BB_IPC_GPIO1AP_TO_BB_RESET_LHALL3_TO_AOP_IRQ_L

BOARD_ID3PCIE_WLAN_BI_AP_CLKREQ_LPCIE_AP_TO_WLAN_RESET_LI2S_CODEC_ASP1_TO_AOP_AMPS_BCLKI2S_CODEC_ASP1_TO_AOP_AMPS_DINI2S_CODEC_ASP1_TO_AOP_AMPS_LRCLKPMU_TO_IKTARA_RESET_LI2S_BB_TO_AP_DINI2S_BB_TO_AP_LRCLKI2S_BB_TO_AP_BCLKI2S_AP_TO_BB_DOUTBB_TO_AP_RESET_DETECT_LAP_TO_BBPMU_RADIO_ON_LAP_TO_WLAN_DEVICE_WAKESPKRAMP_BOT_ARC_TO_AOP_INT_LAOP_TO_SPKRAMP_BOT_ARC_RESET_L

SWD_AOP_BI_BB_SWDIOI2C1_AOP_SDAI2C1_AOP_SCL

UART_AP_TO_BT_RTS_LUART_BT_TO_AP_CTS_LUART_AP_TO_BT_TXDUART_BT_TO_AP_RXD

UART_AP_TO_WLAN_TXDUART_AP_TO_WLAN_RTS_LUART_WLAN_TO_AP_RXDUART_WLAN_TO_AP_CTS_LPP1V8_S2

PP1V8_TOUCH_RACER_S2

PP3V5_RACER

PMU_TO_GNSS_ENAOP_TO_WLAN_CONTEXT_B

IKTARA_COIL1

PP_BATT_VCC

PP_VBUS2_IKTARA

IKTARA_COIL2

PP1V8_S2

PP_VDD_MAIN

PP1V1_RACER

BB_TO_STROBE_DRIVER_GSM_BURST_IND

UART_GNSS_TO_AP_RXD

90_PCIE_BB_TO_AP_RXD_N90_PCIE_BB_TO_AP_RXD_P90_PCIE_AP_TO_BB_REFCLK_P

AP_TO_BB_TIME_MARK90_PCIE_AP_TO_BB_REFCLK_N

90_PCIE_AP_TO_BB_TXD_P

90_PCIE_AP_TO_BB_TXD_N

I/O: Interposer (Top)SYNC_MASTER=mlb_bot SYNC_DATE=04/04/2017

SMT-PADINTERPOSER-TOP-D22

SMT-PADINTERPOSER-TOP-D22

SMT-PAD

INTERPOSER-TOP-D22

12

12

12

12

12

12

7

7

7

8

7

8

8

8

12

12

12

12

12

12

12

12

10

10 5

10

10 5

10

12 10

10 5

10 5

10 5

10 5

10 5

10 5

10 5

10 5

10 5

10 5

10 5

10

10 5

10 5

10 5

12 10 5

12

12

12

12

5

7

5

12

12

12

12

12

12

12

12

5

12

12

12 11 8 7 6 5

6

12

12

12

12

12

12

12

12

12

6 5

6 5

6

8

8

12

8

8

8

8

8

8 7

5

5

12

12

9

4

12

12

8 7

8 7

8 7

6

12

12

12

12

12

12

12

7

7

12

7

7

12

12

12

12

12

12

12

12

12 11 9 6 4

10 5

10 5

12

12

6 5

5

6

6 5

12 11 9 6 4

12 11 8 7 6 5

10 5

12

12

12

12

12

12

12

12

12

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

SYM 3 OF 3

SIGNAL

IOS1

IOS154

IOS167IOS166IOS165IOS164IOS163IOS162IOS161

IOS159IOS160

IOS158IOS157IOS156IOS155

IOS168IOS169IOS170IOS171IOS172

IOS153IOS152

IOS150IOS151

IOS149IOS148

IOS144IOS143IOS142IOS141IOS140IOS139IOS138

IOS136IOS137

IOS135IOS134IOS133IOS132IOS131

IOS145

IOS147IOS146

IOS126IOS125IOS124IOS123IOS122IOS121IOS120

IOS118IOS119

IOS117

IOS115IOS114

IOS127

IOS130IOS129IOS128

IOS110IOS109IOS108IOS107

IOS104

IOS106IOS105

IOS103IOS102IOS101IOS100

IOS99IOS98IOS97

IOS95IOS96

IOS94

IOS92IOS91IOS90IOS89IOS88IOS87

IOS4

IOS15

IOS31IOS30

IOS2IOS3

IOS5

IOS8IOS9IOS10IOS11IOS12IOS13IOS14

IOS16IOS17IOS18IOS19IOS20IOS21IOS22IOS23IOS24IOS25IOS26IOS27IOS28IOS29

IOS32IOS33IOS34IOS35IOS36IOS37IOS38IOS39IOS40IOS41IOS42IOS43IOS44IOS45IOS46IOS47IOS48IOS49IOS50IOS51IOS52IOS53IOS54IOS55IOS56IOS57IOS58IOS59IOS60IOS61IOS62IOS63IOS64IOS65IOS66IOS67IOS68IOS69IOS70IOS71IOS72IOS73IOS74IOS75IOS76IOS77IOS78IOS79IOS80IOS81IOS82IOS83IOS84IOS85IOS86

IOS116

IOS113

IOS111IOS112

IOS7IOS6

IOS93

SYM 1 OF 3

GND

IOG4

IOG1

IOG103IOG104IOG105IOG106IOG107IOG108IOG109IOG110IOG111

IOG113IOG112

IOG114IOG115IOG116IOG117IOG118IOG119IOG120IOG121IOG122IOG123IOG124

IOG86

IOG91IOG90

IOG93IOG92

IOG84IOG85

IOG87IOG88IOG89

IOG95IOG94

IOG96IOG97IOG98IOG99

IOG100IOG101IOG102

IOG82

IOG76IOG75

IOG66

IOG63IOG64IOG65

IOG67IOG68IOG69IOG70

IOG72IOG71

IOG73IOG74

IOG77IOG78IOG79

IOG81IOG80

IOG83

IOG12

IOG18

IOG62IOG61IOG60IOG59IOG58IOG57IOG56IOG55IOG54IOG53IOG52IOG51IOG50IOG49IOG48IOG47IOG46IOG45IOG44IOG43IOG42IOG41IOG40IOG39IOG38IOG37IOG36IOG35IOG34IOG33IOG32IOG31IOG30IOG29IOG28IOG27IOG26IOG25IOG24IOG23IOG22IOG21

IOG5

IOG3IOG2

IOG10IOG9IOG8IOG7IOG6

IOG15IOG14IOG13

IOG11

IOG17IOG16

IOG19IOG20

NC

NC

NC

NC

SYM 2 OF 3

GND

IOG127

IOG237IOG236

IOG238IOG239IOG240IOG241IOG242IOG243IOG244IOG245IOG246IOG247IOG248

IOG212IOG213IOG214IOG215IOG216IOG217

IOG219IOG218

IOG220IOG221IOG222IOG223IOG224IOG225IOG226IOG227IOG228IOG229IOG230IOG231IOG232IOG233IOG234IOG235

IOG187IOG188IOG189IOG190IOG191IOG192IOG193IOG194

IOG196IOG195

IOG197IOG198IOG199IOG200IOG201IOG202IOG203

IOG205IOG206

IOG204

IOG207IOG208IOG209IOG210IOG211

IOG156IOG155

IOG186IOG185IOG184IOG183IOG182IOG181IOG180IOG179IOG178IOG177IOG176IOG175IOG174IOG173IOG172IOG171IOG170IOG169IOG168IOG167IOG166IOG165IOG164IOG163IOG162IOG161IOG160IOG159

IOG154IOG153IOG152IOG151IOG150IOG149IOG148IOG147

IOG141IOG140IOG139IOG138IOG137IOG136

IOG134IOG133IOG132IOG131IOG130IOG129IOG128

IOG126IOG125

IOG142IOG143IOG144IOG145IOG146

IOG157IOG158

IOG135

RADIO PA NTC

12 OF 34

NC_PP_VDD_BOOST11

7.0.0

evt-1

80 OF 80

051-02247

21

XW3043

2

1

R3043

2

1C3043 RADIO_PA_NTCPA_NTC_RETURN

WLAN_TO_AP_TIME_SYNC

UART_AP_TO_WLAN_TXDUART_AP_TO_WLAN_RTS_LUART_WLAN_TO_AP_RXDUART_WLAN_TO_AP_CTS_L

PMU_TO_WLAN_REG_ON

PMU_TO_BT_REG_ON

AOP_TO_WLAN_CONTEXT_B

PCIE_AP_TO_WLAN_RESET_L

PMU_TO_WLAN_CLK32K

50_LAT_WLAN

PP_VDD_MAINPP1V8_S2

BB_TO_NFC_CLKNFC_TO_BB_CLK_REQAP_TO_NFC_FW_DWLD_REQAP_TO_NFC_DEV_WAKENFC_TO_PMU_HOST_WAKE

UART_AP_TO_NFC_TXDUART_NFC_TO_AP_RXD

UART_NFC_TO_AP_CTS_L

NFC_SWP1

UART_AP_TO_NFC_RTS_L

UART_AP_TO_BT_TXDUART_AP_TO_BT_RTS_LUART_BT_TO_AP_RXD

90_PCIE_WLAN_TO_AP_RXD_N

NC_PP_VDD_BOOSTMAKE_BASE=TRUE

PP3V0_S2PP1V8_S2PP_VDD_MAIN

UART_BB_TO_WLAN_COEXUART_WLAN_TO_BB_COEX

UART_BT_TO_AP_CTS_L

I2S_BB_TO_AP_BCLKI2S_BB_TO_AP_LRCLK

PMU_TO_BB_USB_VBUS_DETECTSWD_AOP_BI_BB_SWDIO

UART_BB_TO_AOP_RXD

BB_TO_PMU_PCIE_HOST_WAKE_LPCIE_BB_BI_AP_CLKREQ_L

90_PCIE_AP_TO_BB_TXD_N90_PCIE_AP_TO_BB_TXD_P

BB_TO_STROBE_DRIVER_GSM_BURST_IND

90_PCIE_AP_TO_BB_REFCLK_P

BB_TO_AP_RESET_DETECT_L

90_PCIE_BB_TO_AP_RXD_P

PCIE_AP_TO_BB_RESET_L

SWD_AOP_TO_MANY_SWCLK

I2S_AP_TO_BB_DOUT

90_PCIE_AP_TO_BB_REFCLK_N

PMU_TO_BBPMU_RESET_L

AP_TO_BB_COREDUMP

AP_TO_MANY_BSYNC

AP_TO_BB_RESET_L

AP_TO_BB_IPC_GPIO1

AP_TO_BBPMU_RADIO_ON_L

AP_TO_WLAN_DEVICE_WAKE

PCIE_WLAN_BI_AP_CLKREQ_L

90_PCIE_WLAN_TO_AP_RXD_P90_PCIE_AP_TO_WLAN_TXD_N

90_PCIE_AP_TO_WLAN_REFCLK_P

90_PCIE_AP_TO_WLAN_TXD_P

UART_BB_TO_WLAN_COEX

AP_TO_BT_WAKE

PP_VDD_MAINPP1V8_S2

BT_TO_PMU_HOST_WAKE

AOP_TO_WLAN_CONTEXT_A

90_PCIE_AP_TO_WLAN_REFCLK_N

WLAN_TO_PMU_HOST_WAKE

PMU_TO_NFC_EN

UART_WLAN_TO_BB_COEX

90_PCIE_BB_TO_AP_RXD_N

90_USB_BB_DATA_P90_USB_BB_DATA_N

I2S_BB_TO_AP_DIN

UART_AOP_TO_BB_TXD

50_UAT_WLAN_5G_SOUTH

50_LAT_WLAN50_UAT_WLAN_2G_SOUTH50_UAT_WLAN_5G_SOUTH

UART_AP_TO_GNSS_RTS_LUART_GNSS_TO_AP_RXDUART_AP_TO_GNSS_TXD

PMU_TO_GNSS_EN

AP_TO_GNSS_WAKE

BB_TO_NFC_CLKNFC_TO_BB_CLK_REQ

NFC_SWP1

AP_TO_BB_TIME_MARK

UART_GNSS_TO_AP_CTS_L

50_UAT_WLAN_2G_SOUTH

SYNC_DATE=07/29/2016

RADIOS

ROOM=PMU

OMIT

SHORT-20L-0.05MM-SM

ROOM=PMU

I71

0100510KOHM-1%

ROOM=PMU

16V5%

01005NP0-C0G

100PF

SUBDESIGN_SUFFIX=S

SUBDESIGN_SUFFIX=W

SUBDESIGN_SUFFIX=K I63

11

31 11

31 11

31 11

31 11

31 11

31 11

31 11

31 11

31 11

31 11

32 29 12

34 31 17 12 11 8 7 6 5

34 31 14 12 11 9 6 4

34 18 12

34 18 12

34 11

34 11

34 11

34 11

34 11

34 11

34 28 12

34 11

31 11

31 11

31 11

31 11

29 11

34 31 14 12 11 9 6 4

34 31 17 12 11 8 7 6 5

31 14 12

31 14 12

31 11

14 11

14 11

14 11

15 11

14 11

14 11

14 11

14 11

14 11

14 11

14 11

14 11

14 11

14 11

15 11 10

14 11

14 11

17 11

14 11

17 11 10 5

15 11

14 11

14 11

31 11

31 11

31 11

31 11

31 11

31 11

31 14 12

31 11

34 31 17 12 11 8 7 6 5

34 31 14 12 11 9 6 4

31 11

31 11

31 11

31 11

34 11

31 14 12

14 11

14 11

14 11

14 11

14 11

32 29 12

32 29 12

32 29 12

32 29 12

27 11

27 11

27 11

27 11

27 11

34 18 12

34 18 12

34 28 12

27 11

27 11

32 29 12

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

NC

NC

NCNC

nfc_mlb

NFC_DWP_TX_TP

UART_NFC_TO_AP_RXDUART_AP_TO_NFC_TXD

NFC_TO_PMU_HOST_WAKE

AP_TO_NFC_FW_DWLDAP_TO_NFC_DEV_WAKE

UART_AP_TO_NFC_RTS_L

NFC_TO_BB_CLK_REQ

PMU_TO_NFC_ENBB_TO_NFC_CLK

PP_VDD_MAINPP1V8_SDRAM

NFC_SWP1

UART_NFC_TO_AP_CTS_L

WIFI_MLB

BT_TO_PMU_HOST_WAKE

AOP_TO_WLAN_CONTEXT_B

PCIE_WLAN_TO_PMU_WAKE

UART_BT_TO_AP_CTS_LUART_BT_TO_AP_RXD

UART_AP_TO_BT_RTS_LUART_AP_TO_BT_TXD

UART_WLAN_TO_AP_RXD

50_U

AT_W

LAN_

5G_S

OUT

H

UART_WLAN_TO_AP_CTS_L

90_PCIE_AP_TO_WLAN_REFCLK_P

90_PCIE_WLAN_TO_AP_RX_P

90_PCIE_AP_TO_WLAN_TX_P

AOP_TO_WLAN_CONTEXT_A

AP_TO_BT_WAKE

PCIE_AP_TO_WLAN_PERST_LPCIE_AP_BI_WLAN_CLKREQ_L

WLAN_TIME_SYNC

PP_VDD_MAINPP1V8_SDRAM

AP_TO_WLAN_DEV_WAKE

PMU_TO_BT_REG_ONPMU_TO_WLAN_32K

UART_BB_TO_WLAN_COEXUART_WLAN_TO_BB_COEX

UART_AP_TO_WLAN_RTS_LUART_AP_TO_WLAN_TXD

PMU_TO_WLAN_REG_ON

50_L

AT_W

LAN_

MLC

50_U

AT_W

LAN_

2G_S

OUT

H

90_PCIE_AP_TO_WLAN_TX_N

90_PCIE_WLAN_TO_AP_RX_N

90_PCIE_AP_TO_WLAN_REFCLK_N

RADIO_MLB_KAROO

AP_TO_BB_DEVICE_WAKE

50_UAT_WLAN_5G_SOUTH50_UAT_WLAN_2G_SOUTH

PP_VDD_MAINPP1V8_SDRAMPP3V0_TRISTAR

UART_WLAN_TO_BB_COEX

90_PCIE_AP_TO_BB_REFCLK_P

NFC_TO_BB_CLKREQ

SIM1_SWP

BB_TO_NFC_CLK

USB_BB_VBUS90_USB_BB_P90_USB_BB_N

I2S_BB_TO_AP_BCLKI2S_BB_TO_AP_LRCLKI2S_AP_TO_BB_DOUT

UART_BB_TO_AOP_RXD

UART_AP_TO_BB_TXDUART_BB_TO_AP_RXD

AP_TO_GNSS_DEVICE_WAKEAP_TO_GNSS_TIME_MARK

UART_GNSS_TO_AP_CTS_LUART_AP_TO_GNSS_RTS_L

UART_GNSS_TO_AP_RXDUART_AP_TO_GNSS_TXD

PMU_TO_GNSS_EN

I2S_BB_TO_AP_DIN

SWD_AP_BI_BB_IOSWD_AP_TO_BB_CLK

UART_AOP_TO_BB_TXD

AP_TO_BB_RESET_LPMU_TO_BBPMU_ON

AP_TO_BB_MESA_ON

AP_TO_BBPMU_SDWN_L

AP_TO_BB_COREDUMP_TRIG

50_LAT_WLAN

UART_BB_TO_WLAN_COEX

90_PCIE_AP_TO_BB_REFCLK_N

AP_TO_BB_IPC_GPIOTOUCH_TO_BBPMU_FORCE_PWM

BB_TO_AP_RESET_DETECT_LBB_TO_AP_GSM_TXBURST

90_PCIE_AP_TO_BB_TX_P90_PCIE_AP_TO_BB_TX_N90_PCIE_BB_TO_AP_RX_P90_PCIE_BB_TO_AP_RX_NPCIE_AP_TO_BB_PERST_L

PCIE_AP_BI_BB_CLKREQ_LPCIE_BB_TO_PMU_WAKE_L

ANTENNA FEEDSPMU_TO_BB_GNSS_32KCLOCKS

BB CONTROL

RADIO_MLB PORTSPOWER

DEBUG

AP_TO_BB_DEVICE_WAKE

AOP

AUDIO

UART

PCIE

NFC

GNSS

WLAN

ICE17.2 RADIO_MLB

BOM OPTIONS

ALTERNATES

13 OF 34

Tue Apr 11 16:10:08 2017

12 27 28

12 18

12 14 28

12 14

12 14

14 28

12 14 28

12 14 28

12 14 28

12 14 28

12 14 28

12 14

12 14

14 28

12 15 28

12 14 15 16 17 18 23 26 27 28 29

12 17 18 19 20 27 28

12 29

12 17 28

12 17 28

12 14 17 28

12 14

12 14

12 27

12 14

12 14 28

12 14 28

12 14 28

12 14 28

14 28

12 14

12 14

12 14 28

12 18 28

12 27 28

12 27 28

12 14 28

12 15 28

12 27 28

12 27 28

12 27 28

PP1V8_S2

PP3V0_S2

AP_TO_BBPMU_RADIO_ON_L

PMU_TO_BBPMU_RESET_L

BB_TO_STROBE_DRIVER_GSM_BURST_IND

AP_TO_BB_MESA_ON_K

AP_TO_BB_COREDUMP

AP_TO_MANY_BSYNC

AP_TO_BB_IPC_GPIO1

90_PCIE_AP_TO_BB_TXD_N

90_PCIE_AP_TO_BB_TXD_P

90_PCIE_BB_TO_AP_RXD_P

PCIE_AP_TO_BB_RESET_L

90_PCIE_BB_TO_AP_RXD_N

BB_TO_PMU_PCIE_HOST_WAKE_L

PCIE_BB_BI_AP_CLKREQ_L

UART_AP_TO_BB_TXD_K

UART_BB_TO_AP_RXD_K

NFC_SWP1

NFC_TO_BB_CLK_REQ

AP_TO_BB_TIME_MARK

AP_TO_GNSS_WAKE

SWD_AOP_TO_MANY_SWCLK

SWD_AOP_BI_BB_SWDIO

PMU_TO_BB_USB_VBUS_DETECT

90_USB_BB_DATA_P

90_USB_BB_DATA_N

051-02247

2017-04-1100084489387 ENGINEERING RELEASED

1 OF 17

evt-1

7.0.0

SCH,MLB,BOT,X893

2 16

2 16

3 16

16

2 16

17

17

17

UART_GNSS_TO_AP_CTS_L

UART_GNSS_TO_AP_RXD

UART_AP_TO_GNSS_RTS_L

UART_AP_TO_GNSS_TXD

PMU_TO_GNSS_EN

BB_TO_NFC_CLK

UART_WLAN_TO_BB_COEX

UART_BB_TO_WLAN_COEX

I2S_BB_TO_AP_DIN

I2S_BB_TO_AP_LRCLK

I2S_AP_TO_BB_DOUT

I2S_BB_TO_AP_BCLK

UART_BB_TO_AOP_RXD

UART_AOP_TO_BB_TXD

90_PCIE_AP_TO_BB_REFCLK_P

90_PCIE_AP_TO_BB_REFCLK_N

BB_TO_AP_RESET_DETECT_L

AP_TO_BB_RESET_L

PP_VDD_MAIN

50_UAT_WLAN_5G_SOUTH

50_LAT_WLAN

50_UAT_WLAN_2G_SOUTH

RADIO_MLBTYPICAL_CAP138S0831 C402_K,C437_K,C438_K,C433_K,C510_K,C720_K,C1601_K7 CAP,TYPICAL,2.2UF,6.3V,0201,MURATA

SOFT_CAPC402_K,C437_K,C438_K,C433_K,C510_K,C720_K,C1601_K7 CAP,SOFT-TERM,2.2uF,6.3V,0201,KYOCERA138S00159

1337S00244 CRITICAL BB_PROD_FUSEDU_BB_KBASEBAND, PRODUCTION FUSED

998-05782 1 BB_DEV_FUSEDCRITICALU_BB_KBASEBAND, DEV FUSED

CRITICAL BB_LOCAL_FUSED1998-05781 U_BB_KBASEBAND, LOCAL FUSED

998-05780 1 BB_UNFUSEDCRITICALU_BB_KBASEBAND, UNFUSED

?MURATA138S00086 C500_K, C501_K, C502_K, C514_K, C515_K138S0884

?GNSS_K339S00353339S00363 PILSNER STATS

MURATA ?138S0831 C402_K, C433_K, C437_K, C510_K, C720_K138S00032

MURATA138S00049 ?C402_K, C433_K, C437_K, C510_K, C720_K138S00032

MURATA ?C509_K, C523_K, C605_K, C624_K, C626_K, C1114_K, C1116_K138S00133 138S00128

C522_K ?MURATA138S1103138S0719

ON SEMI EEPROM ?EPROM_K335S00013 335S0894

197S00040 AVX VC-TCXO ?VTCXO_K197S00044

?NDK VC-TCXOVTCXO_K197S00042 197S00044

GNSS1515UPPER ANTENNA FEEDS1414

1616 TEST POINTS & SIM

DIVERSITY RECEIVE LNA'S1313

99 FDD TRANSMIT1010 PRIMARY RECEIVE

1212 DIVERSITY RECEIVE ASM'S11 11 LOWER ANTENNA & COUPLERS

77 ET MODULATOR66 TRANSCEIVERS

BASEBAND POWER4455 BASEBAND PMIC

88 TDD TRANSMIT

33 BASEBAND MEMORY/DEBUG

CONTENTSPDF PAGE CSA PAGE22 BASEBAND

BRANCH

8

REVISION

ECNREV DESCRIPTION OF REVISION2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

CKAPPD

2 1

124567

B

D

6 5 4 3

C

A

PAGE

C

A

D

DATE

SHEET

DSIZEDRAWING NUMBER

7

B

3

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

8

IV ALL RIGHTS RESERVED

II NOT TO REPRODUCE OR COPY IT

PROPRIETARY PROPERTY OF APPLE INC.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

DRAWING TITLE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

DESCRIPTION BOM OPTIONREFERENCE DESIGNATOR(S)PART NUMBERALTERNATE FORPART NUMBER

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IO

IO

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IO

IO

IO

IO

IO

IO

IN

IN

IN

IN

IN

PERST PULLED DOWN AT APFS

FSFS

FS

EINT3

EINT2

FSFS

BASEBAND

FS

FS

FS

FS

FSFSFS

FS

FS

FS

FS

BB EEPROM

BOOTROM DRIVENFS

FS

EINT4

EINT6

EINT5

EINT7

EINT0CC1_IN

14 OF 34

12 13 28

R206_K

28

14 28

28

13 28

13 28

12 13 28

17

27

12 13 28

17 28

17 28

R200_K

18 28

12 13 28

12 13 28

12 13 14 28

18

18

18

18

R204_K

18

18

18

18

18

18 28

18 28

18

18

18

R203_K

18

18

18 28

18 28

18

18

18

18

R202_K

EPROM_K

12 13

14 17

28

U_BB_K

U_BB_KU_BB_K

C201_K

18 28

R209_KR207_K

12 13

12 13

28

12 13 28

18 28

12 13

28

18

14 28

17

28

28

18

28

18

13 28

12 13

12 13

12 13

18

R208_K

12 13 14 17 28

18

14 17

12 13

12 13

12 13 28

12 13 28

R201_K

R205_K

12 13 28

12 13 28

12 13 28

12 13 28

C200_K

12 13 28

90_DIGRF_M0_RX1_N_K

90_DIGRF_M0_RX1_P_K

90_DIGRF_M0_RX2_N_K

90_DIGRF_M0_RX2_P_K

90_DIGRF_M1_RX1_N_K

90_DIGRF_M1_RX1_P_K

90_DIGRF_M1_RX2_N_K

90_DIGRF_M1_RX2_P_K

90_DIGRF_M0_TX_N_K

90_DIGRF_M0_TX_P_K

90_DIGRF_M1_TX_N_K

90_DIGRF_M1_TX_P_K

DIGRF_M0_EN_K

DIGRF_M1_EN_K

90_DIGRF_A0_RX1_N_K

90_DIGRF_A0_RX1_P_K

90_DIGRF_A0_RX2_N_K

90_DIGRF_A0_RX2_P_K

90_DIGRF_A1_RX1_N_K

90_DIGRF_A1_RX1_P_K

90_DIGRF_A1_RX2_N_K

90_DIGRF_A1_RX2_P_K

90_DIGRF_A0_TX_N_K

90_DIGRF_A0_TX_P_K

90_DIGRF_A1_TX_N_K

90_DIGRF_A1_TX_P_K

DIGRF_A0_EN_K

DIGRF_A1_EN_K

SYSCLK_26MHZ_K

SYSCLK_26MHZ_EN_K

AP_TO_BBPMU_RADIO_ON_L1 2 5 16

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

PCIE_BB_BI_AP_CLKREQ_L1 2 16

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

SIM1_DETECT_K2 16

VDD_SIM1_K4 5 16

SIM1_IO_K2 16

PCIE_AP_TO_BB_RESET_L

PCIE_BB_BI_AP_CLKREQ_LBB_TO_STROBE_DRIVER_GSM_BURST_IND

BBPMU_STBY_K

GNSS_BLANK_K

BBPMU_VDIO_K

BBPMU_VCLK_K

AP_TO_BBPMU_RADIO_ON_L

I2C_BBPMU_SDA_K2 5

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

I2C_BBPMU_SCL_K2 5

SIM1_CLK_K

SIM1_IO_K

AP_TO_BB_MESA_ON_K

AP_TO_BB_COREDUMP

I2C_BB_EEPROM_SCL_K 2

USB_BB_TUNE_K

I2C_BBPMU_SCL_K

I2C_BBPMU_SDA_K

90_USB_BB_DATA_N

90_USB_BB_DATA_P

I2C_BB_EEPROM_SDA_K 2

PMU_TO_BB_USB_VBUS_DETECT 1 16

PCIE_REF_RES_K

90_PCIE_BB_TO_AP_RXD_P

90_PCIE_BB_TO_AP_RXD_N

90_PCIE_AP_TO_BB_TXD_P

90_PCIE_AP_TO_BB_TXD_N

I2C_BB_EEPROM_SDA_K 2

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

I2C_BB_EEPROM_SCL_K2

DEV_HW_CONFIG_K

AP_TO_BB_IPC_GPIO1

UART_AP_TO_BB_TXD_K

UART_BB_TO_AP_RXD_K

SIM1_RST_K

BB_TO_PMU_PCIE_HOST_WAKE_L

SIM1_DETECT_K

BB_HW_ID<3>_K

BB_HW_ID<2>_K

BBPMU_ALERT_L_K

BB_DEBUG_ERROR_K

BB_HW_ID<1>_K

BB_HW_ID<0>_K

7.0.0

evt-1

2 OF 17

051-02247

2

1

C14

B13

D15

P18N18

C16

F16E16F17

E17

N2N1

E2E1

R2R1

G1G2

V6

U5

L2L1

M2M1

C3C2

D2D1

U2U1

T2T1

J2J1

H1H2

K4A3

T4J4

W1

E19E18

D18D19

Y7Y6

Y5AA7

J20J18

K20K19

AA3Y2

Y1AA1

AB2AB1AC1AC2

T19T18

AC15AC14AA15

AE16AE15AE13AE14

U8V8V7U9W7V9U7

W4Y4W3Y3AA4W2

A15B16

L20L19

L18M20K18C15

J17

H20G19

H18H19

F18F19G18

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

A2A1

B2B1

1/32W 1/32W

1/32W

1/32W

1/32W 1/32W

1/32W

1/32W

1/32W 1/32W

CER-X5RMF MF

MF

MF

MF MF

NP0-C0G

MF

MF

MF MF

0201

WLCSP

01005

BGA

01005

01005

01005

01005 01005

BGA

01005

BGA

01005

01005

01005 01005

20%1% 1%

1%

1%

1% 1%

5%

5%

1%

1% 1%

16V

16V

OMIT_TABLE

OMIT_TABLE

OMIT_TABLE

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND BASEBAND

1UF

CAT24C08C4A

10K

PMB9948

10K

200

200

1.00K 1.00K

PMB9948

100PF

PMB9948

4.7K

100K

100K 100K

UART_AOP_TO_BB_TXD

BB_TO_AP_RESET_DETECT_L

UART_BB_TO_AOP_RXD

90_PCIE_AP_TO_BB_REFCLK_N

90_PCIE_AP_TO_BB_REFCLK_P

I2S_BB_TO_AP_LRCLK

I2S_BB_TO_AP_DIN

I2S_AP_TO_BB_DOUT

I2S_BB_TO_AP_BCLK

UART_WLAN_TO_BB_COEX

UART_BB_TO_WLAN_COEX

BASEBAND

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

IN

NC

NC

NC

NC

NC

OUT

BI

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

BI

IN

OUT

IN

BI

OUT

NCNC

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

IN

IN

IN

IN

NCNCNCNC

NC

VCC

VSS

SDASCL

NC

BI

BI

IN

SYM 9 OF 9

PCIE_PERST*PCIE_CLKREQ*

FTA_TRIG

MODEM_STDBY

IDC_PA_BLANKING

IDC_UART_TXDIDC_UART_RXD

VDIO

VCLK

SDWN_REQ*

DIG

RF

V4.

0 A

UX

DIG

RF

V4.

0 M

AIN

CLO

CK

S A

ND

CO

NT

RO

L

SYM 7 OF 9

SYS_CLK_EN

SYS_CLK

MPHY_AUX_1_ENMPHY_AUX_0_EN

RXDAT_MAIN_0_2-

RXDAT_MAIN_1_1-

RXDAT_AUX_0_2-

RXDAT_AUX_0_1+

RXDAT_MAIN_0_1-

RXDAT_MAIN_1_2-RXDAT_MAIN_1_2+

TXDAT_MAIN_0_1-TXDAT_MAIN_0_1+

TXDAT_MAIN_1_1-TXDAT_MAIN_1_1+

RXDAT_AUX_0_1-

RXDAT_AUX_0_2+

RXDAT_AUX_1_1+RXDAT_AUX_1_1-

RXDAT_AUX_1_2+RXDAT_AUX_1_2-

TXDAT_AUX_0_1+TXDAT_AUX_0_1-

TXDAT_AUX_1_1+TXDAT_AUX_1_1-

MPHY_MAIN_0_ENMPHY_MAIN_1_EN

RXDAT_MAIN_1_1+

RXDAT_MAIN_0_1+

RXDAT_MAIN_0_2+

I2C

2

SYM 1 OF 9

US

IF1

MM

C/S

DIO

1E

XT

INT

ER

RU

PT

PC

IE

US

IF2

I2S

2

US

IF3

I2C

1U

SB

3.0

SIM

CA

RD

1S

IM C

AR

D 2

EXTRA I/OS

PCI_PET_P1PCI_PET_N1

PCI_REF_RESPCI_REFCLK_NPCI_REFCLK_P

PCI_PER_P1PCI_PER_N1

I2S2_CLK1I2S2_CLK0

I2S2_WA1I2S2_WA0

I2S2_TX

THERM_SNS_CTHERM_SNS_A

I2C1_SCLI2C1_SDA

I2C2_SCL

USB_DPLUSUSB_DMINUS

I2C2_SDA

USB_TUNEVBUS

USB_TEST

USB30_TXP

USB30_RXN

USB30_TXNUSB30_RXP

I2S2_RX

USIF2_CTS*

USIF3_RXD_MRSTUSIF3_TXD_MTSR

USIF3_CTS*USIF3_RTS*

USIF2_RTS*

USIF2_RXD_MRSTUSIF2_TXD_MTSR

USIF1_RTS*

USIF1_RXD_MRSTUSIF1_TXD_MTSR

USIF1_CTS*

CC2_RSTCC2_IOCC2_CLKCC2_IN

CC1_RSTCC1_IOCC1_CLK

EINT3EINT2EINT1

MMCI1_DAT_3MMCI1_DAT_2

EINT0

MMCI1_CMD

MMCI1_CD*

MMCI1_DAT_1MMCI1_DAT_0

MMCI1_CLK

CLKOUT1

NC

OUT

OUT

OUT

IN

IN

NC

OUT

NC

NCNC

OUT

OUT

NC

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

OUT

OUT

OUT

IN

OUT

BI

BI

OUT

OUT

IN

IN

IN

FSFS

FS

BASEBAND MEMORY/DEBUG

FS

15 OF 34

C300_K C301_K

12 13 15 28

17 28

17 28

18

18

12 13 28

12 13 28

28

28

28

R302_K

15 27 28

TCXO_K

C303_K

U_BB_K

U_BB_K

U_BB_K

R300_K

12 13 15 28

28

28

28

28

28

17 18 28

15 27 28

17

HW_MON1_K

HW_MON2_K

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

BB_JTAG_TRST_L_K

SWD_AOP_TO_MANY_SWCLK

SWD_AOP_BI_BB_SWDIO

BB_JTAG_TDO_K

BB_JTAG_TDI_K

BB_JTAG_TMS_K

BB_JTAG_TCK_K

BBPMU_PWRGOOD_K

BBPMU_XG_RESET_L_K

BBPMU_XG_RESET_SD_L_K

BB_TO_AP_RESET_ACT_L_K

XCVR0_RESET_L_K

XCVR1_RESET_L_K

BB_DDR_VREF_DQ_K

BB_DDR_VREF_CA_K

TCXO_BB_GNSS_32K_K

BB_DDR_CKE_K 4

PP1V8_TCXO_K

TCXO_BB_GNSS_32K_K

BBPMU_32K_K

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

7.0.0

evt-1

3 OF 17

051-02247

21

34

21

2

1

A19

C20

E8D7C7C5C6F8D5G6G7D6F6E7F5E5E4F4

D4C4

C18

C19B20

D17

E15F15

B19

E20D20

B17

B15

H16P19V1N19T20AA6B18

Y19Y17W5W20W19W17W15W13AA5V2

U4L4

M19

L10L11

B14

N20

P20

W12W10AC9U11Y11

Y9Y10

V13U13V12W11Y13

AA12AB12

V11

G16R20 AE10

A12

AE17

AD6

AD13

AD9

AC16

AE5

AE12

AE9

AD16

AD12AD10

AE19

AE2AD15

AD7AE6

B10

AB10

B11A11

E14D13C13C12A13C10

B9A9A8B8

2

1

2

1

2

1

1/32W

1/32W

MF

X5R-CERM

CERM CERM

MF

01005

BGA

01005

CSP

01005 01005

BGA

BGA

01005

0%

20%

5% 5%

1%

6.3V

16V 16V

OMIT_TABLE

OMIT_TABLE

OMIT_TABLE

BASEBAND

BASEBAND

BASEBAND BASEBAND

BASEBAND

BASEBAND

BASEBAND

0.00

PMB9948

0.1UF

32.768KHZ-5PPM

47PF 47PF

PMB9948

PMB9948

100K

AP_TO_BB_RESET_L

AP_TO_BB_RESET_L

BASEBAND MEMORY/DEBUG

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

NCNC

IN

IN

IN

OUT

OUT

BI

IN

NC

OUT

NC

NCNCNCNC

NCNCNCNC

OUT

NCNCNCNC

NC

OUT

OUT

NC

CAL/NC

VDD

CLKOUT

GND

NC

SYM 5 OF 9

TP

IU

MO

NIT

OR

ING

JTA

G

TRST*

HW_MON2

TPIU_TRACEPKT7TPIU_TRACEPKT6

TPIU_TRACEPKT0

TRIG_IN

HW_MON1

SWDCLKSWDIO

TDOTDITMSTCK

RTCK

TPIU_TRACEPKT1TPIU_TRACEPKT2TPIU_TRACEPKT3TPIU_TRACEPKT4TPIU_TRACEPKT5

TPIU_TRACEPKT14

TPIU_TRACECTLTPIU_TRACECLK

TPIU_TRACEPKT15

TPIU_TRACEPKT13TPIU_TRACEPKT12

TPIU_TRACEPKT10TPIU_TRACEPKT11

TPIU_TRACEPKT9TPIU_TRACEPKT8

AD

N S

EN

SE

CO

NT

AC

T

SYM 6 OF 9

PM

U C

ON

TR

OL

RESET_TRX2*

RCT_MON2RCT_MON1

VSS_SENSE

RESET_TRX1*

CP_RESET_BB*

XG_RESET*

XG_SDWN*

RESET2*

PWRGOOD

VSSVSS

VSSVSS

VSS

VSSVSSVSS

VSS

VSS

VSSVSS

VSSVSS

VSSVSS

NA

ND

IF

DB

B E

MIC

SYM 2 OF 9

CLO

CK

S &

CO

NT

RO

L

DDR_DQS_T_0

DDR_DQ_31

DDR_DQS_C_0DDR_DQS_T_1

DDR_VREF_DQ

DDR_DQS_T_2DDR_DQS_C_2DDR_DQS_T_3DDR_DQS_C_3

DDR_CK_T

DDR_DQM_0DDR_CK_C

DDR_DQS_C_1

DDR_DQM_1

DDR_DQM_3

DDR_CKE_1

DDR_VREF_CA

DDR_DQ_1DDR_DQ_0

DDR_DQ_15DDR_DQ_16

NAND_ADQ_3NAND_ADQ_2

NAND_ADQ_4

NAND_ADQ_0NAND_ADQ_1

NAND_ADQ_5

NAND_ADQ_7NAND_ADQ_6

NAND_RE*NAND_WE*NAND_WP*

NAND_CE*NAND_ALE

NAND_RB*NAND_CLE

DDR_CA_4DDR_CA_3

DDR_CA_5DDR_CA_6DDR_CA_7DDR_CA_8

DDR_CA_2

DDR_CA_0DDR_CA_1

DDR_CA_9

OSC32KF32KFSYS_32K

DDR_CS_1

NC

NC

IN

OUT

NC

IN

IN

IN

IN

NC

NC

NC

NC

NCNC

NCNCNC

NC

NCNC

NC

NC

NCNC

NC

NCNC

NC

NC

NCNC

NCNC

NCNC

NCNC

NC

NC

NCNC

NCNC

NC

NC

NCNC

NC

NCNC

NC

NC

IN

NC

IN

OUT

NC

AE11

AA20Y20

BASEBAND POWER

M5

B7B6

U10AB7

16 OF 34

C439_K

C409_KC405_K

C408_K

C404_KC403_K

C406_K

C407_K

C441_K

U_BB_K

R400_K

U_BB_K

C440_K

C436_KC434_KC431_KC429_K

C435_K

C432_KC430_K

C427_KC424_K

C418_KC413_K

C428_KC425_K

C426_K

U_BB_K

C419_KC414_K

C420_KC415_K

C421_KC416_K

C422_K

C423_K

C417_K

C401_K

R401_K

C400_KC412_KC411_K

C438_KC437_K

C433_K

C402_K C410_K

VDD_DDR_1V8_K 4 5

VDD_IO_1V2_K 4 5

VDD_USB_3V15_K 5

VDD_IO_1V2_K 4 5

VDD_DDR_1V8_K4 5

VDD_IO_1V2_K4 5

VDD_DDR_1V8_K4 5

ZQ_MEM_K

BB_DDR_CKE_K3

PP1V8_S2 1 2 3 4 5 6 11 14 15 16 17

VDD_IO_1V2_K 4 5

VDD_IO_1V2_K4 5

VDD_CORE_1V0_K4 5

6

VDD_CORE_1V0_K4 5 6

VDD_CORE_1V0_K4 5 6

VDD_CORE_1V0_K4 5 6

VDD_IO_1V2_K4 5

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

VDD_SIM1_K2 5 16

VDD_SIM2_K5

VREF_0V6_KVDD_VREFCP_K5

VDD_IO_1V2_K4 5

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

7.0.0

evt-1

4 OF 17

051-02247

2

1

2

1

AB3

W14W9

V19

T3R3N3M3J3H3F3E3

G17V17U3R18U17U14T7T17T15T14T13T12T11R7R17R15R13P9P8P7P6P3P2P17P15P12P11P10N9N8N7N17N16N14N13N12N11N10

M7M6

AB4D16M16

L9L8L7L5L3

K17L16K9K7K6K3

K16K10J16H9H8H7H6H5G9G3

G14G13

F7F2

F14E6

E13E12E10D8C1B5B4B3B2

B12B1

AC10M17AA8

AA19AA17AA14

A4A2

A14A10

2

1

D14

AE8AE3AD14AD19

V15P13N15M12L13K12J15H13H12G12D12D10C9AD8AD5AD4AD20AD18AD17AD11AC4AC19AB9AB19AB18AB17AA13

AE7AE4

AE18AC13

AD2A7

AC20A5

A17

AD3AB20

A6A16

AA11

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

A18

Y8

AA2

F20G20R19

V20

AC3

Y12

U20

AE11

P1

K1

K2

F1

AB13

T8R8

R11R10J19G8

AA9AB6

AC12AC11AC18AC17AC6AC5AB14AB15AC8AC7

AB16

V10U10

Y20Y18

Y16Y14

W18W16V18V16V14U18U16U15T16R16R14AB5

AA20AA18AA16

M18P16P14H17C17L17R9

R12M9M8

M15M13M11M10

K8K5

K15K13K11

J9J8J7J6J5

J13J12J11J10H15H11H10G11G10

F9F13F12F11F10E9

E11D9

D11C8

C11B7B6

AB8AB7

V5V4U6R6P4N6M5M4L6

AD1

U12

U19

AB11

R4

N4

D3

G4

AE20AE1A20A1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

21

2

1

2

1

2

12

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1/32W

1/32W

CER-X5R X5R-CERM CERM-X5R CERM-X5R

MF

X5R

CER-X5R

X5R-CERM

CER-X5R

X5R-CERM

CER-X5R

CER-X5R X5R-CERM

CER-X5R X5R-CERM

CER-X5R X5R-CERM

X5R-CERM X5R-CERM

MF

X5R-CERM

CER-X5R X5R-CERM X5R-CERM X5R-CERM

X5R-CERM

X5R-CERM X5R-CERM

X5R-CERM

X5R-CERM

X5R-CERM

X5R-CERM

X5R-CERM X5R-CERM X5R-CERM

X5R-CERM

X5R

X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM CER-X5R

X5R-CERM

0201 01005 0201 0201

01005

01005

0201

01005

0201

01005

BGA

0201

0201 01005

0201 01005

0201 01005

0201 01005

01005

01005

0201 01005 01005 01005

01005

0201 01005

01005

01005

0201

01005

0201 01005

BGA

01005

BGA

01005

01005

01005 01005 01005 01005 01005 0201

01005

20% 20% 10% 10%

1%

10%

20%

20%

20%

20%

20%

20% 20%

20% 20%

20% 20%

20% 20%

1%

20%

20% 20% 20% 20%

20%

20% 20%

20%

20%

20%

20%

20% 20% 20%

20%

20%

20% 20% 20% 20% 20% 20%

20%

16V 6.3V 6.3V 6.3V

6.3V

16V

6.3V

16V

6.3V

16V

16V 6.3V

16V 6.3V

16V 6.3V

6.3V 6.3V

6.3V

16V 6.3V 6.3V 6.3V

6.3V

6.3V 6.3V

6.3V

6.3V

6.3V

6.3V

6.3V 6.3V 6.3V

6.3V

6.3V

6.3V 6.3V 6.3V 6.3V 6.3V 16V

6.3V

OMIT_TABLE

OMIT_TABLE

OMIT_TABLE

OMIT_TABLE OMIT_TABLE

OMIT_TABLE

OMIT_TABLE

BASEBAND BASEBAND BASEBAND BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND BASEBAND

BASEBAND BASEBAND

BASEBAND BASEBAND

BASEBAND BASEBAND

BASEBAND

BASEBAND

BASEBAND BASEBAND BASEBAND BASEBAND

BASEBAND

BASEBAND BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND

BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND

BASEBAND

1UF 0.1UF 0.47UF 0.47UF

10K

0.01UF

1UF

0.1UF

1UF

0.1UF

PMB9948

1UF

1UF 0.1UF

1UF 0.1UF

1UF 0.1UF

2.2UF 0.1UF

240

0.1UF

1UF 0.1UF 0.1UF 0.1UF

0.1UF

2.2UF 0.1UF

0.1UF

0.1UF

2.2UF

0.1UF

2.2UF 0.1UF

PMB9948

0.1UF

PMB9948

0.1UF

0.22UF

0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1UF

0.1UF

BASEBAND POWER

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

GROUND

SYM 3 OF 9

VSS

VSS_MPHY_4VSS_MPHY_4VSS_MPHY_3VSS_MPHY_3VSS_MPHY_2VSS_MPHY_2

VSS_MPHY_1VSS_MPHY_1

VSS_PCIE_TX

VSS_USBVSS_PLLVSS_PLL

VSSVSS

VSSVSSVSSVSSVSS

VSS

VSSVSSVSS

VSSVSS

VSSVSSVSS

VSSVSSVSSVSSVSS

VSSVSS

VSSVSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSSVSS

VSSVSS

VSS

VSSVSS

VSSVSSVSS

VSS

VSSVSS

VSS

VSS

VSSVSSVSSVSSVSS

VSS

VSSVSS

VSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSSVSS

VSSVSSVSS

VSSVSS

VSSVSSVSSVSSVSSVSS

VSS

LPDDR2 RAM

SYM 8 OF 9

VSS_EMICVSS_EMIC

VSS_EMIC

VSS_EMIC

VSS_EMICVSS_EMIC

VSS_EMICVSS_EMICVSS_EMIC

VSSQ_MEM

VSSQ_MEMVSSQ_MEM

VSSQ_MEM

VSS_EMIC

VSS_EMICVSS_EMICVSS_EMIC

VSS_EMICVSS_EMICVSS_EMICVSS_EMICVSS_EMICVSS_EMICVSS_EMICVSS_EMICVSS_EMICVSS_EMICVSS_EMICVSS_EMIC

VSS_EMICVSS_EMIC

ZQ_MEMCKE_MEM

VDD1_MEM

VDD2_MEMVDD2_MEM

VDD2_MEMVDD2_MEM

VDD1_MEM

VDD2_MEM

VDD1_MEMVDD1_MEM

VDDQ_MEMVDDQ_MEM

VDDQ_MEMVDDQ_MEM

NC

NC

NC

NC

NC

NC

NC

NCNCNCNC

NC

DBB POWER PINS

SYM 4 OF 9VDD_CORE_MAINVDD_CORE_MAINVDD_CORE_MAINVDD_CORE_MAIN

VDD_EMIC_IO_CA

VDD_LDO_DIGRF_PHY2LDO_MON_DIGRF1

VDD_LDO_DIGRF_PHY1

LDO_MON_DIGRF2

VDD_PCIE_1V8LDO_MON_PCIE

VDD_LDO_DIGRF_PHY3LDO_MON_DIGRF3

VDD_LDO_DIGRF_PHY4LDO_MON_DIGRF4

VDD_LDO_PCIE

DUMMY_BALLDUMMY_BALLDUMMY_BALL

VPP

VDD_EMIC_IO_0VDD_EMIC_IO_0

VDD_EMIC_IO_1VDD_EMIC_IO_1

VDD_EMIC_IO_2

VDD_LDO_DLL_EMIC

VDD_EMIC_IO_2VDD_EMIC_IO_3

VDD_EMIC_IO_CA

VDD_EMIC_IO_3

VDD_EMIC_1V8_IO

VDD_LDO_USB_SSLDO_MON_USB_SS

VDD_USB_SS_IO

VDD_CORE_MAINVDD_CORE_MAINVDD_CORE_MAIN

VDD_CORE_MAINVDD_CORE_MAIN

VDD_CORE_MAIN

VDD_CORE_MAINVDD_CORE_MAINVDD_CORE_MAIN

VDD_CORE_MAINVDD_CORE_MAINVDD_CORE_MAINVDD_CORE_MAINVDD_CORE_MAINVDD_CORE_MAIN

VDD_CORE_3GVDD_CORE_3GVDD_CORE_3GVDD_CORE_3G

VDD_CORE_3GVDD_CORE_3G

VDD_CORE_3GVDD_CORE_3G

VDD_CORE_3G

VDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTE

VDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_DSPVDD_CORE_TDVDD_CORE_TD

VDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTEVDD_CORE_LTE

VDD_CORE_DSP

VDD_LDO_PLL

VDD_RTC

VDD_IO18VDD_IO18

VDD_IO18VDD_IO18

VDD_SIM1VDD_SIM2

LDO_MON_PLL

VDD_LDO_CORE_EMICLDO_MON_EMIC

VDD_IO18

VREF_0V6

VDD_IO18VDD_IO18VDD_IO18

VDD_CORE_LTE

VDD_CORE_LTEVDD_CORE_LTE

DUMMY_BALL

NC

BBPMU.F1

0.7MM MAX Z

BBPMU.C8/D8

BBPMU.G5

BBPMU.E2BBPMU.A1 BBPMU.B4BBPMU.A8BBPMU.H1

BASEBAND PMIC

17 OF 34

XW500_K

14 28

14 28

14

15

C522_K

14

C519_K

C517_K

C518_KC516_K

C502_KC501_KC500_K

R501_K12 13 28

15 28

C508_K

BBPMU_K

L502_K

C521_KC520_K

12 13 28

C513_K C507_KC506_KC505_KC504_KC503_K

12 13 14 28

C509_KC523_K

L503_K

L501_K

L500_K

15 18 28

14

14

C510_K

XW501_K

15 28

XW502_K

XW504_K

XW503_K

C514_K C515_K

C512_KC511_K

VDD_CORE_1V0_K 6 5 4

VMOD1_FB_K 5

VMOD1LX_K

VDD_BBPMU_3V3_K 5

VDD_SIM1_K 16 4 2

VDD_SIM2_K 4

AP_TO_MANY_BSYNC

VRF_CORE_1V0_K 6 5

VDD_IO_1V2_K 5 4

VRF_ANA_1V3_K 6 5

VFE_AUX_3V1_K 11 9 8

VFE_LNA_2V7_K 13 12

VDD_VREFCP_K 4

VPMIC_K

VMOD4LX_K

TOUCH_TO_BBPMU_FORCE_PWM_R_K

VCHP_CP_K

VMOD3LX_K

VDD_DDR_1V8_K 4

VMOD3_FB_K 5

VMOD2_FB_K 5

VMOD4_FB_K 5

VMOD2LX_K

VCHP_CN_K

VOTP_K

VPMICREF_K

PP1V8_S2 17 16 15 14 11 6 5 4 3 2 1

VDD_BBPMU_3V3_K 5

PP1V8_S2 17 16 15 14 11 6 5 4 3 2 1

BBPMU_AGND_K5

PP1V8_S2 17 16 15 14 11 6 5 4 3 2 1

VMOD1_FB_K 5

VMOD2_FB_K 5

VMOD3_FB_K 5

VMOD4_FB_K 5

VDD_CORE_1V0_K6 5 4

VRF_CORE_1V0_K6 5

VRF_ANA_1V3_K6 5

BBPMU_XG_RESET_SD_L_K

BBPMU_XG_RESET_L_K

PP1V8_S217 16 15 14 11 6 5 4 3 2 1

PMU_TO_BBPMU_RESET_L

AP_TO_BBPMU_RADIO_ON_L

BBPMU_PWRGOOD_K

BBPMU_32K_K

BBPMU_VDIO_K

I2C_BBPMU_SCL_K

I2C_BBPMU_SDA_K

VDD_USB_3V15_K4

BBPMU_VCLK_K

BBPMU_ALERT_L_K

BBPMU_AGND_K5

BBPMU_STBY_K

VDD_IO_1V2_K5 4

7.0.0

evt-1

5 OF 17

051-02247

BASEBAND PMIC

PP_VDD_MAIN

PP_VDD_MAIN

PP_VDD_MAIN

0.47UH-20%-3.8A-0.037OHM

1.0UH-20%-2.6A-0.073OHM

1.0UH-20%-1.9A-0.120OHM

2.2K

4.7UF0.47UF0.47UF10UF10UF1UF2.2UF

2.2UH-20%-1.4A-0.21OHM

1UF

PMB6848

1UF0.22UF

15UF15UF15UF15UF15UF15UF

20UF20UF20UF20UF

2.2UF

27PF100PF

20UF

BBPMUBBPMUBBPMUBBPMUBBPMU

BBPMU

BBPMU

BBPMUBBPMUBBPMUBBPMU

BBPMU

BBPMUBBPMU

BBPMU

OMIT

OMIT

OMIT

OMIT

OMIT_TABLE

OMIT

10V6.3V6.3V10V10V10V6.3V

10V

10V6.3V

6.3V6.3V6.3V6.3V6.3V6.3V

6.3V6.3V6.3V6.3V

6.3V

16V16V

6.3V

5%

20%20%20%20%20%20%20%

20%

20%20%

20%20%20%20%20%20%

20%20%20%20%

20%

5%5%

20%

0805

0805

0603

01005

0402-101005010050402-0.1MM0402-0.1MM02010402

0805

0201

UFWLB

020101005

0402-0.1MM0402-0.1MM0402-0.1MM0402-0.1MM

SHORT-20L-0.05MM-SM

SHORT-20L-0.05MM-SM

0402-0.1MM0402-0.1MM

SHORT-20L-0.05MM-SM

SHORT-20L-0.05MM-SM

0402040204020402

0201

SHORT-10L-0.25MM-SM

0100501005

0402

MF

X5RX5RX5RX5R-CERMX5R-CERMX5RX5R-CERM

X5R

X5RX5R

CERMCERMCERMCERMCERMCERM

CERM-X5RCERM-X5RCERM-X5RCERM-X5R

X5R-CERM

NP0-C0GNP0-C0G

CERM-X5R

1/32W

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1 2

1 2

1 2

1 2

1

2

1 2

1 2

1 2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1 2

E3

E7

A4

G7F4F3

B6C4

G3

C6

F5

C5

C7

D8C8

D4

D7

E1E2A1

A8H1

B3

B5

D1D2D3

A2B2B1

A7B7

H2G1

E6

E5

G5

F1

A5

G6H6

D6

C1C2A3A6H3

G2C3D5H5F7H7E8B8F8

G8

H8

B4G4

H4

E4

F2F6

1

2

1 2

1 5 6 7 8 15 16

1 5 6 7 8 15 16

1 5 6 7 8 15 16

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

NC

BI

IN

IN

IN

OUT

IN

BI

XG_RESET_SD*XG_RESET*

VSYS

GPIO1

VDD_VMOD1VDD_VMOD2VDD_VMOD4VDD_VMOD3

V1V8

V3V3

VPMIC

VREFCPVFE_AUX

VDD_CHP

VCHP_C+VCHP_C-

VSWITCHVIN

VDD_VMOD1

VSWITCH

VMOD3SENSEVMOD3LX

VMOD2SENSEVMOD2LXVMOD2LX

VMOD1LXVMOD1SENSE

VMOD1LX

VMOD4LXVMOD4SENSE

VCHP

VSIM1

VRF

VSIM2

VPMICREFVOTP

VSYS

PMIC_ONSDWN*

XG_PWRGOOD

CLK_32K

VDIO

I2CSCLI2CSDA

VUSB_IO

VCLK

ALERT*

VSSAVSSA

ANAMONTESTENTRY

VSSAVSSAVSSAVSSAVSSAVSSA

VSS_VMOD1

VSS_VMOD3VSS_VMOD2

VSS_VMOD1

VSS_CHP

VSS_VMOD4

VSSA

STBY

IN

IN

OUT

IN

BI

OUT

SMARTI6T

LAYOUT: TRACE SHOULD B1 ~1NH/1MM

LAYOUT: MAX DCR 85MOHM

NOTE: GNSS_CLK REQUESTED WITH AT@CMD

SMARTI6T

TRANSCEIVERS

LAYOUT: MAX DCR 85MOHM

LAYOUT: TRACE SHOULD B1 ~1NH/1MM

VCTCXO

18 OF 34

C644_KC643_KC642_KC641_KC640_KC639_K

XW600_K

C620_K C638_K

C600_K

C623_K

C625_KC606_K

C604_K

C607_K C626_K

C605_K C624_K

R614_K

R604_K R607_K

R616_K

R615_K

XCVR0_K

C649_K

C650_K

C645_K C5945_K

FL600_KFL601_K

XCVR1_K

XCVR1_KXCVR0_K

R610_K

R609_K

25

25

C627_KC608_K

C622_KC621_KC603_KC602_K

VTCXO_K

C619_K

R606_K

C637_K

18 19 20 21 23 24 28

C636_KC635_KC634_KC633_KC632_KC628_K

20

18 19 20 21 23 24 28

18 19 20 21 23 24 25 28

C629_K

C631_K

C630_K

27 28

14

14

15 17 18 28

15

14

14

14

14

14 28

14

14 28

14 28

14 28

14 28

14

14

14

14

18 19 20 21 23 24 28

18 19 20 21 23 24 28

18 19 20 21 23 24 25 28

C617_KC616_KC615_KC614_KC613_KC609_K

12 13 28

12 13 18

14

14

15 17 18 28

15

14

14

14

C601_K

14

14

14

14 28

14 28

14

14

14

14

R605_K

C610_K

C612_K

C611_K

R602_K

R603_K

R600_K

R601_K

VDD_XCVR1_1V3_K6

XCVR1_RFE_GPO0_K

XCVR0_MSYNC_OUT_K 6

XCVR0_MSYNC_IN_K 6

XCVR0_TSYNC_OUT_K 6

XCVR0_TSYNC_IN_K 6

RFFE1_DATA_K

RFFE1_CLK_K

VDD_RFFE_VIO_1V8_K

XCVR1_26MHZ_K 6

RFFE2_CLK_R_K 6 16

RFFE2_DATA_R_K 6 16

VDD_XCVR1_1V8_K6

GNSS_26MHZ_CLKOUT_K

DIGRF_M1_EN_K

DIGRF_A1_EN_K

BBPMU_PWRGOOD_K

XCVR1_RESET_L_K

90_DIGRF_M1_RX1_P_K

90_DIGRF_M1_RX1_N_K

90_DIGRF_M1_RX2_P_K

90_DIGRF_M1_RX2_N_K

90_DIGRF_M1_TX_P_K

90_DIGRF_M1_TX_N_K

90_DIGRF_A1_RX1_P_K

90_DIGRF_A1_RX1_N_K

90_DIGRF_A1_RX2_N_K

90_DIGRF_A1_RX2_P_K

90_DIGRF_A1_TX_P_K

90_DIGRF_A1_TX_N_K

XCVR1_JTAG_TCK_K6

XCVR1_JTAG_TMS_K6

CEXT1_TXMAG_K

VRF_XCVR1_1V0_K6

CEXT1_RX1PLL_K

CEXT1_TXPLL_K

VDD_XCVR1_BAT_K6

CEXT1_RX2PLL_K

XCVR1_26MHZ_EN_K6

VDD_CORE_1V0_K6

VDD_XCVR1_1V3_K6

VDD_XCVR1_1V8_K 6

VRF_XCVR1_1V0_K 6

VRF_ANA_1V3_K5 6

VRF_CORE_1V0_K5 6

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

VDD_XCVR1_BAT_K 6

VDD_CORE_1V0_K 6

VDD_CORE_1V0_K 6

VDD_CORE_1V0_K4 5 6

VDD_CORE_1V0_K4 5 6

RFFE2_CLK_K

RFFE2_DATA_K

NFC_TO_BB_CLK_REQ 1 6

SYSCLK_26MHZ_EN_K

SYSCLK_26MHZ_K

RFFE1_DATA_K

RFFE1_CLK_K

VDD_RFFE_VIO_1V8_K

RFFE2_CLK_R_K6 16

RFFE2_DATA_R_K6 16

VCXO_26MHZ_K 6

XO_SUP_K 6

AFC_DAC_K 6

RFFE2_CLK_R_K 6 16

RFFE2_DATA_R_K 6 16

XCVR0_MSYNC_IN_K 6

XCVR0_MSYNC_OUT_K 6

XCVR0_TSYNC_IN_K 6

XCVR0_TSYNC_OUT_K 6

VDD_CORE_1V0_K6

VDD_XCVR0_1V3_K6

VDD_XCVR0_1V8_K6

NFC_TO_BB_CLK_REQ

DIGRF_A0_EN_K

DIGRF_M0_EN_K

VRF_XCVR0_1V0_K6

VDD_XCVR0_BAT_K6

XCVR1_26MHZ_EN_K6

XCVR1_26MHZ_K6

XCVR0_RESET_L_K

BBPMU_PWRGOOD_K

90_DIGRF_M0_RX1_P_K

90_DIGRF_M0_RX1_N_K

90_DIGRF_M0_RX2_P_K

90_DIGRF_M0_RX2_N_K

90_DIGRF_M0_TX_N_K

90_DIGRF_M0_TX_P_K

90_DIGRF_A0_RX1_P_K

90_DIGRF_A0_RX1_N_K

90_DIGRF_A0_RX2_P_K

90_DIGRF_A0_RX2_N_K

90_DIGRF_A0_TX_P_K

90_DIGRF_A0_TX_N_K

XCVR0_JTAG_TCK_K6

XCVR0_JTAG_TMS_K6

CEXT0_TXMAG_K

CEXT0_RX1PLL_K

CEXT0_TXPLL_K

CEXT0_RX2PLL_K

VDD_XCVR0_1V3_K6 VRF_ANA_1V3_K5 6

VRF_XCVR0_1V0_K 6

VDD_XCVR0_1V8_K 6

VRF_CORE_1V0_K5 6

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

VDD_XCVR0_BAT_K 6

VCXO_26MHZ_K 6

XO_SUP_R_KXO_SUP_K6

AFC_DAC_K6

VDD_XCVR0_1V8_K 6

XCVR1_JTAG_TCK_K 6

XCVR0_JTAG_TMS_K 6

VDD_XCVR1_1V8_K 6

XCVR0_JTAG_TCK_K 6

XCVR1_JTAG_TMS_K 6

7.0.0

evt-1

6 OF 17

051-02247

2

1

2

1

2

1

21

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

21

21 21

21

21 V3U8U6U16

U14U12U10

T5T3

T13R8R6

R12R10

P3P13M3

M15M13

L8L4

L12K3J4H7H5H3

H15H11

F9F5F3

F15D3C8C4C2

C16C12

B9B3

2

1

2

1

2

1

2

1

2121

V3U8U6U16

U14U12U10

T5T3

T13R8R6

R12R10

P3P13M3

M15M13

L8L4

L12K3J4H7H5H3

H15H11

F9F5F3

F15D3C8C4C2

C16C12

B9B3

L10

D17

B17

D13

D5T9

G14

B1

H9

C14

C6

D7

U4

K7N14

R14

N6

N4

L14E14

K15

K9J10

M9

P9N8

M5M7

H13K13

K17J16F17E16H17G16

F11

L16M17R16T17N16P17

K11

D11C10

T11T7N10P11L6K5J6

M11F13

E12G12

J8

B5

N12

P7

J12J14

D15

L10

D17

B17

D13

D5T9

G14

B1

H9

C14

C6

D7

U4

K7N14

R14

N6

N4

L14E14

K15

K9J10

M9

P9N8

M5M7

H13K13

K17J16F17E16H17G16

F11

L16M17R16T17N16P17

K11

D11C10

T11T7N10P11L6K5J6

M11F13

E12G12

J8

B5

N12

P7

J12J14

D15

21

21

2

1

2

1

2

1

2

1

2

1

2

1

1

4

3

2

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

21

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1/32W

1/32W

1/32W

1/32W

1/32W

1/32W

1/32W

1/32W

1/32W

1/32W

1/32W

1/32W

1/32W

MF

MF

MF

MF

X6S

MF

X5R

NP0-C0G

X5R X5R

NP0-C0G

MF

X5R X5R

X5R X5R-CERM

MF

CERM

X5R

X5R-CERM

X5R-CERM

CER-X5R CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R

MF

MF

MF

X5R-CERM

X5R-CERM

X5R X5R

NP0-C0G NP0-C0G

MF

X5R X5R

X5R X5R-CERM

MF

NP0-C0G

MF

CERM

X5R X5R-CERM

X5R-CERM

CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R

01005

01005

01005

01005

0201-1

1P6X1P2-SM

01005

UFWLB

01005

01005

0201 0201

01005

01005

0201 0201

01005 01005

0201-1

01005

0402-0.1MM

01005

01005

01005

01005

SHORT-10L-0.25MM-SM

0402-0.1MM 01005 01005 01005 01005 01005 01005 01005 01005

01005

01005

01005

01005

01005

UFWLB

0201 0201

01005 01005

01005

0201 0201

01005 01005

0201-1

01005

01005

01005

0402-0.1MM

01005 01005

01005

0402-0.1MM 01005 01005 01005 01005 01005 01005 01005 01005

UFWLB

UFWLB

1%

5%

1%

5%

10%

0%

10%

5%

10% 10%

5%

0%

10% 20%

20% 20%

0%

20%

20%

20%

20%

10% 20% 20% 20% 20% 20% 20% 20% 20% 20%

1%

0%

0%

20%

20%

10% 10%

5% 5%

0%

10% 20%

20% 20%

0%

5%

0%

20%

20% 20%

20%

20% 20% 20% 20% 20% 20% 20% 20% 20%

6.3V

6.3V

16V

10V 10V

16V

10V 10V

6.3V 6.3V

6.3V

6.3V

6.3V

6.3V

6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

6.3V

6.3V

10V 10V

16V 16V

10V 10V

6.3V 6.3V

16V

6.3V

6.3V 6.3V

6.3V

6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V

NOSTUFF

NOSTUFF

OMIT

NOSTUFF

NOSTUFF

NOSTUFF

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR XCVR

XCVR

XCVR

XCVR XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR

XCVR

XCVR

XCVR XCVR

XCVR

XCVR

XCVR XCVR

XCVR

XCVR

XCVR

XCVR

XCVR XCVR

XCVR

XCVR XCVR XCVR XCVR XCVR XCVR XCVR

XCVR

XCVR

562K

27K

562K

27K

0.022UF

26MHZ-6PPM-1.8V

0.00

PMB5757

4700PF

100PF

0.022UF 0.022UF

27PF

0.00

0.022UF 1UF

0.47UF 0.1UF

600-OHM-25%-0.1A

0.00

15UF

0.47UF

0.1UF

0.1UF

0.1UF 15UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.22UF

100K

0.00

0.00

0.1UF

0.1UF

PMB5757

0.022UF 0.022UF

100PF 27PF

0.00

0.022UF 1UF

0.47UF 0.1UF

600-OHM-25%-0.1A

0.00

27PF

0.00

15UF

0.47UF 0.1UF

0.1UF

15UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.22UF

PMB5757

PMB5757

PP_VDD_MAIN

BB_TO_NFC_CLK

PP_VDD_MAIN

TRANSCEIVERS

16 15 8 7 6 5 1 16 15 8 7

6 5 1

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

SYM 5 OF 5

VSS

VSSVSSVSS

VSSVSS

VSSVSS

VSS

VSSVSSVSSVSSVSSVSSVSSVSSVSS

VSS

VSSVSS

VSSVSSVSSVSS

VSS

VSSVSS

VSS

VSSVSS

VSSVSS

VSS

VSSVSS

VSSVSSVSS

VSSVSS

SYM 5 OF 5

VSS

VSSVSSVSS

VSSVSS

VSSVSS

VSS

VSSVSSVSSVSSVSSVSSVSSVSSVSS

VSS

VSSVSS

VSSVSSVSSVSS

VSS

VSSVSS

VSS

VSSVSS

VSSVSS

VSS

VSSVSS

VSSVSSVSS

VSSVSS

SYM 1 OF 5

VDD1V3_RX1PLLVDD1V3_TXPLLVDD1V3_CI

CELL_CLK

VDD1V3_TXDCO

MPHY2_RX2_DATX

MPHY2_TX_DATXMPHY2_TX_DAT

MPHY_TX_DATMPHY_RX2_DATX

MPHY_RX1_DATXMPHY_RX2_DAT

MPHY_RX1_DAT

TCKCTMSC

MPHY2_ENMPHY_EN

CEXT_TXMAG

VDD1V0_DIG

VDD1V8_TX

CEXT_RX1PLLCEXT_TXPLL

VDD_BAT

VDD1V3_RX2DCO

VDD1V3_RX1DCO

VDD1V3_RXRF

VDD1V3_TXMS

XO

MI3MI4

XO_SUPAFCDAC

RFFE2_SCLKRFFE2_SDATA

RFFE_VIORFFE_SCLK

RFFE_SDATA

GPO6GPO5GPO4GPO3GPO2GPO1GPO0

MPHY2_RX2_DATMPHY2_RX1_DATXMPHY2_RX1_DAT

MPHY_TX_DATX

CEXT_RX2PLL CELL_CLK_EN

FSYS_RF

RESET_TRX*RESET_MAIN*

FSYS_C_ENFSYS_CFSYS_RF_EN_CLK_ON

VDD1V3_RXMS

VDD1V3_TXDIGVDD1V3_TXRF

VDD1V3_RX2PLL

VDD1V8_RXVDD1V8_CI

VDD1V3_MPHY

VDD0V68_RETSYM 1 OF 5

VDD1V3_RX1PLLVDD1V3_TXPLLVDD1V3_CI

CELL_CLK

VDD1V3_TXDCO

MPHY2_RX2_DATX

MPHY2_TX_DATXMPHY2_TX_DAT

MPHY_TX_DATMPHY_RX2_DATX

MPHY_RX1_DATXMPHY_RX2_DAT

MPHY_RX1_DAT

TCKCTMSC

MPHY2_ENMPHY_EN

CEXT_TXMAG

VDD1V0_DIG

VDD1V8_TX

CEXT_RX1PLLCEXT_TXPLL

VDD_BAT

VDD1V3_RX2DCO

VDD1V3_RX1DCO

VDD1V3_RXRF

VDD1V3_TXMS

XO

MI3MI4

XO_SUPAFCDAC

RFFE2_SCLKRFFE2_SDATA

RFFE_VIORFFE_SCLK

RFFE_SDATA

GPO6GPO5GPO4GPO3GPO2GPO1GPO0

MPHY2_RX2_DATMPHY2_RX1_DATXMPHY2_RX1_DAT

MPHY_TX_DATX

CEXT_RX2PLL CELL_CLK_EN

FSYS_RF

RESET_TRX*RESET_MAIN*

FSYS_C_ENFSYS_CFSYS_RF_EN_CLK_ON

VDD1V3_RXMS

VDD1V3_TXDIGVDD1V3_TXRF

VDD1V3_RX2PLL

VDD1V8_RXVDD1V8_CI

VDD1V3_MPHY

VDD0V68_RET

BI

OUT

NC

VCC

GND

OUTVCONT

NC NC

BI

NCNC

NCNC

NC

OUT

NC

NC

OUT

OUT

NCNC

OUT

IN

IN

IN

IN

OUT

OUT

OUT

IN

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

IN

OUT

BI

OUT

NC

OUT

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

IN

IN

USID=0XC

ALPES II MODULE

ET MODULATOR

19 OF 34

C722_KC721_K

XW701_K

ET_K

C723_KC720_K

VPA_ET_K 8 9

50_ET_DAC_P_K8 16

50_ET_DAC_N_K8 16

VDD_RFFE_VIO_1V8_K6 8 9 11 12 13 16

RFFE1_CLK_K6 8 9 11 12 16

RFFE1_DATA_K6 8 9 11 12 16

PP_VDD_MAIN_ET_K

7.0.0

evt-1

7 OF 17

051-02247

78

15

26

323130292827

3

25242322212019181413121110965421

1716

2

1

2

1

2

1

21

2

1

X5R-CERM X5R NP0-C0G NP0-C0G

SHORT-10L-0.25MM-SM

0201 01005

LGA

01005 01005

20% 10% 5% 5%6.3V 10V 16V 16V

OMIT

OMIT_TABLE

ET

ET ET ET ET

2.2UF 1000PF

QM81004M

100PF 27PF

PP_VDD_MAIN

ET MODULATOR

16 15 8 6 5 1

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

PAD

VRAMP+VRAMP-

VCC2

PVDD

THERMGND

VIO

CLKDATA

1710-1910

824- 915

2G PA

USID=0X5

USID=0XF

MB HB TDD S-PAD

2305-2570

2300-2690

XCVR0 TX

TDD TRANSMIT

824- 915

1710-1910

699- 915

1710-1980

1 RFIN<->RF20 RFIN<->RF1699- 915

1880-2025

XCVR1 TX

20 OF 34

C800_KC808_K

18 19 20 21 23 24 25 28

18 19 20 21 23 24 28

18 19 20 21 23 24 28

21

21

18 19 20 21 23 24 25 28

18 19 20 21 23 24 28

18 19 20 21 23 24 28

C806_KC804_K

22

22

21

19 20 28

19 20 28

21

19 20 28

19 20 28

18

GSMPA_K

C809_K

R801_K

C801_KL803_K

21

TDDPA_K

C803_K

C813_K

R800_K

C812_K

C815_K

XCVR1_K

XCVR0_K

L800_K

C811_K

21

C807_KC805_K

XW800_K

12 13 17 18 19 27 28

SWTX1_K

C810_K

50_2GMB_PA_OUT_K

50_2GLB_PA_OUT_K

50_TDD_PAD_ANT_K50_TDD_PAD_ANT_M_K

50_2GMB_PA_OUT_M_K

50_XCVR0_2GLB_TX_K8

PP_VDD_MAIN_2G_K

50_2GLB_PA_OUT_M_K

RFFE1_CLK_K

RFFE1_DATA_K

VDD_RFFE_VIO_1V8_KVPA_ET_K7 9

50_XCVR0_2GMB_TX_K8

RFFE1_CLK_K

RFFE1_DATA_K

VDD_RFFE_VIO_1V8_2G_K

VFE_AUX_3V1_K5 8 9 11

VDD_RFFE_VIO_1V8_K

50_XCVR1_B38_B40_B41_TX_K8

50_XCVR1_B34_B39_RX_K

50_XCVR1_B38_B40_B41_RX_K

50_XCVR1_B34_B39_TX_K8

50_XCVR1_B7_B30_TX_K

50_XCVR1_B38_B40_B41_TX_K 8

VFE_AUX_3V1_K5 8 9 11

XCVR1_RFE_GPO0_K

50_ET_DAC_N_K

50_ET_DAC_P_K

50_XCVR0_B3_B4_B1_B25_TX_K

50_XCVR0_LB_TX_K

50_ET_DAC_N_K

50_ET_DAC_P_K

50_XCVR1_2P5G_TX_K

50_XCVR1_LB_TX_K

50_XCVR0_2GLB_TX_K 8

50_XCVR0_2GMB_TX_K 8

50_XCVR1_B34_B39_TX_K 8

7.0.0

evt-1

8 OF 17

051-02247

14

411

1213

8

1

15

16

10

9

76532 17

2

1

21

2

121

149811

434241403938373635343332313029

12 13

27

25

3

5

18202328262422211917151076421

16

2

1

2

1

21

2

12

1

A8A10A2A4B7B11

B13A12

A8A10A2A4B7B11

B13A12

21

2

1

2

1

2

1

21

3

264

5

1

2

1

2

1

2

1

2

1

2

1

1/32W

1/32W

1/20W

X5R-CERM CERM

MF

CER-X5R

NP0-C0GCERM

CERM

CERM-X5R

MF

CERM NP0-C0G X5R CERM X5R-CERM

COG-CERM

COG-CERM

MF

UFWLB

UFWLB

LGA

LGA-3

01005 01005

01005

01005

0100501005

01005

LGA

01005

01005

SHORT-10L-0.25MM-SM

0402-0.1MM 01005 01005 01005 01005

0201

0201

0201

0201

20% 2%

0%

20%

+/-0.1PF2%

2%

10%

0%

20% 5% 10% 2% 20%

+/-0.05PF

+/-0.05PF

1%

6.3V 16V

6.3V

16V16V

16V

6.3V

6.3V 16V 6.3V 16V 6.3V

25V

25V

NOSTUFF

OMIT

NOSTUFF

NOSTUFFXCVR

XCVR

XCVR

RFFE RFFE

RFFE

RFFE RFFE RFFE RFFE

RFFE

RFFE

PMB5757

PMB5757

CXA4430GC-E

MB-HB-TDD-PAD

0.1UF 18PF

0.00

0.033UF

5.6PF18PF

18PF

SKY77367

3900PF

0.00

15UF 100PF 3300PF 18PF 0.1UF

0.5PF

3.0NH+/-0.1NH-0.6A

0.5PF

0.00

PP_VDD_MAIN

TDD TRANSMIT

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

IN

BI

IN

OUT

OUT

IN

BI

IN

NCNC

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

RFOUT_LB

RFOUT_MB

VBATT VCC

EPADGND

RFIN_LB_1

RFIN_MB_1

RFIN_MB_0

SCLKSDATAVIO

RFIN_LB_0

OUT

VBAT

T

ANTRFIN_HB

THRM_PAD

VIO

SDAT

A

SCLK

GND

RX_B34_B39

RX_B38_B40_B41

RFIN_MB

VCC1

VCC2

NCNC

NC

NC

SYM 3 OF 5

PADACFNPADACFP

TXHTXL

TX2GLB

TX35TX25

TX2GHB

SYM 3 OF 5

PADACFNPADACFP

TXHTXL

TX2GLB

TX35TX25

TX2GHB

OUT

OUT

IN

VDD

RF1RF2

GND

CTRL

RFIN

NC

824-915

824-915

1710-2690

1710-2690

USID=0XD

USID=0XE

LB S-PAD

MB/HB S-PAD

FDD TRANSMIT

21 OF 34

18 19 20 21 23 24 25 28

18 19 20 21 23 24 28

20

18 19 20 21 23 24 28

23

23

24

20

22

23

23

22

22

C904_K

22

C903_K

20

18 19 20 21 23 24 28

18 19 20 21 23 24 25 28

18 19 20 21 23 24 28

22

20

20

24

22

22

22

C907_K C905_K

22

C901_K

L902_K

C900_K C906_K

C902_K

L901_K

22

LBPA_K

C908_K

L900_K

L903_K

C909_K

MHBPA_K

20

22

20

22

50_LAT_LB_K50_LAT_LB_M_K

RFFE1_DATA_K

RFFE1_CLK_K

VDD_RFFE_VIO_1V8_K

50_UAT_LB_K50_UAT_LB_M_K

50_UAT_MB_HB_K

50_LAT_MB_HB_K

VDD_RFFE_VIO_1V8_K

RFFE1_DATA_K

RFFE1_CLK_K

VPA_ET_K9 8 7

50_LAT_MB_HB_M_K

50_UAT_MB_HB_M_K

VPA_ET_K9 8 7

VFE_AUX_3V1_K11 9 8 5

50_XCVR0_LB_TX_K

50_XCVR1_LB_TX_K

50_2GLB_PA_OUT_K

50_LB_DRX_K

50_XCVR0_LB_RX_K

VFE_AUX_3V1_K11 9 8 5

50_XCVR1_LB_RX_K

50_XCVR0_VLB_RX_K

50_XCVR1_VLB_RX_K

50_TDD_PAD_ANT_K

50_XCVR0_B3_B4_B1_B25_TX_K

50_2GMB_PA_OUT_K

50_XCVR1_B7_B30_TX_K

50_XCVR1_B30_RX_K

50_XCVR0_B25_RX_K

50_XCVR0_B4_B66_RX_K

50_XCVR1_B7_RX_K

50_XCVR0_B3_RX_K

50_XCVR0_B1_B4_RX_K

50_LAT_MB_HB_DRX_K

50_XCVR0_2G_RX_K

50_XCVR1_B40B_NO_FILT_RX_K

7.0.0

evt-1

9 OF 17

051-02247

2

1

2

1

21

21

2

1

2

1

2

1

21

23

24

1040417

575655545352515049484746454443

8 9

3

2

25

26

12

423938373635343332313029282722212019171513116541

14

1618

2

1

2

1

21

2

1

26383729

87

575655545352515049484746454443

28 2717

2119

531

3132

34

1096424140393635333025242322201816151242

1113

14

2

1

2

1

X5R-CERM CERM

CERM CERM

NP0-C0G

C0G

NP0-C0G

CERM CERM

C0G-CERM

LGA

LGA

01005 01005

01005 01005-1

01005

0201

01005

0201

01005

01005

01005 01005-1

01005

01005

20% 2%

2% 5%

+/-0.1PF

+/-0.1PF

+/-0.1PF

2% 5%

+/-0.05PF

6.3V 16V

16V 16V

16V

25V

16V

16V 16V

16V

NOSTUFF

NOSTUFF

RFFE RFFE

RFFE

RFFE

RFFE

RFFE

RFFE

AFEM-8056-AP1

QM76041

0.1UF 18PF

22PF 22PF

1.0PF

10NH-3%-0.3A

1.0NH-+/-0.1NH-0.9A-0.05OHM

5.0PF

1.6PF

1.1NH-+/-0.1NH-0.85A

18PF 22PF

0.6NH-+/-0.1NH-0.73A-0.1OHM

0.8PF

FDD TRANSMIT

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

IN

BI

IN

IN

BI

BI

OUT

IN

OUT

BI

BI

OUT

OUT

OUT

IN

BI

IN

IN

OUT

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

RFIN0

SDAT

A

VIO

SCLK

GND

ANT2

ANT1

VBAT

T

VCC1

VCC2

RFIN1

THRM_PAD

2G_TX

LB_DIV

LB_RX0

LB_RX1

VLB_RX0

VLB_RX1

VBAT

T

VCC1

SDAT

A

VIO

TRX2

RFIN_MBRFIN_GSM VC

C2

RFIN_HB

SCLK

RX_B30RX_B25RX_B66RX_B7RX_B3RX_B1

MB_HB_DRXDCS_PCS_RX

TRX3

EPAD

ANT2

ANT1

GND

IN

OUT

IN

OUT

2300-2400

2620-2690

2350-2360

852- 960

2300-2690

1880-2025

717- 821

XCVR1 PRX

PRIMARY RECIEVE

1805-1880

1930-1990

2110-2170

2110-2155

1805-1880

852- 960

1930-1995

717- 821

XCVR0 PRX

22 OF 34

23

23

23

L1025_K

L1019_K

L1018_K

L1007_K

L1020_K

L1017_K

L1021_K

L1026_K

GSMDI_K

L1014_K

L1027_K

R1000_K

L1030_K

21

XCVR1_KXCVR0_K

L1005_K

L1008_KL1000_K

L1004_K

L1024_K

L1013_K

L1012_K

L1006_K

21

21

21

21

20

23

20

21

L1016_K

L1023_K

L1015_K

C1001_K

21

21

21

21

21

21

L1001_K

L1009_K

L1003_K

L1010_K

L1011_K

50_XCVR1_VLB_RX_K

50_XCVR1_LB_RX_K

50_XCVR1_B30_RX_K

50_XCVR1_B7_RX_K

50_XCVR1_B38_B40_B41_RX_K

50_XCVR1_B34_B39_RX_K

50_XCVR1_B40B_NO_FILT_RX_K

50_XCVR1_VLB_RX_M_K10

50_XCVR1_LB_RX_M_K10

50_XCVR1_B7_RX_M_K10

50_XCVR1_B30_RX_M_K10

50_XCVR1_B38_B40_B41_RX_M_K10

50_XCVR1_B34_B39_RX_M_K10

50_XCVR1_B40B_NO_FILT_RX_M_K10

50_XCVR0_2G_RX_K

50_XCVR1_LAT_CPLR_K

50_XCVR1_UAT_CPLR_K

50_XCVR1_B40B_NO_FILT_RX_M_K 10

50_XCVR1_LB_RX_M_K 10

50_XCVR1_B38_B40_B41_RX_M_K 10

50_XCVR1_B30_RX_M_K 10

50_XCVR1_B7_RX_M_K 10

50_XCVR1_B34_B39_RX_M_K 10

50_XCVR1_VLB_RX_M_K 10

50_XCVR0_VLB_RX_K

50_XCVR0_LB_RX_K

50_XCVR0_B1_B4_RX_K

50_XCVR0_B4_B66_RX_K

50_XCVR0_B25_RX_K

50_XCVR0_B3_RX_K

50_XCVR0_GSM1800_RX_K

50_XCVR0_GSM1900_RX_K

50_XCVR0_VLB_RX_M_K10

50_XCVR0_LB_RX_M_K10

50_XCVR0_B1_B4_RX_M_K10

50_XCVR0_B4_B66_RX_M_K10

50_XCVR0_B25_RX_M_K10

50_XCVR0_B3_RX_M_K10

50_XCVR0_GSM1800_RX_M_K10

50_XCVR0_GSM1900_RX_M_K10

50_XCVR0_LAT_CPLR_K

50_XCVR0_UAT_CPLR_K

50_XCVR0_LB_RX_M_K 10

50_XCVR0_VLB_RX_M_K 10

50_XCVR0_B25_RX_M_K 10

50_XCVR0_B1_B4_RX_M_K 10

50_XCVR0_GSM1800_RX_M_K 10

50_XCVR0_B4_B66_RX_M_K 10

50_XCVR0_GSM1900_RX_M_K 10

50_XCVR0_B3_RX_M_K 10

7.0.0

evt-1

10 OF 17

051-02247

2

1

21

21

21

21

21

2

1

3

4

652

1

2

1

2

1

21

21

B15

D1E2F1G2H1J2K1L2M1N2P1R2T1U2V1W2

A14A16

B15

D1E2F1G2H1J2K1L2M1N2P1R2T1U2V1W2

A14A16

21

2

1

21

21

2

1

2

1

2

1

21

21

2

1

2

1

2

1

21

2

1

21

2

1

2

1

1/32W

1/32W

1/32W

MF

NP0-C0G

B8867

NP0-C0G

MF

NP0-C0G

MFUFWLB

01005

01005

01005

01005

01005

01005

01005

01005

01005

01005

01005

01005

01005

01005

01005

LGA

01005

UFWLB

01005

01005

01005

01005

01005

01005-1

01005

01005

01005

01005

01005

01005

01005

0%

+/-0.1PF

+/-0.1PF

0%

+/-0.1PF

0%

16V

16V

16V

NOSTUFF

NOSTUFF

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

XCVR

PMB5757

1.3NH+/-0.1NH-220MA

3.0NH+/-0.1NH-200MA

3.0NH+/-0.1NH-200MA

0.6NH+/-0.1NH-320MA

2.6NH-+/-0.1NH-0.45A-0.2OHM

3.6NH+/-0.1NH-180MA

1.2NH-+/-0.1NH-0.80A

2.4NH-+/-0.1NH-0.45A

3.9NH+/-0.1NH-180MA

0.00

1.6PF

3.3NH+/-0.1NH-180MA

10NH-+/-3%-0.25A

22NH-3%-0.14A-2.26OHM

9.1NH-3%-0.17A-1.7OHM

GSM1800-1900

3.6NH-+/-0.1NH-0.35A-0.3OHM

PMB5757

2.4NH-+/-0.1NH-0.45A

2.0PF

3.6NH-+/-0.1NH-0.35A-0.3OHM

0.00

1.5NH+/-0.1NH-220MA

1.3NH-+/-0.1NH-0.7A-0.08OHM

7PF

1.0NH+/-0.1NH-0.22A-0.9OHM

3.3NH-+/-0.1NH-0.4A-0.25OHM

0.00

18NH-3%-0.16A-1.63OHM

8.2NH-3%-0.3A-0.5OHM

15NH-3%-0.17A-1.53OHM

PRIMARY RECEIVE

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

IN

IN

IN

GSM1800COMMON

GSM1900

GND

IN

SYM 2 OF 5

FBRRF1FBRRF2

VSS

RX16RX15RX14

RX11RX12RX13

RX10RX9RX8RX7RX6RX5RX4

RX2RX3

RX1

SYM 2 OF 5

FBRRF1FBRRF2

VSS

RX16RX15RX14

RX11RX12RX13

RX10RX9RX8RX7RX6RX5RX4

RX2RX3

RX1

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

USID=0X8

LAT TUNER GPO

FOR ESD AND LOW FREQUENCY IMD

USID=0X6

USID=0X7

LOWER ANTENNA COUPLER

LOWER ANTENNA AND COUPLER

UPPER ANTENNA COUPLER

23 OF 34

22

22

22

22

C1107_KC1105_K

18 19 20 21 23 24 28

C1106_K

21

C1104_K

C1102_K

C1101_K

R1100_K

C1100_K

GPOLAT_K

LATDI_K

C1112_K

C1111_K

C1115_KC1116_KC1114_K

UATCP_K

LATCP_K

FL1102_K

29

24

R1102_K

24

R1101_K

29

21

29

29

29

C1108_K

C1109_K

FL1101_K

FL1100_K

18 19 20 21 23 24 25 28

18 19 20 21 23 24 28

18 19 20 21 23 24 25 28

18 19 20 21 23 24 28

18 19 20 21 23 24 28

29

29 21

21

C1103_K

L1100_K

LAT_TUNER_GPO1_K

LAT_TUNER_GPO2_K

LAT_TUNER_GPO3_K

LAT_TUNER_GPO4_K

VFE_AUX_3V1_K11 9 8 5

PP1V8_S217 16 15 14 6 5 4 3 2 1 PP1V8_GPOLAT_K

RFFE_GPOLAT_DATA_K17

RFFE_GPOLAT_CLK_K17 RFFE1_CLK_FILT_K

RFFE1_DATA_FILT_K

50_LAT1_ANT_K50_LAT1_CPL_K

50_XCVR0_LAT_CPLR_K

50_XCVR1_LAT_CPLR_K

VFE_AUX_3V1_K8 11 9 5

50_UAT_MB_HB_TX_SOUTH_K

50_UAT_LB_SOUTH_K

50_XCVR0_UAT_CPLR_K

50_XCVR1_UAT_CPLR_K

RFFE1_DATA_K

RFFE1_CLK_K

VDD_RFFE_VIO_LATCP_1V8_K

50_UAT_MB_HB_K

50_UAT_LB_K

RFFE1_DATA_K

RFFE1_CLK_K

50_LAT_LB_MB_HB_K

50_LAT_LB_MB_HB_M_K

50_LAT_LB_K

50_LAT_MB_HB_K

VDD_RFFE_VIO_1V8_K

VDD_RFFE_VIO_UATCP_1V8_KVDD_RFFE_VIO_1V8_K

7.0.0

evt-1

11 OF 17

051-02247

2

1

2

1

21

2

1

A3

B2

A2

A1

C3C4C2C1B4B1A4

B3

6

4

531

2

2

1

2

1

2

1

2

1

2

1

5

96

128

142

131

164

15111073

5

9

6

128

142

131

164

15111073

21

21

21

2

1

2

1

21

21

21

2

1

2

1

2

1

2

1

2

1

1/32W

1/32W

CER-X5R NP0-C0G

CER-X5R NP0-C0G

NP0-C0G

CERM X5R-CERM

NP0-C0G-CERM

MF

NP0-C0G-CERM

MF

NP0-C0G-CERM

X5R X5R NP0-C0G-CERM

CERM X5R-CERM

01005

01005

01005

01005

01005

01005

0805

01005

01005

LGA

01005 01005

LGA

01005

0201

01005

01005

01005

01005

01005 01005 01005

WLCSP

01005

01005 01005

20% +/-0.1PF

20% +/-0.1PF

+/-0.05PF

2% 20%

5%

0%

5%

0%

5%

20% 20% 5%

2% 20%

6.3V 16V

6.3V 16V

16V

16V 6.3V

25V

16V

16V

6.3V 6.3V 16V

16V 6.3V

RFFE RFFE

UP_RFFE

RFFE

RFFE

RFFE RFFE

0.033UF

10-OHM-1.1A

5PF

0.033UF

10-OHM-1.1A

5PF

DPX202690DT-4090A2SJ

0.7PF

1.8NH-+/-0.1NH-0.70A

SKY16708-11

18PF 0.1UF

SKY16708-11 56PF

56NH-100MA-3.9OHM

0.00

33PF

0.00

33PF

0.47UF 0.47UF 33PF

QM18099

10-OHM-1.1A

18PF 0.1UF

LOWER ANTENNA & COUPLERS

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

OUT

OUT

OUT

OUT

IN

BI

GPO7GPO6GPO5GPO4GPO3GPO2GPO1

GND

VIO

SCLK

USID1

SDATA

GND

COM

LO

HI

NC

NC

VDD

RF_CPL1RF_CPL2

GND

RFOUT2RFOUT1RFIN1

RFIN2

SDATASCLK

USID

VIO

VDD

RF_CPL1RF_CPL2

GND

RFOUT2RFOUT1RFIN1

RFIN2

SDATASCLK

USID

VIO

OUT

BI

IN

NC

OUT

BI

OUT

OUT

OUT

IN

BI

IN

BI

IN

BI

INBI

BI

NCNC

MB-HB: USID=0XALB: USID=0X9

DRX DSM

DIVERSITY RECEIVE ASM'S

XCVR0 DRX

RFFE FILTERING

XCVR1 DRX

24 OF 34

23 24

23 24

C1204_K C1203_K

21

XCVR1_K

XCVR0_K

23 24

23 24

R1200_K

C1200_K

R1201_K

R1202_K

C1201_K

18 19 20 21 23 25 28

18 19 20 21 23 28

18 19 20 21 23 28

C1202_K

DSM_K21

25

50_XCVR0_B1_B66_DRX_K 12

50_XCVR0_B3_B25_DRX_K 12

50_XCVR1_B7_B41_B38_DRX_K 12

50_XCVR1_B40_B30_DRX_K 12

50_XCVR1_B34_DRX_K 12

50_XCVR1_B39_DRX_K 12

50_LAT_MB_HB_DRX_K

50_UAT_MB_HB_RX_SOUTH_K

VFE_LNA_2V7_K13 5

VDD_RFFE_VIO_FILT_1V8_K12

RFFE1_CLK_FILT_K

RFFE1_DATA_FILT_K

50_XCVR1_VLB_DRX_K12

50_XCVR1_LB_DRX_K12

50_XCVR0_VLB_DRX_K12

50_LB_DRX_K

50_XCVR0_LB_DRX_K12

50_XCVR0_B3_B25_DRX_K 12

50_XCVR0_B1_B66_DRX_K 12

50_XCVR0_LB_DRX_K 12

50_XCVR0_VLB_DRX_K 12

50_XCVR1_B39_DRX_K 12

50_XCVR1_B7_B41_B38_DRX_K 12

50_XCVR1_B40_B30_DRX_K 12

50_XCVR1_LB_DRX_K 12

50_XCVR1_VLB_DRX_K 12

50_XCVR1_B34_DRX_K 12

VDD_RFFE_VIO_FILT_1V8_K 12

RFFE1_DATA_FILT_K

RFFE1_CLK_FILT_K

VDD_RFFE_VIO_1V8_K

RFFE1_DATA_K

RFFE1_CLK_K

7.0.0

evt-1

12 OF 17

051-02247

2

1

1945

49

4746

6968676665646362616059585756555453525150484443424140393837363534333231

242

1214

233

28

30292726252221161513111098541

1817

2067

2

1

2

1

V17W16V15W14V13W12V11W10V9W8V7W6V5W4

V17W16V15W14V13W12V11W10V9W8V7W6V5W4

21

2

1

21

21

2

1

1/32W

1/32W

1/32W

CERM

X5R-CERM

X5R-CERM

MF

MF

MF

CERM X5R-CERM

01005-1

01005

01005

UFWLB

UFWLB

01005

01005

01005

LGA

01005 01005

5%

20%

20%

0%

0%

0%

2% 20%

16V

6.3V

6.3V

16V 6.3V

NOSTUFF

RFFE

RFFE

RFFE

XCVR

XCVR

RFFE

RFFE

RFFE

RFFE RFFE

22PF

0.1UF

0.1UF

PMB5757

PMB5757

0.00

0.00

0.00

B30608-M5342-X969

18PF 0.1UF

DIVERSITY RECEIVE ASM'S

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

BI

IN

IN

SYM 4 OF 5

RD12RD13RD14

RD10RD11

RD8RD9

RD7

RD5RD6

RD3RD4

RD2RD1

SYM 4 OF 5

RD12RD13RD14

RD10RD11

RD8RD9

RD7

RD5RD6

RD3RD4

RD2RD1

BI

OUT

IN

BI

IN

VDD

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

MB_HB_ANT1MB_HB_ANT2

B1_B66B3_B25

B7_B41_B38B30_B40A

B34B39

GND

VIO

SCLKSDATA

VLB_RX1

LB_RX1

VLB_RX0

LB_ANT

LB_RX0

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

IN

IN

USID=0X2

USID=0X3

MB/HB DRX LNA

DIVERSITY RECEIVE LNAS

LB DRX LNABYPASS SHARED WITH MB/HB DRX LNA

RFFE2 IMPEDANCE MATCHING

25 OF 34

MHBLN_K

C1306_K

LBLN_K

18

18

R1303_K

R1302_K

29

29

26

L1300_K

26

C1305_K

C1303_K

C1304_K

C1302_K

18 19 20 21 23 24 25 28

25 26

25 26

50_UUAT_LB_PLEXER_K

VFE_LNA_FILT_2V7_K13

50_UUAT_MB_HB_K

VFE_LNA_FILT_2V7_K13

50_UAT_LB_NORTH_K

VFE_LNA_FILT_2V7_K 13 VFE_LNA_2V7_K5 12

VDD_RFFE_VIO_1V8_K6 7 8 9 11 12 13 16

UAT_TUNER_RFFE_DATA_K13 14

UAT_TUNER_RFFE_CLK_K13 14

50_UAT_MB_HB_RX_SOUTH_K12

VDD_RFFE_VIO_1V8_K

UAT_TUNER_RFFE_DATA_K

UAT_TUNER_RFFE_CLK_K

50_UAT_MB_HB_TX_NORTH_K

UAT_TUNER_RFFE_CLK_K 13 14

UAT_TUNER_RFFE_DATA_K 13 14

RFFE2_CLK_K

RFFE2_DATA_K7.0.0

evt-1

13 OF 17

051-02247

21

20

28272625

2322

24

241918171514131211109876531

16

2

1

9

10

3

252423

78

222120191817161513121165421

14

21

21

21

2

1

2

1

2

1

2

1

1/32W

1/32W

MF

MF

CERM CERM CER-X5R

CERM X5R-CERM

01005

01005

LGA

01005 01005 01005

LGA

0201

01005 01005

0%

0%

2% 2% 20%

2% 20%

16V 16V 6.3V

16V 6.3V

NOSTUFF NOSTUFFUP_RFFE UP_RFFE

UP_RFFE

UP_RFFE

UP_RFFE UP_RFFE

0.00

0.00

SKY13764-14

18PF 18PF 0.033UF

SKY13767-11

120NH-5%-40MA

18PF 0.1UF

DIVERSITY RECEIVE LNA'S

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

OUT_RXIN_TX

VIOSDATA

VDD

EPAD

ANT

GNDSCLK

SCLKSDATAVIO

TX_RX

GND EPAD

ANT

VDD

BI

IN

BI

BI

BI

BI

IN

BI

IN

UAT1

TO ANTENNA FEED

USID=0X8

UAT TUNER GPO

UPPER ANTENNA FEEDS

26 OF 34

C1406_K

L1405_K

C1404_K

R1402_K

29

GPOUAT_K

QUADP_K

C1407_K

FL1400_K

C1402_K

C1405_K

R1405_K

R1406_K

25

25

29

L1404_K

C1403_K

L1401_K

L1402_K

29

R1403_K29

27

25

R1404_K

25

C1401_K

50_UAT1_TEST_K

UAT_TUNER_GPO1_K

UAT_TUNER_GPO2_KRFFE_GPOUAT_CLK_K17 16

RFFE_GPOUAT_DATA_K17 16

50_UAT1_M_K50_UAT1_K

50_UUAT_LB_PLEXER_K

PP1V8_GPOUAT_KPP1V8_S217 16 15 11 6 5 4 3 2 1

UAT_TUNER_RFFE_CLK_K

UAT_TUNER_RFFE_DATA_K

50_UUAT_MB_HB_PLEXER_K

50_UAT_WLAN_2G_PLEXER_K

50_GNSS_PLEXER_K

50_UUAT_MB_HB_K

50_UAT_WLAN_2G_NORTH_K

50_GNSS_K

7.0.0

evt-1

14 OF 17

051-02247

2

1

21

2

1

21

A3

A2

A1

B4B2B1A4

B3

1

17

13

9

15

1614121110876432

5

2

1

21

2

1

2

1

21

21

2

1

21

2

1

2

1

21

21

2

11/20W

1/20W

1/32W

1/32W

MF

MF

C0H-CERM

NP0-C0G-CERM

MF

MF

NP0-C0G-CERM

X5R NP0-C0G-CERM

C0G

C0G-CERM

0201

0201

0201

0201

0201

0201

01005

01005

01005

01005

01005

0201 01005

LGA

0201

0201

0201

WLCSP

0201

1%

1%

2%

5%

0%

0%

5%

20% 5%

+/-0.1PF

+/-0.05PF

25V

16V

16V

10V 16V

25V

25V

NOSTUFF

NOSTUFF

NOSTUFF

NOSTUFF

NOSTUFF

UP_RFFE

UP_RFFE

UP_RFFE

UP_RFFE

UP_RFFE

RFFE

RFFE

0.00

0.00

1.0NH-+/-0.05NH-1.1A-0.04OHM

18PF

9.1NH+/-0.3%-0.3A

12NH-3%-0.3A-0.5OHM

33PF

0.00

0.00

10-OHM-1.1A

33PF

1UF 33PF

ACFM-W912-AP1

6.2PF

15NH-3%-0.3A-0.7OHM

2.4NH+/-0.1NH-0.6A

QM18098

0.3PF

UPPER ANTENNA FEEDS

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

OUT

VIO

SDATA

SCLK

GND

GPO1GPO2GPO3GPO4

LCB

MID/HIGH_CELL_BAND

GNSS

EPAD

ANT

GND

WIFI

NCNC

IN

BI

OUT

BI

BI

OUT

IN

BI

GNSS LNA + RECEIVER

27 OF 34

12 13

C1503_K

L1501_K

15 28

28

12 13 28

GNSS_K

26

GLNA_K

12 13 28

12 13 28

12 13 28

12 13 28

R1500_K

14

12 13 28

18 28 GNSS_26MHZ_CLKOUT_K

GNSS_IF_TEST_OUT_K

TCXO_BB_GNSS_32K_K

PP_VDD_MAIN_GNSS_KPP1V8_S21 2 3 4 5 6 11 14 16 17

50_UAT_GNSS_LNA_RFOUT_K 15

VGNSS_LNA_L_KVDD_GNSS_AUX_1V8_K15

50_GNSS_K

GNSS_EXT_LNA_EN_K15 16

AP_TO_GNSS_WAKE

AP_TO_BB_TIME_MARK

GNSS_BLANK_K

GNSS_EXT_LNA_EN_K15 16

50_UAT_GNSS_LNA_RFOUT_K15

VDD_GNSS_AUX_1V8_K15

7.0.0

evt-1

15 OF 17

051-02247

25

17

15

16

13

5

1110

7

19

2

36

49

43

42

5453525150484746454441403938373534333231302928272621242322141296431

8

2018

7

91

3

86542

21

2

1

21

1/32W

X5R-CERM

MF

LGA

LGA

0201

01005

01005

20%

0%

6.3V

GNSS

GNSS

GNSS

2103-601602-40

SKY65767-11

120NH-5%-40MA

0.1UF

0.00

UART_AP_TO_GNSS_TXD

UART_GNSS_TO_AP_RXD

UART_AP_TO_GNSS_RTS_L

UART_GNSS_TO_AP_CTS_L

PMU_TO_GNSS_EN

PP_VDD_MAIN

GNSS

16 8 7 6 5 1

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

IN

IN

OUT

IN

PP1V

8_G

NSS

PMU_TO_GNSS_EN

UART_GNSS_TO_AP_CTS*UART_AP_TO_GNSS_RTS*

UART_GNSS_TO_AP_RXDUART_AP_TO_GNSS_TXD

GNSS_TO_PMU_HOST_WAKE

AP_TO_GNSS_TIME_MARKAP_TO_GNSS_DEVICE_WAKE

GNSS_EXT_LNA_EN

GNSS_RFIN

VDD_GNSS_AUX_1V8

GNSS_BLANK

GND

TCXO_BB_GNSS_32K

GNSS_IF_TEST_OUTGNSS_26MHZ_CLKOUT

BATT

_VCC

_GNS

S

NC

IN

VCC

RF_OUT

GND

RF_IN

LNA_EN

OUT

IN

OUT

IN

IN

IN

IN

DEV CONFIG

DEV_HW_CONFIG Z 0 1

STUFF FOR VENDOR CONFIG ONLY

RESERVED

RESERVEDRESERVED

HW_ID<3:0>

HW CONFIG

DEBUG CONNECTOR

0 0 1 00 0 0 10 0 0 0

0 0 1 1ICE17.2 EVT

ICE17.2 PROTO1HARDWARE

ICE17.2 PROTO2ICE17.2 PROTO3

HW_ID<3:0>

HARDWARE ID

0 0 0 Z

0 0 Z Z0 0 Z 0

0 Z 0 0RESERVEDRESERVED

ICE17.2 RF DEV1ICE17.2 RF DEV2

HARDWARE

SIM CARD CONNECTOR

0 1 0 0

TRIG_IN

RESERVED

HW_MON2HW_MON1

MLB 516S1185FLEX 516S1184

BOOTCFG

NAND 0 0 1

0 Z 0 Z

FLASHLESS 1 0 1

BOOTSTRAPS ARE INTERNALLY PULLED DOWNNAND 1 1 1FLASHLESS WDOG DIS 1 1 0

RESERVED

BB_JTAG_RESET_LPP_VDD_BOOST

SELECT

PCIE GND

PLACE NEARLBPA/MHBPA

RFFE

MLB TEST POINTS

BASEBAND

PLACE NEAR XCVR0

PLACE NEAR XCVR1

BBPMUETIC

GNSS

DIGRF

BB UART

XCVR

PCIE

28 OF 34

R1607_KR1604_K

15

15

PP1661_K

PP1660_K

PP1658_K

PP1657_K

PP1656_K

PP1655_K

PP1654_K

PP1653_K

12 13

14

14

14

14

R1617_K

R1616_K

R1615_K

R1614_K

R1613_K

J_SIM_K

PP1647_K

PP1646_K

PP1648_K

PP1649_K

PP1650_K

PP1651_K

PP1652_K

DZ1609_K

DZ1608_K

DZ1607_K

DZ1606_K

PP1643_K

PP1642_K

PP1641_K

PP1640_K

PP1608_K

PP1611_K

PP1635_K

PP1610_K

PP1609_K

R1605_KR1602_K

R1606_KR1603_K

R1600_KR1611_K

R1601_KR1612_K

14

14

14

14

C1600_K

PP1607_K

PP1606_K

PP1624_K

PP1623_K

PP1622_K

PP1621_K

PP1620_K

PP1632_K

PP1631_K

PP1630_K

PP1629_K

PP1634_K

PP1633_K

PP1628_K

PP1627_K

PP1625_K

PP1619_K

PP1618_K

PP1617_K

PP1616_K

PP1615_K

PP1614_K

PP1613_K

PP1612_K

PP1605_K

PP1604_K

PP1603_K

PP1602_K

PP1601_K

PP1600_K

R1610_K

12 13 14 28

R1608_K

R1609_K

14

J_DEBUG_K

C1601_K DZ1605_K

DZ1600_K

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

DEV_HW_CONFIG_K

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

PCIE_AP_TO_BB_RESET_L

90_USB_BB_DATA_N 1 2

VDD_SIM1_K 2 4 5 16

90_USB_BB_DATA_P 1 2

SIM1_RST_R_K 16

SIM1_CLK_R_K 16

SIM1_IO_R_K 16

SIM1_SWP_R_K 16

SIM1_DETECT_R_K 16

BB_HW_ID<0>_K

BB_HW_ID<1>_K

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

BB_HW_ID<2>_K

BB_HW_ID<3>_K

SIM1_IO_R_K 16

SIM1_DETECT_R_K 16

SIM1_SWP_R_K 16

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

HW_MON2_K

HW_MON1_K

PMU_TO_BB_USB_VBUS_DETECT1 2

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

PMU_TO_BBPMU_RESET_L1 5

BB_JTAG_TDO_K3

UART_BB_TO_AP_RXD_K1 2 16

UART_AP_TO_BB_TXD_K1 2

BB_JTAG_TMS_K3

BB_JTAG_TCK_K3

BB_JTAG_TRST_L_K3

BB_JTAG_TDI_K3

SIM1_IO_R_K16

SIM1_CLK_R_K16

SIM1_IO_R_K 16

SIM1_RST_R_K 16

SIM1_CLK_R_K 16

SIM1_SWP_R_K 16

SIM1_DETECT_R_K 16

SIM1_RST_R_K16

SIM1_SWP_R_K16

SIM1_IO_K

SIM1_RST_K

SIM1_CLK_K

NFC_SWP1

SIM1_DETECT_K

SWD_AOP_TO_MANY_SWCLK 1 3

SWD_AOP_BI_BB_SWDIO 1 3

SIM1_CLK_R_K16

SIM1_RST_R_K16

VDD_SIM1_K2 4 5 16

VDD_RFFE_VIO_1V8_K 6 7 8 9 11 12 13

RFFE1_CLK_K 6 7 8 9 11 12 16

RFFE1_DATA_K 6 7 8 9 11 12 16

RFFE1_CLK_K 6 7 8 9 11 12 16

AP_TO_BBPMU_RADIO_ON_L 1 2 5

BBPMU_PWRGOOD_K 3 5 6

BBPMU_XG_RESET_L_K 3 5

BBPMU_XG_RESET_SD_L_K 3 5

BBPMU_VCLK_K 2 5

BBPMU_VDIO_K 2 5

AP_TO_MANY_BSYNC 1 5

RFFE1_DATA_K 6 7 8 9 11 12 16

RFFE2_CLK_R_K 6

RFFE2_DATA_R_K 6

RFFE_GPOUAT_CLK_K 14 17

RFFE_GPOUAT_DATA_K 14 17

50_ET_DAC_P_K 7 8

50_ET_DAC_N_K 7 8

90_DIGRF_M1_TX_P_K 2 6

90_DIGRF_M1_TX_N_K 2 6

90_DIGRF_A1_RX1_P_K 2 6

90_DIGRF_A1_RX1_N_K 2 6

90_DIGRF_M0_TX_P_K 2 6

90_DIGRF_M0_TX_N_K 2 6

UART_BB_TO_AP_RXD_K 1 2 16

GNSS_EXT_LNA_EN_K 15

AP_TO_BB_TIME_MARK 1 15

GNSS_IF_TEST_OUT_K 15

TCXO_BB_GNSS_32K_K 3 15

BB_DEBUG_ERROR_K 2

AP_TO_BB_MESA_ON_K 1 2

BB_TO_STROBE_DRIVER_GSM_BURST_IND1 2

BB_TO_AP_RESET_ACT_L_K 3

SYSCLK_26MHZ_K 2 6

GNSS_26MHZ_CLKOUT_K 6 15

90_PCIE_AP_TO_BB_TXD_P 1 2

90_PCIE_AP_TO_BB_TXD_N 1 2

90_PCIE_BB_TO_AP_RXD_P 1 2

90_PCIE_BB_TO_AP_RXD_N 1 2

PCIE_AP_TO_BB_RESET_L 1 2 16

PCIE_BB_BI_AP_CLKREQ_L 1 2

BB_TO_PMU_PCIE_HOST_WAKE_L 1 2

7.0.0

evt-1

16 OF 17

051-02247

1

1

1

1

1

1

1

1

6

9 8

2

7

3029282726252423222120191817161514131211105

3

1

1

1

1

1

1

1

2

12

1

2

12

1

1

1

1

1

1

1

1

1

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

2

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

2

1

2

1

2

1

363534333231302928272625242322212019181716151413121110987654321

42

41

4039

3837

2

1

2

1

2

1

2

1

2

1

1/32W

1/32W

1/32W

1/32W

1/32W

1/32W 1/32W

1/32W 1/32W

1/32W 1/32W

1/32W 1/32W

1/32W 1/32W

1/32W

1/32W

1/32W

X5R-CERM

MF

MF

MF

MF

MF

MF MF

NP0-C0G

MF MF

MF MF

MF MF

MF MF

MF

MF

MF

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

SM

0201

01005-1

SM

SM

01005

01005

01005

01005

01005

SG-WLL-2-2

SG-WLL-2-2

SG-WLL-2-2

SG-WLL-2-2

F-ST-SM

01005 01005

F-RT-SM

0201

01005

01005 01005

01005 01005

01005 01005

01005 01005

01005

01005

01005

20%

5%

5%

5%

5%

5%

1% 1%

5%

1% 1%

1% 1%

1% 1%

1% 1%

1%

1%

1%

6.3V

16V

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT_TABLE

OMIT

OMIT

NOSTUFF

OMIT OMIT

OMIT OMIT

NOSTUFF

NOSTUFF

NOSTUFF

SIM

SIM

BASEBAND BASEBAND

SIM

BASEBAND

BASEBAND BASEBAND

BASEBAND BASEBAND

BASEBAND BASEBAND

BASEBAND BASEBAND

BASEBAND

BASEBAND

BASEBAND

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

P2MM-NSM

2.2UF12V-33PF

P2MM-NSM

P2MM-NSM

10

10

10

10

10

ESD202-B1-CSP01005

ESD202-B1-CSP01005

ESD202-B1-CSP01005

ESD202-B1-CSP01005

20-5857-036-001-829

1.00K 1.00K

SIMCARD-BEACH-D22

5.5V-6.2PF

100PF

1.00K 1.00K

1.00K 1.00K

1.00K 1.00K

1.00K 1.00K

1.00K

1.00K

1.00K

90_PCIE_AP_TO_BB_REFCLK_N

90_PCIE_AP_TO_BB_REFCLK_P

BB_TO_NFC_CLK

UART_AP_TO_GNSS_RTS_L

UART_GNSS_TO_AP_CTS_L

UART_AP_TO_GNSS_TXD

UART_GNSS_TO_AP_RXD

PMU_TO_GNSS_EN

AP_TO_BB_RESET_L

PP_VDD_MAIN

PP_VDD_MAIN

UART_BB_TO_WLAN_COEX

UART_WLAN_TO_BB_COEX

TEST POINTS & SIM

2 1

2 1

16 15 8 7 6 5 1

16 15 8 7 6 5 1

3 1

15 1

15 1

15 1

15 1

15 1

6 1

2 1

2 1

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

OUT

OUT

PP

PP

PP

PP

PP

PP

PP

PP

BI

BI

OUT

IN

IN

GND

SIM_DETECT_SPG

CLK

VCC

SIM_DETECT

RESET SWP

IO

PP

PP

PP

PP

PP

PP

PP

NC

NCNCNCNCNCNC

PP

PP

PP

PP

NCNC

NC

NC

PP

PP

PP

PP

PP

OUT

OUT

OUT

OUT

NC

NC

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

OUT

OUT

RF CONNECTORS AND METROCIRC

LAT MLC

UAT1 MLC

4-IN-1 METROCIRC CABLE

JUAT1_K

JLAT1_K

C1708_K C1705_KC1707_K C1706_K

L1700_K

L1701_K

MC_K

C1704_K

L1703_K

C1703_K

L1702_K

C1711_K C1710_K

C1701_K C1700_K

R1700_K

PP1V8_S2 1 2 3 4 5 6 11 14 15 16 17

PP3V0_S2 1 17

50_UAT1_TEST_K 14

RFFE_GPOUAT_CLK_K 14 16

50_UAT_WLAN_5G_MLC_K 17 50_UAT_WLAN_5G_NORTH_K17

50_UAT_WLAN_5G_MLC_K17

UAT_TUNER_GPO2_K14

PP3V0_TRISTAR_UAT_CONN_K17

UAT_TUNER_GPO1_K14

PP3V0_S217 1

PP3V0_TRISTAR_LAT_CONN_K

50_LAT1_ANT_K 11

50_UAT_WLAN_5G_NORTH_K 17

50_UAT_MB_HB_TX_NORTH_K 13

50_UAT_LB_NORTH_K 13

50_UAT_WLAN_2G_NORTH_K 14

LAT_TUNER_GPO4_K 11

RFFE_GPOLAT_CLK_K 11

LAT_TUNER_GPO3_K 11

RFFE_GPOLAT_DATA_K11

PP1V8_S21 2 3 4 5 6 11 14 15 16 17

LAT_TUNER_GPO1_K11

50_UAT_LB_SOUTH_K11

50_UAT_MB_HB_TX_SOUTH_K11

PP1V8_GPOUAT_CONN_K

PP3V0_TRISTAR_UAT_CONN_K 17

RFFE_GPOUAT_DATA_K 14 16

LAT_TUNER_GPO2_K11

PP1V8_GPOLAT_CONN_K

252423222120

19181716151413

121110987

654321

30292827262524

23222120191817

161514131211109

87654321

2

1

2

1

2

1

2

1

21

21

15213

4

32233021

46454443424134333129282726252422

2019181614121711109876531

2

1

21

2

1

21

2

1

2

1

2

1

2

1

21

50_LAT_WLAN

50_UAT_WLAN_5G_SOUTH

50_UAT_WLAN_2G_SOUTH

150OHM-25%-200MA-0.7DCR

150OHM-25%-200MA-0.7DCR

27PF

0.00

27PF

150OHM-25%-200MA-0.7DCR

150OHM-25%-200MA-0.7DCR

5.6PF5.6PF220PF33PF

MM3729-2702A16

5.6PF5.6PF

FLTPSSL-524J

33PF220PF

UATUATNOSTUFFNOSTUFF

NOSTUFFNOSTUFF

16V16V

16V16V16V16V16V16V16V16V

5%

0%

5%

+/-0.1PF+/-0.1PF5%2%+/-0.1PF+/-0.1PF2%5%

01005

01005

01005

01005

01005

01005

01005

01005010050100501005

M-ST-SM

0100501005

SM

0100501005

NP0-C0G

MF

NP0-C0G

NP0-C0GNP0-C0GC0GNP0-C0GNP0-C0GNP0-C0GC0G

1/32W

M-RT-SMMM3729-2702A12

NP0-C0G

1

1

1

1245678

B

D

8 7 6 5 4 3

C

B

A

C

A

D

2 1

3

SHLD

SHLD

SIG2-N

SIG4-N

SIG1-N

SIG3-N

GND

SIG2-SSIG1-S

SIG3-SSIG4-S

GND

APR 03, 2017D22/D221 WIFI_MLB (GUINNESS)

CLOCKS

AOP

BLUETOOTH UART

COEX

WLAN UART

WLAN PCIE

CONTROL

ANTENNA

POWER

30 OF 34

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

12 31

50_LAT_WLAN

WLAN_TO_AP_TIME_SYNC

WLAN_TO_PMU_HOST_WAKE

90_PCIE_WLAN_TO_AP_RXD_N

90_PCIE_WLAN_TO_AP_RXD_P

AP_TO_WLAN_DEVICE_WAKE

PCIE_AP_TO_WLAN_RESET_L

90_PCIE_AP_TO_WLAN_TXD_N

90_PCIE_AP_TO_WLAN_TXD_P

PMU_TO_WLAN_CLK32K

PP1V8_S2

PCIE_WLAN_BI_AP_CLKREQ_L

051-02247

2017-04-1100084489387 ENGINEERING RELEASED

1 OF 5

evt-1

7.0.0

SCH,MLB,BOT,X893

2

3

3

3

SymbolPorts

PDF PAGE CONTENTS

WIFI FRONT-END3 772 76 GUINNESS

PP_VDD_MAIN

BT_TO_PMU_HOST_WAKE

PMU_TO_WLAN_REG_ON

PMU_TO_BT_REG_ON

AP_TO_BT_WAKE

90_PCIE_AP_TO_WLAN_REFCLK_P

90_PCIE_AP_TO_WLAN_REFCLK_N

UART_AP_TO_WLAN_TXD

UART_AP_TO_WLAN_RTS_L

UART_AP_TO_BT_TXD

UART_AP_TO_BT_RTS_L

AOP_TO_WLAN_CONTEXT_B

UART_BB_TO_WLAN_COEX

UART_WLAN_TO_AP_RXD

UART_WLAN_TO_AP_CTS_L

UART_BT_TO_AP_RXD

UART_BT_TO_AP_CTS_L

UART_WLAN_TO_BB_COEX

50_UAT_WLAN_2G_SOUTH

50_UAT_WLAN_5G_SOUTH

CSA PAGE

AOP_TO_WLAN_CONTEXT_A

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_ITEM

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

BRANCH

8

REVISION

ECNREV DESCRIPTION OF REVISION2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

CKAPPD

2 1

124567

B

D

6 5 4 3

C

A

PAGE

C

A

D

DATE

SHEET

DSIZEDRAWING NUMBER

7

B

3

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

8

IV ALL RIGHTS RESERVED

II NOT TO REPRODUCE OR COPY IT

PROPRIETARY PROPERTY OF APPLE INC.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

DRAWING TITLE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IO

IN

IO

IO

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IO

OUT

IN

TDO

TDI

WIFI/BT

31 OF 34

C7601_WC7600_W

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

12 30 31

R7600_W

UWLAN_W

UWLAN_W

C7608_WC7602_W

32

32

32

32

32

PP7630_W

PP7631_W

PP7629_W

PP7628_W

PP7627_W

PP7626_W

L7600_W

C7612_WC7611_WC7609_W

PP7625_W

PP7613_W

PP7620_W

PP7621_W

PP7622_W

PP7623_W

PP7624_W

PP7610_W

PP7611_W

PP7612_W

PP7614_W

PP7615_W

PP7616_W

PP7617_W

PP7618_W

PP7619_W

PP7600_W

PP7601_W

PP7603_W

PP7604_W

PP7605_W

PP7606_W

PP7607_W

PP7608_W

PP7609_W

12 30 31

C7603_W

C7604_W

12 30 31

12 30 31

C7606_WC7607_W

12 30 31

12 30 31

12 30

12 30

12 30 31

12 30 31

12 30 31

90_PCIE_WLAN_TO_AP_RXD_P

90_PCIE_AP_TO_WLAN_TXD_N

90_PCIE_AP_TO_WLAN_TXD_P

PP1V8_S22 1

90_PCIE_WLAN_TO_AP_RXD_N

WLAN_TO_PMU_HOST_WAKE

CBUCK_EXT_W

SR_LVX_W

PCIE_AP_TO_WLAN_RESET_L

LBIST_MBIST_W 2

WLAN_TO_AP_TIME_SYNC

PCIE_WLAN_BI_AP_CLKREQ_L

PMU_TO_WLAN_CLK32K

JTAG_WLAN_TMS_W2

JTAG_WLAN_TCK_W2

JTAG_WLAN_SEL_W2

JTAG_WLAN_TRST_L_W2

AP_TO_WLAN_DEVICE_WAKE

50_WLAN_G_1_W

50_WLAN_G_0_W

50_WLAN_A_0_W

50_WLAN_A_1_W

BT_XSW_3P3V_W3

BT_XSW_VCTRL_W

SR_LVX_1_W

WLAN_TO_AP_TIME_SYNC2 1

PCIE_WLAN_BI_AP_CLKREQ_L2 1

LBIST_MBIST_W2

90_PCIE_WLAN_TO_AP_RXD_N2 1

90_PCIE_WLAN_TO_AP_RXD_P2 1

JTAG_WLAN_SEL_W2

PMU_TO_WLAN_CLK32K2 1

AP_TO_WLAN_DEVICE_WAKE2 1

JTAG_WLAN_TRST_L_W2

JTAG_WLAN_SEL_W2

JTAG_WLAN_TCK_W2

PP1V8_S22 1

JTAG_WLAN_TMS_W2

90_PCIE_AP_TO_WLAN_TXD_P2 1

90_PCIE_AP_TO_WLAN_TXD_N2 1

WLAN_TO_PMU_HOST_WAKE2 1

PCIE_AP_TO_WLAN_RESET_L2 1

7.0.0

evt-1

4 OF 5

051-02247

183182181180179178177176175174173172168167166165164163162161160159158157156155154148146145144143142141140139138137136135134133132131130120118117116115114113112110109108107106105104103102101100999897

96959493848382818079787776757473727170696867656463626160595857565554535150484746454443424140353433312827242118171413121110

98765421

126

86

12489

32 1615 3029

119

92127

2526

2223

1920

8887

122

12191

15190

152

153

170150

171

169

123125

147

3937

3836

85

128

129

149111

5249

663

2

1

2

1

1

1

1

1

1

1

21

2

1

2

1

2

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

2

1

2

1

2

1

2

1

2

1

2

1

UART_AP_TO_WLAN_RTS_L

P2MM-NSM

OMIT

USI ES6.1 WIFI MODULE

AOP_TO_WLAN_CONTEXT_A

90_PCIE_AP_TO_WLAN_REFCLK_P

998-10147

27PF

01005WLAN

0.01UF

P2MM-NSM

P2MM-NSM

OMIT

P2MM-NSM

P2MM-NSM

UART_WLAN_TO_AP_CTS_L

NP0-C0G

CERM-X5R

2.2UH-20%-1.6A-0.2OHM

UART_BT_TO_AP_CTS_L

UART_AP_TO_BT_RTS_L

UART_BT_TO_AP_RXD

UART_AP_TO_BT_TXD

NP0-C0G01005WLAN

20%6.3V

20%10UF

0805

0201 0201CER-X5R6.3V

LGALBEE5W11KN-040

LGALBEE5W11KN-040

UART_AP_TO_WLAN_RTS_L

UART_WLAN_TO_AP_RXD

UART_WLAN_TO_AP_CTS_L

BT_TO_PMU_HOST_WAKE

UART_AP_TO_WLAN_TXD

PMU_TO_BT_REG_ON

UART_WLAN_TO_BB_COEX

PMU_TO_WLAN_REG_ON

UART_BB_TO_WLAN_COEX

AOP_TO_WLAN_CONTEXT_B

90_PCIE_AP_TO_WLAN_REFCLK_N

100PF

0.01UF16V5%

6.3V

0402-0.1MMCERM-X5R

0402-0.1MM

10UF

6.3VX5R01005 WLANWLAN

CER-X5R6.3V20%4UF

PP_VDD_MAIN

NP0-C0G01005

27PF10%

CERM0402

20%4V

7.5UF

01005

5%16V

WLAN

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMIT

SMOMIT

SMP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMP2MM-NSM

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMIT

CER-X5R0201

20%6.3V4UF

20%4UF

SMOMITP2MM-NSM

SMOMITP2MM-NSM

SMOMIT

SMOMIT

SM

SMOMITP2MM-NSM

1/32WMF01005

5%

NOSTUFFWLAN

10K

5%16V

X5R10%6.3V

SYNC_MASTER=WIFI

GuinnessSYNC_DATE=01/30/2014

AP_TO_BT_WAKE

UART_AP_TO_BT_RTS_L

UART_BT_TO_AP_CTS_L

UART_BT_TO_AP_RXD

UART_AP_TO_BT_TXD

PMU_TO_BT_REG_ONBT_TO_PMU_HOST_WAKE

UART_AP_TO_WLAN_TXD

UART_WLAN_TO_AP_RXD

AOP_TO_WLAN_CONTEXT_A

AOP_TO_WLAN_CONTEXT_B

90_PCIE_AP_TO_WLAN_REFCLK_P

90_PCIE_AP_TO_WLAN_REFCLK_N

PMU_TO_WLAN_REG_ON

P2MM-NSM OMIT

AP_TO_BT_WAKE

BOM_TABLE_ALTS UWLAN_W998-10376

1

1 2

1 2

1 2

1 2

1 2

2

1 2

1 2 1 2

1 2

1 2

1 2

1

1 2

1 2

1 2

1 2

TABLE_ALT_ITEM

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FORPART NUMBER

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

IN

IN

IN

OUT

OUT

OUT

IN

BI

OUT

IN

IN

IN

OUT

IN

IN

IN

IN

OUT

SYM 2 OF 2

GND GND

SYM 1 OF 2

ANT_SW_CTRLANT_SW_3P3

5G_ANT_CORE15G_ANT_CORE0

2G_ANT_CORE0

2G_ANT_CORE1

FAST_UART_CTS_IN

WL_DEV_WAKE

FAST_UART_TX

FAST_UART_RTS_OUT

VDDI

O_1

P8V

VBAT

_VCC

VBAT

_RF_

VCC

VBAT

_RF_

VCC

VBAT

_VCC

BT_HOST_WAKE

FAST_UART_RX

BT_REG_ON

JTAG_TRST*

JTAG_SELJTAG_TCKJTAG_TMS

SECI_OUT

WL_REG_ON

SECI_IN

LPO_IN

GP15

CXT_B/TDOCXT_A/TDI

PCIE_REFCLK-PCIE_REFCLK+

SR_VLX

PCIE_PERST*

PCIE_RD-PCIE_RD+

PCIE_TD-PCIE_TD+

WL_HOST_WAKE

PCIE_CLKREQ*

BT_DEV_WAKE

BT_UART_TXDBT_UART_CTS*BT_UART_RTS*

BT_UART_RXD

CBUCK_EXT

WLAN_TIME_SYNC

LHL_GPIO2

OUT

BI

BI

BI

BI

NC

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

IN

IN

OUT

IN

IN

IN

OUT

IN

OUT

IN

5GHZ WIFI UPPER ANTENNA FEED

WIFI LOWER ANTENNA FEED

STRIPLINE

2GHZ LAT

2GHZ UAT 5GHZ UAT

32 OF 34

31

12 30

31 12 30

C7712_W

W2BPF_W

C7716_W

R7702_W

C7703_W

C7701_W

W25DI_W

W5BPF_W

C7709_W

L7701_W

R7701_W

C7705_W

R7700_W

C7708_W

L7704_W

C7711_W

R7711_W

L7700_W

W2XSW_W31

12 30

31

R7703_W

31

50_WLAN_G_1_SWOUT_W 3

50_WLAN_G_1_M_W

BT_XSW_VCTRL_W

50_WLAN_A_0_BPF_1_W

50_WLAN_A_1_DPLX_W_W

50_WLAN_G_1_DPLX_W

50_WLAN_G_0_W

50_WLAN_G_0_SWOUT_W 50_WLAN_A_0_W

50_WLAN_A_1_W

BT_XSW_3P3V_W2

50_WLAN_G_1_W

50_LAT_WLAN_STRIPLINE_W

50_WLAN_A_0_BPF_2_W

50_LAT_WLAN

50_WLAN_G_1_BPF_W50_WLAN_G_1_SWOUT_W3

7.0.0

evt-1

5 OF 5

051-02247

2

1

21

2

1

21

2

1

21

21

1

3

854

7

962

2

1

2

1

1

6 5 3 2

4

2

1

21

2

1

21

46

531

2

31

2

2

1

2

1

21

R7702_W

R7702_W

CRITICAL

CRITICAL ROW

5GHZ C0 BPF OUTPUT MATCH

5GHZ C0 BPF OUTPUT MATCH

5GHZ C0 BPF OUTPUT MATCH

50_UAT_WLAN_2G_SOUTH

01005NP0-C0G

WiFiANTFeeds

16VC0G-CERM

+/-0.05PF0.3PF

01005

01005

NP0-C0G

01005

01005

010059.1NH-3%-0.17A-1.7OHM

SBBD

0.2PF16V

01005CERM

35V5%

0.2PF16V+/-0.05PFCERM

0%

MF1/32W

LGA

0.2PF

0.00

0%

01005MF

1/32W

1.2NH-+/-0.1NH-0.80A

100K16V

1.0PF+/-0.1PF

100PF

QM21245

3.6PF

16V

01005NP0-C0G

+/-0.1PF

01005

01005

5%1/32W

01005MF

01005NP0-C0G

+/-0.1PF

1

1

152S00498 1

117S0161 D221

152S00498

CRITICALR7702_W

LFD212G45MY6E

0.00

2.2NH-+/-0.1NH-0.50A

LFB185G53CT60603

0.5NH-+/-0.1NH-1.0A-0.04OHM1.2NH-+/-0.1NH-0.80ACXA4440GC

JPN

+/-0.05PF

50_UAT_WLAN_5G_SOUTH

NOSTUFF

NOSTUFF

01005

NOSTUFF01005

0.4NH-+/-0.1NH-1.0A-0.03OHM

LGA

01005

OMIT_TABLE

16V

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

TABLE_5_ITEM

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

TABLE_5_ITEM

BI

BI

BI BI

GND

ANTTX

GND

LBHB

ANT

IN

GND

OUTRF2RF4RF1

VCGND

RF3

VDD

IN

BI

IN

BI

MARCH 22, 2017D22 NFC_MLB

33 OF 34

PP1V8_S2

AP_TO_NFC_FW_DWLD_REQ

NFC_DWP_TX_TP_S

051-02247

2017-04-1100084489387 ENGINEERING RELEASED

1 OF 75

evt-1

7.0.0

SCH,MLB,BOT,X893

PP_VDD_MAIN

NFC_SWP1

UART_NFC_TO_AP_CTS_L

PMU_TO_NFC_EN

AP_TO_NFC_DEV_WAKE

BB_TO_NFC_CLK

UART_AP_TO_NFC_TXD

UART_AP_TO_NFC_RTS_L

UART_NFC_TO_AP_RXD

NFC_TO_BB_CLK_REQ

NFC_TO_PMU_HOST_WAKE

SOFT_CAP3 C7500_S,C7502_S,C7505_S CRITICAL138S00159 CAP,SOFT-TERM,2.2UF,6.3V,0201

page1

TYPICAL_CAP3 C7500_S,C7502_S,C7505_S CRITICAL138S0831 CAP,TYPICAL,2.2UF,6.3V,0201

34

34 12

34 12

34 12

34 12

34 12

34 12

34 12

34 12

34 12

34 12

34 12

34 12

34 12

TABLE_5_ITEM

BRANCH

8

REVISION

ECNREV DESCRIPTION OF REVISION2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

CKAPPD

2 1

124567

B

D

6 5 4 3

C

A

PAGE

C

A

D

DATE

SHEET

DSIZEDRAWING NUMBER

7

B

3

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

8

IV ALL RIGHTS RESERVED

II NOT TO REPRODUCE OR COPY IT

PROPRIETARY PROPERTY OF APPLE INC.

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

DRAWING TITLE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#TABLE_5_HEAD

BOM OPTIONCRITICALTABLE_5_ITEM

IN

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

OUT

IO

IN

NFC FRONT END

STOCKHOLM 5V BOOSTER

NFC CONTROLLER

7.0.0

34 OF 34

051-02247

evt-175 OF 75

C7507_S

T750

0_S

NFC_S

L7503_S

PP7514_SPP7510_S

C7513_S

L7501_S

C7517_S

C7511_S

TP7506_S

C7523_S

C7505_S

C7520_S

L7502_S NFC_DCDC_S

PP7513_S

PP7512_S

PP7511_S

Q7501_S

NFC_FETB0_S

Q7502_SQ7502_SQ7501_S

C7533_SC7532_SC7531_SC7530_S

C7518_S

C7512_S

C7514_S

C7510_S

R7508_S

PP7509_S

PP7508_S

PP7507_S

PP7506_S

PP7505_S

PP7504_S

PP7503_S

C7506_S C7526_S

C7516_SC7515_S

TP7505_S

C7504_S

C7521_S

C7522_S

C7503_S

C7500_S

R7502_S

C7502_S

L7500_S

NFC_BAL2_S

NFC_ANT_S

NFC_TUNE_B2_S 34

AP_TO_NFC_FW_DWLD_REQ

NFC_BOOST_EN_S 34

NFC_RXP_S 34

NFC_RXN_S

NFC_TXP_S 34

NFC_DWP_TX_TP_S

NFC_TXN_S 34

VDD_NFC_AVDD_S34

VDD_NFC_5V_S34

PP1V8_S212 33

VDD_NFC_DVDD_S

NFC_RXP_S34

NFC_TUNE_B2_S34 NFC_TUNE_B3_S34

NFC_TUNE_B0_S34

NFC_TUNE_B1_S34

NFC_FETB2_S

VDD_NFC_TVDD_S

NFC_TXN_S34 NFC_DWP_RX_TP_S

VDD_NFC_ESE_SVOLTAGE=1.80V

NFC_DCDC_OUT_S VDD_NFC_5V_S

NFC_BOOST_SW_S

VDD_NFC_5V_S34 AP_TO_NFC_FW_DWLD_REQ12 33 34

NFC_FETB3_SNFC_FETB1_S

NFC_ADC_I_TEST_S34

NFC_TEST_OUT_S34

VDD_NFC_AVDD_S34 VOLTAGE=1.80V

NFC_BOOST_EN_S34

NFC_ADC_I_TEST_S 34

NFC_TUNE_B1_S 34

NFC_TEST_OUT_S 34

NFC_TUNE_B3_S 34

NFC_TUNE_B0_S 34

NFC_TXP_S34

NFC_RXP_CAP_S

NFC_BAL1_S

NFC_ANT_MATCH_S

BB_TO_NFC_CLK

NFC_TO_BB_CLK_REQ

AP_TO_NFC_DEV_WAKE

NFC_SWP1

PMU_TO_NFC_EN

UART_NFC_TO_AP_CTS_L

UART_AP_TO_NFC_RTS_L

PP_VDD_MAIN

PP_VDD_MAIN

NFC_TO_PMU_HOST_WAKE

PMU_TO_NFC_EN

AP_TO_NFC_DEV_WAKE

UART_NFC_TO_AP_RXD

UART_AP_TO_NFC_TXD

UART_AP_TO_NFC_RTS_L

UART_NFC_TO_AP_CTS_L

UART_NFC_TO_AP_RXD

NFC_TO_PMU_HOST_WAKE

UART_AP_TO_NFC_TXD

NFC

0201NFC

C0G-NP0

2%25V

1000PF1 2

SMATB121006F-20011-T11

14 3

2

33

PN80VEU3-C003B007UFLGA

D7

G3

G5

G6

B1

C6

D3

B7D4

E5

C5B4

G1

B5C4D5E4E6F4F5F6F8G4B3B6D6E7F7

E3

C8

C2B2F3F2H2G2F1

D2

C1

H6H5

A4 A7

A3A6

A5 A8B8G7

H8

G8H7

A2

E2C3

E1D1

E8C7

H1

H4

H3

A1

D8

10OHM-50%-1A-0.05OHM

0201

1 2

OMIT

P2MM-NSMSM1P2MM-NSM

OMIT

SM1

0201

2%

NFC

25VC0G-NP0

1000PF

1

2

NFC0402

77NH-5%-1.1A-0.09OHM

1 2

20%15UF6.3VX5R0402-0.1MM-1NFC

1

2

0402-0.1MM-1

15UF6.3V20%X5R

NFC

1

2

TP-P55OMITNFC

1

2.2UF

X5R-CERM0201

20%6.3V

NFC

1

2

0201

6.3V

NFC

X5R-CERM20%2.2UF

OMIT_TABLE

1

2

2.2UF

X5R-CERM20%6.3V

NFC0201

1

2

PIGA1608-SM

0.47UH-20%-2.52A-0.08OHM

1 2WLCSP

FAN48680UC07X

B3C3

C2 C1

A3

B1B2

A1A2

SM

OMIT

P2MM-NSM1

SM

OMIT

P2MM-NSM1

P2MM-NSMSM

OMIT

1

XLLGA

NOSTUFF

NTND3184NZTAG

6

2

1XLLGANTND3184NZTAG

NOSTUFF

3

5

4XLLGANTND3184NZTAG

NOSTUFF

6

2

1XLLGANTND3184NZTAG

NOSTUFF

3

5

4

5%

01005C0G

150PF25V

NOSTUFF1

201005C0G25V5%82PF

NOSTUFF1

2NP0-C0G

39PF16V

01005

5%

NOSTUFF1

22%16V18PF

01005CERM

NOSTUFF1

2

330PF

NPO-COG25V

0201

2%

1

2

100PF

C0G50V

0201

2%

1 2

560PF

NPO-C0G0201

2%25V

1 2

1000PF

0201NFC

25VC0G-NP02%

1

2

201

1%

MF

NFC

1K

1/20W

1 2

OMIT

SMP2MM-NSM

1

OMIT

P2MM-NSMSM1

SM

OMIT

P2MM-NSM1

SMP2MM-NSM

OMIT

1

SM

OMIT

P2MM-NSM1

SM

OMIT

P2MM-NSM1

SMP2MM-NSM

OMIT

1

0201

20%2.2UF

X5R-CERM6.3V

1

20201

6.3V2.2UF

X5R-CERM20%

1

2

33 12

C0G-NP0

1000PF25V

0201NFC

2%

1

2

1000PF2%

0201

25VC0G-NP0

NFC

1

2

TP-P55OMITNFC

1

0.22UF6.3V20%X5R01005NFC

1

2

01005NFC

5%100PF16VNP0-C0G

1

2

01005

5%16V

NFC

100PF

NP0-C0G

1

2

X5R-CERM

NFC

0.1UF

01005

20%6.3V

1

2

34 33 12

34 33 12

34 33 12

34 33 12

34 33 12

34 33 12

33 12

33 12

34 33 12

34 33 12

OMIT_TABLE

X5R-CERM0201NFC

2.2UF20%6.3V

1

2

MF01005

0%

0.00

NFC

1/32W

1 2

2.2UF20%6.3V

0201NFC

X5R-CERM

OMIT_TABLE

1

2

77NH-5%-1.1A-0.09OHM

NFC0402

1 2

34 33 12

34 33 12

34 33 12

34 33 12

34 33 12

34 33 12

34 33 12

34 33 12

34 33 12

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:

II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

1

D

C

B

A

DSIZE

PAGE

BRANCH

SHEET

REVISION

DRAWING NUMBER

1

3 245

35 4

678

D

67

C

B

8

APAGE TITLE

2 IV ALL RIGHTS RESERVED

PROPRIETARY PROPERTY OF APPLE INC.THE INFORMATION CONTAINED HEREIN IS THE

Apple Inc.

NOTICE OF PROPRIETARY PROPERTY:

PORT

1PO

RT2

PORT

3G

ND

IN

NCNCNCNC

TX_PWR_REQ_P

NFC_GPIO6

XTAL2

ESE_

VDD

ESE_

VSS

PVSS

TVSS

DVSS

AVSS

AVSS

AVSS

VDD

SIM

_VCC

2SI

M_V

CC1

GPI

OVD

D

SVDD

AVDD

TVDDVU

P

PVDD

SIM

_PM

U_VC

C_2

VBAT

SIM_SWIO_1

ESE_GPIO

ESE_DWPS_DBGESE_DWPM_DBG

RX-RX+

SIM_SWIO_2

NFC_GPIO4

TX2TX1

VMID

WKUP_REQ

NFC_GPIO1NFC_GPIO0

NFC_GPIO3NFC_GPIO2

NFC_GPIO5

IRQ

DWL

UART_TXUART_RX

VEN

UART_RTSUART_CTS

IC5IC4

IC1

IC3IC2

IC6IC7IC8IC9

IC0

NFC_CLK_XTAL1

IC14IC13IC12

IC10

CLK_REQ

IC11

SIM

_PM

U_VC

C_1

PPPP

NC

A

PGND

MODE1MODE0

VOUTVOUT

PVIN

SWSW

PP

PP

PP

D

S

G

D

S

G

D

S

G

D

S

G

NC

NC

NCNCNCNCNCNCNCNC

NCNC

PP

PP

PP

PP

PP

PP

PP

BI

NCNC

A

IN

IN

OUT

OUT

IN

IN

IN

OUT

IN

OUT

NCNC