guide - netfpgawiki -...

Guide - NetFPGAWiki

http://netfpga.org/netfpgawiki/index.php/Guide 147 [2008-9-2 23:00:02]

Guide

Contents[hide]

1 Introduction

2 Obtain Hardware and Software

1.1 Usage Models

1.2 Major Components

1.3 How to read this Guide

1.4 Report bugs and discuss progress

1.5 NO GUARANTEES

2.1 Obtaining NetFPGA Hardware

2.2 Obtaining a Host PC for the NetFPGA

1.3.1 to set up a laboratory

1.3.2 to use the NetFPGA packages

1.4.1 Track Bugs with Bugzilla

1.4.2 NetFPGA-Beta Email list

2.1.1 Ordering From the Web

2.1.2 Ordering with a Purchase Order by Email or Phone

2.2.1 Assemble your PC from Components

2.2.2 List of PC Components

2.2.3 Purchase a Dell 2950

2.2.4 Purchase a Pre-built Machine

http://netfpga.org/netfpgawiki/index.php/Image:NetFPGA_Logo.gifjavascript:toggleToc()

Guide - NetFPGAWiki


3 Install Software 1.2

4 Verify the software and hardware

2.3 Obtaining Gateware/Software Package

3.1 Installing an Operating System on the Host PC

3.2 Software installation

3.3 Install CAD Tools

3.4 Install Memory Modules for Simulation

4.1 Compile and Load Driver

2.3.1 Register to download the Beta NetFPGA Package (NFP)

2.3.2 Download the Beta NetFPGA Package (NFP)

2.3.3 Download the extended NetFPGA Package (BetaPlus, optional)

3.1.1 CentOS Installation Instructions

3.1.2 Other tested but unsupported operating systems

3.2.1 Log in as root

3.2.2 Install Java

3.2.3 Install RPMforge Yum repository

3.2.4 Install NetFPGA Base Package

3.2.5 Create NF2 directory in your user account

3.2.6 Reboot your machine

3.3.1 Install Xilinx ISE

3.3.2 Install ModelSim

3.3.3 Debug with ChipScope

3.4.1 Micron DDR2 SDRAM

3.4.2 Cypress SRAM

4.1.1 Compile driver and tools

Guide - NetFPGAWiki


5 Walkthrough the Reference Designs

4.2 Run Selftest

4.3 Run Regression Tests

4.4 Run regression scripts on new bitfile

5.1 Reference NIC Walkthrough

5.2 SCONE Walkthrough

4.1.2 Load driver and tools

4.1.3 Verify NetFPGA interfaces

4.1.4 Reprogram the CPCI

4.2.1 Connect loopback cables

4.2.2 Load self-test bitfile

4.2.3 Run Selftest

4.3.1 Connect Ethernet test cables

4.3.2 Log in as root through X session

4.3.3 Load reference_router bitfile

4.3.4 Run regression test suite

4.4.1 Synthesize reference_router bitfile, from source

4.4.2 Load new bitfile

4.4.3 Run regression-test suite on new bitfile

5.1.1 Using counterdump

5.1.2 Using send_pkts

5.1.3 Understanding the Hardware/Software Interface

5.1.4 Reference Pipeline

5.1.5 What to do From Here

5.2.1 What is SCONE?

Guide - NetFPGAWiki


5.3 Router Kit Walkthrough

5.4 Reference Router Walkthrough

5.5 Buffer Monitoring System

5.2.2 How to use SCONE?

5.2.3 How does SCONE work with NetFPGA?

5.3.1 Overview

5.3.2 Running Router Kit

5.3.3 Using Router Kit

5.3.4 How it Works

5.4.1 Java GUI

5.4.2 Command Line Interpreter

5.4.3 Modifying the Reference Router

5.5.1 Introduction

5.2.3.1 Writing MAC Addresses to the NetFPGA

5.2.3.2 Writing interface IP Addresses to the NetFPGA

5.2.3.3 Writing routing entries to the NetFPGA

5.2.3.4 Writing ARP entries to the NetFPGA

5.4.3.1 Reference Pipeline Details

5.4.3.2 Register Pipeline

5.4.3.3 Outside the Reference Pipeline

5.4.3.4 Using a Library Module

5.4.3.5 Adding New Sources

5.4.3.6 Simulating the design

5.4.3.7 Implementing the Design

5.4.3.8 Testing the New Router

Guide - NetFPGAWiki


The NetFPGA is a low-cost platform, primarily designed as a tool for teaching networking hardware and router

design. It has also proved to be a useful tool for networking researchers. Through partnerships and donations

from sponsor of the project, the NetFPGA is widely available to students, teachers, researchers, and anyone

else interested in experimenting with new ideas in high-speed networking hardware.

At a high level, the board contains four 1 Gigabit/second Ethernet (GigE) interfaces, a user programmable

Field Programmable Gate Array (FPGA), and four banks of locally-attached Static and Dynamic Random

Access Memory (SRAM and DRAM). It has a standard PCI interface allowing it to be connected to a desktop PC

or server. A reference design can be downloaded from the http://NetFPGA.org website that contains a

[edit]Introduction

[edit]Usage Models

6 Links

7 License

6.1 Schematic and board layout

6.2 Contributed Packages

6.3 Tutorial Setup

6.4 Other Pages

5.5.2 Using the system

5.5.3 Design Details

5.5.4 Packet Format

5.5.2.1 monitor_ctrl

5.5.2.2 rcv_evts

5.5.3.1 evt_rcrdr

5.5.3.2 evt_pkt_wrtr

5.5.3.3 Schematic

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hardware-accelerated Network Interface Card (NIC) or an Internet Protocol Version 4 (IPv4) router that can be

readily configured into the NetFPGA hardware. The router kit allows the NetFPGA to interoperate with other

IPv4 routers.

The NetFPGA offloads processing from a host processor. The host's CPU has access to main memory and can DMA

to read and write registers and memories on the NetFPGA. Unlike other open-source projects, the NetFPGA provides

a hardware-accelerated hardware datapath. The NetFPGA provides a direct hardware interface connected to four

GigE ports and multiple banks of local memory installed on the card.

NetFPGA packages (NFPs) are available that contains source code (both for hardware and software) that

implement networking functions. Using the reference router as an example, there are three main ways that

a developer can use the NFP. In the first usage model, the default router hardware can be configured into the

FPGA and the software can be modified to implement a custom protocol.

http://netfpga.org/netfpgawiki/index.php/Image:System_Diagram_1.gif

Guide - NetFPGAWiki


Another way to modify the NetFPGA is to start with the reference router and extend the design with a custom

user module. Finally, it is also possible to implement a completely new design where the user can place their

own logic and data processing functions directly in the FPGA.

1. Use the hardware as is as an accelerator and modify the software to implement new protocols. In this scenario, the

NetFPGA board is programmed with IPv4 hardware and the Linux host uses the Router Kit Software distributed in the

NFP. The Router Kit daemon mirrors the routing table and ARP cache from software to the tables in the hardware

allowing for IPv4 routing at line rate. The user can modify Linux to implement new protocols and test them using the

full system.

2. Start with the provided hardware from the official NFP (or from a third-party NFP), modify it by using modules from

the NFP's library or by writing your own Verilog code, then compile the source code using industry standard design

tools. The implemented bitfile can then be downloaded to the FPGA. The new functionality can be complemented by

additional software or modifications to the existing software. For the IPv4 router, an example of this would be

implementing a Trie longest prefix match (LPM) lookup instead of the currently implemented CAM LPM lookup for the

hardware routing table. Another example would be to modify the router to implement NAT or a firewall.

http://netfpga.org/netfpgawiki/index.php/Image:System_Diagram_2.gif

Guide - NetFPGAWiki


A block diagram that shows the major components of NetFPGA platform is shown below.

The NetFPGA platform contains one large Xilinx Virtex2-Pro 50 FPGA which is programmed with user-defined logic

and has a core clock that runs at 125MHz. The NetFPGA platform also contains one small Xilinx Spartan II

FPGA holding the logic that implements the control logic for the PCI interface to the host processor.

Two 18 MBit external Cypress SRAMs are arranged in a configuration of 512k words by 36 bits (4.5 Mbytes total)

and operate synchronously with the FPGA logic at 125 MHz. One bank of external Micron DDR2 SDRAM is arranged

in a configuration of 16M words by 32 bits (64 MBytes total). Using both edges of a separate 200 MHz clock,

the memory has a bandwidth of 400 MWords/second (1,600 MBytes/s = 12,800 Mbits/s).

3. Implement a new design from scratch: The design can use modules from the official NFP's library or third party

modules to implement the needed functionality or can use completely new source code.

[edit]Major Components

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The Broadcom Gigabit/second external physical-layer transceiver (PHY) sends packets over standard category 5,

5e, or 6 twisted-pair cables. The quad PHY interfaces with four Gigabit Ethernet Media Access Controllers

(MACs) instantiated as a soft core on the FPGA. The NetFPGA also includes two interfaces with Serial ATA

(SATA) connectors that enable multiple NetFPGA boards in a system to exchange traffic directly without use of

the PCI bus.

Depending on your goals, you may find certain chapters of this guide more relevant than others.

If your task is to set up machines, start by reading the steps to obtain hardware and software, follow the steps

to install software, then verify the software and hardware.

If you already have NetFPGA systems up and running in your laboratory and want to understand how it works,

read the walkthroughs of the Reference Designs to understand the operation of the reference NIC, the

software component of the router (SCONE), the router kit, the reference router hardware, and the buffer

monitoring system.

We encourage feedback and discussion about the progress and problems with the NetFPGA. An bug-tracking

system called Bugzilla is available to read about and post bugs. A email discussion group is available to

discuss progress on the project.

We track and maintain bugs using BugZilla

[edit]How to read this Guide

[edit]to set up a laboratory

[edit]to use the NetFPGA packages

[edit]Report bugs and discuss progress

[edit]Track Bugs with Bugzilla

Create an account for yourself

http://netfpga.org/bugzilla/http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=4http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=5http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=6http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=7http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=8http://netfpga.org/bugzilla/createaccount.cgi

Guide - NetFPGAWiki


We maintain a mailing list for discussion about NetFPGA topics. One list is used to communicate with the

developers, while the other is used to communicate with the entire Beta user community.

We do not guarantee that any or all of the NetFPGA components will work for you. FPGAs allow for an

enormous range of freedom in the implementation of circuits. We do not guarantee that anything you get from us

will not damage the hardware on the NetFPGA, the software on the PC, or anything else. And finally we do

not guarantee that you will get support. However, we do guarantee that we did/will do our best. Hence, the license.

The first thing to be done is putting the board in the the box and making sure it runs. To get started, you'll need

[edit]NetFPGA-Beta Email list

Email to [email protected] sends email to all registered Beta users

[edit]NO GUARANTEES

[edit]Obtain Hardware and Software

Search for a bug

View summaries

Report a bug

Feel free to use this list for:

Email etiquette

Discussion progress on Beta program

Announcements on progress with the NetFPGA

General questions about the scripts and code

Answers to questions (feel free to contribute)

You must register as a NetFPGA Beta user to participate on this list

Do NOT send SPAM or start flame wars.

http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=9mailto:[email protected]://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=10http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=11http://netfpga.org/bugzilla/query.cgihttp://netfpga.org/bugzilla/report.cgihttp://netfpga.org/bugzilla/enter_bug.cgi

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to perform the following steps:

The NetFPGA boards can be obtained from a third-party company, Digilent Inc. The cards are sold for a

discounted price when used for Educational purposes. They are also available for commercial use, but pricing

is higher. Stanford University provided the open reference design to Digilent Inc., but is not involved in the sale of

the hardware.

Complete NetFPGA systems can also be ordered on-line that include the NetFPGA hardware pre-installed in a host PC.

The easiest way to purchase hardware is to order on-line from Digilent

How you can acquire NetFPGA hardware

How you can buy or build your Host PC.

How you can get an account and download the Beta package from NetFPGA.org

[edit]Obtaining NetFPGA Hardware

[edit]Ordering From the Web

[edit]Ordering with a Purchase Order by Email or Phone

Obtaining NetFPGA Hardware

Obtaining a Host PC for the NetFPGA

Obtaining Gateware/Software Package

Obtain Designs

Projects:Packet_generator

Contributed Designs

http://www.digilentinc.com/Products/Detail.cfm?Prod=NETFPGA&Nav1=Products&Nav2=Programmablehttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=12http://netfpga.org/netfpgawiki/index.php/Image:NetFPGA_150.gifhttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=13http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=14http://netfpga.org/netfpgawiki/index.php/Projects:Packet_generatorhttp://netfpga.org/netfpgawiki/index.php/Contributed

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Academic institutions can order the hardware with a discount by placing a purchase order.

NetFPGAs host systems can be built from commodity, off-the-shelf (COTS) parts. The NetFPGA card fits into

a standard PCI slot in a desktop or server-class PC. We have only tested the NetFPGA in a few of a few

widely-available systems. The NetFPGA may work with other PCs as well, but we do not support such configurations.

There are currently multiple ways to obtain a NetFPGA host system:

To install a NetFPGA, you will need to open the case to your computer. To minimize the chance that you damage

your computer or the NetFPGA module, we suggest that you wear an anti-static wrist strap when handing

the hardware.

The most cost-effective way to build a high-performance NetFPGA host system is to purchase the components

from on-line vendors and assemble your own machine. This effort is not for the faint of heart, however, as you

will need to place multiple orders for components and have the time to assemble and test the PC. We assembled all

of the nf-test machines at Stanford University. You can use the Bill of Materials (BOM) below to do the same.

To start the process, send an email to request a quote from: [email protected]

Have your university execute a purchase order and have that sent to Digilent Inc.

For help with ordering, call: (509) 334-6306

[edit]Obtaining a Host PC for the NetFPGA

[edit]Assemble your PC from Components

1. Assemble your on PC using from components

2. Purchase a Dell 2950 from Dell.com then add the NetFPGA.

3. Purchase a complete pre-built system

http://www.uline.com/Browse_Listing_7401.asp?searchedkeywords=anti%20static%20wristhttp://netfpga.org/nf-test/mailto:[email protected]://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=15http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=16

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Stanford constructed 11 PCs for North American tutorials; more info is available in the NF-TEST machines page.

These PCs were built with the following components:

[edit]List of PC Components

Motherboard

Option 1: ASUS M2N-VM DVI - Micro ATX Motherboard

Option 2: ASUS M3A78-CM - Micro ATX Motherboard

Item=N82E16813131214 from NewEgg.com : $59.99

Set the BIOS to use the on-

board Video. Use the PCI-

express bus for the NIC

http://netfpga.org/nf-testhttp://netfpga.org/netfpgawiki/index.php/Image:CAD_PC.jpghttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=17http://www.newegg.com/Product/Product.aspx?Item=N82E16813131214

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AMD X2 AM2 CPU:

2GB DDR2 800 DRAM.

DVD Reader/Writer (for boot disk)

MicroATX Chassis with clear covers to see NetFPGA

400W+ Power Supply with modular cables (optional)

Intel Pro/1000 Dual-port Gigabit PCI-Express (PCIe)x4 NIC

500G SATA HD

Option 1: AMD X2 6400 (3.2 GHz) CPU

Option 2: AMD X2 6000 (3.0 GHz) CPU

Option 1: ULT33116 from TigerDirect.com : $69.99

Option 2: ULT33117 case: $39 + ULT33156 K: 500W power supply

Option 3: Apevia X-QPACK2: $99

Use the fastest clock

frequency to minimize time to

place and route the FPGA



sku=ULT33160 from TigerDirect: $19.99

Mfg Part#: EXPI9402PT from Buy.com : $155.99

Item=A455-2408 from TigerDirect.com : $89.99

We have not yet validated

this motherboard

Item CP1-AM2-6400A from TigerDirect.com: $149.97


http://www.tigerdirect.com/applications/SearchTools/item-details.asp?EdpNo=2074672&Sku=ULT33116http://www.tigerdirect.com/applications/SearchTools/item-details.asp?EdpNo=1800612&CatId=3428http://www.tigerdirect.com/applications/SearchTools/item-details.asp?EdpNo=2974590&Sku=ULT33156%20Khttp://www.tigerdirect.com/applications/SearchTools/item-details.asp?EdpNo=3057987&CatId=32http://www.newegg.com/Product/Product.aspx?Item=N82E16820220144http://www.newegg.com/Product/Product.aspx?Item=N82E16827151173http://www.tigerdirect.com/applications/SearchTools/item-details.asp?EdpNo=2240441&sku=ULT33160http://www.buy.com/prod/pro-1000-pt-dual-port-server-adapter-pci-express-x4-10base-t-100ba/q/loc/101/202007873.htmlhttp://www.tigerdirect.com/applications/SearchTools/item-details.asp?EdpNo=4016440&CatId=2320http://www.tigerdirect.com/applications/SearchTools/item-details.asp?EdpNo=3509778http://www.newegg.com/Product/Product.aspx?Item=N82E16819103773

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The total cost to build a single machine is:

The total cost to equip a laboratory with Qnty=11 PCs, cables (not including NetFPGAs)

Note that tax and shipping are not included in the above figures.

A pre-configured Dell 2950 2U Rackmount PC can be purchased from Dell. We have verified that the NetFPGA

works in the PCI-X slot of the Dell 2950 2U Rack-mount server. The cost for a pre-built Dell server typically

ranges from $3,000 to $5,000 depending on the configuration you select. Running the selftest requires purchasing

a SATA cable and two Ethernet cables.

Ethernet Cables: ~$20

Power Strip for PC and monitor with localized plug: $5

SATA Cable

USD: $86.99+159.99+86.99+29.99+69.99+155.99+119.99+20+5+2.49 = $737.42

Qnty=11 (machines + Cables): 737.42*11 = $8,111.62

[edit]Purchase a Dell 2950

TSD-500AS2 from TigerDirect.com :$119.99

Category 5e or Category 6 Ethernet Cables


Short-length: 1 foot ~= 30 cm, Blue (for host)

Short-length: 1 foot ~= 30 cm, Orange (for host)

Medium-length: 6 foot ~= 2m, White (for neighbor machine)

Medium-length: 6 foot ~= 2m, Red (for neighbor machine)

Long-length: 12 foot ~= 4m, Blue (for Internet)

http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=18http://www.tigerdirect.com/applications/SearchTools/item-details.asp?EdpNo=2273393&CatId=2459http://www.tigerdirect.com/applications/category/category_slc.asp?CatId=435&Nav=|c:74|&Sort=0&Recs=10http://www.newegg.com/Product/Product.aspx?Item=N82E16812105911

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Note: When installing the NetFPGA in a system, it is important that the card is securely fastened to the chassis.

In addition to locking in the faceplate at the front of the system, the card should also be locked in at the rear of

the card using a mounting bracket.

http://netfpga.org/netfpgawiki/index.php/Image:Dell_2950.jpg

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Retainers to secure the back of the NetFPGA to a chassis are available from Gompf as: http://www.bracket.

com/downloads/brackets/pdf/91060000AFG.pdf

The actual bracket required depends on the size of the chassis. http://www.bracket.com/retainerslist.asp

During shipment, the printed circuit board can vibrate or shake within the chasis causing mechanical

damage. Systems should not be shipped with the NetFPGA card pre-installed.

A third-party vendor has just started building complete system with the NetFPGA hardware and software pre-

[edit]Purchase a Pre-built Machine

http://www.bracket.com/downloads/brackets/pdf/91060000AFG.pdfhttp://www.bracket.com/downloads/brackets/pdf/91060000AFG.pdfhttp://www.bracket.com/retainerslist.asphttp://netfpga.org/netfpgawiki/index.php/Image:NetFPGA_in_Dell_2950.jpghttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=19

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installed. The complete turn-key system, including the NetFPGA card, are available from Accent Technolgy Inc.

During shipment, the printed circuit board can vibrate or shake within the chasis causing mechanical

damage. Systems should not be shipped with the NetFPGA card pre-installed. Cards should be shipped

separately from the chassis and installed on site to avoid damage.

The Beta release of the NetFPGA Package (NFP) contains the source code for gateware, system software,

and regression tests. The NFP includes an IPv4 Router, a four-port NIC, an IPv4 Router with Output

Queues Monitoring System, the PW-OSPF software that interacts with the IPv4 Router (SCONE), and the Router

Kit which is a daemon that reflects the routing table and ARP cache from the Linux host to the IPv4 router

on NetFPGA.

http://www.accenttechnologyinc.com/product_details.php?category_id=0&item_id=1

[edit]Obtaining Gateware/Software Package

The instructions in this section have been superseded by the instructions in the Install Software

http://www.accenttechnologyinc.com/product_details.php?category_id=0&item_id=1http://netfpga.org/netfpgawiki/index.php/Image:Prebuilt_NetFPGA_System.jpghttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=20http://netfpga.org/netfpgawiki/index.php/Install_Software_1.2

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To download the Beta NFP:

The NFP currently comprises two tarballs:

1.2 section below.

[edit]Register to download the Beta NetFPGA Package (NFP)

1. if you don't already have a dev or alpha account, sign up for a new beta account as:

http://netfpga.org/netfpgawiki/index.php?title=Special:Userlogin&type=signup

2. when your new account is created:

3. if you have an account but have forgotten your password, click the e-mail password button on:

http://netfpga.org/netfpgawiki/index.php?title=Special:Userlogin

[edit]Download the Beta NetFPGA Package (NFP)

netfpga_base_beta_1_x.tar.gz, which includes regression scripts and binary versions of the reference

projects. Replace 'x' with the latest version.

netfpga_lib.tar.gz, which includes all external java code needed by the router gui

1. you will be automatically added the NetFPGA Beta mailing list.

2. you will be given a Beta account on the NetFPGA Wiki

3. you will also be sent an email for a message from NetFPGAwiki.

1. This email list will be used to post announcements about the NetFPGA

2. Let your SPAM filter pass email for: [email protected]

1. Note that the first letter of the login name is Capitalized

2. Remember this password, as you'll need it to download source code

1. within that message will be URL that needs to be opened

2. click on the URL to verify that the email address you provided is valid.

http://netfpga.org/netfpgawiki/index.php/Install_Software_1.2http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=21http://netfpga.org/netfpgawiki/index.php?title=Special:Userlogin&type=signuphttp://netfpga.org/netfpgawiki/index.php?title=Special:Userloginhttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=22

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Download the tarballs from http://NetFPGA.org/beta/distributions. Later, you will unpack them in the same directory.

An extended package that includes source code to the reference router is available to instructors of courses

like Stanford's CS344 and researchers that need full source code to the router. The full source distribution is

NOT available to the general public because course instructors that use the NetFPGA assign projects to

implement components of the router.

For users that join the BetaPlus group, they must promise not to redistribute the source code. For the sake

of educating future generations of networking students, it is critical that teachers and researchers that download

this package do not redistribute it.

[edit]Download the extended NetFPGA Package (BetaPlus, optional)

To qualify for access to the additional source code:

1. Complete the survey on-line as: http://netfpga.org/survey.html

2. Send an email to [email protected] to request access to the Beta-plus group

3. Allow 7 days for review of your application

4. Upon recipt of email confirmation that your application has been approved, download the NFP as: http://NetFPGA.org/

betaplus

[edit]Install Software 1.2

Describes how to install CentOS on the host computer

Installing an Operating System on the Host PC

1. Be sure to send the email from .edu domain and include your credentials (position, homepage)

2. Provide your Wiki login in your message (just the login, not the password)

3. Provide a written guarantee that you will not re-distribute the source code or make it available to any

students that may take a NetFPGA-like course

http://netfpga.org/beta/distributionshttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=23http://netfpga.org/survey.htmlhttp://netfpga.org/betaplushttp://netfpga.org/betaplushttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=24

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We support use of the popular Linux Distribution CentOS as the operating system for the Host PC. CentOS is a

free variation of the popular RedHat distribution.

We have tested the NetFPGA with the 32-bit version of CentOS 4.4, CentOS 4.5, CentOS 5.1, and CentOS

5.2 operating systems.

You can create your own bootable CentOS DVD by downloading an ISO [1]

Burn the image onto a DVD:

Install CentOS http://netfpga.org/CentOS_Install.pdf

Install the NetFPGA device driver and self-test program & bitfile

Install Computer Aided Design tools to enable synthesis and simulation of hardware circuits (Optional)

[edit]Installing an Operating System on the Host PC

[edit]CentOS Installation Instructions

[edit]Other tested but unsupported operating systems

Software installation 1.2

Install CAD Tools

http://www.mininova.org/tor/523999http://netfpga.org/CentOS_Install.pdfhttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=25http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=26http://netfpga.org/netfpgawiki/index.php/Image:CentOS_DVD.jpghttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=27

Guide - NetFPGAWiki


Use of other operating systems is possible, but we do not support them.

For archival purposes the install instructions for the NetFPGA Package 1.0 can be found at Install_Software_1.0.

Use the instructions below to install newest version NetFPGA package.

java -version

chmod +x jdk-6u6-linux-i586-rpm.bin

./jdk-6u6-linux-i586-rpm.bin

[edit]Software installation

[edit]Log in as root

[edit]Install Java

Log in as root or 'su -' to root

Download the Java JDK (JDK 6 Update 6) Linux RPM in self-extracting file from SUN

If running the command:

reports at least version 1.6.*, then proceed to the next major step to Install NetFPGA Base Package (below).

Otherwise, download Java 1.6 from: http://java.sun.com/products/archive/j2se/6u6/index.html

Add execute permission to JDK file

Install JDK. Scroll down and say 'yes' when prompted.

Java JDK 6 update 6

http://netfpga.org/netfpgawiki/index.php/Install_Software_1.0http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=28http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=29http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=30http://netfpga.org/netfpgawiki/index.php/Guide#Install_NetFPGA_Base_Packagehttp://java.sun.com/products/archive/j2se/6u6/index.htmlhttp://java.sun.com/products/archive/j2se/6u6/index.html

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rpm --import http://jpackage.org/jpackage.asc

cd /etc/yum.repos.d

wget http://www.jpackage.org/jpackage17.repo

yum -y --enablerepo=jpackage-generic-nonfree install java-1.6.0-sun-compat.i586

Dependencies Resolved

=============================================================================

Package Arch Version Repository Size

=============================================================================

Installing:

java-1.6.0-sun-compat i586 1.6.0.06-1jpp jpackage-generic-nonfree

54 k

Transaction Summary

=============================================================================

Install 1 Package(s)

Update 0 Package(s)

Remove 0 Package(s)

Total download size: 54 k

Install the key for the JPackage repository

Install the JPackage repository information for yum

Install the Java JRE

Expected Output

http://jpackage.org/jpackage.aschttp://www.jpackage.org/jpackage17.repo

Guide - NetFPGAWiki


Is this ok [y/N]: y

Downloading Packages:

(1/1): java-1.6.0-sun-com 100% |=========================| 54 kB 00:00

Running Transaction Test

Finished Transaction Test

Running Transaction

Installing : java-1.6.0-sun-compat ######################### [1/1]

Installed: java-1.6.0-sun-compat.i586 0:1.6.0.06-1jpp

Complete!

/usr/sbin/alternatives --config java

There are 2 programs which provide 'java'.

Selection Command

-----------------------------------------------

1 /usr/lib/jvm/jre-1.4.2-gcj/bin/java

*+ 2 /usr/lib/jvm/jre-1.6.0-sun/bin/java

Enter to keep the current selection[+], or type selection number:

[edit]Install RPMforge Yum repository

Set default JAVA path to new JRE

Expected Output

Select number corresponding to jre-1.6.0-sun

Install the RPMforge repository for your operating system.

For CentOS 4:

http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=31

Guide - NetFPGAWiki


cat /etc/redhat-release

rpm -Uhv http://netfpga.org/yum/el4/RPMS/noarch/netfpga-repo-1-1_CentOS4.noarch.rpm

rpm -Uhv http://netfpga.org/yum/el5/RPMS/noarch/netfpga-repo-1-1_CentOS5.noarch.rpm

yum install netfpga-base

Run the following script to copy the entire NF2 directory into your account (typically: /root/NF2). WARNING:

[edit]Install NetFPGA Base Package

[edit]Create NF2 directory in your user account

For CentOS 5:

Install NetFPGA yum repository and GPG Key - there are two different versions for CentOS 4 and 5. To determine

your version, run the command:

For CentOS 4:

For CentOS 5:

Next, for both versions, run the following command to install the NetFPGA base package

Note that there may be some dependencies. Select 'y' to install these dependent packages.

CentOS 4 wiki documentation on installing RPMforge

CentOS 5 wiki documentation on installing RPMforge

http://netfpga.org/yum/el4/RPMS/noarch/netfpga-repo-1-1_CentOS4.noarch.rpmhttp://netfpga.org/yum/el5/RPMS/noarch/netfpga-repo-1-1_CentOS5.noarch.rpmhttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=32http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=33http://wiki.centos.org/AdditionalResources/Repositories/RPMForge#head-20e1f65f19ccf2f5fbf5adb30dbaf5ea963a64ae-2http://wiki.centos.org/AdditionalResources/Repositories/RPMForge#head-20e1f65f19ccf2f5fbf5adb30dbaf5ea963a64ae

Guide - NetFPGAWiki


Running this command WILL overwrite any existing NF2 directory or files in your user account! If you have files

that you want to preserve, 'mv' your NF2 directory to another location, such as NF2_backup.

To copy the NetFPGA directory and set the environment variables run the following command

/usr/local/NF2/lib/scripts/user_account_setup/user_account_setup.pl

It also adds the following environment variables to your .bashrc file.

Reboot your machine in order to finalize the installation.

We provide the Verilog source code the modules so that users can compile, simulate, and synthesize gateware for

the NetFPGA. We have tested simulation and synthesis using a specific version of the Xilinx tools (as

described below). Use of other versions of the tools (older or newer) is not supported. If you do not plan to

rebuild the hardware circuits, you can skip installation of CAD tools.

[edit]Reboot your machine

[edit]Install CAD Tools

[edit]Install Xilinx ISE

Xilinx: ISE Foundation, Version: 9.1i SP3

Install Service Pack 3

NF2_ROOT

NF2_DESIGN_DIR

NF2_WORK_DIR

PYTHONPATH

PERL5LIB

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[edit]Install ModelSim

To simulate Verilog, install:

[edit]Debug with ChipScope

To debug signals on the FPGA using an on-chip logic analyzer, install:

[edit]Install Memory Modules for Simulation

Install IP Update 3

Use of other versions of the tools (older or newer) is not supported.

Obtain a license for the V2Pro TEMAC core from Xilinx.

Xilinx: ChipScope Pro

Mentor Graphics: ModelSim

Part Number: DO-DI-TEMAC, Ver 3.3

For a free evaluation copy

Academic users can request a donation of the core and CAD tools

Commercial users can purchase the core through their local sales representative.

Version SE 6.2G

Allows simulation of circuits and viewing of simulated waveforms.

Testbench software assumes use of this version of ModelSim.

Version 9.1.02i

Allows monitoring of signals on NetFPGA

Requires use of a PC with JTAG interface

Request "Full System hardware Evaluation"

Allows use of the TEMAC for 30 days, 8 hour run-time

Mention use of the NetFPGA when you submit the request

http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=37http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=38http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=39http://www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.jsp?iLanguageID=1&key=TEMAChttp://www.xilinx.com/ise/optional_prod/cspro.htmhttp://mentorgraphics.com/http://model.com/http://www.xilinx.com/ipcenter/ipevaluation/temac_evaluation.htmhttp://www.xilinx.com/univ/don_program.htm

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[edit]Micron DDR2 SDRAM

Download the model from Micron

Extract and copy ddr2_parameters.vh, and ddr2.v to $NF2_ROOT/lib/verilog/common/src21

[edit]Cypress SRAM

Download the model from Cypress

Extract and copy cy7c1370d.v to $NF2_ROOT/lib/verilog/common/src21

Rename cy7c1370d.v to cy7c1370.v

Add 'define sb200' as line 13 of u_board.v (located at $NF2_ROOT/lib/verilog/testbench/)

[edit]Verify the software and hardware

Run the makefile to build the executables

Verify the functionality of your NetFPGA system

Each project has a set of regression tests that verify the functionality of the distributed code.

These should be run before starting to use any of the projects from the NFP.

[edit]Compile and Load Driver

[edit]Compile driver and tools

Compile and Load Driver

Run Selftest

Run Regression Tests

Compile

http://download.micron.com/downloads/models/verilog/sdram/ddr2/256Mb_ddr2.zip

http://download.cypress.com.edgesuite.net/design_resources/models/contents/cy7c1370d_verilog_10.zip

http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=40http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=41http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=42http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=43http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=44http://download.micron.com/downloads/models/verilog/sdram/ddr2/256Mb_ddr2.ziphttp://download.cypress.com.edgesuite.net/design_resources/models/contents/cy7c1370d_verilog_10.zip

Guide - NetFPGAWiki


cd ~/NF2/

make

make -C C

make[1]: Entering directory `/home/gac1/temp/NF2/lib/C'

make -C kernel

make[2]: Entering directory `/home/gac1/temp/NF2/lib/C/kernel'

make -C /lib/modules/2.6.9-55.0.9.ELsmp/build M=/home/gac1/temp/NF2/lib/C/

kernel LDDINC=/home/gac1/temp/NF2/lib/C/kernel/../include modules

make[3]: Entering directory `/usr/src/kernels/2.6.9-55.0.9.EL-smp-i686'

Building modules, stage 2.

MODPOST

make[3]: Leaving directory `/usr/src/kernels/2.6.9-55.0.9.EL-smp-i686'

make[2]: Leaving directory `/home/gac1/temp/NF2/lib/C/kernel'

make -C download

make[2]: Entering directory `/home/gac1/temp/NF2/lib/C/download'

make -C ../common

make[3]: Entering directory `/home/gac1/temp/NF2/lib/C/common'

make[3]: Nothing to be done for `all'.

make[3]: Leaving directory `/home/gac1/temp/NF2/lib/C/common'

make[2]: Leaving directory `/home/gac1/temp/NF2/lib/C/download'

make -C reg_access

make[2]: Entering directory `/home/gac1/temp/NF2/lib/C/reg_access'

make -C ../common

make[3]: Entering directory `/home/gac1/temp/NF2/lib/C/common'


make[3]: Leaving directory `/home/gac1/temp/NF2/lib/C/common'

make[2]: Leaving directory `/home/gac1/temp/NF2/lib/C/reg_access'

make -C router

make[2]: Entering directory `/home/gac1/temp/NF2/lib/C/router'

gcc -lncurses cli.o ../common/nf2util.o ../common/util.o ../common/reg_defines.h -

o cli

gcc -lncurses regdump.o ../common/nf2util.o ../common/reg_defines.h -o regdump

Sample correct output:

Guide - NetFPGAWiki


gcc -lncurses show_stats.o ../common/nf2util.o ../common/util.o ../common/

reg_defines.h -o show_stats

make[2]: Leaving directory `/home/gac1/temp/NF2/lib/C/router'

make[1]: Leaving directory `/home/gac1/temp/NF2/lib/C'

make -C scripts

make[1]: Entering directory `/home/gac1/temp/NF2/lib/scripts'

make -C cpci_reprogram

make[2]: Entering directory `/home/gac1/temp/NF2/lib/scripts/cpci_reprogram'


make[2]: Leaving directory `/home/gac1/temp/NF2/lib/scripts/cpci_reprogram'

make -C cpci_config_reg_access

make[2]: Entering directory `/home/gac1/temp/NF2/lib/scripts/cpci_config_reg_access'


make[2]: Leaving directory `/home/gac1/temp/NF2/lib/scripts/cpci_config_reg_access'

make[1]: Leaving directory `/home/gac1/temp/NF2/lib/scripts'

make install

for dir in lib bitfiles projects/scone/base projects/selftest/sw ; do \

make -C $dir install; \

done

make[1]: Entering directory `/home/gac1/temp/NF2/lib'

for dir in C scripts java/gui ; do \


[edit]Load driver and tools

If you get an error message such as "make: *** /lib/modules/2.6.9-42.ELsmp/build: No such file or directory. Stop.",

then kernel sources are need to build the driver.

Install the driver and reboot. The driver will be stored in /lib/modules/`uname -r`/kernel/drivers/nf2.ko



Guide - NetFPGAWiki


done

make[2]: Entering directory `/home/gac1/temp/NF2/lib/C'

for dir in kernel download reg_access router ; do \


done

make[3]: Entering directory `/home/gac1/temp/NF2/lib/C/kernel'

make -C /lib/modules/2.6.9-55.0.9.ELsmp/build M=/home/gac1/temp/NF2/lib/C/

kernel LDDINC=/home/gac1/temp/NF2/lib/C/kernel/../include modules

make[4]: Entering directory `/usr/src/kernels/2.6.9-55.0.9.EL-smp-i686'

Building modules, stage 2.

MODPOST

make[4]: Leaving directory `/usr/src/kernels/2.6.9-55.0.9.EL-smp-i686'

install -m 644 nf2.ko /lib/modules/`uname -r`/kernel/drivers/nf2.ko /sbin/depmod -a

make[3]: Leaving directory `/home/gac1/temp/NF2/lib/C/kernel'

make[3]: Entering directory `/home/gac1/temp/NF2/lib/C/download'

install nf2_download /usr/local/bin

make[3]: Leaving directory `/home/gac1/temp/NF2/lib/C/download'

make[3]: Entering directory `/home/gac1/temp/NF2/lib/C/reg_access'

install regread /usr/local/bin

install regwrite /usr/local/bin

make[3]: Leaving directory `/home/gac1/temp/NF2/lib/C/reg_access'

make[3]: Entering directory `/home/gac1/temp/NF2/lib/C/router'

make[3]: Nothing to be done for `install'.

make[3]: Leaving directory `/home/gac1/temp/NF2/lib/C/router'

make[2]: Leaving directory `/home/gac1/temp/NF2/lib/C'

make[2]: Entering directory `/home/gac1/temp/NF2/lib/scripts'

for dir in cpci_reprogram cpci_config_reg_access ; do \


done

make[3]: Entering directory `/home/gac1/temp/NF2/lib/scripts/cpci_reprogram'

install cpci_reprogram.pl /usr/local/sbin

make[3]: Leaving directory `/home/gac1/temp/NF2/lib/scripts/cpci_reprogram'

make[3]: Entering directory `/home/gac1/temp/NF2/lib/scripts/cpci_config_reg_access'

install dumpregs.sh /usr/local/sbin

install loadregs.sh /usr/local/sbin

make[3]: Leaving directory `/home/gac1/temp/NF2/lib/scripts/cpci_config_reg_access'

make[2]: Leaving directory `/home/gac1/temp/NF2/lib/scripts'

make[2]: Entering directory `/home/gac1/temp/NF2/lib/java/gui'

Guide - NetFPGAWiki



make[2]: Leaving directory `/home/gac1/temp/NF2/lib/java/gui'

make[1]: Leaving directory `/home/gac1/temp/NF2/lib'

make[1]: Entering directory `/home/gac1/temp/NF2/bitfiles'

for bitfile in CPCI_2.1.bit cpci_reprogrammer.bit ; do \

install -D -m 0644 $bitfile /usr/local/NF2/bitfiles/$bitfile ; \

done

make[1]: Leaving directory `/home/gac1/temp/NF2/bitfiles'

make[1]: Entering directory `/home/gac1/temp/NF2/projects/scone/base'


make[1]: Leaving directory `/home/gac1/temp/NF2/projects/scone/base'

make[1]: Entering directory `/home/gac1/temp/NF2/projects/selftest/sw'


make[1]: Leaving directory `/home/gac1/temp/NF2/projects/selftest/sw'

reboot

lsmod | grep nf2

nf2 28428 0

Reboot the machine. The driver currently crashes upon rmmod, so a reboot is required to load the newly compiled

driver. You may want to check if other users are on the machine with the 'who' command first. If you don't like the

other current machine users or you're the only one on the machine, run the following:

After reboot log in as root.

Verify that the driver loaded:


Guide - NetFPGAWiki


ifconfig -a | grep nf2

nf2c0 Link encap:Ethernet HWaddr 00:4E:46:32:43:00




/usr/local/sbin/cpci_reprogram.pl --all

(to reprogram all NetFPGAs in a system)

Loading the CPCI Reprogrammer on NetFPGA 0

Loading the CPCI on NetFPGA 0

CPCI on NetFPGA 0 has been successfully reprogrammed

[edit]Verify NetFPGA interfaces

[edit]Reprogram the CPCI

Verify that four nf2cX interfaces have successfully loaded:


Run the cpci reprogramming script

Expected output:

Every time you restart the computer, you need to reload the CPCI!

If the NetFPGA refuses to send packets, and the regression or selftest is failing, make sure you've reprogrammed the

cpci.

http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=46http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=47

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The NetFPGA self-test is an FPGA bitfile and software that ensures that all of the components on your platform

are fully functional. The self-test consists of both an FPGA bitfile that contains logic and interfaces to

external components as well the software that displays the results. The self-test excercises all of the hardware

in parallel. The test continues to run repeatedly until terminated by the user. The self-test was run at the factory

just after the cards were manufactured. Cards are not distributed unless they completely pass all functions of the

self-test process.

The self-test bitfile performs rigorous testing of the SRAM and DDR2 DRAM to ensure that all memory lines can

be properly written to and read back with the same data. Multiple data patterns are used to ensure that no address

or data lines have faults. The network test sends bursts of packets on the Ethernet interfaces and the loopback

cables are put in place to that packets can be read and compared to the data that was transmitted. The

SATA loopback test transmits data using the Multi-Gigabit I/O lines (MGIOs) to ensure that data can be

reliably transmitted on the high-speed I/O interfaces. The DMA test exercises the PCI Controller (CPCI), the

VirtexII, and the PCI bus to ensure that large blocks of data can be sent between the NetFPGA the host

computer's memory. The selftest bitfile runs all of the tests above in parallel and continously runs until it

is terminated. The self-test software displays the results of testing on a console.

We provide the self-test bitfile and the software to end-users so that the self-test can be run when the hardware

is delivered. When you receive a NetFPGA card, we suggest that you run the self-test to ensure that the card is

still fully functional and that the card works properly in your environment. Before running the self-test, be sure

that you have connected the loopback cables as shown in the directions on how to set up a NetFPGA in your

system. If the loopback cables are not connected, the self-test will correctly report that an interface appears

non-functional.

The following instructions assume that you have successfully installed a NetFPGA card with CentOS 4.4. The selftest

is an enhanced version of the test run on every NetFPGA at the factory by Digilent to verify proper

[edit]Run Selftest


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hardware operation.

Install a SATA cable to loopback the board-to-board high-speed serial I/O.

Install two Ethernet cables as shown:

[edit]Connect loopback cables

Note: To minimize the

chance that you damage

your computer or the

NetFPGA module, wear an

anti-static wrist strap

when handing the hardware.

http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=49http://www.uline.com/Browse_Listing_7401.asp?searchedkeywords=anti%20static%20wristhttp://netfpga.org/netfpgawiki/index.php/Image:SATA_Loopback.jpg

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http://netfpga.org/netfpgawiki/index.php/Image:ENET_Loopback1.jpg

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nf2_download ~/NF2/bitfiles/selftest.bit

~/NF2/projects/selftest/sw/selftest

[edit]Load self-test bitfile

[edit]Run Selftest

Type:

If you have connected a SATA cable to the NetFPGA, type the following command.

Otherwise, type the following command.

http://netfpga.org/netfpgawiki/index.php/Image:ENET_Loopback2.jpghttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=50http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=51

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~/NF2/projects/selftest/sw/selftest -n

Found net device: nf2c0

NetFPGA selftest 1.00 alpha

Running..... PASSED

The regression test suite is a set of tests that exercise the functionality of the released gateware and software. On

a fast machine, this test should take approximately 10 minutes.

The features exercised by regression test suite are the only features we will try to provide support for.

Additional features might be available and functional in the released gateware, but they are not supported.

For more information on the features we support, as defined by tests, see the following:

Please make sure that you have successfully completed the selftest before proceeding to the regression tests.

[edit]Run Regression Tests

The NIC supports a set of features

The Reference Router (RR) supports a set of features

[edit]Connect Ethernet test cables

Expected Output:

The details of how each feature is tested is described in the NIC Regression test document available both on the

Wiki and Web.

The details of how each feature is tested is described in the RR Regression test, a large document available both on

the Wiki and Web.

Connect 'eth1' to 'nf2c0' (c0 is the port closest to the mainboard)

Connect 'eth2' to 'nf2c1' (c1 is the port one away from the mainboard)

http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=52http://netfpga.org/netfpgawiki/index.php/Reference_NIChttp://netfpga.org/netfpgawiki/index.php/Reference_Routerhttp://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=53http://netfpga.org/netfpgawiki/index.php/Beta_Release_Regression_Tests#NIC_Testshttp://netfpga.org/static/beta_release_regression_tests.html#NIC_Testshttp://netfpga.org/netfpgawiki/index.php/Beta_Release_Regression_Tests#Router_Testshttp://netfpga.org/static/beta_release_regression_tests.html#Router_Tests

Guide - NetFPGAWiki


nf2_download ~/NF2/bitfiles/reference_router.bit

[edit]Log in as root through X session

[edit]Load reference_router bitfile

Log in as root or 'su -' to root using an X session, because we will be testing the GUI Scone

Download the reference bitfile to the NetFPGA board:

The location of your eth1 and eth2 ports may vary depending on your NIC

The photo below shows the configuration of a nf-test machine

http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=54http://netfpga.org/netfpgawiki/index.php?title=Guide&action=edit&section=55http://netfpga.org/netfpgawiki/index.php/Image:Ethernet_Test_Cables.jpg

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Found net device: nf2c0

Bit file built from: nf2_top_par.ncd

Part: 2vp50ff1152

Date: 2007/10/ 9

Time: 22: 3: 4

Error Registers: 1000000

Good, after resetting programming interface the FIFO is empty

Download completed - 2377668 bytes. (expected 2377668).

DONE went high - chip has been successfully programmed.

~/NF2/bin/nf21_regress_test.pl

Running tests on project 'driver'...

Running test 'driver_compile'... PASS

Running test 'driver_install'... PASS

Running test 'verify_mtu'... PASS

Running global teardown... PASS

Running tests on project 'reference_nic'...

Running test 'download_nic'... PASS

Running test 'test_loopback_random'... PASS

Running test 'test_loopback_minsize'... PASS

Running test 'test_loopback_maxsize'... PASS

Running test 'test_loopback_drop'... PASS

Running test 'test_ip_interface'... PASS

[edit]Run regression test suite


Run the regression test suite. The tests should take about 10 minutes total.



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Running tests on project 'reference_router'...

Running global setup... PASS

Running test 'test_router_cpusend/run.pl'... PASS

Running test 'test_wrong_dest_mac'... PASS

Running test 'test_nonip_packet'... PASS

Running test 'test_nonipv4_packet'... PASS

Running test 'test_invalidttl_packet'... PASS

Running test 'test_lpm_misses'... PASS

Running test 'test_arp_misses'... PASS

Running test 'test_badipchecksum_packet'... PASS

Running test 'test_ipdest_filter_hit'... PASS

Running test 'test_packet_forwarding'... PASS

Running test 'test_lpm'... PASS

Running test 'test_lpm_next_hop'... PASS

Running test 'test_queue_overflow'... PASS

Running test 'test_oq_limit'... PASS

Running test 'test_ipdest_filter'... PASS

Running test 'test_oq_sram_sz_cpu'... PASS

Running test 'test_oq_sram_sz_mac'... PASS

Running test 'test_router_table/run.pl'... PASS

Running test 'test_send_rec/run.pl'... PASS

Running test 'test_lut_forward'... PASS


Running tests on project 'scone'...


Running test 'test_build'... PASS

Running test 'test_mac_set'... PASS

Running test 'test_ip_set'... PASS

Running test 'test_rtable_set'... PASS

Running test 'test_disabled_interfaces/run.pl'... PASS

Running test 'test_noniparp_ethtype'... PASS

Running test 'test_arp_rpl/run.pl'... PASS

Running test 'test_arp_norpl/run.pl'... PASS

Running test 'test_arp_quepkt/run.pl'... PASS

Running test 'test_ip_error/run.pl'... PASS

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Running test 'test_ip_rtblmiss/run.pl'... PASS

Running test 'test_ip_intfc/run.pl'... PASS

Running test 'test_ip_checksum/run.pl'... PASS

Running test 'test_ttl_expired/run.pl'... PASS

Running test 'test_send_receive/run.pl'... PASS

Running test 'test_arp_req/run.pl'... PASS

Running test 'test_tcp_port/run.pl'... PASS

Running test 'test_udp_packet/run.pl'... PASS

Running test 'test_icmp_echo/run.pl'... PASS

Running test 'test_icmp_notecho/run.pl'... PASS


Running tests on project 'gui_scone'...


Running test 'test_main_frame'... PASS

Running test 'test_routing_table'... PASS

Running test 'test_arp_table'... PASS

Running test 'test_port_config_table'... PASS


Running tests on project 'router_kit'...


Running test 'test_00_make/run.sh'... PASS

Running test 'test_01_ip_dst_filter/run.pl'... PASS

Running test 'test_02_route_table/run.pl'... PASS

Running test 'test_03_arp_table/run.pl'... PASS

Running test 'test_04_ip_packets/run.pl'... PASS


Running tests on project 'router_buffer_sizing'...


Running test 'test_time_stamp/run'... PASS

Running test 'test_store_event/run'... PASS


If there are no errors (all tests say PASS), you can play with your router, or go on to creating a bitfile from source.

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If you installed the CAD tools, you should run this test to verify that you can build a new circuit. Skip this step if

you do not plan to modify hardware.

cd ~/NF2/projects/reference_router/synth

time make

ls | grep nf2_top_par.bit

[edit]Run regression scripts on new bitfile

[edit]Synthesize reference_router bitfile, from source

Note: This step will take about 45-60 mins. This can be used to verify the setup of the machine

for synthesis. You will need to have the NetFPGA Beta Plus package. The Beta (not Plus) package

does not include the sources for this step.

If you are a hardware developer and would like to synthesize your own NetFPGA Router hardware using the Verilog

source code, follow the steps below. To synthesize FPGA hardware, you will need to have all of the FPGA

Development tools installed.

Login, either direct in an X session or via ssh -X. This step causes ~/nf2_profile, plus environment variables, to be

sourced. You may say "But I'm not running anything graphical!" and you'd be right. Unfortunately, even when called

with no gui, the Xilinx tools require X to be running. A bugreport on this issue has been filed to Xilinx.

Set up the Xilinx ISE tools (see Xilinx's website for instructions). Make sure the Xilnx tools are in your path and that

the XILINX environment variable is set.

Go to the synthesis directory for the reference_nic and run make. This step should take under an hour on a well-

endowed machine.

Verify the reference_router bitfile (nf2_top_par.bit) has been created.


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nf2_top_par.bit

nf2_download nf2_top_par.bit

~/NF2/bin/nf21_regress_test.pl

Running tests on project 'driver'...

Running test 'driver_compile'... PASS

Running test 'driver_install'... PASS

Running test 'verify_mtu'... PASS


Running tests on project 'reference_nic'...

Running test 'download_nic'... PASS

Running test 'test_loopback_random'... PASS

Running test 'test_loopback_minsize'... PASS

Running test 'test_loopback_maxsize'... PASS

[edit]Load new bitfile

[edit]Run regression-test suite on new bitfile


Download the fresh bitfile to the NetFPGA board:

Re-run the regression test suite.



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Running test 'test_loopback_drop'... PASS

Running test 'test_ip_interface'... PASS


Running tests on project 'reference_router'...


Running test 'test_router_cpusend/run.pl'... PASS

Running test 'test_wrong_dest_mac'... PASS

Running test 'test_nonip_packet'... PASS

Running test 'test_nonipv4_packet'... PASS

Running test 'test_invalidttl_packet'... PASS

Running test 'test_lpm_misses'... PASS

Running test 'test_arp_misses'... PASS

Running test 'test_badipchecksum_packet'... PASS

Running test 'test_ipdest_filter_hit'... PASS

Running test 'test_packet_forwarding'... PASS

Running test 'test_lpm'... PASS

Running test 'test_lpm_next_hop'... PASS

Running test 'test_queue_overflow'... PASS

Running test 'test_oq_limit'... PASS

Running test 'test_ipdest_filter'... PASS

Running test 'test_oq_sram_sz_cpu'... PASS

Running test 'test_oq_sram_sz_mac'... PASS

Running test 'test_router_table/run.pl'... PASS

Running test 'test_send_rec/run.pl'... PASS

Running test 'test_lut_forward'... PASS


Running tests on project 'scone'...


Running test 'test_build'... PASS

Running test 'test_mac_set'... PASS

Running test 'test_ip_set'... PASS

Running test 'test_rtable_set'... PASS

Running test 'test_disabled_interfaces/run.pl'... PASS

Running test 'test_noniparp_ethtype'... PASS

Running test 'test_arp_rpl/run.pl'... PASS

Running test 'test_arp_norpl/run.pl'... PASS

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Running test 'test_arp_quepkt/run.pl'... PASS

Running test 'test_ip_error/run.pl'... PASS

Running test 'test_ip_rtblmiss/run.pl'... PASS

Running test 'test_ip_intfc/run.pl'... PASS

Running test 'test_ip_checksum/run.pl'... PASS

Running test 'test_ttl_expired/run.pl'... PASS

Running test 'test_send_receive/run.pl'... PASS

Running test 'test_arp_req/run.pl'... PASS

Running test 'test_tcp_port/run.pl'... PASS

Running test 'test_udp_packet/run.pl'... PASS

Running test 'test_icmp_echo/run.pl'... PASS

Running test 'test_icmp_notecho/run.pl'... PASS


Running tests on project 'gui_scone'...


Running test 'test_main_frame'... PASS

Running test 'test_routing_table'... PASS

Running test 'test_arp_table'... PASS

Running test 'test_port_config_table'... PASS


Running tests on project 'router_kit'...


Running test 'test_00_make/run.sh'... PASS

Running test 'test_01_ip_dst_filter/run.pl'... PASS

Running test 'test_02_route_table/run.pl'... PASS

Running test 'test_03_arp_table/run.pl'... PASS

Running test 'test_04_ip_packets/run.pl'... PASS


Running tests on project 'router_buffer_sizing'...


Running test 'test_time_stamp/run'... PASS

Running test 'test_store_event/run'... PASS


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