permutation routing in optical min with minimum number of stages

Permutation routing in optical MIN with minimum numberof stages

Nabanita Das a,*, Bhargab B. Bhattacharya a, Sergei L. Bezrukov b

a Advanced Computing and Microelectronics Unit, Indian Statistical Institute, Calcutta 700 108, Indiab Department of Mathematics and Computer Science, University of Wisconsin-Superior, Superior, WI 54880, USA

Abstract

In a hybrid optical multistage interconnection network (MIN), optical signals are routed by electronically controlled

switches using directional couplers. A relevant design problem is to minimize the path-dependent loss of the optical

signal, which is directly proportional to the number of couplers, i.e., the number of switches through which the signal

has to pass. In general, given the network size and the type of the MIN, the number of stages is a constant. Hence, an

input signal has to pass through a fixed number of couplers to reach the output.

In this paper, it is shown that the routing delay and path-dependent loss in a fixed-stage N � N MIN, can be

significantly reduced on the average by using a variable-stage shuffle-exchange network instead. An arbitrary N � Npermutation P can be routed with minimum delay and minimum path-dependent loss, if the minimum number of

stages of the MIN necessary to route P is known. An OðNnÞ algorithm ðN ¼ 2nÞ is presented here for checking

the admissibility of a given permutation P in an m-stage shuffle-exchange network (SEN), where 16m6 n. Theminimum-stage SEN needed to pass P can then be determined in OðNn log nÞ time. Furthermore, for n < m6 2n� 1, a

necessary condition for permutation admissibility is derived which is shown to be necessary as well as sufficient for

the special class of BPC (bit-permute-complement) permutations. It has been shown that, for 16m6 2n� 1, the

minimum number of stages required to pass a BPC permutation P through a SEN can be determined in Oðn2Þ time,and P can be routed through a variable-stage SEN using the minimum number of stages only. In an optical MIN, this

technique helps to reduce the path-dependent loss by limiting the number of stages to be traversed by the optical

signal.

� 2003 Elsevier Science B.V. All rights reserved.

Keywords: Bit-permute-complement permutations; Hybrid optical MIN�s; Multistage interconnection network; Path-dependent loss;

Permutation admissibility; Shuffle-exchange networks

1. Introduction

The ever increasing demand of bandwidth

and low communication latency has led to the

emergence of optical interconnection networks as

the technology of choice for high-performance

computing/communication applications. Recent

advances in optical technology allow efficient

*Corresponding author.

E-mail addresses: [email protected] (N. Das), bhargab@

isical.ac.in (B.B. Bhattacharya), [email protected] (S.L.

Bezrukov).

1383-7621/03/$ - see front matter � 2003 Elsevier Science B.V. All rights reserved.

doi:10.1016/S1383-7621(03)00013-4

Journal of Systems Architecture 48 (2003) 311–323

www.elsevier.com/locate/sysarc

mail to: [email protected]

implementation of optical multistage interconnec-

tion networks (MIN). An optical MIN can be

designed with either free space optics or guided

wave technology. In a hybrid optical network

using guided wave technology, optical signals are

switched, but both the switch control and routingdecisions are carried out electronically at a speed

much lower than that of the optical signal. The

other option is to use an all-optical switch, which

would potentially overcome the speed mismatch

problem. However, such systems are still hard to

implement [7,15]. Two key performance metrics

for a hybrid optical MIN are its path-dependent

loss or attenuation, and crosstalk. The concept ofsemi-permutations can be used to eliminate the

problem of crosstalk by routing any permuta-

tion in two passes through the Benes network [15].

In this paper, we consider optimizing the other

parameter, i.e., the path-dependent loss. In an

optical interconnection network, this factor de-

pends on the number of stages of the MIN, or

more specifically, on the number of switchesthrough which an input signal has to pass to reach

the desired output. Given the size of the network

and the architecture of the MIN, the number of

stages of a MIN is a constant. Hence, an input

signal has to pass through a fixed number of

couplers to reach the output through a conven-

tional MIN.

A typical n-stage N � N blockingMIN (N ¼ 2n),is a minimal full-access unique-path structure as

it admits exactly one path between every pair of

input–output, e.g., omega, baseline, cube, reverse-

baseline, etc. [8,14]. To connect more than one

input–output pairs simultaneously, a single link

may be required by two or more paths, causing

conflicts. An N � N permutation from the set of Ninputs ð0; 1; . . . ;N � 1Þ to the set of N outputsð0; 1; . . . ;N � 1Þ is said to be admissible, if Nconflict-free paths (one for each input–output

pair) can be set up simultaneously in the MIN

[8–10].

The shuffle-exchange network (SEN) is well

known for its wide applications to parallel pro-

cessing and communication networks [2,6,12,13].

To enhance the set of admissible permutations, aswell as to support fault-tolerance, use of k-extrastage SEN�s was proposed [8,10]. Recent studies

indicate that a permutation is admissible in a

k-extra-stage SEN, i.e., with ðnþ kÞ-stages, if andonly if the conflict graph is 2k-colorable [11]. Al-

though the c-coloring problem in graphs for

ðc > 2Þ, is NP-complete, the complexity of deter-

mining permutation admissibility in a k-extra-stage MIN, for kP 2, is not known. For 06 k6 1,

an OðNnÞ algorithm was reported for checking

permutation admissibility, but in general, the

problem remains open [9,10]. Further, OðN logNÞtime algorithms have been developed for optimal

routing of the BPC (bit-permute-complement),

and the LC (linear-complement) permutations in

multiple passes through a k-extra-stage MIN,06 k6 ðn� 1Þ [3–5,11]. However, in the worst

case, this technique may cause an Oðnþ kÞ:2bn=2ctransmission delay [8,14].

In this paper, the following more general

problem is addressed: given an N � N permutation

P , to find the minimum number mmin of stages of a

SEN required to make P admissible. If mmin is

known, a variable-stage optical MIN can be usedto route P with minimum path-dependent loss of

the signal during transmission. For 16m6 n, anOðNn log nÞ algorithm is presented to find the value

of mmin. For n < m6 2n� 1, a necessary condition

is derived for a permutation P to become admis-

sible on an m-stage SEN. It is further shown that

this necessary condition is also sufficient to ensure

permutation admissibility of the BPC (bit-per-mute-complement) class. Consequently, the mini-

mum-stage ðmminÞ SEN required for conflict-free

routing of an arbitrary N � N BPC permutation

can be determined in Oðn2Þ time, 16mmin 6

ð2n� 1Þ. Hence, by using a variable-stage hybrid

optical SEN, a BPC permutation can always be

routed with minimum path-dependent loss.

Since, the BPC class of permutations is often usedin parallel processing, this technique will be useful

for high performance computing using optical

MIN�s.The paper is organized as follows. In Section 2,

some properties of an m-stage N � N SEN,

16m6 2n� 1, and the conditions for permutation

admissibility are presented. In Section 3, condi-

tions for admissibility of BPC permutations arediscussed. Conclusions and further discussions

appear in Section 4.

312 N. Das et al. / Journal of Systems Architecture 48 (2003) 311–323

2. Input–output groups and permutation admissibil-

ity

A full-access unique-path N � N multistage in-

terconnection network consists of n stages of 2� 2switches ðN ¼ 2nÞ, which is essentially a minimal

structure that provides full-accessibility with ex-

actly one path between every input–output pair.

To support fault-tolerance, as well as to enhance

the set of admissible permutations, k extra stages,

16 k6 n� 1 may be added to it. Here, given a

ð2n� 1Þ-stage hybrid optical SEN, our goal is to

determine the minimum number of stages mmin

required to route a given BPC permutation Pwithout any conflict. Thus, P can be routed using

the first mmin stages of the SEN, minimizing the

path-dependent loss of the signal. A possible

configuration of an 8� 8 hybrid SEN is shown in

Fig. 1. Each switch is of size 2� 4, having an ad-

ditional control Cs for each stage. When Cs ¼ 0,

one pair of outputs is selected to forward thesignals to the inputs of the next stage. If Cs ¼ 1

the other pair of outputs for each switch is se-

lected, through which signals appear at the final

output passing through a passive optical concen-

trator.

Since, the connection pattern between two

consecutive stages is always the same in a SEN, the

set of admissible permutations in an m-stage SEN,for 16m6 2n� 1 portrays many elegant proper-

ties as discussed below.

2.1. Group structures

The concept of input (output) group structures

for a MIN was introduced earlier in [1,3]. Here, we

further extend those ideas to analyze permutationadmissibility in a SEN. For the sake of complete-

ness, we first give a brief description of the input

(output) group structures for SEN. In an m-stageN � N SEN, 16m6 2n� 1,

• inputs (or outputs) are labeled as: 0;1; . . . ;N � 1

respectively, from top to bottom, and each label

is represented uniquely by an n-bit binary string;• the stages are labeled as: 0; 1; . . . ; ðm� 1Þ, from

the input side towards the output side;

• the output links of each stage are labeled as:

0; 1; . . . ; ðN � 1Þ, from top to bottom.

A SEN with N ¼ 8 and m¼ 2 is shown in Fig. 2.

Let an input be represented in binary as:

Fig. 1. An 8� 8 hybrid SEN with variable number of stages.

Fig. 2. A 2-stage 8� 8 SEN with link labels.

N. Das et al. / Journal of Systems Architecture 48 (2003) 311–323 313

ðxn�1xn�2 x1x0Þ. If the substring ðxn�j�1xn�j�2 x1x0Þ is kept fixed, and all possible combina-

tions of the remaining j bits in the sub string

ðxn�1xn�2 xn�jÞ, 06 j6 n, are considered, we getthe 2j elements of an input group at level j, denotedby giðj; pÞ, where, p is the decimal equivalent ofðxn�j�1xn�j�2 x1x0Þ, 06 p < 2n�j. The formal

definition is given below:

Definition 1. For an N � N SEN, an input group

giðj; pÞ, at level j, 06 j6 n, defines a set of 2j in-

puts given by |fflfflfflfflfflfflffl{zfflfflfflfflfflfflffl}j times

xn�j�1xn�j�2 x1x0, where

xn�j�1 xjx1x0 is the binary representation of p,i.e., 06 p < 2n�j, and 2 f0; 1g.

Definition 2. For an N � N SEN, an output group

g0ðj; pÞ at level j, 06 j6 n, defines a group of 2j

outputs at level j, given by xn�1xn�2 xj |fflfflfflfflfflfflffl{zfflfflfflfflfflfflffl}

j times

, where ðxn�1 xjÞ is the binary rep-

resentation of p i.e., 06 p < 2n�j, and 2 f0; 1g.

Example 1. For a 16� 16 SEN, an input group

gið2; 3Þ ¼ ð 11Þ ¼ ð0011; 0111; 1011; 1111Þ¼ ð3; 7; 11; 15Þ:

Similarly, an output group

g0ð2; 3Þ ¼ ð11 Þ ¼ ð1100; 1101; 1110; 1111Þ¼ ð12; 13; 14; 15Þ:

For an 8� 8 SEN, the hierarchy of input (output)group structure is shown in the form of a tree in

Fig. 3. In the next section, we describe how this

idea of group structures relates to the permutationadmissibility problem in an m-stage SEN, n6m6

2n� 1. Two cases are studied separately: (i) for

16m6 n and (ii) for n < m6 ð2n� 1Þ.

2.2. An m-stage N � N SEN, 16m6 n

In this case, full-accessibility is satisfied only

when m ¼ n. Thus, from an input one can reach

only a particular set of 2mð6NÞ outputs. How-

ever, given any input–output pair, if a path exists,

it is always unique.

Definition 3. For an m-stage N � N SEN,

16m6 n, the set of outputs that can be reached

from an input x is referred to as the reachable set

of the input x.

Lemma 1. In an m-stage N � N SEN, 16m6 n,for any input x 2 giðm; pÞ, the reachable set is theoutput group g0ðm; pÞ, where 06 p < 2n�m.

Proof. Let us consider an m-stage N � N SEN,

16m6 n. Now starting from any input, say

x ¼ xn�1xn�2 x1x0, at each stage it may undergo

either a shuffle or a shuffle-exchange operation.

Therefore, after the first stage, x may reach any

output represented by ðxn�2 x1x0Þ, where

2 f0; 1g. After m successive stages, x may reachany output of the set ðy ¼ xn�m�1 x1x0 |fflfflfflfflfflfflffl{zfflfflfflfflfflfflffl}

m times

) which is the output group g0ðm; pÞ,

where p ¼ ðxn�m�1 x1x0Þ.Thus, for any input in the group giðm; pÞ ¼

ð |fflfflfflfflfflfflffl{zfflfflfflfflfflfflffl}m times

xn�m�1 x1x0Þ, the reachable set is the

Fig. 3. (a) Input and (b) output group structures of an 8� 8 SEN.


same output group g0ðm; pÞ, for 06 p < 2ðn�mÞ.

Hence the proof. �

Corollary 1. In an m-stage N � N SEN, 16m < n,an output y ¼ yn�1yn�2 y1y0 is reachable froman input x ¼ xn�1xn�2 x1x0, if and only if yn�j ¼xn�m�j, for all j, 16 j6 n� m.

Proof. Follows directly from Lemma 1. �

Definition 4. In an m-stage N � N SEN, 16m6 n,if an output y is reachable from an input x, thepath x ! y is said to be a realizable path.

Remark 1. In an m-stage N � N SEN, 16m6 n, ifan output y ¼ yn�1yn�2 y1y0 is reachable from

input x ¼ xn�1xn�2 x1x0, the path x ! y can be

represented by a string of ðnþ mÞ bits- x ! y:xn�1xn�2 x1x0ym�1ym�2 y1y0, where a window

ðxn�j�2xn�j�3 x1x0ym�1ym�2 ym�j�1Þ, is the bi-

nary representation of the link label which the

path follows at stage j, 06 j < m.By Corollary 1, the same path can be repre-

sented as x ! y: xn�1xn�2 xn�myn�1 y1y0, sinceyn�j ¼ xn�m�j, for all j, 16 j6 n� m.

The above result conforms to similar results

observed earlier for m ¼ n only [11].

Example 2. In a 3-stage 16� 16 SEN, a path

3! 13 is shown in Fig. 4a. The path is represented

as 3(0011)! 13(1101): 0011101, where the four

bits from the left (right) represent the input 3

(output 13), with the middle bit shared. Thelinks followed by the path in stages 0,1,2 are

7(0111), 14(1110), and 13(1101) respectively, as

given by the respective windows, and are shown in

Fig. 4b.


16m6 n, given an N � N permutation P , in whichall the input–output paths are realizable, we mayconstruct an N � ðnþ mÞ binary matrix M , where,

each row xn�1xn�2 x1x0ym�1ym�2 y0 represents arealizable input–output path x ! y such that

xn�1xn�2 x1x0 is the input x, and xn�m�1xn�m�2 x1x0ym�1ym�2 y0 is the corresponding output y.

The matrix M is defined as the path matrix of P ,for an m-stage SEN, 16m6 n.

The notion of path matrix has been introducedearlier by Shen [10], for an m-stage SEN,

n6m6 ð2n� 1Þ, which is being generalized here

for 16m6 ð2n� 1Þ.

Definition 6. A window Wj, 16 j < m, of the pathmatrix M , is defined as the set of n consecutive

columns of M , fxn�j�2 x1x0ym�1ym�2 ym�j�1g.

Fig. 4. (a) The path 3! 13 on a 3-stage 16� 16 SEN and (b) the windows in each stage.


Definition 7. A p � q matrix is said to be an in-

dependent matrix, if all its rows are distinct.

Example 3. The path matrix M for the permuta-

tion,

P :0 4 2 6 1 5 3 7

3 0 1 2 5 6 7 4

� �;

in a 2-stage 8� 8 SEN is given below:

M :

x2 x1 x0ðy2Þ y1 y00 0 0 1 1

1 0 0 0 0

0 1 0 0 1

1 1 0 1 0

0 0 1 0 1

1 0 1 1 0

0 1 1 1 1

1 1 1 0 0

0BBBBBBBBBBBBB@

1CCCCCCCCCCCCCA

It may be noted that all the windows Wj,

06 j6 1 are independent.

Definition 8. The window containing the leftmost

n columns of a path matrix M , for any permuta-

tion on an m-stage SEN, i.e., the columnsxn�1xn�2 x1x0, is called the source window.

Clearly, the source window is always an inde-

pendent matrix.

Remark 2. By virtue of the shuffle interconnection

between stages, each row of Wj is the link, the

corresponding path x ! y follows at the output ofstage j.

For each input–output pair in P , the path ma-

trix M contains just a unique path for 16m6 n.Therefore, for an m-stage N � N SEN, 16m6 n,given any permutation P , if all input–output pathsare realizable, the set of N paths is represented by

an N � ðnþ mÞ path matrix M , where each row

stands for one input–output path. Hence, P is

admissible in the SEN, if and only if all the rows in

every window Wj, 16 j < m, are distinct, i,e., no

two paths at any stage need the same link, or inother words, there is no conflict.

Definition 9. In an N � N SEN, two inputs (out-

puts) x1 and x2 are said to be covered by an input

(output) group gið0Þðj; pÞ if x1, x2 belong to the

same input (output) group at level j, 16 j6 n, butto different groups at level ðj� 1Þ.

Example 4. For a 16� 16 SEN, two inputs 8(1000)

and 6(0110) are covered by gið3; 0Þ, i.e., the groupð 0Þ.

Remark 3. In an N � N SEN, two inputs (outputs)

x1 and x2 covered by an input (output) group at

level j, must differ in the bit xn�jðxjÞ.

Lemma 2. In an m-stage N � N SEN, ð16m6 nÞ,two realizable paths x ! y and x0 ! y0 are con-

flicting if and only if for x, x0 covered by an input

group at level j, 16 j6m, y, y 0 belong to the same

output group at level ðm� jÞ.

Proof. Let x ¼ xn�1xn�2 x1x0. Then x0 ¼ x0n�1 x0n�jþ1�xxn�jxn�j�1 x1x0, since they are covered

by an input group at level j, 16 j6m.Since y is reachable for x, by Corollary 1,

y ¼ xn�m�1xn�m�2 x1x0ym�1ym�2 y1y0.Similarly, y0 ¼ xn�m�1xn�m�2 x1x0y0m�1y0m�2y01y00.Now the paths x ! y and x0 ! y0 can be rep-

resented as:

x ! y : xn�1 xn�m�1 x1x0ym�1ym�2 y1y0x0 ! y0 : x0n�1 x0n�jþ1�xxn�jxn�j�1

xn�m�1 x0y0m�1 y00:

It is evident that these two paths will never

conflict at any stage k, for 06 k6 j� 2, since

xn�j 6¼ x0n�j.If part: Let the corresponding outputs y and y0

be in the same output group at level ðm� jÞ,y 0 ¼ xn�m�1xn�m�2 x1x0ym�1y0m�j�1 y 01y00. The

two paths under consideration become:

x ! y : xn�1 xn�m�1 x1x0ym�1 ym�j y1y0x0 ! y0 : x0n�1 x0n�jþ1�xxn�jxn�j�1 xn�m�1

x0ym�1 ym�jy 0m�j�1 y00

Clearly, these two paths will always be conflict-

ing in the stage ðj� 1Þ, where they both demand

the same link ðxn�j�1 xn�m�1 x1x0ym�1 ym�jÞ.


They may also conflict in a subsequent stage ðjþk � 1Þ, 16 k < m� j, if y0m�j�r ¼ ym�j�r, for all r,16 r6 k.

Only if: Let y and y 0 belong to two different

output groups at level ðm� jÞ, say g0ðm� j; pÞ,and g0ðm� j; p0Þ; p 6¼ p0. Let p ¼ ðyn�1 ym�j), andp0 ¼ ðy0n�1 y0m�jÞ; they differ at least in one bit

position. These two paths do not conflict with each

other at any stage k, for 06 k < m. �

Theorem 1. In an m-stage N � N SEN ð16m6 nÞ,a permutation P is admissible if and only if

(i) each input is mapped to a reachable output, and(ii) the 2j inputs of any input group at level j,

16 j6m are mapped to outputs so that notwo of them belong to the same output groupat level ðm� jÞ.

Proof. Follows directly from Lemma 2. �

Definition 10. For an N � N SEN, the i-admissibleset of permutations pi is defined as the set of

all permutations admissible in i stages, where

16 i6 n.

Example 5. In the path matrix of P for a 2-stage

SEN shown in Example 3, note that in each win-

dow, all the rows are distinct, proving that all the

paths are conflict-free, i.e., the permutation is ad-missible in a 2-stage SEN.

Corollary 2. In an m-stage N � N SEN, 16m6 n,all the i-admissible sets of permutations are disjoint.

Proof. Follows directly from Theorem 1. �

In the next section, we describe an OðNnÞ al-gorithm to determine whether or not an arbitrary

N � N permutation P is admissible in an m-stageN � N SEN ð16m6 nÞ. An algorithm with the

same complexity was reported earlier only for an

n-stage SEN [9].

2.3. Admissibility algorithm

It is assumed that the permutation is given

as an array out of length N , where outðiÞ stores

the output corresponding to the input i, 06 i6N � 1.

Algorithm: Admissibility CheckInput: n, m, outðNÞOutput: successStep 1: success :¼ 0;Step 2: for x ¼ 0 . . . ;N � 1,

if x ðmod2n�mÞ 6¼ outðxÞdiv2m (the quotient)then terminate;

Step 3: for i ¼ 1 . . .mfor p ¼ 0 . . . ð2i�1 � 1Þ

for x ¼ p2n�iþ1 . . . ðp2n�iþ1 þ 2n�i � 1Þif i is the minimum number such that outðxÞand outðxþ 2n�iÞ differ in bit xm�i,

then if outðxÞ > outðxþ 2n�iÞ,exchange them in array out;next x;else terminate;

next p;next i;

Step 4: success :¼ 1, terminate;It is easy to verify that the time complexity of

the above algorithm is OðNnÞ.Further, if any permutation P is admissible on a

m-stage SEN, 16m6 n, the minimum number

(mmin) of stages that would make P admissible,

can be found by invoking binary search over

the interval 1 to i, at most log n times. There-

fore, mmin can be determined in OðNn log nÞtime.

2.4. An m-stage N � N SEN, n < m6 2n� 1

In this case, the network is a full-access one, i.e.,each input can reach any output, but instead of aunique-path there exist 2m�n paths between any pair

of input–output. We may represent an input–out-

put path x ! y, as a sequence of ðnþ mÞ bits,

ðxn�1xn�2 x1x0 1 m�n yn�1 y1y0Þ, where

ðxn�1xn�2 x1x0Þ is the binary representation of

the input x, and ðyn�1 y1y0Þ represents the outputy; the ðm� nÞ bits between the two, denoted as

ð1 2 m�nÞ are arbitrary. In fact, each possiblecombination of these bits represents a path from xto y.

In this case, the path matrix may be redefined in

the following way [10]:



n < m6 2n� 1, given any N � N permutation

P , an N � ðnþ mÞ binary matrix M is con-

structed where, each row xn�1xn�2 x1x0 1 2 m�nyn�1yn�2 y1y0 represents one input–outputpath x ! y, such that xn�1xn�2 x1x0 is the inputx, yn�1yn�2 y0 is the corresponding output y, andeach j 2 f0; 1g for 16 j6m� n. Then M is de-

fined as the path matrix of P .

Thus in this case, there exist 2m�n paths for

each input–output pair, represented by all possi-

ble combinations of the bits 1 2 m�n,whereas for 16m6 n, there exists a unique

path, if it is realizable. Therefore, a given permu-

tation P is admissible in an m-stage N � N SEN,

n < m6 2n� 1, if and only if there exists an as-

signment for all the bits ð1 2 m�nÞ of eachrow, such that each window Wj, for 06 j < m, ofthe path matrix M is independent.

Example 6. A possible path matrix for the per-

mutation

P :0 4 2 6 1 5 3 71 0 2 3 7 5 6 4

� �

in a 5-stage 8� 8 SEN is given below:

M :

x2 x1 x0 1 2 y2 y1 y00 0 0 0 0 0 0 1

1 0 0 1 1 0 0 0

0 1 0 0 1 0 1 0

1 1 0 1 0 0 1 1

0 0 1 1 0 1 1 1

1 0 1 0 1 1 0 1

0 1 1 1 1 1 1 0

1 1 1 0 0 1 0 0

0BBBBBBBBBBBBB@

1CCCCCCCCCCCCCA

Here, all the windows Wj, 06 j6 4, are indepen-

dent, i.e., P is admissible in a 5-stage SEN.

Theorem 2. If an N � N permutation P is admissi-ble in an m-stage N � N SEN, n6m6 2n� 1, thenin P , the 2j inputs of each input group at levelj;m� n < j6 n are mapped to outputs so that ex-actly 2m�n of them belong to the same output groupat level m� j.

Proof. Let us consider a permutation P , such that

there is at least one input group at level j,m� n < j6 n, of which more than 2m�n inputs are

mapped to outputs belonging to the same output

group at level ðm� jÞ.Now let us consider the window Wj�1, consisting

of the bit string xn�j�1 x0 1 m�n yn�1 ym�j

for each path of P . For any input group at level j,all the inputs consist of an identical bit string

xn�j�1 x0. If more than 2m�n inputs of the group

are mapped to the outputs in the same output

group at level ðm� jÞ, they will have an identical

bit string yn�1 ym�j. This will result in more than2m�n rows of Wj�1 with identical bit strings for the

part xn�j�1 x0, as well as for yn�1 ym�j. By

filling the bits 1; . . . ; m�n, we can make at most

2m�n different rows. Hence in Wj�1, there will be

more than one identical rows for any possible

assignments of 1 m�n. �

The above theorem states just a necessary con-dition for an arbitrary permutation P to be ad-

missible in an SEN with m stages, n6m6 ð2n� 1Þ.The admissibility problem for the special class of

BPC permutations is discussed next.

3. Admissibility of BPC permutations

Given an N � N permutation P , the problem of

partitioning it into minimum number of sets, such

that all the paths in each set can be realized on a k-extra-stage SEN without any conflict, is referred to

as the MP (minimum number of passes) problem

[11]. For k ¼ 0, the MP problem for BPC permu-

tations was solved earlier [8]. Later, it was ex-

tended to cover a larger class of permutations,namely the BPCL (bit-permute-closure) class of

permutations [3]. An OðNnÞ algorithm that solves

the MP problem for BPC permutations on a k-extra-stage SEN in multiple passes, 16 k6 ðn� 1Þ,is reported in [11]. Albeit it is an optimal algo-

rithm, it may still need an Oðn2bn=2cÞ transmissiondelay [8], in the worst case. Instead of using a

fixed-stage SEN, we aim at finding the minimumnumber of stages mmin to admit conflict-free rout-

ing of P . In the case of optical MIN�s, this tech-nique helps to reduce the path-dependent loss of


the optical signal by limiting the number of stages

to be traversed by the signal.

Definition 12. An N � N BPC (bit-permute-com-

plement) permutation P is defined as P : xn�1xn�2 x1x0 ! yin�1yin�2 yi1yi0 , where ðin�1in�2 i1i0Þ is a permutation of fðn� 1Þ; ðn� 2Þ; . . . ; 1; 0g,and yj 2 fxj;�xxjg, for 06 j6 ðn� 1Þ.

The permutation is called a BP permutation, if

yj ¼ xj, for all j, 06 j6 ðn� 1Þ.

Example 7. P1 : x2x1x0 ! x0x2x1 is a BP permuta-

tion given by

P1 :0 4 2 6 1 5 3 7

0 2 1 3 4 6 5 7

!

Similarly, P2 : x2x1x0 ! x0x2�xx1 is a BPC permuta-tion, given by:

P2 :0 4 2 6 1 5 3 7

1 3 0 2 5 7 4 6

� �

For an N � N MIN, there are n! distinct BP�s,and from each BP, we can generate 2n BPC�s.Therefore, jBPCj ¼ 2nn!.

Definition 13. The unique BP permutation P , thatgenerates the set of 2n BPC permutations, (in-

cluding the BP itself), by complementing some

input bits in the BP-rule for P , is called the gen-

erator BP for any BPC permutation of the set.

Example 8. In Example 7, the permutation P1 is

the generator BP of the BPC permutation P2.

3.1. BPC permutations for 16m6 n

Lemma 3. In an m-stage N � N SEN, 16

m6 ðn� 1Þ, all the input–output paths of a BPCpermutation P are realizable if and only if in P ,yj ¼ xj�m, for all j, m6 j6 ðn� 1Þ.

Proof. By Lemma 1, given any BPC permuta-

tion P , any path realizable in an m-stage SEN,

for 16m6 n is represented as ðxn�1xn�2 x1x0ym�1ym�2 y0Þ, where, ðxn�1xn�2 x1x0Þ is theinput, and ðxn�m�1xn�m�2 x0ym�1 y0Þ is the

corresponding output. Therefore, if all the paths in

P are realizable, P will be defined by a BPC rule

where, yj ¼ xj�m, for all j, m6 j6 ðn� 1Þ. �

Theorem 3. In an m-stage N � N SEN, 16m6 n, aBPC permutation P is admissible if and only if:

(i) yj ¼ xj�m, for all j, m6 j6 ðn� 1Þ, and(ii) yj 2 fxn�mþj;�xxn�mþjg, for all j, 06 j6 ðm� 1Þ.

Proof. By Corollary 1, the first condition is nec-

essary to make all the paths of P realizable in an

m-stage SEN, 16m6 ðn� 1Þ.The path matrix and the window W0 consist

of the columns fxn�1 x0ym�1 y0g and fxn�2 x0ym�1g, respectively. The source window is

fxn�1xn�2 x0g, and W0 can be obtained from it by

deleting the column xn�1, and adding the column

ym�1.Since P is in BPC, it is defined by a unique BPC

rule. Therefore, in P , for 06 j6 ðn� 1Þ, yj must bea unique bit of the set fxn�1; xn�2; . . . ; xn�mg, or itscomplement. It is evident that W0 will be inde-

pendent if and only if ym�1 2 fxn�1;�xxn�1g. By the

same argument, we get yj 2 fxn�mþj;�xxn�mþjg, for allj, 06 j6 ðm� 1Þ. �

Remark 4. Theorem 3 also follows from Corollary

1, as a special case.

Example 9. A BPC permutation P1 : x2x1x0 !x0x2�xx1, given by

P1 :0 4 2 6 1 5 3 7

1 3 0 2 5 7 4 6

� �;

satisfies Theorem 3, for m ¼ 2.The path matrix M1

for P1, on a 2-stage SEN is shown below:

M1 :

x2 x1 x0ðy2Þ y1ðx2Þ y0ð�xx1Þ0 0 0 0 1

1 0 0 1 1

0 1 0 0 0

1 1 0 1 0

0 0 1 0 1

1 0 1 1 1

0 1 1 0 0

1 1 1 1 0

0BBBBBBBBBBBBB@

1CCCCCCCCCCCCCA


All the windows Wj, 06 j6 1ð¼ m� 1Þ are inde-

pendent, i.e., the BPC permutation P1 is admissiblein a 2-stage SEN.

Example 10. A BPC permutation P2 : x2x1x0 !x0�xx1x2, given by

P2 :0 4 2 6 1 5 3 7

2 3 0 1 6 7 4 5

� �;

satisfies Corollary 1, for m ¼ 2, which implies that

all paths are realizable. But P does not satisfy

Theorem 3, i.e., the condition for admissibility, for

m ¼ 2.The path matrix M2 for P2, on a 2-stage SEN is

shown below:

M2 :

x2 x1 x0ðy2Þ y1ð�xx1Þ y0ðx2Þ0 0 0 1 0

1 0 0 1 1

0 1 0 0 0

1 1 0 0 1

0 0 1 1 0

1 0 1 1 1

0 1 1 0 0

1 1 1 0 1

0BBBBBBBBBBBBBBBB@

1CCCCCCCCCCCCCCCCA

It may be observed that there are conflicts in the

window W0ðx1x0y1Þ. Hence, though all the paths of

P2 are individually realizable, the permutation is

not admissible on a 2-stage SEN.

Corollary 3. In an n-stage N � N SEN, a BPCpermutation P is admissible if and only if yj 2fxj;�xxjg, for all j, 06 j6 ðn� 1Þ.


Corollary 4. In an m-stage N � N SEN, where16m6 n, only a unique BP is admissible for a givenvalue of m.

Proof. From Theorem 3, it is evident that in an m-stage SEN, 16m6 n, if a BP permutation P is

admissible, then any particular output bit yj, in P ,06 j6 ðn� 1Þ is allowed to be a unique input bit

xk, k ¼ j� m, for m6 j6 ðn� 1Þ, and k ¼ n� mþj, for 06 j6 ðm� 1Þ. Hence, given any value of m,16m6 n, the admissible BP is unique. �

Remark 5. The unique BP admissible in an n-stageN � N SEN is the identity permutation.

Corollary 5. If a BP permutation P is admissible inan m-stage SEN, 16m6 n, only 2m BPC permu-tations generated from P , are admissible in them-stage SEN.

Proof. Follows directly from Theorem 3, sincecomplements are allowed only in the bits yj,06 j6 ðm� 1Þ. Therefore, only 2m BPC permuta-

tions out of 2n, generated from P are admissible, in

an m-stage SEN, 16m6 n. �

3.2. BPC permutations for n < m6 2n� 1

For an m-stage SEN, n < m6 2n� 1, given anypermutation P , the path matrix is an N � ðnþ mÞbinary matrix, as explained in Section 2.4.

Theorem 4. A BPC permutation P is admissible onan m-stage SEN, where m ¼ nþ k, 16 k6 ðn� 1Þ,if and only if yjð�yyjÞ 62 fx0; x1; . . . ; xj�k�1g, for all j,ðn� 1ÞP jP ðk þ 1Þ.

Proof. First, let us assume that a BPC permutation

P is admissible on an mð¼ nþ kÞ-stage SEN,

for 16 k6 ðn� 1Þ, and some output bit yi ¼ xr inP , where ðn� 1ÞP iP ðk þ 1Þ, and 06 r6ði� k � 1Þ.

Consider the window xi�k�1 xr x0 1 2 kyn�1 yi. This window is an N � n binary ma-

trix, with two identical (or, complement to eachother) columns, since yið�yyiÞ ¼ xr. It is evident thatthis matrix is not independent, i.e., there is a

conflict, which is a contradiction. Therefore, for

any admissible BPC, the above condition is nec-

essary.

To prove the sufficiency, let us assume that a

BPC permutation P satisfies the above condition.

We show that it is always admissible in anmð¼ nþ kÞ-stage SEN, 16 k6 ðn� 1Þ. In this

case, the path matrix M consists of the columns

fxn�1xn�2 x0 1 2 m�n yn�1 y0g.


Consider the window W0 containing the col-

umns fxn�2xn�3 x0 1g which can be obtained

from the source window by deleting the column

xn�1 from the left, and adding the column 1 on theright. Therefore, if we make 1 ¼ xn�1, the windowW0 becomes independent, since the source windowwas independent.

If we repeat this procedure for each window Wj,

16 j6 k � 1 obtained from an independent win-

dow Wj�1, and in each step assign jþ1 ¼ xn�j�1, all

the windows Wj, 06 j6 k � 1 remain independent.

Next, let us consider the window Wk contain-

ing the columns fxn�k�2 x0 1 k yn�1g with

j ¼ xn�j, for 16 j6 k. By our assumption,yn�1ð�yyn�1Þ 62 fx0; x1; . . . ; xn�k�2g.

Since P is a BPC, yn�1 must be an input bit or

its complement. Now if yn�1 ¼ xn�k�1, the present

window remains independent as the previous win-

dow Wk�1 containing the columns fxn�k�1xn�k�2 x0 1 kg was independent.

But if yn�1 2 fxj;�xxjg where, ðn� kÞ6 j6ðn� 1Þ, there must be an i ¼ xj; 16 i6 k in Wk.We reassign the column i ¼ xj � xn�k�1, where

xn�k�1 is the column deleted from Wk�1, and

xjð¼ yn�1Þ is the column inserted in Wk, and �denotes the exclusive-or operation. Now, for the

rows in which the bit xn�k�1 is 0 in the source

window, i remains the same as in column xj, butfor the rows with xn�k�1 ¼ 1, it is complemented,

and vice versa. Hence, the window will be an in-dependent one, keeping the previous windows

independent as well. In Wk, the column i playsthe role of the column xn�k�1. But in the previ-

ous windows, the column acts as bit xj (see

Example 11).

If we repeat this procedure for each window Wj,

considering each column of the previous window

equivalent to a single column of the source win-dow for k6 j < m, all the windows can be made

independent. Therefore, the permutation P is ad-

missible in an m-stage SEN, which completes the

proof. �

Example 11. A BPC permutation P : x2x1x0 !x1�xx2x0, given by

P :0 4 2 6 1 5 3 7

2 0 6 4 3 1 7 5

� �;

satisfies Theorem 3, for m ¼ 4.The path matrix Mfor P , on a 4-stage SEN is shown below:

M :

x2 x1 x0 1ðx2ð�Þx0Þ y2ðx1Þ y1ð�xx2Þ y0ðx0Þ0 0 0 0 0 1 0

1 0 0 1 0 0 0

0 1 0 0 1 1 0

1 1 0 1 1 0 0

0 0 1 1 0 1 1

1 0 1 0 0 0 1

0 1 1 1 1 1 1

1 1 1 0 1 0 1

0BBBBBBBBBBBB@

1CCCCCCCCCCCCA

Since each window is independent, P is admissible

on a 4-stage SEN.

Remark 6. For an m-stage SEN, n < m6 ð2n� 1Þ,the necessary and sufficient condition for the ad-

missibility of a BPC permutation, stated in Theo-

rem 4, is the same as the necessary condition for

the admissibility of a permutation, in general,presented in Theorem 2.

Corollary 6. If a BP permutation P is admissible onan m-stage SEN, n6m6 ð2n� 1Þ, all the 2n BPCpermutations generated from P (by complementingone or more bits in the same bit-permutation rule),are also admissible on the m-stage SEN.


In the next subsection we present an algorithm

for determining mmin, the minimum number ofstages of SEN, to make a given BPC permutation

admissible.

3.3. Algorithm for finding mmin of SEN for BPC

An N � N permutation P is represented by an

array A of length n, such that AðiÞ ¼ þj if yi ¼ xjand AðiÞ ¼ �j if yi ¼ �xxj for 06 j6 ðn� 1Þ.

Algorithm: Admissibility of BPC permutation,16m6 2n� 1

Input: n, AðnÞOutput: mmin, the minimum number of stages

requiredStep 1: mmin :¼ 0; if Aðn� 1Þ ¼ ðn� 1Þ or -ve, go

to step 6;


Step 2: k :¼ Aðn� 1Þ; if k ¼ 0 go to step 4;Step 3: for j ¼ 1 to k //to check condition (i) of

Theorem 3//if Aðn� j� 1Þ ¼ ðk � jÞ then next j;

else go to step 7;Step 4: mmin :¼ n� k � 1;

for j ¼ 0 to ðmmin � 1Þ //to check condition (ii)of Theorem 3//if jAðiÞj ¼ ðn� mmin þ jÞ then next j;

else go to step 7;Step 5: terminate;Step 6: k :¼ n� 1;Step 7: mmin :¼ 2n� k � 1;Step 8: for i ¼ ðn� 2Þ to (mmin � nþ 1) //tocheck condition of Theorem 4//

if jAðiÞj6 ði� mmin þ n� 1Þthen mmin :¼ mmin þ 1

if mmin < ð2n� 1Þ then go to Step 8;else terminate;

else next i;Step 9: terminate;

Given a BPC permutation P , the above algo-

rithm computes the minimum number of stages

ðmminÞ needed to make P admissible on a SEN. In

the worst case, n output bits for each of the

ð2n� 1Þ stages may need to be checked. Hence, thetime complexity of the algorithm is Oðn2Þ, if P is

assumed to be given as a permutation of the input

bits, i.e., in terms of the BPC rule. In general, givenany arbitrary permutation, whether it belongs to

the BPC class, and if so, the corresponding BPC

rule can be determined in OðNnÞ time.

Example 12. For a given BPC permutation

P : x2x1x0 ! x0x2�xx1,

P :0 4 2 6 1 5 3 7

1 3 0 2 5 7 4 6

� �;

the above algorithm produces mmin ¼ 2, i.e., P is

admissible on a 2-stage SEN. Thus, the transmis-

sion delay will be 2 units.

If a fixed-stage SEN is used, say with m ¼ 3,

routing of the above permutation P (Example 12)

would have needed two passes resulting a total

transmission delay of 6 units [11].

Any BPC permutation may need at most

ð2n� 1Þ-stages of SEN for conflict-free routing

[11]. Hence, a ð2n� 1Þ-stage optical network, as

shown in Fig. 1, can be used to route any BPC

permutation through the first mmin stages to re-

duce the signal attenuation and the transmissiondelay.

4. Conclusion

In hybrid optical MIN�s, a serious problem is

the path-dependent loss of the optical signal,

which depends on the number of stages of theMIN traversed by the input signal. In this paper,

for a permutation P that is admissible in an m-stage SEN, 16m6 n, we have reported an

OðNn log nÞ time technique for determining the

minimum number of stages necessary to make Padmissible. For n < m6 2n� 1, we establish a

necessary condition that a permutation P must

satisfy for being admissible in an m-stage SEN. Itgives a lower bound on the number of stages re-

quired for making P admissible. For BPC per-

mutations, the same condition is found to be

necessary and sufficient. The problem of routing

BPC permutations had been considered earlier for

a fixed-stage SEN [1,8,11], resulting a transmission

delay of Oðn2bn=2cÞ in the worst case. On the other

hand, the proposed technique first determines theminimum number of stages (mmin) required to

make P admissible on a SEN, 16mmin 6 ð2n� 1Þ.The permutation P can then be routed through

the mmin stages only, with OðnÞ transmission de-

lay. By limiting the number of stages, i.e., the

number of switches the signal needs to traverse to

reach the output, this technique minimizes the

path-dependent loss of the optical signal. Extend-ing these ideas to encompass other classes of per-

mutations, such as LC, BPCL, etc., is an open

problem.

Acknowledgements

The authors would like to thank RekhaMenon and Anjan Sarkar of the Indian Statisti-


cal Institute for their help in implementing the

code.

References

[1] A. Abdendher, T. Feng, On rearrangeability of Omega–

Omega networks, in: Proc. 1992 Int Conf. Parallel Process.,

1992, pp. I-159–165.

[2] D.W. Bass, I.H. Sudborough, On the shuffle-exchange

permutation network, in: Proc. Int. Symp. Parallel Archi-

tect., Algorithms and Networks (ISPAN�97), Taiwan,

December 1997, pp. 165–171.

[3] N. Das, B.B. Bhattacharya, J. Dattagupta, Isomorphism of

conflict graphs in multistage interconnection networks and

its application to optimal routing, IEEE Trans. Comput.

42 (6) (1993) 665–677.

[4] N. Das, B.B. Bhattacharya, J. Dattagupta, Hierarchical

classification of permutation classes in multistage inter-

connection networks, IEEE Trans. Comput. 43 (12) (1994)

1439–1444.

[5] Q. Hu, X. Shen, W. Liang, Optimally routing LC

permutations on k-extra-stage cube-type networks, IEEE

Trans. Comput. 45 (1) (1996) 97–103.

[6] D.S. Parker, Notes on shuffle/exchange type switching

networks, IEEE Trans. Comput. C-29 (1980) 213–

222.

[7] Y. Pan, C. Qiao, Y. Yang, Optical multistage interconnec-

tion networks: new challenges and approaches, IEEE

Commun. Magazine 37 (2) (1999) 50–56.

[8] C.S. Raghavendra, A. Varma, Fault-tolerant multiproces-

sors with redundant path networks, IEEE Trans. Comput.

C-35 (4) (1986) 307–316.

[9] X. Shen, M. Xu, X. Wang, An optimal algorithm for

permutation admissibility to multistage interconnection

networks, IEEE Trans. Comput. 44 (4) (1995) 604–

608.

[10] X. Shen, An optimal OðNlgNÞ algorithm for permutation

admissibility to extra-stage cube-type networks, IEEE

Trans. Comput. 44 (9) (1995) 1144–1149.

[11] X. Shen, Optimal realization of any BPC permutation on

k-extra-stage Omega networks, IEEE Trans. Comput. 44

(5) (1995) 714–719.

[12] H.S. Stone, Parallel processing with the perfect shuffle,

IEEE Trans. Comput. C-20 (1971) 153–161.

[13] A. Varma, C.S. Raghavendra, Rearrangeability of multi-

stage shuffle/exchange networks, IEEE Trans. Commun. 36

(1988) 1138–1147.

[14] C.L. Wu, T. Feng, On a class of multistage interconnection

networks, IEEE Trans. Comput. C-29 (8) (1980) 694–

702.

[15] Y. Yang, J. Wang, Yi Pan, Permutation capability of

optical multistage interconnection networks, J. Parallel

Distrib. Comput. 60 (2000) 72–91.

Nabanita Das received the B.Sc degreein physics in 1976, B.Tech. in radio-physics and electronics in 1979, fromthe University of Calcutta, the M.E.degree in electronics and telecommu-nication Engineering in 1981, andPh.D. in Computer Science in 1992,from the Jadavpur University, Kolk-ata. Since 1986, she has been on thefaculty of the Advanced Computingand Microelectronics unit, IndianStatistical Institute, Calcutta. She vis-ited the University of Paderborn,Germany, under scientists� exchange

program of the Indian National Science Academy (INSA). Herresearch interests include parallel processing, interconnectionnetworks, wireless communication and mobile computing. Sheis a member of IEEE.

Bhargab B. Bhattacharya received theB.Sc. degree in physics from the Pres-idency College, Calcutta, India, in1971, the B.Tech. and M.Tech. degreesin radiophysics and electronics, andthe Ph.D. degree in computer scienceall from the University of Calcutta, in1974, 1976, and 1986 respectively.Since 1982, he has been on the facultyof the Indian Statistical Institute,Calcutta, where he became full pro-fessor in 1991. As a Visiting Professor,he had been with the Department ofComputer Science and Engineering,

University of Nebraska-Lincoln, USA, during 1985–1987, and2001–2002. In the summers of 1998, 1999, and 2000, he visitedthe Fault-Tolerant Computing Group, Institute of Informative,at the University of Potsdam, Germany. His research interestincludes logic synthesis, physical design and testing of VLSIcircuits, graph algorithms, and image processing. He has pub-lished more than 100 papers in archival journals and refereedconference proceedings. Currently, he is collaborating withIntel Corporation, USA, and IRISA, France, for developmentof image processing hardware, and reconfigurable parallelcomputing tools.Dr. Bhattacharya is a Fellow of the IndianNational Academy of Engineering. He served on the conferencecommittees of the International Test Conference (ITC), theAsian Test Symposium (ATS), the VLSI Design and TestWorkshop (VDAT), the International Conference on AdvancedComputing (ADCOMP), and the International Conference onHigh-Performance Computing (HiPC). For the InternationalConference on VLSI Design, he served as Tutorial Co-Chair in1994, as Program Co-Chair in 1997, and as General Co-Chairin 2000.

Sergei Bezrukov received the MS andPh.D. degrees in mathematics from theMoscow State University (Russia) in1980 and 1984, respectively. In 1996 hereceived Habilitation in ComputerScience from the University of Pader-born, Germany. He is affiliated at theInstitute for Problems of InformationTransmission (IITP) since 1987. During1992–1998 he worked as Assistant/As-sociate Professor at the university ofPaderborn, Germany. Since 1999 he hasbeen an Associate Professor at the Uni-versity of Wisconsin-Superior, USA.


permutation routing in optical min with minimum number of stages

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