pinholes and their effects of apv25 chips

Pinholes and their effects of APV25 chips •  Pinholes

–  sensor strips are capacitively coupled to APV25 –  The capacitors, integrated on the sensor strips, can occasionally have a

short circuità pinhole. •  Pinhole can give DC current into/out from APV, which can:

1.  permanently disable the whole APV chip on p-side •  due to APV INVERTER, used to change signal polarity and increase the dynamic

range only on p-side (APV dynamic range +7MIPs /-2.5MIPs) •  problem only arises on p-side (INVERTER) if current flow INTO APV:

–  APV input sits at +0.75V w.r.t APV_GND=HV_Bias –  p side strips, collect holes, sit at HV_Bias+Ileak*Rbias àcna inject current INTO APV

•  problem only if Ileak is big (rad damaged sensors) or/and several pinholes are connected to the same chip (details in backup slides)

2.  disable the single APV channel where pinhole is connected. •  same effect on p and n side

•  In CMS (single side sensor, p-side strips) all pinholes were then NOT connected to the APV chip to avoid problem 1

1 G. Rizzo SVD – March 24th 2015

What we do in Belle2-SVD for pinholes •  In Belle2-SVD we proposed a new strategy for the pinholes! •  Saturation effect of the whole p-side chip can be avoided applying an

extra voltage (Vsep) on APV_GND w.r.t HV_Bias –  can rise Vsep to positve voltage so the current flows out of the APV chip, to sensor

strip, and saturation cannot happpen. –  Extra voltage used already in BaBar to inhibit issues due to pinholes/p-stop short

•  Advantages: disconnecting all the pinholes (as in CMS) can be difficult & new pinholes can develop later (radiation accidents!)

•  This scheme (next slide) was proposed originally only to p side, since chip saturation cannot happen on n-side –  CAEN boards for p side foreseen

•  Recent studies on APVDAQ teststand (with real SVD modules) proved Vsep is effective:

1.  to avoid whole chip saturation on p side (expected) 2.  to cure single pinholes on p and n side (new) 3.  to recover single noisy strips: field plate effect of AC metal connected to the Vsep

voltage via APV input (new)

•  CAEN board for n side are needed 2 G. Rizzo SVD – March 24th 2015

New Powering Scheme


Extra separa*on voltage also on n-‐side

Vsep-extravoltage advantages Recent studies on teststand with real SVD modules proved Vsep effects and various advantages on p and n side 1.  Saturation effect on p side, on chips with several pinholes

connected, demonstrated and cured with Vsep –  Whole chip saturation starts with Vsep<-3V –  All chans including pinholes, work normally -2.5V<Vsep<-0.5V –  Pinholes stop working with Vsep>-0.5 V the other chans ok

2.  Vsep can cure single connected pinholes on p & n side –  with Vsep set to equalize the strip voltage and the input of the APV

(+0.75V) no significant DC current is flowing in the pinhole and APV channel can work normally: Vsep=-0.75V cure pinhole, for very low Ileak

3.  Applying Vsep, via the APV input, on AC metal strips (no pinholes/AC capacitor OK) can be beneficial for noisy strips:

–  AC metal acts as a field plate above the n+ strip implant –  With the right polarity/value can reduce strip leakage current coming

from defects localized at the Si/Si02 surface –  Noise reduction on defective strips observed/effect still under study


Pinholes studied on APVDAQ teststand

G. Rizzo

•  p-side only: large current flow INTO APV, (several pinholes) is a problem for the whole chip

•  p & n side: small current (single pinhole) disable a single APV channel

•  Remedy: offset voltage between HV bias and APV_GND

•  Some noisy channels (not pinholes) can be recovered with Vsep acting on AC metal as field plate

•  SVD – March 24th 2015

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APV response to internal calibration •  Signal (MIP equivalent) injected from

internal APV calibration circuit •  Peak amplitude:

–  85 ADC for normal strips –  smaller for pinholes connected

•  Peak amplitude on pinholes reacts to Vsep extra voltage, as expected

•  Vsep negative, -0.75V can cure single pinholes –  equalize strip voltage and APV input

G. Rizzo SVD – March 24th 2015

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pinholes

Normal strips

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Normal strips

pinholes

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pinholes

Normal strips

Vsep (V)

Only peak amplitude sampled & fine Vsep scan implemented on APVDAQ

(me (ns)

Peak Amplitu

de (A

DC)

APV ou

tput (A

DC)

(me (ns) (me (ns)

Pinhole cured

Normal strips

Vsep scan results 1.  Whole chip saturation induced artificially

with Vsep<-3V in chips with several pinholes connected

2.  Single pinholes on p and n side cured 3.  Some single strips noisy (not pinhole) can

be cured : field plate effect of AC metal connected to the Vsep voltage via APV input (new effect under study)

•  Vsep adds some degree of freedom on p and n side to compensate some defects


Vsep (V)

Peak Amplitu

de (A

DC)

Normal strips saturate P-‐side

N-‐side

Vsep (V)

Peak Amplitu

de (A

DC)

Pinhole cured

Normal strips

Vsep (V)5! 4! 3! 2! 1! 0 1 2 3 4 5

RM

S (A

DC

)

5

10

15

20

25

30

Noise RMS (ADC

)

Vsep (V)5! 4! 3! 2! 1! 0 1 2 3 4 5

RM

S (A

DC

)

2

4

6

8

10

12chip8

N-‐side

Vsep (V)5! 4! 3! 2! 1! 0 1 2 3 4 5

RM

S (A

DC

)

0

10

20

30

40

50

Vsep (V)5! 4! 3! 2! 1! 0 1 2 3 4 5

RM

S (A

DC

)

0

10

20

30

40

50

60

70

80

90

100

chip6 chip7

chip9

Vsep (V)

Pinhole cured

Backup


9 G. Rizzo SVD – March 24th 2015 325/01/2002Ian Toma lin

!"#$%&'(#)%"!"#*$"+,-.%$/)"01-%2-#3*-456

Charge

sensitive

amplifierSource

follower1.25 V

2.50 V

VO U T = -V IN

V IN

VSS

Detector

Inverter(Sensitive to

HIP S & pinholes !!)

R I N V


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Why is the inverter there ? – It incre a se s A PV dynamic range for silicon strip detector.

Dynam ic range+7 MIPs

APV pre amp output

MSGC S ilicon Inverted S ilicon

Dynamic range-2,5 MIPs


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2.50 V

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R I N V !"#$$!

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! Big signal from silicon (holes) gives -ve pulse at VIN :

"Inverter F E T sw itche s ha rd on, which

ste a ls current from 127 other inverters.(APV d isa b led until c apacitor d ischarge s.)

"N .B. If R IN V were reduced, tota l current

ava ilab le to inverters wou ld incre a se .

!Leakage current via pinhole into APV :

"S a me aga in, but permanent.

!Leakage current via pinhole out of APV :

"Inverter F E T sw itche s ha rd off. Ta ke s no

current, so other 127 channe ls st ill work.

Vsep scan on n side HPK sensor •  Small (a few %) reduction of Calamp (and

increase in caltmax) on all n side strip @ Vsep>-2V

•  Some single strips become very noisy @ Vsep>-2V à Vsep<-2V can cure them!

•  Other noisy strip not sensitive to Vsep


Vsep (V)

pinholes

Vsep (V)5 4 3 2 1 0 1 2 3 4 5

Cal

Amp

(AD

C)

77

78

79

80

81

82

83

84

85

86N-‐side chip8

Peak Amplitu

de (A

DC) Normal strips

No pinholes

Vsep (V)5! 4! 3! 2! 1! 0 1 2 3 4 5

RM

S (A

DC

)

5

10

15

20

25

30

RMS (ADC

)

Vsep (V)5! 4! 3! 2! 1! 0 1 2 3 4 5

RM

S (A

DC

)

2

4

6

8

10

12chip8

N-‐side

Vsep (V)5! 4! 3! 2! 1! 0 1 2 3 4 5

RM

S (A

DC

)

0

10

20

30

40

50

Vsep (V)5! 4! 3! 2! 1! 0 1 2 3 4 5

RM

S (A

DC

)

0

10

20

30

40

50

60

70

80

90

100

chip6 chip7

chip9

•  Possible explanation for both effect: –  field plate effect of AC metal connected to the Vsep voltage via APV input

•  Only seen on 1 HPK sensor •  Seen also on other sensor in

HEPHY?

Vsep scan on n side HPK sensor 1.  Small reduction of Calamp (and increase in caltmax) on all n side

strip @ Vsep>-2V 2.  Some single strips become very noisy @ Vsep>-2V

G. Rizzo SVD – March 24th 2015 Vsep (V)

•  Possible explanation for both effects: –  field plate effect of AC metal connected to the Vsep voltage via APV input –  Negative voltage (Vsep<-2V) on AC n side metal reduces the extension of the

electrons accumulation layer and reduces the effective width of n+ implant 1.  C interstrip, proportional to width /pitch, is reduced for all strips and

consequently Calamp (increase) and Caltmax move (sensitive to the Capacitance connected to the APV input)

2.  When the extension of the n strip implant changes the localized defects at surface that can produce leakage current can/cannot contribute to the strip leakage current and noise increase/decrease.

•  Field effect on AC metal could be studied on sensors (n and p side) and, to be pragmatic, effects on modules noise vs Vsep should be studied.

•  We might find the best optimization for Vsep operation on n and p side to: cure pinholes, reduce the noisy strips

Vsep scan and field effect on AC metal


•  With Vsep negative the AC metal acts as a field plate and reduces the accumulation layer estension close to the n+ strip implant à effective implant width w_n+ is reduced

1.  Interstrip capacitance, proportional to width/pitch, is reduced à Peak amplitude increases slightly

•  The Electric field close to the n+ strip is modified by the field plate effect

–  Some defects very close to the surface Si-SiO2 (that can be the origin of high leakage current) can stop to contribute to the strip leakage current??

–  The peak electric field can be lowered, thus reducing the impact ionization in spots where localized defects are responsible for high field values.

- - - - - - - -

15

p-stops

AC metal

n+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - -

AC metal

n+ -

APV25

Vsep + 0.75V

w_n+ Cstrip !wn+ / pitch

w_n+

•  When Vsep is negative enough, the AC metal field plate depletes the accumulation layer close to the n+ strip implant à effective n-strip width w_n+ is reduced

•  Interstrip capacitance is reduced by the addition of two non-conducting gaps (but the metal is still wide, so the reduction is not expected to be dramatic). The effect will be tested on bare sensors.

p-stops

AC metal

n+

AC metal

n+

APV25

Vsep < -2V

w_n+ Cstrip !wn+ / pitch

w_n+

G. Rizzo SVD Meeting – March 24, 2015

- - - - - - - - - - - - - - - -

- - - - - - - - - - - - - -

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

16 G. Rizzo SVD Meeting – March 3rd 2014

pinholes and their effects of apv25 chips

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