pixel-level 3d integration for advanced stacked cmos image ... · 3d interconnect pitch bond...
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3025 Orchard Parkway San Jose, CA 95134 +1 408.321.6000
On-Chip Lens
Color Filter
Interconnect Upper to Lower Wafer Interconnect Upper to Lower Wafer
Metal Wiring
Photodiode
Light Receiving Surface
Photodiode
TSVSubstrate
Silicon Bulk
Front-SideIlluminated (FSI)
Back-SideIlluminated (BSI) 3D Stacked BSI
3D Hybrid BSI with Pixel Level Integration
ZiBond
3D Hybrid BSI
ZiBond Direct Bonding ZiBond Bonding with TSV Pixel Level DBI InterconnectDBI Hybrid Bonding
DBI
ZiBond DBI
Revolutionizing the image sensor industry by enabling improved sensitivity, high dynamic range (HDR) & lower cost
Pixel-Level 3D Integration for Advanced Stacked CMOS Image Sensors
Room Temp Wafer Bonding
Scalable to <1µm Pitch
Up to 15x Higher Bonding Throughput
Wafer Bonding is a key enabler of back-side illuminated (BSI) image sensors. ZiBond® direct bonding technology enabled 1st generation BSI and 2nd generation 3D stacked BSI image sensors.
• Allows 3D Integration with each Pixel Connected to an Individual ADC
• Eliminates need for Thru Silicon Vias (TSVs)
• Improves Signal to Noise Ratio
• Enhances High Dynamic Range
• Enables Global Shutter
• Provides Smaller Footprint
• Drives Higher Manufacturing Throughput
Key Benefits
DBI® 3D interconnect technology eliminates the need for TSVs, reduces die area penalty and enables high performing 3D hybrid BSI image sensors.
Very fine pitch DBI allows pixel level interconnect between each pixel and an associated A/D converter, providing the functionality and performance needed for next generation CMOS image sensors.
SemiconductorTechnologies
3025 Orchard Parkway San Jose, CA 95134 +1 408.321.6000
Direct Bond Interconnect (DBI) technology is a low temperature
hybrid direct bonding solution that allows wafers or die to be
bonded with exceptionally fine pitch 3D electrical interconnect.
DBI can also minimize the need for Thru Silicon Vias (TSVs).
DBI technology is in high volume production today.
DBIProcess
ZiBond Process
HomogeneousDirect Bonding
Hybrid Bonding withMetal Interconnect
Chemical MechanicalPolishing
Chemical MechanicalPolishing
Align & Contact withoutExternal Pressure
Align & Contact withoutExternal Pressure
Plasma
LOW
TEMP
BATC
H AN
NEAL
ACTIV
ATIO
NW
AFER
CMP
ROOM
TEMP
BOND
ING
Silicon Wafer
Dielectric
Plasma
Silicon Wafer
Silicon WaferVery Thin Dielectric
Metal
Silicon Wafer
Silicon Wafer
Silicon Wafer
Dielectric
Silicon
Silicon DielectricInterconnect
Silicon
Silicon
3D Interconnect Metals
Cu, Ni
Same as ZiBond
Room Temperature
3D Interconnect Pitch
Bond Interface Materials
Substrates
Scalable to <1µm pitch1.6µm demonstrated6µm in high volume production
Same dielectrics as ZiBond with integrated metal interconnect
Bonding Temperature
Anneal Temperature
Equipment Industry standard wafer alignment and bonding equipment
150 -300ºC (application dependent)
75-300ºC (application dependent)
Bond Interface Materials
Substrates
BondingTemperature
SiO(TEOS, Thermal, Silane)
SiN(CVD or PECVD)
SiON(PECVD)
Room Temperature
Si, Glass, InP, GaAs, GaN, SiC, LiTaO3, LiNbO3, Sapphire
SiCN(PECVD)
Anneal Temperature
ZiBond technology is a low temperature homogeneous direct
bonding solution that forms a strong bond between wafers or die
with the same or different coefficients of thermal expansion (CTE).
ZiBond technology is in high volume production today.
Equipment
ZiBond Technology
DBI Technology
Industry standard wafer alignment and bonding equipment
Metal Bond Pad
Very Thin Dielectric
Interconnect
Features
Features