Post Synthesis Simulation

1. Login to Design lab server

2. After runnig the command source /cad/digital/bashrc, run vsim then

Modelsim opens

3. Create a new project

4. Select Add existing file

5. Add Post synthesis output file (\/synthesis/opdata) (.v or .vhd)

6. Add test bench (.v or .vhd)

7. Add the library file(osu018stdcells.v ) Ive attached in my moodle post.

8. Compile these three files (right click - compile all)

9. Simulate with resolution 1ns and no optimization

a. Start simulation

b. In work select testbench entity and set resolution to ns

If enable optimization option is available, uncheck it.

c. Add required signals to wave from Objects tool bar. If its not visibe

check objects in view menu.

d. Wave window opens click on run

10. Take screenshots of waveform and submit