ppt for ncta

VLSI Implementation of Digital Filter

Mrs. Disha Bhosle Vikas AnaokarAditya TrivediOmkar Dixit

Atharva College of EngineeringDate:28 -01-2016

National Conference on Technological Advancement and Automatization in EngineeringNCTAA-2016


Abstract• Designing digital filters mathematically, and verifying their functions, is a

simple task with the help of MATLAB. PLD and FPGA implementation approach has both, performance of ASICs and flexibility of software.

• The designed filter can be used to remove powerline interference from the ECG signal. Power line interference cause uneven spikes at 50/60 Hz frequency and can cause inaccuracy in ECG graphs. Hence, this noise has to be eliminated and can be done through IIR/FIR digital filter.

• Digital filter finds variety of application in DSP. Important role in major digital applications.

• Hardware implementation using latest VLSI technology reduces cost, size and complexity.

• Programmable Logic Device ideal for versatile configuration of the filter design.

• Application of hardware in removing power line interference in ECG signal.


Introduction

Literature ReviewAuthors Title Description of Paper

Bashar Seddik Mohamad-Ali, Ziyad Khalf Farej

“Implementing digital filter using programmable logic device for educational aims”, 2009

Implementation of simple digital filters like IIR filter of first order on programmable logic device using simulation tools like MATLAB

Shelja Jose, Shereena Mytheen

“Modified Booth Multiplier Based Low-Cost FIR Filter Design”, 2014

FIR filter for removal of baseline and power line interference due to the linear phase characteristics of FIR filter

Bhumika Chandrakar, O.P.Yadav, V.K.Chandra

“Implementation of Digital Filters in Programmable Logic Devices”, 2001

Design of modified booth algorithm to implement the multiplier used in the design of a filter

Bhumika Chandrakar, O.P.Yadav, V.K.Chandra

“A Survey of Noise Removal Techniques for ECG Signals”, 2013

Different types of noises in ECG and methods to remove the noise.


Problem Statement• Types of noises in ECG

– Base Line Noises– Power Line Interference– Muscle Noise

• Power line interference caused by stray effect of the alternating current fields.

• Notch Filter is used to remove Power Line Noises.

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ECG signal with powerline noise

Proposed Idea• Designed IIR filter will be implemented on MATLAB using FDAtool.• Designed FIR filter using FDAtool will be implemented on MATLAB.

Compare them.• Apply original ECG signal with noise to both the filters.• VHDL code will be generated by HDL coder in MATLAB.• Optimize the code.• Implementation of HDL code on Xilinx ISE and PLD.

Design the Filter

specification

Simulating Filters on MATLAB

Generate VHDL code

Optimize VHDL Code

Implementing on PLD


Applications in other fieldsa) Echo cancellation

– Telecommunications– Data communications– Wireless communications

b) Ghosting cancellation in– HDTV– DTV– Video processing

c) Speech synthesisd) Waveform synthesise) Filtering

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Results

• Removal of spikes at 50 Hz.

ECG signal filtered by FIR filter


Future Scope• Implementation of advanced adder and multiplier algorithms to make

circuit more compact and reducing no. of gates.• Use of newer FPGA to enhance performance even more.• Use of design for other applications like echo cancellation.


Conclusion


• It is studied that digital filters have an advantage over analog filters as use of analog filters introduces non-linear phase shift. Among digital filters, FIR filters are stable as they have non recursive structure. They give exact linear phase.

• At the hardware level, IIR filters are easily implementable on a CPLD board.

• Digital filters on hardware can also be optimized using modified booth algorithm. Using booth algorithm, many researchers have found low power consumption, less chip area and optimized speed

References[1] Bashar Seddik Mohamad-Ali, Ziyad Khalf Farej, “Implementing digital filter using programmable logic device for educational aims”, Iraqi Academic Scientific Journal, 2009.[2] Shelja Jose, Shereena Mytheen, “Modified Booth Multiplier Based Low-Cost FIR Filter Design”, International Journal of Engineering Science and Innovative Technology (IJESIT) Volume 3, Issue 5, September 2014.[3] David J. Farrell, David M. Williams, “Implementation of Digital Filters in Programmable Logic Devices”, Embedded Systems Conference, San Francisco, Spring 2001.[4] Bhumika Chandrakar, O.P.Yadav, V.K.Chandra, “A Survey of Noise Removal Techniques for ECG Signals”, International Journal of Advanced Research in Computer and Communication Engineering Vol. 2, Issue 3, March 2013.[5] J. A. Van Alste, T. S. Schilder “Removal of Base-Line Wander and Power-Line Interference from the ECG by an Efficient FIR Filter with a Reduced Number of Taps”, IEEE Transactions On Biomedical Engineering, vol. BME32, no. 12, December 1985 pg no-1052-1060.[6] N. H. Phuong, “The FIR Filter Design: The Window Design Method”, 2009.[7] Aarti Sharma “VLSI implementation of pipelined Fir filter” Thapar University, June, 2013.


Thank You

ppt for ncta

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