pre-release schematic do not copy · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31...

53
5 5 4 4 3 3 2 2 1 1 D D C C B B A A 100-0321330-A 110-0321330-A 120-0321330-A 130-0321330-A 140-0321330-A 150-0321330-A 160-0321330-A 170-0321330-A 180-0321330-A 210-0321330-A 220-0321330-A 320-0321330-A Project Drawing Numbers: Raw PCB Gerber Files PCB Design Files Assembly Drawing Fab Drawing Schematic Drawing PCB Film Bill of Materials Schematic Design Files Functional Specification PCB Layout Guidelines Assembly Rework 1. NOTES: Stratix 10 TX SI Development Kit DESCRIPTION REV DATE PAGES INITIAL REVISION A RELEASE A0 5 June. 2017 All 29 26 27 PAGE DESCRIPTION 5 6 28 PAGE DESCRIPTION 2 Title, Notes, Block Diagram, Rev. History 1 3 4 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 30 31 Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203 Copyright (c) 2016, Intel Corporation. All Rights Reserved. 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 Power Tree Clock Tree, Bank Usage I2C Chain JTAG Chain Clock 1 Clock 2 MAX10 PWR Manager 2 MAX10 PWR Manager 1 On Board USB BLASTER II 2 On Board USB BLASTER II 1 Temperature Sense/FAN NA CFI Flash Memory 10/100/1000 Ethernet PHY Buttons/Switches/LEDs SYSMAX Level shifter/Buffer QSFPDD 2x1 QSFPDD 1x2 QSFPDD 1x1 NA NA OSFP Interface S10 ETile Banks - 8B S10 ETile Banks - 8C S10 ETile Banks - 9A S10 Bottom Banks - 3A/B/C S10 ETile Banks - 9B S10 HTile Banks - 1C/D/E/F PWR - VCC 1 PWR - POWER INPUT S10 GND S10 PWR PWR - VCC 2 S10 ETile Banks - 9C PWR - VCCH_E/1.8V_PRE PWR - 3.3V_PRE PWR - VCCERAM PWR - 5V PWR - VCCT/VCCR PWR - VCCERT Decoupling 2 Decoupling 1 PWR - IO_2V5&3V3&12V PWR - S10_1V8&2V5/2V4 Fast Discharge and V-Sense MXP / 2.4mm Connectors FMC+ 1 FMC+ 2 S10 Banks - SDM S10 Top Banks 2 L/M/N Revision History Pre-Release Schematic DO NOT COPY All A1 REVISION A RELEASE, refer to page 53 for change list 11 Sep. 2017 A1 1 Nov. 2017 A2 All A2 REVISION A RELEASE, refer to Page 53 for change list Title Size Document Number Rev Date: Sheet of 150-0321330-A2 A2 Stratix 10 TX SI Development Kit (6XX-44526R) B 1 53 Sunday, November 05, 2017 Title Size Document Number Rev Date: Sheet of 150-0321330-A2 A2 Stratix 10 TX SI Development Kit (6XX-44526R) B 1 53 Sunday, November 05, 2017 Title Size Document Number Rev Date: Sheet of 150-0321330-A2 A2 Stratix 10 TX SI Development Kit (6XX-44526R) B 1 53 Sunday, November 05, 2017

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Page 1: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

100-0321330-A110-0321330-A120-0321330-A130-0321330-A140-0321330-A150-0321330-A160-0321330-A170-0321330-A180-0321330-A210-0321330-A220-0321330-A320-0321330-A

Project Drawing Numbers: Raw PCB Gerber Files PCB Design Files Assembly Drawing Fab Drawing Schematic Drawing PCB Film Bill of Materials Schematic Design Files Functional Specification PCB Layout Guidelines Assembly Rework

1.

NOTES:

Stratix 10 TX SI Development Kit

DESCRIPTIONREV DATE PAGES

INITIAL REVISION A RELEASEA0 5 June. 2017 All

29

26

27

PAGE DESCRIPTION

5

6

28

PAGE DESCRIPTION

2

Title, Notes, Block Diagram, Rev. History1

3

4

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

30

31

Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203Copyright (c) 2016, Intel Corporation. All Rights Reserved.

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

Power Tree

Clock Tree, Bank Usage

I2C Chain

JTAG Chain

Clock 1

Clock 2

MAX10 PWR Manager 2

MAX10 PWR Manager 1

On Board USB BLASTER II 2

On Board USB BLASTER II 1

Temperature Sense/FAN

NA

CFI Flash Memory

10/100/1000 Ethernet PHY

Buttons/Switches/LEDs

SYSMAX

Level shifter/Buffer

QSFPDD 2x1

QSFPDD 1x2

QSFPDD 1x1

NA

NA

OSFP Interface

S10 ETile Banks - 8B

S10 ETile Banks - 8C

S10 ETile Banks - 9A

S10 Bottom Banks - 3A/B/C

S10 ETile Banks - 9B

S10 HTile Banks - 1C/D/E/F

PWR - VCC 1

PWR - POWER INPUT

S10 GND

S10 PWR

PWR - VCC 2

S10 ETile Banks - 9C

PWR - VCCH_E/1.8V_PRE

PWR - 3.3V_PRE

PWR - VCCERAM

PWR - 5V

PWR - VCCT/VCCR

PWR - VCCERT

Decoupling 2

Decoupling 1

PWR - IO_2V5&3V3&12V

PWR - S10_1V8&2V5/2V4

Fast Discharge and V-Sense

MXP / 2.4mm Connectors

FMC+ 1

FMC+ 2

S10 Banks - SDM

S10 Top Banks 2 L/M/N

Revision History

Pre-Release Schematic DO NOT COPY

All A1 REVISION A RELEASE, refer to page 53 for change list11 Sep. 2017A1

1 Nov. 2017A2 All A2 REVISION A RELEASE, refer to Page 53 for change list

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

1 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

1 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

1 53Sunday, November 05, 2017

Page 2: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

2 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

2 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

2 53Sunday, November 05, 2017

Page 3: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Clock Tree, Bank Usage

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

3 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

3 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

3 53Sunday, November 05, 2017

Page 4: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

I2C Chains

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

4 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

4 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

4 53Sunday, November 05, 2017

Page 5: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

JTAG Chain

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

5 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

5 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

5 53Sunday, November 05, 2017

Page 6: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Clock 1

External Clock InputSlew rates > 0.6 V/ns

LVDS

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

1.8V CMOS3.3V CMOS

Clock freq range 50M-500MDefault 156.25MHzOption 156.25M, 176.5625M, 307.2M, 322.265625MLVDS

IO_2V5

IO_3V3

3.3V_STBY

3.3V_STBY

1.8V_PRE

S10_1V8

IO_2V5

CLK_9C_OSC_156M_N36CLK_9C_OSC_156M_P36

CLK_9B_OSC_156M_N35CLK_9B_OSC_156M_P35

CLK_9A_OSC_156M_N34CLK_9A_OSC_156M_P34

CLK_8C_OSC_156M_N33CLK_8C_OSC_156M_P33

CLK_8B_OSC_156M_N32CLK_8B_OSC_156M_P32

Si547_FS113Si547_FS013

CLK_50M_UB2MAX9

CLK_50M_S1029CLK_50M_SYSMAX13

CLK_50M_PWRMAX11

CLKSEL_156M18

I2C_3V3_SCL 10,12,18I2C_3V3_SDA 10,12,18

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

6 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

6 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

6 53Sunday, November 05, 2017

C4

0.1uF

C10

10uF

R640 DNI

R639DNI

R641 DNI

R4DNI

C13

0.1uF

FB2

120ohm, 800mA12

R710.0K

U1

Si53311

CLKIN1_P14

CLKIN1_N15

CLKIN0_P10

OEA12

OEB13

CLK_SEL8

VDD7

GND6

VREF17

VDDOB19

VDDOA18

DIVA1

CLK3n27

CLK3p28

NC19

CLK2n29

CLK2p30

CLK1n31

CLK1p32

NC016

CLK0n4

CLK0p5

EPAD33

CLK4n25

CLK4p26

CLK5p21CLK5n20

CLKIN0_N11

DIVB24

SFOUTA12 SFOUTA03

SFOUTB022

SFOUTB123

R610.0K

C12

2.2uF

FB1

120ohm, 800mA

12

C11

0.1uF

R637DNI

X2

50MHz

VCC4

GND2

OUT3

EN1

R2 1K

C10.1uF

J11

2345

R638DNI

C1110

1uF

C20.1uF

R655 1K

C7

1uF

R3

10

0

R1100

C8

1uF

J21

2345

J31

2 3 4 5

U2

SL18860DC

CLKIN3 CLKOUT1

8

CLKOUT29

GND1

CLKOUT310

VDD2

OE16

OE_OSC4

OE27

OE35

C5

1uF

C30.1uFR652 1K

R5 1K

R6350

R653 1K

R90

Y1

Si547

OE/NC1

NC/OE2

GND3

OUT4nOUT5VDD6

FS17

FS08

J41

2 3 4 5

X1

50MHz

VCC4

GND2

OUT3

EN1

R1210.0K

C60.1uF

R654 1K

R8

1.00K

R110

R6360

C9

0.1uF

R100

CLKSEL_156M

Si54x_0

Si54x_1

SMA1_CLKpSMA1_CLKn

OSC_CLKnOSC_CLKp

CLKSEL_156M

CLK_50M_UB2MAXCLK_50M_SYSMAX

CLK_50M_S10CLK_50M_PWRMAX

Si547_FS1Si547_FS0

I2C_3V3_SCLI2C_3V3_SDA

Si54x_0Si54x_1

Page 7: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Clock 2

Si5341 Signals

Set VDDIO = VDD

I2C Address 1110 100

Diff clock freq from 10M-750M

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Default LVPECL 156.25 MHz

Default LVPECL 307.2 MHz

Default LVPECL 307.2 MHz

Default LVDS 100 MHz

Default LVDS 125 MHz

Default 1.8V CMOS 125 MHz

Default LVPECL 176.5625 MHz

Default LVPECL 176.562 MHz

Default LVPECL 322.265625 MHz

Default LVPECL 322.265625 MHz

S10_1V8

IO_2V5SI5341_2V5

S10_1V8

SI5341_VDDA

IO_3V3

SI5341_VDD

S10_1V8

S10_1V8

S10_1V8

S10_1V8SI5341_1V8

SI5341_ENn13SI5341_RSTn13

I2C_1V8_SCL13,18,29I2C_1V8_SDA13,18,29

SI5341_INTn13SI5341_LOLn13

CLK_8B_PLL_307M_P32CLK_8B_PLL_307M_N32

CLK_1E_PLL_307M_P31CLK_1E_PLL_307M_N31

FPGA_OSC_CLK_128MAX_OSC_CLK_113

CLK_BOT_PLL_100M_P30CLK_BOT_PLL_100M_N30

CLK_9A_PLL_176M_P34CLK_9A_PLL_176M_N34

CLK_8C_PLL_176M_P33CLK_8C_PLL_176M_N33

CLK_9C_PLL_322M_P36CLK_9C_PLL_322M_N36

CLK_9B_PLL_322M_P35CLK_9B_PLL_322M_N35

CLK_TOP_PLL_125M_P29CLK_TOP_PLL_125M_N29

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

7 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

7 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

7 53Sunday, November 05, 2017

C380.1uFL4

742792780

C35 0.1uF

C28

1uF

C19

1uF

R22DNI

R240R180

R2620

R31DNI

TP53

C29

1uF

R17 4.70K

C36 0.1uF

C27

1uF

Y2 50.00MHz

13

24

R280

R21DNI

C37 DNI

R15 4.70K

C20

1uF

L1

742792780

C26

1uF

C34 DNI

R16 1.00K

R300

R656DNI

J61

2 3 4 5

C15

1uF

J7

DNI

123

C31 0.1uF

R19

10.0K

U3

Si5341A-D07772-GM

VDD032

VDD146

VDD260

VDDA13

SDA_SDIO18

SCLK16

A1_SDO17

A0_CSB19

I2C_SEL39

OEB11

IN_SEL03

IN_SEL14

RSTB6

IN063

IN0_N64

IN11

IN1_N2

IN214

IN2_N15

FBIN61

FBIN_N62

X17

XA8

XB9

X210

ePAD65

VDDO022

VDDO126

VDDO229

VDDO333

OUT024

OUT0B23

OUT1B27OUT128

OUT2B30OUT231

OUT335

OUT3B34

INTRB12 LOLB47 SYNCB

5

RS

VD

120

OUT438

OUT4B37

OUT542

OUT5B41

OUT645

OUT6B44

OUT751

OUT7B50

OUT854

OUT8B53

OUT959

OUT9B58

FDEC25 FINC48

RS

VD

221

RS

VD

355

RS

VD

456

VDDO436

VDDO540

VDDO643

VDDO749

VDDO852

VDDO957

C390.1uF

C25

1uF

C16

1uF

R13 1.00K

C18

1uF

R29DNI

L3

742792780

R14 1.00K

C32 0.1uF

C22

1uF

R20

10.0K

R32

10.0K

C33 0.1uF

C23

1uF

C17

1uF

R27DNI

R33

10.0K

C21

1uF

C24

1uF

C14

1uF

C30

1uF

R230

R2520

J51

2 3 4 5

L2

742792780

SI5341_XB

SI5341_XA

SI5341_X

SI5341_INTnSI5341_LOLn

SI5341_IN_SEL1SI5341_IN_SEL0SI5341_ENn

SI5341_A0SI5341_A1I2C_1V8_SCLI2C_1V8_SDA

SI5341_I2C_SEL

SI5341_IN_SEL0SI5341_IN_SEL1

SI5341_A0SI5341_A1

SI5341_RSTn

I2C_1V8_SCLI2C_1V8_SDA

SI5341_OUT9pSI5341_OUT9n

SI5341_OUT5pSI5341_OUT5n

SI5341_OUT7pSI5341_OUT7n

SI5341_OUT8pSI5341_OUT8n

SI5341_OUT6pSI5341_OUT6n

Page 8: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

On Board USB BLASTER II 1

USB PHY

JTAG INTERFACE

Put on Bottom Layer

FMC+

PLACE CLOSE CY7C68013

Route as matched pair on Top layer

UB2 INTERFACE with PWR MGMT

UB2 doesn't drive S10 if FPGA_PWRGD is low

UB2 power recycle FPGA rails

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Long pin and fool proof header

FX2_PD0-3 ARE NOT SWAPPABLE!

3.3V_PRE 3.3V_PRE

3.3V_PRE

3.3V_PRE

3.3V_PRE3.3V_PRE

3.3V_PRE

3.3V_PRE

1.8V_PRE

3.3V_PRE

FATDO27FATDI27FATMS27FATCK27

FPGA_RECYCLE10

FPGA_PWRGD10

USB_T_CLK9

FX2_RESETn9

FAPRSNT_N10,13,27

MAX_IO[9:0]9,10,11

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

8 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

8 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

8 53Sunday, November 05, 2017

R48 10.0K

C42

12pF

R4310.0K

R4110.0K

R380

CN1CN-USB

1234

5 6

C47

0.1uF

U5

MAX811

GND1

RESET2

VCC4

MR3

R441K

R39 10.0K

C46

0.1uF

U7

TPD2EUSB30

D-2D+1

GND3

MAX10 10M04SCU169

U4B

IO_1A_D1/DIFFIO_RX_L1ND1

IO_1A_C2/DIFFIO_RX_L1PC2

IO_1A_E3/DIFFIO_RX_L3NE3

IO_1A_E4/DIFFIO_RX_L3PE4

IO_1A_C1/DIFFIO_RX_L5NC1

IO_1A_B1/DIFFIO_RX_L5PB1

IO_1A_F1/DIFFIO_RX_L7NF1

IO_1A_E1/DIFFIO_RX_L7PE1

IO_1B_F4/DIFFIO_RX_L14NF4

IO_1B_G4/DIFFIO_RX_L14PG4

IO_1B_H2/DIFFIO_RX_L16NH2

IO_1B_H3/DIFFIO_RX_L16PH3

R59 10.0K

C50

0.1uF

R40

20.0K

C45

0.1uF

J9

DNI

11

33

55

77

22

44

66

88

99

1010

U6

CY7C68013A_QFN

RDY01

RDY12

XTALIN5

AVCC03

DMINUS9

AGND06

VCC011

GND012

PD752

CLKOUT54

XTALOUT4

AVCC17

DPLUS8

AGND110

IFCLK13

RESERVED14

PD550PD449

PD651

SCL15

SDA16

PB018

GND126

GND228

GND341

PB119

PB321PB220

VCC117

VCC227

PB624PB523PB422

PD348PD247

PA740

PA437

PA134

PB725

PD146

WAKEUP44

PA639

GND453

VCC443

PA336

CTL130CTL029

PD045

RESET42

PA538

GND556

VCC555

PA235

PA033

CTL231

VCC332

EXPOSED_PAD57

R4610.0K

R57 1.00K

C41DNI

R37 2.00K

R471K

R35100K

R54 10.0K

MAX10 10M04SCU169

U4C

IO_2_M3/PLL_L_CLKOUTN/DIFFIO_RX_L27NM3

IO_2_L3/PLL_L_CLKOUTP/DIFFIO_RX_L27PL3

IO_2_J1/DIFFIO_RX_L19NJ1

IO_2_J2/DIFFIO_RX_L19PJ2

IO_2_M1/DIFFIO_RX_L21NM1

IO_2_M2/DIFFIO_RX_L21PM2

IO_2_L2L2

IO_2_K1/DIFFIO_RX_L28NK1

IO_2_K2/DIFFIO_RX_L28PK2

R56 10.0K

C40 0.1uF

C43

0.1uF

C51

0.1uF

R50 DNI

R34 0

R58 10.0K

C49

0.1uF

R520

MAX10 10M04SCU169

U4D

IO_3_L5/DIFFIO_TX_RX_B1NL5

IO_3_M4/DIFFIO_RX_B2NM4

IO_3_L4/DIFFIO_TX_RX_B1PL4

IO_3_M5/DIFFIO_RX_B2PM5

IO_3_K5/DIFFIO_TX_RX_B3NK5

IO_3_N4/DIFFIO_RX_B4NN4

IO_3_J5/DIFFIO_TX_RX_B3PJ5

IO_3_N5/DIFFIO_RX_B4PN5

IO_3_N6/DIFFIO_TX_RX_B5NN6

IO_3_N7/DIFFIO_RX_B6NN7

IO_3_M7/DIFFIO_TX_RX_B5PM7

IO_3_N8/DIFFIO_RX_B6PN8

IO_3_J6/DIFFIO_TX_RX_B7NJ6

IO_3_M8/DIFFIO_RX_B8NM8

IO_3_K6/DIFFIO_TX_RX_B7PK6

IO_3_M9/DIFFIO_RX_B8PM9

IO_3_J7/DIFFIO_TX_RX_B9NJ7

IO_3_K7/DIFFIO_TX_RX_B9PK7

IO_3_N12N12

IO_3_M13/DIFFIO_TX_RX_B10NM13

IO_3_N10/DIFFIO_RX_B11NN10

IO_3_M12/DIFFIO_TX_RX_B10PM12

IO_3_N9/DIFFIO_RX_B11PN9

IO_3_M11/DIFFIO_TX_RX_B12NM11

IO_3_L11/DIFFIO_TX_RX_B12PL11

IO_3_J8/DIFFIO_TX_RX_B14NJ8

IO_3_K8/DIFFIO_TX_RX_B14PK8

IO_3_M10/DIFFIO_TX_RX_B16NM10

IO_3_L10/DIFFIO_TX_RX_B16PL10

C53 DNI

C48

0.1uF

R510

R4510.0K

Y3

24.00MHz

1 3

24

R60 10.0K

R36 2.00K

R530

MAX10 10M04SCU169

U4I

IO_1B_E5/JTAGEN/DIFFIO_RX_L9PE5

IO_1B_G1/TMS/DIFFIO_RX_L11NG1

IO_1B_G2/TCK/DIFFIO_RX_L11PG2

IO_1B_F5/TDI/DIFFIO_RX_L12NF5

IO_1B_F6/TDO/DIFFIO_RX_L12PF6

IO_8_B9/DEV_CLRN/DIFFIO_RX_T16NB9

IO_8_D8/DEV_OE/DIFFIO_RX_T18PD8

IO_8_D7/BOOT_SELD7

IO_8_D6/CRC_ERROR/DIFFIO_RX_T22ND6

IO_8_C4/NSTATUS/DIFFIO_RX_T24PC4

IO_8_C5/CONF_DONE/DIFFIO_RX_T24NC5

INPUT_ONLY_8_E7/NCONFIGE7

C44

12pF

J8

HDR2X5

2468

10

13579

C52

0.1uF

R490

R4210.0K

R55 10.0K

FX2_D_NFX2_D_P

VBUS_5V

24M_XTALIN24M_XTALOUT

FX2_RESETn

FX2_SDA MAX_SDA

FX2_FLAGB

FX2_PA2

FX2_SLWRnFX2_SLRDn

FX2_WAKEUPVBUS_5VUSB_T_CLK

FX2_PD2FX2_PD0

FX2_PD3

FX2_PD1

USB_MAX_TCK

USB_MAX_TMSUSB_MAX_TDO

EXT_JTAG_TDI

EXT_JTAG_TCKEXT_JTAG_TMS

USB_MAX_TDI

FX2_PA0FX2_PA1FX2_PA2FX2_PA3FX2_PA4FX2_PA5FX2_PA6FX2_PA7

FX2_PB0FX2_PB1FX2_PB2FX2_PB3FX2_PB4FX2_PB5FX2_PB6FX2_PB7

FX2_PD0FX2_PD1FX2_PD2FX2_PD3FX2_PD4FX2_PD5FX2_PD6FX2_PD7

FX2_SLWRnFX2_SLRDn

FX2_FLAGCFX2_FLAGBFX2_FLAGA

FX2_WAKEUP

FX2_SDAFX2_SCLFX2_RESETn

FX2_SCL

FX2_PB2FX2_PB3

FX2_PD5

FX2_PD7FX2_PD6

FX2_PD4

FX2_FLAGAFX2_FLAGC

MAX_SDA

FX2_PB0

FX2_PB7

USB_MAX_TCKUSB_MAX_TMS

USB_MAX_TDIUSB_MAX_TDO

FAPRSNT_N

BLASTER_DISn

EXT_JTAG_TDI

EXT_JTAG_TDOEXT_JTAG_TCK

EXT_JTAG_TMS

FPGA_RECYCLEFPGA_PWRGD

MAX_IO9

FATMS

BLASTER_DISn

FATDIFATCKFATDO

EXT_JTAG_TDO

EXT_JTAG_TDIEXT_JTAG_TMSEXT_JTAG_TCK

FATMSFATDIFATCK

FX2_PB1

FX2_PB5

FX2_PB4

FX2_PB6

FX2_PA6

FX2_PA7

FX2_PA4

FX2_PA5

FX2_PA3

FX2_PA0

FX2_PA1

MAX_IO2

MAX_IO4

MAX_IO0MAX_IO1

MAX_IO7

MAX_IO3

MAX_IO5MAX_IO6

Page 9: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

On Board USB BLASTER II 2, JTAG ChainUSB SideBus with S10

UB2 INTERFACE with SYSMAX

JTAG INTERFACE

PLACE CLOSE MAX 10 PWR PIN

Default bypass FMC nodeON = Device JTAG BypassOFF = Device JTAG Enable

UB2 INTERFACE with PWR MGMT

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

USB PHY

1.8V_PRE

3.3V_PRE

1.8V_PRE

3.3V_PRE

MAX10VCCA

S10_1V8

IO_2V5

3.3V_PRE MAX10VCCA

MAX10VCCA

1.8V_PRE

3.3V_PRE

S10_1V8

S10_1V8

USB_DATA[7:0]29

USB_ADDR[1:0]29

USB_FULL29USB_EMPTY29USB_SCL29USB_SDA29

USB_RESETn29USB_OEn29USB_RDn29USB_WRn29

USB_CFG[14:0]13

S10_JTAG_TCK28S10_JTAG_TMS28

S10_JTAG_TDI28

SYSMAX_JTAG_TCK13SYSMAX_JTAG_TMS13

SYSMAX_JTAG_TDI13

S10_JTAG_TDO28

SYSMAX_JTAG_TDO13

USB_T_CLK8

FX2_RESETn8

MAX_IO[9:0]8,10,11

USB_FPGA_CLK29

USB_SYSMAX_CLK13

CLK_50M_UB2MAX6

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

9 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

9 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

9 53Sunday, November 05, 2017

R84 DNI

R71160

C73

0.1uF

MAX10 10M04SCU169

U4G

IO_8_C10/DIFFIO_RX_T14PC10

IO_8_A8/DIFFIO_RX_T15PA8

IO_8_C9/DIFFIO_RX_T14NC9

IO_8_A9/DIFFIO_RX_T15NA9

IO_8_B10/DIFFIO_RX_T16PB10

IO_8_A10/DIFFIO_RX_T17PA10

IO_8_A11/DIFFIO_RX_T17NA11

IO_8_E8/DIFFIO_RX_T18NE8

IO_8_A7/DIFFIO_RX_T19PA7

IO_8_A6/DIFFIO_RX_T19NA6

IO_8_B6/DIFFIO_RX_T20PB6

IO_8_A4/DIFFIO_RX_T21PA4

IO_8_B5/DIFFIO_RX_T20NB5

IO_8_A3/DIFFIO_RX_T21NA3

IO_8_E6/DIFFIO_RX_T22PE6

IO_8_B3/DIFFIO_RX_T23PB3

IO_8_B4/DIFFIO_RX_T23NB4

IO_8_A5/DIFFIO_RX_T25PA5

IO_8_A2/DIFFIO_RX_T26PA2

IO_8_B2/DIFFIO_RX_T26NB2

C57

0.1uF

C64

0.1uF

R66

10.0K

R68 10.0K

C76

0.1uF

R62 10.0K

R634

10.0K

MAX10 10M04SCU169

U4A

VCCIO1A__F2F2

VCCIO1B__G3G3

VCCIO2__K3K3

VCCIO2__J3J3

VCCIO3__L8L8

VCCIO3__L7L7

VCCIO3__L6L6

VCCIO5__J11J11

VCCIO5__H11H11

VCCIO6__G11G11

VCCIO6__F11F11

VCCIO8__C8C8

VCCIO8__C7C7

VCCIO8__C6C6

VCCA3__D3D3

VCCA1__K4K4

VCCA2__D10D10

VCCA3__D4D4

VCCA4__K9K9

VCC_ONE__H7H7

VCC_ONE__G8G8

VCC_ONE__G6G6

VCC_ONE__F7F7

D1

LED_WE1206

R76 160

R6410.0K

C62

0.1uF

C66

0.1uF

C59

0.1uF

OPEN

SW1

TDA04H0SB1

12345

678

MAX10 10M04SCU169

U4F

IO_6_F12/DIFFIO_RX_R18PF12

IO_6_E12/DIFFIO_RX_R18NE12

IO_6_C13C13

IO_6_F8/DIFFIO_RX_R27PF8

IO_6_B12/DIFFIO_RX_R28PB12

IO_6_E9/DIFFIO_RX_R27NE9

IO_6_B11/DIFFIO_RX_R28NB11

IO_6_C12/DIFFIO_RX_R29PC12

IO_6_B13/DIFFIO_RX_R30PB13

IO_6_C11/DIFFIO_RX_R29NC11

IO_6_A12/DIFFIO_RX_R30NA12

IO_6_E10/DIFFIO_RX_R31PE10

IO_6_D9/DIFFIO_RX_R31ND9

IO_6_D12/DIFFIO_RX_R33PD12

IO_6_D11/DIFFIO_RX_R33ND11

R65

10.0K

C74

0.1uF

Q2FDV305N

R69 160R70 1.00k

C58

0.1uF

C56

10uF

C54

10uF

C65

0.1uF

C75

0.1uF

R73160

C70

0.1uF

R72 160

R75160

C77

0.1uF

D2

LED_WE1206

C60

0.1uF

R780

Q3FDV305N

C78

0.1uF

D3

LED_WE1206

C63

0.1uF

R82 1.00k

R790

Q4FDV305N

MAX10 10M04SCU169

U4E

IO_5_K10/DIFFIO_RX_R1PK10

IO_5_K11/DIFFIO_RX_R2PK11

IO_5_J10/DIFFIO_RX_R1NJ10

IO_5_L12/DIFFIO_RX_R2NL12

IO_5_K12/DIFFIO_RX_R7PK12

IO_5_L13L13

IO_5_J12/DIFFIO_RX_R7NJ12

IO_5_J9/DIFFIO_RX_R8PJ9

IO_5_J13/DIFFIO_RX_R9PJ13

IO_5_H10/DIFFIO_RX_R8NH10

IO_5_H13/DIFFIO_RX_R9NH13

IO_5_H9/DIFFIO_RX_R10PH9

IO_5_G13/DIFFIO_RX_R11PG13

IO_5_H8/DIFFIO_RX_R10NH8

IO_5_G12/DIFFIO_RX_R11NG12

C67

0.1uF

R80 1.00k

D4

LED_WE1206R77160

R61 1.00k

C69

0.1uF

R81 1.00k

C68

10uF

MAX10 10M04SCU169

U4H

IO_2_G5/CLK0N/DIFFIO_RX_L18NG5

IO_2_H6/CLK0P/DIFFIO_RX_L18PH6

IO_2_H5/CLK1N/DIFFIO_RX_L20NH5

IO_2_H4/CLK1P/DIFFIO_RX_L20PH4

IO_2_N2/DPCLK0/DIFFIO_RX_L22NN2

IO_2_N3/DPCLK1/DIFFIO_RX_L22PN3

IO_6_G9/CLK2P/DIFFIO_RX_R14PG9

IO_6_G10/CLK2N/DIFFIO_RX_R14NG10

IO_6_F13/CLK3P/DIFFIO_RX_R16PF13

IO_6_E13/CLK3N/DIFFIO_RX_R16NE13

IO_6_F9/DPCLK3/DIFFIO_RX_R26PF9

IO_6_F10/DPCLK2/DIFFIO_RX_R26NF10

IO_1B_H1/VREFB1N0H1

IO_2_L1/VREFB2N0L1

IO_3_N11/VREFB3N0N11

IO_5_K13/VREFB5N0K13

IO_6_D13/VREFB6N0D13

IO_8_B7/VREFB8N0B7

R74 160

C61

0.1uF

MAX10 10M04SCU169

U4J

GND__A1A1

GND__A13A13

GND__B8B8

GND__C3C3

GND__D2D2

GND__D5D5

GND__E11E11

GND__E2E2

GND__F3F3

GND__G7G7

GND__H12H12

GND__J4J4

GND__L9L9

GND__M6M6

GND__N1N1

GND__N13N13

C55

0.1uF

R83 1.00k

C71

0.1uF

R63 10.0K

R67 10.0K

Q1FDV305N

L5

BLM15AG221SN1300mA

C72

0.1uF

C79

0.1uF

USB_DATA3

FAJTAG_BYPASSnSYSMAXJTAG_BYPASSnS10JTAG_BYPASSn

FMCA_JTAG_MASTERn

USB_SCLUSB_SDAUSB_FULLUSB_EMPTY

USB_T_CLK

SYSMAX_JTAG_TDI

SYSMAX_JTAG_TMSSYSMAX_JTAG_TCK

SYSMAX_JTAG_TDO

SC_TXSC_RXJTAG_RXJTAG_TX

USB_CFG6USB_CFG5

USB_CFG9USB_CFG10USB_CFG11USB_CFG12USB_CFG13USB_CFG14

USB_CFG7USB_CFG8

USB_CFG4

USB_CFG0USB_CFG1USB_CFG2USB_CFG3

SYSMAXJTAG_BYPASSn

FMCA_JTAG_MASTERn

FAJTAG_BYPASSn

S10JTAG_BYPASSn

MAX_IO8

S10_JTAG_TCK

USB_DATA6

S10_JTAG_TDIUSB_SDA

USB_SCL

S10_JTAG_TMS

USB_FULL

S10_JTAG_TDO

USB_EMPTYUSB_OEn

USB_RDn

USB_RESETn

USB_DATA2USB_WRn

USB_DATA0USB_DATA1

USB_DATA5

USB_ADDR1

USB_ADDR0

USB_DATA7USB_DATA4

FX2_RESETn

USB_SYSMAX_CLKUSB_FPGA_CLK

CLK_50M_UB2MAX

JTAG_TX

SC_RX

SC_TX

JTAG_RX

UBMAX10_DIP

UBMAX10_DIP

Page 10: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Voltage Sense Input

I2C chain

MAX 10 PWR Manager 1

PWR GOOD

UB2/PWR MGMT INTERFACE

Slave Address 0101 111

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

FMC+

UB2 INTERFACE with PWR MGMT

Reset FPGA by nCONFIGas power down start

Monitor Non-Digital Rails1: IO_2V52: IO_3V33: ETHE_1V24: 2V45: S10_2V56: S10_1V87: 12V8: IO_12V9: 12V_IN

POWER GOOD: VCC,VCCERAM,VCCT,VCCR,VCCH_E,VCCERT,12V_IN,1V8_PRE,3V3_PRE,IO_2V5,E1V2,FMC,12V,IO_12V

Power down system as FPGA temperature alert

3.3V_STBY

3.3V_STBY

MAX10_VCCA

MAX10_VCCIO1A

3.3V_STBYMAX10_VCCA

3.3V_STBY MAX10_VCCIO1A

A_GND

A_GND

3.3V_STBY

A_GND

A_GND

MAX_IO[9:0]8,9,11

VCCERAM_PWRGD42VCCT_PWRGD43VCCR_PWRGD43VCCH_E_PWRGD45VCCERT_PWRGD44

3V3PRE_PWRGD46IO2V5_PWRGD49

FAPG_M2C27FAPG_C2M27

E1V2_VSENSE16

S101V8_VSENSE5212V_VSENSE39IO12V_VSENSE4912VIN_VSENSE39

12V_VSENSE_GND39S101V8_VSENSE_GND52

IO12V_VSENSE_GND4912VIN_VSENSE_GND39

I2C_3V3_SCL6,12,18I2C_3V3_SDA6,12,18

FPGA_nCONFIG13,28

FAPRSNT_N8,13,27

FPGA_RECYCLE8START39FPGA_PWRGD8

12VIN_PWRFAILn39

VCC_PWRFAULTn40,41VCC_PWRGD40,41

VCCERT_PWRFAULTn44

S102V5_VSENSE52

S102V5_VSENSE_GND52

IO2V5_VSENSE49

IO2V5_VSENSE_GND49

E1V2_VSENSE_GND16

IO3V3_VSENSE49

IO3V3_VSENSE_GND49

S102V4_VSENSE51

S102V4_VSENSE_GND51

1V8PRE_PWRGD45

E1V2_PWRGD16

12V_PWRGD39IO12V_PWRGD49

TEMP_ALERTn12,13OVERTEMPn12,13OVERTEMP12FAN_RPM12

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

10 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

10 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

10 53Sunday, November 05, 2017

V12RSNS

1SNS

2

C86 1pF

C108

0.1uF

FB3

220ohm, 2.0A1 2

R92 10

MAX10 10M16SA U169

U8B

IO_1A_D1/ADC1IN1/DIFFIO_RX_L1ND1

IO_1A_C2/ADC1IN2/DIFFIO_RX_L1PC2

IO_1A_E3/ADC1IN3/DIFFIO_RX_L3NE3

IO_1A_E4/ADC1IN4/DIFFIO_RX_L3PE4

IO_1A_C1/ADC1IN5/DIFFIO_RX_L5NC1

IO_1A_B1/ADC1IN6/DIFFIO_RX_L5PB1

IO_1A_F1/ADC1IN7/DIFFIO_RX_L7NF1

IO_1A_E1/ADC1IN8/DIFFIO_RX_L7PE1

IO_1B_F4/DIFFIO_RX_L14NF4

IO_1B_G4/DIFFIO_RX_L14PG4

IO_1B_H2/DIFFIO_RX_L16NH2

IO_1B_H3/DIFFIO_RX_L16PH3

C102

0.1uF

R87 10

C87 1pF

V4RSNS

1SNS

2

C101

0.1uF

MAX10 10M16SA U169

U8E

IO_5_K10/RUP/DIFFIO_RX_R1PK10

IO_5_J10/RDN/DIFFIO_RX_R1NJ10

IO_5_K11/DIFFIO_RX_R2PK11

IO_5_L12/DIFFIO_RX_R2NL12

IO_5_K12/DIFFIO_RX_R11PK12

IO_5_L13L13

IO_5_J12/DIFFIO_RX_R11NJ12

IO_5_J9/DIFFIO_RX_R12PJ9

IO_5_J13/DIFFIO_RX_R13PJ13

IO_5_H10/DIFFIO_RX_R12NH10

IO_5_H13/DIFFIO_RX_R13NH13

IO_5_H9/DIFFIO_RX_R14PH9

IO_5_G13/DIFFIO_RX_R15PG13

IO_5_H8/DIFFIO_RX_R14NH8

IO_5_G12/DIFFIO_RX_R15NG12

C100

0.1uF

MAX10 10M16SA U169

U8J

REFGND__E2E2

ADC_VREF__D3D3

ANAIN1__D2D2

R93 10

C82 1pF

V6RSNS

1SNS

2

R940

C89

10uF

C98

10uF

V7RSNS

1SNS

2

R88 10

MAX10 10M16SA U169

U8C

IO_2_M3/PLL_L_CLKOUTN/DIFFIO_RX_L31NM3

IO_2_L3/PLL_L_CLKOUTP/DIFFIO_RX_L31PL3

IO_2_J1/DIFFIO_RX_L21NJ1

IO_2_J2/DIFFIO_RX_L21PJ2

IO_2_M1/DIFFIO_RX_L23NM1

IO_2_M2/DIFFIO_RX_L23PM2

IO_2_L2L2

IO_2_K1/DIFFIO_RX_L32NK1

IO_2_K2/DIFFIO_RX_L32PK2

C83 1pF

C97

10uF

C80 1pF

L6

BLM15AG221SN1300mA

V8RSNS

1SNS

2

MAX10 10M16SA U169

U8G

IO_8_A8/DIFFIO_RX_T27PA8

IO_8_A9/DIFFIO_RX_T27NA9

IO_8_B10/DIFFIO_RX_T28PB10

IO_8_A10/DIFFIO_RX_T29PA10

IO_8_A11/DIFFIO_RX_T29NA11

IO_8_E8/DIFFIO_RX_T30NE8

IO_8_A7/DIFFIO_RX_T31PA7

IO_8_A6/DIFFIO_RX_T31NA6

IO_8_B6/DIFFIO_RX_T32PB6

IO_8_A4/DIFFIO_RX_T33PA4

IO_8_B5/DIFFIO_RX_T32NB5

IO_8_A3/DIFFIO_RX_T33NA3

IO_8_E6/DIFFIO_RX_T34PE6

IO_8_B3/DIFFIO_RX_T35PB3

IO_8_B4/DIFFIO_RX_T35NB4

IO_8_A5A5

IO_8_A2/DIFFIO_RX_T38PA2

IO_8_B2/DIFFIO_RX_T38NB2

V9RSNS

1SNS

2C94

0.1uF

C95

0.1uF

C93

0.1uF

R89 10

MAX10 10M16SA U169

U8K

GND__A1A1

GND__A13A13

GND__B8B8

GND__C3C3

GND__D5D5

GND__E11E11

GND__F3F3

GND__G7G7

GND__H12H12

GND__J4J4

GND__L9L9

GND__M6M6

GND__N1N1

GND__N13N13

C96

0.1uF

C103

0.1uF

C92

0.1uF

C88 1pF

C84 1pF

C99

0.1uF

MAX10 10M16SA U169

U8F

IO_6_F12/DIFFIO_RX_R22PF12

IO_6_E12/DIFFIO_RX_R22NE12

IO_6_C13C13

IO_6_F8/DIFFIO_RX_R31PF8

IO_6_B12/DIFFIO_RX_R32PB12

IO_6_E9/DIFFIO_RX_R31NE9

IO_6_B11/DIFFIO_RX_R32NB11

IO_6_C12/DIFFIO_RX_R33PC12

IO_6_B13/DIFFIO_RX_R34PB13

IO_6_C11/DIFFIO_RX_R33NC11

IO_6_A12/DIFFIO_RX_R34NA12

IO_6_E10/DIFFIO_RX_R35PE10

IO_6_D9/DIFFIO_RX_R35ND9

IO_6_D12/DIFFIO_RX_R37PD12

IO_6_D11/DIFFIO_RX_R37ND11

R85 10

C90

0.1uF

V11RSNS

1SNS

2

R90 10

C104

0.1uF

MAX10 10M16SA U169

U8A

VCCIO1A__F2F2

VCCIO1B__G3G3

VCCIO2__K3K3

VCCIO2__J3J3

VCCIO3__L8L8

VCCIO3__L7L7

VCCIO3__L6L6

VCCIO5__J11J11

VCCIO5__H11H11

VCCIO6__G11G11

VCCIO6__F11F11

VCCIO8__C8C8

VCCIO8__C7C7

VCCIO8__C6C6

VCCA1__K4K4

VCCA2__D10D10

VCCA3__D4D4

VCCA4__K9K9

VCC_ONE__H7H7

VCC_ONE__G8G8

VCC_ONE__G6G6

VCC_ONE__F7F7

C105

0.1uF

C81 1pF

C106

0.1uF

C85 1pF

V5RSNS

1SNS

2

R86 10

C107

0.1uF

R91 10

C91

0.1uFV10

RSNS1

SNS2

FB4

220ohm, 2.0A1 2

E1V2_VSENSE_GND

S102V4_VSENSE_GND

IO12V_VSENSE_GND

S102V5_VSENSE_GND

S101V8_VSENSE_GND

12V_VSENSE_GND

E1V2_VSENSE

S102V4_VSENSE

S102V5_VSENSE

S101V8_VSENSE

IO12V_VSENSE

MAX_IO0

I2C_3V3_SCLI2C_3V3_SDA

MAX_IO8

12VIN_VSENSE

12VIN_VSENSE_GND

MAX_IO1MAX_IO2MAX_IO3MAX_IO4MAX_IO5MAX_IO6MAX_IO7

FPGA_nCONFIGFAPRSNT_N

FPGA_RECYCLEFPGA_PWRGD

START

12V_VSENSE

VCC_PWRFAULTnVCC_PWRGDVCCERAM_PWRGD

VCCR_PWRGDVCCT_PWRGD

VCCERT_PWRGDVCCERT_PWRFAULTn

IO3V3_VSENSE

IO2V5_VSENSE

IO2V5_VSENSE_GND

IO3V3_VSENSE_GND

12VIN_PWRFAILn

E1V2_PWRGDFAPG_C2MFAPG_M2C

TEMP_ALERTn

OVERTEMPnOVERTEMPFAN_RPM

VCCH_E_PWRGD1V8PRE_PWRGD3V3PRE_PWRGDIO2V5_PWRGD12V_PWRGDIO12V_PWRGD

Page 11: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MAX10 PWR Manager 2

Put on Bottom LayerPWRMAX enter debug mode and all rails are sequence off if PWR_DISABLEn is low

Default on-board powerON: External PowerOFF: On-board Power

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

VCC,VCCERAM,VCCT,VCCR,VCCH_E,VCCERT,S10_1V8,S10_2V512V,1V8PRE,3V3PRE,IO3V3,IO2V5,S102V4,IO12V

Disable on-board regulator before use external supply:VCC,VCCERAM,VCCT,VCCR,VCCH_E,VCCERT

BEFORE PWR MAX ENTER USE MODE, ALL ENABLE are LOW

3.3V_STBY

3.3V_STBY

3.3V_STBY

3.3V_STBY

3.3V_STBY3.3V_STBY

3.3V_STBY

CLK_50M_PWRMAX6

EN_VCC40,41,52EN_VCCERAM42,52EN_VCCT43,52EN_VCCR43,52EN_VCCH_E45,52EN_VCCERT44,52EN_S101V848,52

EN_3V3PRE46EN_IO3V349,52EN_IO2V549,52

PWRMAX_DIP[2:0]18

MAX_IO[9:0]8,9,10

EN_S102V548,52

EN_12V39EN_1V8PRE45

EN_S102V448,52EN_IO12V49EN_E1V216

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

11 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

11 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

11 53Sunday, November 05, 2017

R111 49.9

R123 49.9

R110 49.9R112 49.9

MAX10 10M16SA U169

U8D

IO_3_L5/DIFFIO_TX_RX_B1NL5

IO_3_M4/DIFFIO_RX_B2NM4

IO_3_L4/DIFFIO_TX_RX_B1PL4

IO_3_M5/DIFFIO_RX_B2PM5

IO_3_K5/DIFFIO_TX_RX_B3NK5

IO_3_N4/DIFFIO_RX_B4NN4

IO_3_J5/DIFFIO_TX_RX_B3PJ5

IO_3_N5/DIFFIO_RX_B4PN5

IO_3_N6/DIFFIO_TX_RX_B5NN6

IO_3_N7/DIFFIO_RX_B6NN7

IO_3_M7/DIFFIO_TX_RX_B5PM7

IO_3_N8/DIFFIO_RX_B6PN8

IO_3_J6/DIFFIO_TX_RX_B13NJ6

IO_3_M8/DIFFIO_RX_B14NM8

IO_3_K6/DIFFIO_TX_RX_B13PK6

IO_3_M9/DIFFIO_RX_B14PM9

IO_3_J7/DIFFIO_TX_RX_B15NJ7

IO_3_K7/DIFFIO_TX_RX_B15PK7

IO_3_N12N12

IO_3_M13/DIFFIO_TX_RX_B16NM13

IO_3_N10/DIFFIO_RX_B17NN10

IO_3_M12/DIFFIO_TX_RX_B16PM12

IO_3_N9/DIFFIO_RX_B17PN9

IO_3_M10/DIFFIO_TX_RX_B22NM10

IO_3_L10/DIFFIO_TX_RX_B22PL10

J10

TSM-105-01-T-DV-TR

11

33

55

77

22

44

66

88

99

1010

U10

IDTQS3861

NC1

A02

A13

A24

A35

A46

A57

A68

A79

A810

A911

GND12

BE23

VCC24

B022

B121

B220

B319

B418

B517

B616

B715

B814

B913

R109 49.9

MAX10 10M16SA U169

U8I

IO_1B_E5/JTAGENE5

IO_1B_G1/TMS/DIFFIO_RX_L11NG1

IO_1B_G2/TCK/DIFFIO_RX_L11PG2

IO_1B_F5/TDI/DIFFIO_RX_L12NF5

IO_1B_F6/TDO/DIFFIO_RX_L12PF6

IO_8_B9/DEV_CLRN/DIFFIO_RX_T28NB9

IO_8_D8/DEV_OE/DIFFIO_RX_T30PD8

IO_8_D7/CONFIG_SELD7

INPUT_ONLY_8_E7/NCONFIGE7

IO_8_D6/CRC_ERROR/DIFFIO_RX_T34ND6

IO_8_C4/NSTATUS/DIFFIO_RX_T36PC4

IO_8_C5/CONF_DONE/DIFFIO_RX_T36NC5

R114 49.9

R10249.9

R113 49.9R116 49.9R115 49.9

R96 10.0K

R13110.0K

R118 49.9R117 49.9

R9949.9

R130 1.00K

R120 49.9

U9

IDTQS3861

NC1

A02

A13

A24

A35

A46

A57

A68

A79

A810

A911

GND12

BE23

VCC24

B022

B121

B220

B319

B418

B517

B616

B715

B814

B913

RP41K

1 2 3 45678

R119 49.9

R10449.9

R10349.9

R122 49.9

C109

0.1uF

R10049.9

RP11K

1 2 3 45678

R95 10.0K

R129 1.00K

R13210.0K

RP21K

1 2 3 45678

R121 49.9

R97 10.0K

R10149.9

D5Amber_LED

R124 49.9

R128

1.00K

R105 160

R127

1.00K

R126 49.9

OPEN

SW2

TDA04H0SB1

1234 5

678

RP31K

1 2 3 45678

MAX10 10M16SA U169

U8H

IO_2_G5/CLK0N/DIFFIO_RX_L20NG5

IO_2_H6/CLK0P/DIFFIO_RX_L20PH6

IO_2_H5/CLK1N/DIFFIO_RX_L22NH5

IO_2_H4/CLK1P/DIFFIO_RX_L22PH4

IO_2_N2/DPCLK0/DIFFIO_RX_L24NN2

IO_2_N3/DPCLK1/DIFFIO_RX_L24PN3

IO_3_M11/CLK6N/DIFFIO_TX_RX_B18NM11

IO_3_L11/CLK6P/DIFFIO_TX_RX_B18PL11

IO_3_J8/CLK7N/DIFFIO_TX_RX_B20NJ8

IO_3_K8/CLK7P/DIFFIO_TX_RX_B20PK8

IO_6_G9/CLK2P/DIFFIO_RX_R18PG9

IO_6_G10/CLK2N/DIFFIO_RX_R18NG10

IO_6_F13/CLK3P/DIFFIO_RX_R20PF13

IO_6_E13/CLK3N/DIFFIO_RX_R20NE13

IO_6_F9/DPCLK3/DIFFIO_RX_R30PF9

IO_6_F10/DPCLK2/DIFFIO_RX_R30NF10

IO_8_C10/CLK5P/DIFFIO_RX_T26PC10

IO_8_C9/CLK5N/DIFFIO_RX_T26NC9

IO_1B_H1/VREFB1N0H1

IO_2_L1/VREFB2N0L1

IO_3_N11/VREFB3N0N11

IO_5_K13/VREFB5N0K13

IO_6_D13/VREFB6N0D13

IO_8_B7/VREFB8N0B7

Q5FDV305N

OPEN

SW3

mini_dip_2pos

12 3

4

C110

0.1uF

R106160

R108 49.9

R125 49.9

R107 49.9

R98 10.0K

EN_S101V8

EN_VCCEN_VCCERAMEN_VCCTEN_VCCREN_VCCH_EEN_VCCERT

PWR_MAX10_TDI

PWR_MAX10_TCK

PWR_MAX10_TMSPWR_MAX10_TDO

PWR_MAX10_TDIPWR_MAX10_TCKPWR_MAX10_TMS

PWR_MAX10_TDO

PWR_DISABLEn

CLK_50M_PWRMAX

PWR_ERR_LED

PWRMAX_DIP0

MAX_IO9

EN_S101V8

EN_VCCEN_VCCERAMEN_VCCTEN_VCCREN_VCCH_EEN_VCCERT

EN_S102V5

MAX10_USERMD

PWR_DISABLEn

EN_12V

EN_VCCEN_VCCERAMEN_VCCTEN_VCCR

EN_VCCH_EEN_VCCERT

EN_S102V5

MAX10_USERMD

EN_IO3V3EN_IO2V5

EN_3V3PREEN_1V8PRE

MAX10_USERMD

EN_S102V4EN_IO12V

EN_12V

EN_IO2V5

EN_3V3PREEN_1V8PRE

EN_IO3V3

EN_S102V4EN_IO12VEN_E1V2

EN_E1V2

PWRMAX_DIP1

PWRMAX_DIP2

PWR_ERR_LED

Page 12: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Temperature Sense/FAN

Note: TEMPDIODE instructions - route as diff pair and less vias - use GND guard traces - trace width = 10mils - trace gap = as minimum as possible - trace length < 8inches

SLAVE ADDR = 1001 101

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

0: Core or SDM1: 8B2: 8C3: 9A4: 9B5: 9C6: 1C/D/E/F

Temperature alert LED

12V

3.3V_STBY

IO_3V3

3.3V_STBY

12V

OVERTEMPn10,13

TEMP_ALERTn10,13

TEMPDIODE_N[6:0]28,30

I2C_3V3_SCL6,10,18I2C_3V3_SDA6,10,18

TEMPDIODE_P[6:0]28,30

FAN_RPM10OVERTEMP10

OPT_FAN_RPM21

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

12 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

12 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

12 53Sunday, November 05, 2017

C1025 100pF

Thermal system

HW1

Liquid Cooling system

C118 100pF

U12

MAX6581

DXP21

DXP33

DXP45

DXN47

DXN59

DXN712

DXN22

DXN34

NC16

DXP58

DXN610

DXP611

DXP713STBY14I.C.15

VCC17

OVERT16

ALERT18SMBDATA19SMBCLK20GND21NC222DXP123DXN124

EP

25

R133 DNI

J11

FAN_Conn

PWM4TACH312V2GND1

R713 0

R134 DNI

R714

DNI

R659DNI

Q6FDV305N

R139

DNI

R138 0

R141160

C114 0.1uF

R6600

C113 100pF

D6

Amber_LED

R140

160

R135 20

C115 100pF

C116 100pF

C111 100pF

C117 100pFJ60

FAN_Conn

PWM4TACH312V2GND1

FAN_RPM

OVERTEMP

TEMPDIODE_P1TEMPDIODE_N1TEMPDIODE_P2TEMPDIODE_N2TEMPDIODE_P3

TEMPDIODE_N3TEMPDIODE_P4TEMPDIODE_N4

TEMPDIODE_N0TEMPDIODE_P0

TEMPDIODE_P5TEMPDIODE_N5

TEMPDIODE_P6TEMPDIODE_N6

TEMP_ALERTn

OVERTEMPn

I2C_3V3_SCLI2C_3V3_SDA

OPT_FAN_RPM

Page 13: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FLASH Interface

SYSTEM MAX

Temperature Interface

UB2/FPGA INTERFACE with SYSMAX

MAX V I2C Master

MAX5 LED

MAX5 Push Button

Clock

MAX5 Dipswitch

MAX5 JTAG

FMC+

Clock

PWR

FPGA Configuration

S10_1V8

IO_3V3

S10_1V8

IO_3V3

FPGA_CONFIG_D[15:0] 30

TEMP_ALERTn 10,12OVERTEMPn 10,12

USB_CFG[14:0] 9

EN_MASTER[2:0] 18

USB_SYSMAX_CLK 9

SYSMAX_JTAG_TDO 9

SYSMAX_JTAG_TCK 9SYSMAX_JTAG_TMS 9

SYSMAX_JTAG_TDI 9 CPU_RESETn 17,29

I2C_1V8_SCL 7,18,29

FACTORY_LOAD 17MAX5_SWITCH[2:0] 17

PGM_SEL 17PGM_CONFIG 17MAX_RESETn 17

PGM_LED[2:0] 17MAX_ERROR 17MAX_LOAD 17MAX_CONF_DONE 17

SI5341_ENn 7SI5341_RSTn 7SI5341_INTn 7SI5341_LOLn 7

MAX_OSC_CLK_1 7

CLK_50M_SYSMAX 6

FPGA_nCONFIG 10,28

FPGA_PR_DONE 30FPGA_PR_REQUEST 30

FPGA_PR_ERROR 30

FPGA_AVST_CLK 30FPGA_AVST_VALID 30FPGA_AVST_READY 28

FPGA_SEU_ERR 28FPGA_CvP_DONE 28

FPGA_nSTATUS 28

FPGA_MSEL[2:0] 28

FPGA_CONF_DONE 28

FPGA_INIT_DONE 28

PCIe_WAKEn_3V3 26PCIe_PERSTn_3V3 26

USER_IO[9:0] 17,29

FAPRSNT_N 8,10,27

FACLKDIR 27PCIe_PERSTn_1V8 30

I2C_PWR_ALERTn 18,42,43,44,45,46PMBUS_ALERTn 18,40,41

VCC_ALERTn 28

I2C_1V8_SDA 7,18,29

Si547_FS0 6Si547_FS1 6

TEMP_ALERTn_1V8 29OVERTEMPn_1V8 29

FM_D[15:0] 15

FM_A[26:1] 15FLASH_WEn 15FLASH_CEn0 15FLASH_CEn1 15FLASH_OEn 15FM_A27 15FLASH_RDYBSYn 15FLASH_RESETn 15FLASH_WPn 15FLASH_BYTEn 15

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

13 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

13 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

13 53Sunday, November 05, 2017

MAX VPower

U13E

5M2210ZF256

GNDINTF7

GNDINTG6

GNDINTH7

GNDINTH9

GNDIOA1

GNDIOA16

GNDIOB15

GNDIOB2

GNDIOG10

GNDIOG7

GNDIOG8

GNDIOG9

GNDIOK10

GNDIOK7

GNDIOK8

GNDIOK9

GNDIOR15

GNDIOR2

GNDIOT1

GNDIOT16

VCCINTH8VCCINTH10VCCINTG11VCCINTF10

VCCIO1C1

VCCIO1H6

VCCIO1J6

VCCIO1P1

VCCIO2A14

VCCIO2A3

VCCIO2F8

VCCIO2F9

VCCIO3C16

VCCIO3H11

VCCIO3J11

VCCIO3P16

VCCIO4L8

VCCIO4L9

VCCIO4T14

VCCIO4T3

GNDINTJ10

VCCINTJ7

VCCINTL7

GNDINTJ8

GNDINTK11

VCCINTK6VCCINTJ9

GNDINTL10

GNDIOT6

C130

0.1uF

C122

0.1uF

C133

0.1uF

C124

0.1uF

MAX VBANK4

U13D

5M2210ZF256

DIFFIO_B13N/DEV_CLRnM9

DIFFIO_B13P/DEV_OEM8

DIFFIO_B9PP8

DIFFIO_B9NT7

DIFFIO_B8PM7

DIFFIO_B8NR7

DIFFIO_B7PR6

DIFFIO_B7NN7

DIFFIO_B6PT5

DIFFIO_B6NP7

DIFFIO_B5PR5

DIFFIO_B5NM6

DIFFIO_B4PP6

DIFFIO_B4NN6

DIFFIO_B3PR3

DIFFIO_B3NN5

DIFFIO_B2PT2

DIFFIO_B2NP5

DIFFIO_B22PR16

DIFFIO_B22NP13

DIFFIO_B21PP12

DIFFIO_B21NT15

DIFFIO_B20PN12

DIFFIO_B20NR14

DIFFIO_B1PR1

DIFFIO_B1NP4

DIFFIO_B19PT13

DIFFIO_B19NR13

DIFFIO_B18PR12

DIFFIO_B18NP11

DIFFIO_B17PT12

DIFFIO_B17NN11

DIFFIO_B16PP10

DIFFIO_B16NR11

DIFFIO_B15PN10

DIFFIO_B15NT11

DIFFIO_B14PM10

DIFFIO_B14NR10

DIFFIO_B12PR9

DIFFIO_B12NP9

DIFFIO_B11PT8

DIFFIO_B11NT9

DIFFIO_B10PN8

DIFFIO_B10NR8 IOB4_28

M11

IOB4_29M12

IOB4_30N9

IOB4_31R4

IOB4_32T10

IOB4_33T4

C132

0.1uF

C123

0.1uF

C135

0.1uF

C125

0.1uF

C141

0.1uF

C136

0.1uF

C126

0.1uF

C134

0.1uF

C142

0.1uF

C137

0.1uF

C127

0.1uF

C143

0.1uF

C138

0.1uF

C128

0.1uF

C144

0.1uF

C139

0.1uF

MAX VBANK3

U13C

5M2210ZF256

IOB3/CLK2J12

IOB3/CLK3H12

DIFFIO_R9PG12

DIFFIO_R9NG16

DIFFIO_R8PG13

DIFFIO_R8NG15

DIFFIO_R7PG14

DIFFIO_R7NF16

DIFFIO_R6PE16

DIFFIO_R6NF15

DIFFIO_R5PF13

DIFFIO_R5NE15

DIFFIO_R4PF14

DIFFIO_R4ND16

DIFFIO_R3PE12

DIFFIO_R3ND15

DIFFIO_R2PC15

DIFFIO_R2NE13

DIFFIO_R22PP15

DIFFIO_R22NP14

DIFFIO_R21PN15

DIFFIO_R21NN14

DIFFIO_R20PN16

DIFFIO_R20NM13

DIFFIO_R1PE14

DIFFIO_R1NC14

DIFFIO_R19PM15

DIFFIO_R19NL14

DIFFIO_R18PM16

DIFFIO_R18NL13

DIFFIO_R17PL15

DIFFIO_R17NL12

DIFFIO_R16PL16

DIFFIO_R16NL11

DIFFIO_R15PK15

DIFFIO_R15NK14

DIFFIO_R14PK16

DIFFIO_R14NK13

DIFFIO_R13PJ14

DIFFIO_R13NJ15

DIFFIO_R12PJ13

DIFFIO_R12NJ16

DIFFIO_R11PH13

DIFFIO_R11NH16

DIFFIO_R10PH14

DIFFIO_R10NH15

IOB3_21D13

IOB3_22D14

IOB3_23F11

IOB3_24F12

IOB3_25K12

IOB3_26M14

IOB3_27N13

MAX VBANK1

U13A

5M2210ZF256

DIFFIO_L19PN1

IOB1/CLK0H5

IOB1/CLK1J5

DIFFIO_L9PG1

DIFFIO_L9NG4

DIFFIO_L8PG2

DIFFIO_L8NG3

DIFFIO_L7PF1

DIFFIO_L7NF6

DIFFIO_L6PF4

DIFFIO_L6NF2

DIFFIO_L5PF3

DIFFIO_L5NE1

DIFFIO_L4PD1

DIFFIO_L4NE5

DIFFIO_L3PD2

DIFFIO_L3NE4

DIFFIO_L2PC3

DIFFIO_L2NE3

DIFFIO_L21PN3

DIFFIO_L21NP2

DIFFIO_L20PN2

DIFFIO_L20NM3

DIFFIO_L1PD3

DIFFIO_L1NC2

DIFFIO_L19NM4

DIFFIO_L18PL4

DIFFIO_L18NL3

DIFFIO_L17PM1

DIFFIO_L17NM2

DIFFIO_L16PL2

DIFFIO_L16NK3

DIFFIO_L15PK5

DIFFIO_L15NL1

DIFFIO_L14PJ3

DIFFIO_L14NK2

DIFFIO_L13PJ4

DIFFIO_L13NK1

DIFFIO_L12PH4

DIFFIO_L12NJ2

DIFFIO_L11PH3

DIFFIO_L11NJ1

DIFFIO_L10PH2

DIFFIO_L10NG5

IOB1_1E2

IOB1_2F5

IOB1_3H1

IOB1_4K4

IOB1_5L5

TMSN4TDOM5TDIL6TCKP3

C140

0.1uF

MAX VBANK2

U13B

5M2210ZF256

DIFFIO_T9PB8

DIFFIO_T9NA8

DIFFIO_T8PD8

DIFFIO_T8NA7

DIFFIO_T7PC8

DIFFIO_T7NB7

DIFFIO_T6PB6

DIFFIO_T6NE7

DIFFIO_T5PA5

DIFFIO_T5ND7

DIFFIO_T4PE6

DIFFIO_T4NB5

DIFFIO_T3PB4

DIFFIO_T3ND6

DIFFIO_T2PC5

DIFFIO_T2NC4

DIFFIO_T1PD4

DIFFIO_T1NB1

DIFFIO_T18PC13

DIFFIO_T18NB16

DIFFIO_T17PD12

DIFFIO_T17NB14

DIFFIO_T16PC11

DIFFIO_T16NB13

DIFFIO_T15PE11

DIFFIO_T15NB12

DIFFIO_T14PB11

DIFFIO_T14NA12

DIFFIO_T13PE10

DIFFIO_T13NA11

DIFFIO_T12PA10

DIFFIO_T12NC9

DIFFIO_T11PB9

DIFFIO_T11ND9

DIFFIO_T10PA9

DIFFIO_T10NE9

IOB2_6A13

IOB2_7A15

IOB2_8A2

IOB2_9A4

IOB2_10A6

IOB2_11B10

IOB2_12B3

IOB2_13C10

IOB2_14C12

IOB2_15C6

IOB2_16C7

IOB2_17D10

IOB2_18D11

IOB2_19D5

IOB2_20E8

C129

0.1uF

C121

0.1uF

C131

0.1uF

FM_D0

FM_D2FM_D3

FM_D1

FM_D4FM_D5FM_D6

FM_D8FM_D9FM_D10FM_D11FM_D12FM_D13FM_D14FM_D15

FPGA_nSTATUSFPGA_CONF_DONE

FPGA_AVST_READYFPGA_nCONFIG

FPGA_AVST_VALIDFPGA_AVST_CLK

FM_A26

FM_A23FM_A24FM_A25

FM_A14FM_A15FM_A16FM_A17

FM_A19FM_A20

FM_A22

FM_A13

FM_A1FM_A2FM_A3FM_A4FM_A5FM_A6FM_A7FM_A8

FM_A10FM_A11FM_A12

FM_A9FM_A18

FM_A21

FM_D7FLASH_CEn1FLASH_CEn0

FLASH_WEnFLASH_OEn

USB_CFG0USB_CFG1

USB_CFG5

USB_CFG2

USB_CFG6USB_CFG7

USB_CFG9USB_CFG8

USB_CFG4USB_CFG3

USB_CFG12

USB_CFG14

USB_CFG11USB_CFG10

USB_CFG13

SYSMAX_JTAG_TCK

SYSMAX_JTAG_TDOSYSMAX_JTAG_TDI

SYSMAX_JTAG_TMS

PCIe_WAKEn_3V3PCIe_PERSTn_3V3

PCIe_PERSTn_1V8

FPGA_INIT_DONEFPGA_SEU_ERR

FPGA_MSEL0FPGA_MSEL2FPGA_MSEL1

FPGA_CvP_DONE

TEMP_ALERTn_1V8OVERTEMPn_1V8

MAX_ERRORMAX_LOADMAX_CONF_DONE

PGM_LED2

PGM_LED1PGM_LED0

MAX5_SWITCH0MAX5_SWITCH1

MAX5_SWITCH2

MAX_OSC_CLK_1

USB_SYSMAX_CLK

CLK_50M_SYSMAX

FAPRSNT_N

FACLKDIR

EN_MASTER0EN_MASTER1

EN_MASTER2

I2C_PWR_ALERTnPMBUS_ALERTn

VCC_ALERTn

SI5341_ENnSI5341_RSTnSI5341_INTnSI5341_LOLnPGM_SELPGM_CONFIG

FACTORY_LOAD

FPGA_PR_REQUESTFPGA_PR_ERROR

FPGA_PR_DONE

I2C_1V8_SCLI2C_1V8_SDA

MAX_RESETn

CPU_RESETn

Si547_FS1Si547_FS0

TEMP_ALERTn

OVERTEMPn

FPGA_CONFIG_D5FPGA_CONFIG_D0FPGA_CONFIG_D13FPGA_CONFIG_D11FPGA_CONFIG_D8FPGA_CONFIG_D15FPGA_CONFIG_D9FPGA_CONFIG_D14

FPGA_CONFIG_D3FPGA_CONFIG_D1FPGA_CONFIG_D7FPGA_CONFIG_D4FPGA_CONFIG_D12FPGA_CONFIG_D6FPGA_CONFIG_D10FPGA_CONFIG_D2

USER_IO0USER_IO1USER_IO2USER_IO3USER_IO4USER_IO5USER_IO6USER_IO7

USER_IO8USER_IO9

FLASH_RESETnFLASH_WPnFLASH_BYTEnFLASH_RDYBSYnFM_A27

Page 14: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

NA

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

14 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

14 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

14 53Sunday, November 05, 2017

Page 15: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

CFI Flash Memory

Reserved for 1Gb/1Gb stack. When using single die, leave this pin floating.

IO_3V3

S10_1V8

S10_1V8S10_1V8

IO_3V3

S10_1V8

FM_D[15:0]13

FM_A[26:1]13FM_A2713FLASH_WEn13FLASH_CEn013FLASH_CEn113FLASH_OEn13FLASH_RDYBSYn13

FLASH_RESETn13

FLASH_BYTEn13FLASH_WPn13

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

15 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

15 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

15 53Sunday, November 05, 2017

R1

43

10

.0K

C150

0.1uF

C153

0.1uF

R14910.0K

R1

44

10

.0K

C154

0.1uF

R1

45

10

.0K

C156

0.1uF

R1

46

10

.0K

C157

0.1uF

R1

47

10

.0K

C158

0.1uF

U14

MT28EW01GABA1HPC

NC1A1

A3A2

A7A3

RY/BY#A4

WE#A5

A9A6

A13A7

NC2A8

RFU1B1

A4B2

A17B3

VPP/WP#B4

RST#B5

A8B6

A12B7

RFU2C1

A2C2

A6C3

A18C4

A21C5

A10C6

A14C7

A23C8

NC3D1

A1D2

A5D3

A20D4 A19D5

A11D6

A15D7

VCCQ1D8

RFU3E1

A0E2

DQ0E3

DQ2E4

DQ5E5

DQ7E6

A16E7

VSS1E8

VCCQ2F1

CE#F2

DQ8F3

DQ10F4

DQ12F5

DQ14F6

BYTE#F7

A24F8

RFU4G1

OE#G2

DQ9G3

DQ11G4

VCCG5

DQ13G6

DQ15/A-1G7

A25G8

NC4H1

VSS2H2

DQ1H3

DQ3H4

DQ4H5

DQ6H6

VSS3H7

NC5H8

A22B8

U15

MT28EW01GABA1HPC

NC1A1

A3A2

A7A3

RY/BY#A4

WE#A5

A9A6

A13A7

NC2A8

RFU1B1

A4B2

A17B3

VPP/WP#B4

RST#B5

A8B6

A12B7

RFU2C1

A2C2

A6C3

A18C4

A21C5

A10C6

A14C7

A23C8

NC3D1

A1D2

A5D3

A20D4 A19D5

A11D6

A15D7

VCCQ1D8

RFU3E1

A0E2

DQ0E3

DQ2E4

DQ5E5

DQ7E6

A16E7

VSS1E8

VCCQ2F1

CE#F2

DQ8F3

DQ10F4

DQ12F5

DQ14F6

BYTE#F7

A24F8

RFU4G1

OE#G2

DQ9G3

DQ11G4

VCCG5

DQ13G6

DQ15/A-1G7

A25G8

NC4H1

VSS2H2

DQ1H3

DQ3H4

DQ4H5

DQ6H6

VSS3H7

NC5H8

A22B8

C145

0.1uF

R14810.0K

C146

0.1uF

C148

0.1uF

R1

42

10

.0K

C149

0.1uF

FM_A[26:1]

FM_A1FM_A2FM_A3FM_A4 FM_D[15:0]FM_A5FM_A6 FM_D0FM_A7 FM_D1FM_A8 FM_D2FM_A9 FM_D3FM_A10 FM_D4FM_A11 FM_D5FM_A12 FM_D6FM_A13 FM_D7FM_A14FM_A15 FM_D8FM_A16 FM_D9FM_A17 FM_D10FM_A18 FM_D11FM_A19 FM_D12FM_A20 FM_D13FM_A21 FM_D14FM_A22 FM_D15FM_A23FM_A24 FLASH_RDYBSYnFM_A25FM_A26

FM_A27FLASH_RESETnFLASH_CEn0FLASH_OEnFLASH_WEnFLASH_BYTEnFLASH_WPnFLASH_CEn1

FM_A1FM_A2FM_A3FM_A4 FM_D[15:0]FM_A5FM_A6 FM_D0FM_A7 FM_D1FM_A8 FM_D2FM_A9 FM_D3FM_A10 FM_D4FM_A11 FM_D5FM_A12 FM_D6FM_A13 FM_D7FM_A14FM_A15 FM_D8FM_A16 FM_D9FM_A17 FM_D10FM_A18 FM_D11FM_A19 FM_D12FM_A20 FM_D13FM_A21 FM_D14FM_A22 FM_D15FM_A23FM_A24 FLASH_RDYBSYnFM_A25FM_A26

FM_A27

Page 16: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

10/100/1000 Ethernet PHY

connect GNDsthrough a single via

Place near 88E1111 PHY

Place near 88E1111 PHY

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

3KV

Ramp up 1ms

1.2V

E1V2

IO_2V5

E1V2

S10_1V8

S10_1V8IO_2V5

IO_2V5

IO_2V5

IO_2V5

IO_2V5

IO_2V5

IO_2V5

GND_E1V2

GND_E1V2

GND_E1V2

E1V2

3.3V_PRE

GND_ETHE

GND_ETHE

E1V2

GND_E1V2

ENET_SGMII_TX_P29ENET_SGMII_TX_N29

ENET_RSTn29

ENET_MDIO29ENET_MDC29

ENET_SGMII_RX_P29ENET_SGMII_RX_N29

ENET_INTn29

E1V2_VSENSE_GND10

E1V2_VSENSE10

E1V2_PWRGD10

EN_E1V211

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

16 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

16 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

16 53Sunday, November 05, 2017

C164

0.1uF

R164

4.99K

C186

0.1uF

C163

1uF

R169

4.7K

R172

237K

R1524.7K

D9LED_WE1206

C165 10uF

U18

EP53F8QI

NC(SW)1

PGND02

PGND13

AVIN14

VFB5

NC66

VO

UT

07

VO

UT

18

AGND9AVIN010POK11ENABLE12PVIN113PVIN014

NC

(SW

)15

15

NC

(SW

)16

16

C167 0.01uF

R167 49.9

C177

0.1uF

C161 DNI

R170 49.9

R1534.7K

R173

237K

R171 49.9

C181

0.1uF

R166 49.9

R162 49.9

D10LED_WE1206

GMII/MII/TBI INTERFACE

TEST

SGMII INTERFACE

JTAG

MDI INTERFACE

MGMT

U16A

88E1111

COMA27

RESET_N28

CONFIG658 CONFIG559 CONFIG460 CONFIG361 CONFIG263 CONFIG164 CONFIG065

125CLK22

XTAL155

XTAL254

VSSC53

RSET30

SEL_FREQ56

MDI3_P42

MDI3_N43

MDI2_P39

MDI2_N41

MDI1_P33

MDI1_N34

MDI0_P29

MDI0_N31

MDIO24

MDC25

INT_N23

HSDAC_P37

HSDAC_N38

GTX_CLK8

TX_CLK4

TX_EN9

RXCLK2

RX_DV94

CRS84

COL83

S_CLK_P79

S_CLK_N80

S_IN_P82

S_IN_N81

S_OUT_P77

S_OUT_N75

LED_TX68

LED_RX69

LED_DUPLEX70

LED_LINK100073

LED_LINK10074

LED_LINK1076

RXD095

RXD192

RXD293

RXD391

RXD490

RXD589

RXD687

RXD786

RX_ER3

TXD011

TXD112

TXD214

TXD316

TXD417

TXD518

TXD619

TXD720

TX_ER7

TMS46 TDO50 TDI44 TCK49 TRST_N47

C178

0.1uF

R158

0

R181160

R165 49.9C168 0.01uF

R183160

C184

0.1uF

C183

0.1uF

V15

RSNS1

SNS2

R159

0

C171

1uF

C174

5pF

C185

0.1uF

J12

HFJ11-1G02E

TD0_P1

TD0_N2

TD1_P3

TD1_N6

TD2_P4

TD2_N5

TD3_P7

TD3_N8

VCC9

GND10

GN

D_T

AB

11

GN

D_T

AB

12

V16

RSNS1

SNS2

C166 680pF

D11LED_WE1206

C172

0.01uF

C179

0.1uFD7

LED_WE1206

C169 0.01uF

R175160

C175

0.1uF

X3

25.00MHz

VCC4

GND2

OUT3

EN1

R163 49.9

U16B

88E1111

NC113

VSS97

DVDD01

DVDD16

DVDD210

DVDD315

DVDD457

DVDD562

DVDD667

DVDD771

DVDD885

AVDD032

AVDD136

AVDD235

AVDD340

AVDD445

AVDD578

VD

DO

X0

26

VD

DO

X1

48

VD

DO

05

VD

DO

121

VD

DO

288

VD

DO

396

VD

DO

H0

72

VD

DO

H1

66

VD

DO

H2

52

NC251

V14

RSNS1

SNS2

R178160

R1564.7K

R1544.7K

C187

0.1uF

R161

10.0K

R168 49.9

R1574.7K

R1554.7K

R160

10

C182

0.1uF

C173

22uf

C170 0.01uF

C180

0.1uF

C162

0.1uF

U17

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

D8LED_WE1206

C176

0.1uF

R180160

MDI_N0

ENET_LED_RX

ENET_LED_LINK1000ENET_LED_LINK10

ENET_T_INTnENET_T_RSTn

ENET_MDIOENET_MDC

MDIO_TMDC_T

ENET_INTnENET_RSTn

ENET_SGMII_RX_N

ENET_SGMII_TX_PENET_SGMII_TX_NENET_SGMII_RX_P

MDC_T

ENET_LED_TX

ENET_T_INTn

MDI_P1MDI_N1MDI_P2MDI_N2

ENET_T_RSTn

MDI_P3

ENET_LED_RX

ENET_LED_LINK1000ENET_LED_LINK100ENET_LED_LINK10

MDI_N3

ENET_XTAL_25MHZ

ENET_RSET

MDIO_T

MDI_P0

MDI_P1MDI_N1MDI_P2MDI_N2MDI_P3MDI_N3

MDI_N0MDI_P0

E1V2_PWRGDEN_E1V2

ENET_LED_RX

ENET_LED_TX

ENET_LED_LINK10

ENET_LED_LINK100

ENET_LED_LINK1000

Page 17: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Buttons/Switches/LEDs

FPGA USERPUSHBUTTONS

MAX5PUSHBUTTONS

USER GPIO

MAX5 LEDs

USER LEDs

MAX5 DIPSWITCHES

USER DIP SWITCHES

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

S10_1V8

IO_3V3

IO_2V5

S10_1V8

USER_LED[3:0] 29

MAX_ERROR 13MAX_LOAD 13MAX_CONF_DONE 13

PGM_LED[2:0] 13

USER_IO[9:0] 13,29

S10_Unlock 29

FACTORY_LOAD 13MAX5_SWITCH[2:0] 13

USER_DIP[2:0] 29

PGM_SEL 13PGM_CONFIG 13MAX_RESETn 13

CPU_RESETn 13,29

USER_PB[3:0] 29

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

17 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

17 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

17 53Sunday, November 05, 2017

D14

LED_WE1206

D17

LED_WE1206

R2161K

C188 1uF

OPEN

SW5TDA04H0SB1

1 2 3 45678

R2021K

R2270

R20356K

R19956K

R2250

R195160

R2071K

R206 160

C195 1uF

J13

TSM-105-01-T-DV-TR

11

33

55

77

22

44

66

88

99

1010

R19456K

Q16FDV305N

R21756K

C191 1uF

D15

LED_WE1206

R210 160

R2240

Q13FDV305N

Q17FDV305N

S31 2

Q20FDV305N

R18856K

R1981K

R20856K

RP610K

1 2 3 45678

C189 1uF R1921K

Q15FDV305N

R2290

S41 2

Q19FDV305N

D18

LED_WE1206

C192 1uF

R190 160

R19756K

Q14FDV305N

Q18FDV305N

R1871K

R2280

R214 160

R191 160

S81 2

R1961K

RP510K

1 2 3 45678

R184 160

R2210

R218160

Q21FDV305N

D19

LED_WE1206

Q12FDV305N

R204160

R2260

R189160

R200 160

R215 160

D13

LED_WE1206

D16

LED_WE1206

R2111K

C193 1uF

R2200

R219160

S51 2

S21 2

R205160

D20

LED_WE1206

R21256K

R2230

R185160

S11 2

S61 2

R209160

C190 1uF

OPEN

SW4

TDA04H0SB1

1 2 3 45678

D21

LED_WE1206

S71 2

R201 160

R186 160

R193160

R2220

C194 1uF

D12

LED_WE1206

R213160

USER_IO0USER_IO1USER_IO2USER_IO3

S10_UnlockUSER_DIP2USER_DIP1USER_DIP0

USER_IO4MAX5_SWITCH0

MAX5_SWITCH2FACTORY_LOAD

MAX5_SWITCH1

USER_IO7USER_IO8USER_IO9

USER_LED1

USER_LED0

USER_LED2

USER_LED3

MAX_ERROR

MAX_CONF_DONE

MAX_LOAD

PGM_LED0

PGM_LED1

PGM_LED2

USER_PB1USER_PB0

USER_PB3USER_PB2

MAX_RESETnPGM_CONFIGPGM_SEL

CPU_RESETn

USER_IO5USER_IO6

Page 18: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Level shifter/Buffer

I2C BUS

1.8V to 3.3V

1.8V to 3.3V

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Bit 1 default OFF for Si570 sourceOFF: Si570 is sourceON: SMA is source

LT I2C Connector

Isolate VCC regulator from system I2C bus:Default ON position for full chain.OFF = VCC regulator ISOLATEDON = FULL CHAIN

1.8V to 3.3V

IO_3V3S10_1V8

3.3V_STBY

IO_3V3S10_1V8

IO_2V5

IO_3V3S10_1V8

I2C_3V3_SCL 6,10,12

I2C_1V8_SDA 7,13,29

I2C_3V3_SDA 6,10,12

PWRMAX_DIP[2:0] 11

I2C_1V8_SCL 7,13,29

PMBUS_SDA 40,41

EN_MASTER[2:0] 13

CLKSEL_156M 6

PMBUS_SCL 40,41

PMBUS_ALERTn 13,40,41

VCC_SCL 28VCC_SDA 28

I2C_PWR_SDA 42,43,44,45,46I2C_PWR_SCL 42,43,44,45,46

I2C_PWR_ALERTn 13,42,43,44,45,46

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

18 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

18 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

18 53Sunday, November 05, 2017

R2381K

R24210.0K

R246DNI

R23710.0K

R25610.0K

C204

0.1uF

R240DNI

R245DNI

R24410.0K

R252DNI

C203

0.01uFR23610.0K

R23510.0K

C206

0.01uF

C209

0.01uF

R250 DNI

C202

0.1uF

OPEN

SW6

TDA04H0SB1

1234 5

678

R24710.0K

C2051uF

R2484.7K

R25510.0K

R253DNI

C200

0.01uF

C10221uF

C201

0.01uF

R2494.7K

C1991uF

R257 DNI

U20

FXMA2102UMX

A02

A13 B0

7

B16

VCCA1

GND4

OE5

VCCB8

R24310.0K

C208

0.1uF

R2580

U22

FXMA2102UMX

A02

A13 B0

7

B16

VCCA1

GND4

OE5

VCCB8

R25410.0K

C207

0.01uF

U21

FXMA2102UMX

A02

A13 B0

7

B16

VCCA1

GND4

OE5

VCCB8

OPEN

SW7

mini_dip_2pos

12 3

4

R251 DNI

R241DNI

J14

2x6HDR

11

22

33

44

55

66

77

88

99

1010

1212

1111

I2C_3V3_SCLI2C_3V3_SDA

PWRMAX_DIP2

VCC_SCLVCC_SDA

PMBUS_SCLPMBUS_SDA

PWRMAX_DIP1

I2C_1V8_SCLI2C_1V8_SDA

EN_MASTER1

EN_MASTER0

PWRMAX_DIP0

PMBUS_ALERTnPMBUS_SCLPMBUS_SDA

I2C_PWR_SCLI2C_PWR_SDA

PMBUS_SCLPMBUS_SDA

EN_MASTER2

I2C_1V8_SCLI2C_1V8_SDA

I2C_PWR_SCLI2C_PWR_SDA

I2C_PWR_ALERTn

CLKSEL_156M

Page 19: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

OSFP Interface

Place CAPs near OSFP connector

Cage GND on top layer

OSFP_RSTn: Open No ResetLOW ResetOSFP_LPWn: Open LOW powerHIGH HIGH power

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

OSFP_3.3VIO_3V3

GND_OSFP_CAGE

OSFP_3.3V OSFP_3.3V

GND_OSFP_CAGE GND_OSFP_CAGE

IO_3V3IO_3V3

IO_3V3

IO_3V3

IO_3V3 S10_1V8

S10_1V8

IO_3V3

OSFP_RXN036OSFP_RXP036

OSFP_RXN1 36OSFP_RXP1 36

OSFP_RXN236OSFP_RXP236

OSFP_RXN3 36OSFP_RXP3 36

OSFP_RXN436OSFP_RXP436

OSFP_RXN5 36OSFP_RXP5 36

OSFP_RXN636OSFP_RXP636

OSFP_RXN7 36OSFP_RXP7 36

OSFP_TXP136OSFP_TXN136

OSFP_TXP0 36OSFP_TXN0 36

OSFP_TXP2 36OSFP_TXN2 36

OSFP_TXP336OSFP_TXN336

OSFP_TXP4 36OSFP_TXN4 36

OSFP_TXP536OSFP_TXN536

OSFP_TXP6 36OSFP_TXN6 36

OSFP_TXP736OSFP_TXN736

OSFP_LPWn 29

OSFP_PRSn 29OSFP_INTn 29

OSFP_RSTn 29

SDA_0 21,23SCL_0 21,23

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

19 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

19 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

19 53Sunday, November 05, 2017

C213

0.47uF

C2120.1uF

C2150.1uF

R260

68K

C2190.1uF

R26610.0K

C217

22ufC2200.1uF

R265

68K

U23

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

C2210.1uF

R2590

U26

REF3125

VIN1

VOUT2

GND3

R263

24.9K

R2640

U24-1

UE62-A1010-2000T

GND1

GND4

GND7

GND10

GND13

VCC15

VCC16

GND18

GND21

GND24

GND27

GND30

GND31

GND34

GND37

GND40

GND43

VCC45VCC46

GND48

GND51

GND54

GND57

GND60

TX2P2

TX2N3

TX4P5

TX4N6

TX6P8

TX6N9

TX8P11

TX8N12

SCL14

LPWn/PRSn17

RX7N19

RX7P20

RX5N22

RX5P23

RX3N25

RX3P26

RX1N28

RX1P29

RX2P32RX2N33

RX4P35RX4N36

RX6P38RX6N39

RX8P41RX8N42

INT/RSTn44

SDA47

TX7N49TX7P50

TX5N52TX5P53

TX3N55TX3P56

TX1N58TX1P59

OSFP CAGE

HW2

UE62-B1620-02011

AmphenolCONN - 1x1 OSFP CAGE ASSEMBLY

C2111uF

R65710.0K

Q23FDV305N

U24-2

UE62-A1010-2000T

CG161

CG262

CG363

CG464

CG565

CG666

CG767

CG868

CG969

CG1070

CG1171

CG1272

CG1373

CG1474

CG1575

CG1676CG1777CG1878CG1979CG2080CG2181CG2282CG2383CG2484

C216

100uF

R658

10

U27

LTC6752ISC6-1#TRPBF

Q1

VEE2

VCC6

LEn/HYST5

+IN3

-IN4

U25

LTC6752ISC6-1#TRPBF

Q1

VEE2

VCC6

LEn/HYST5

+IN3

-IN4

L71uH 4A 47mohm

12

Q22FDV305N

Q35FDV305N

R267

0.5

C2100.1uF

C2144.7nF

C2180.1uF

R262

15K

R261

68K

SCL_0 SDA_0

OSFP_LPWnPRSn OSFP_INTRSTn

OSFP_T_INTn

OSFP_T_PRSn

OSFP_T_RSTnOSFP_T_INTn

OSFP_T_PRSnOSFP_RSTnOSFP_INTn

OSFP_PRSnOSFP_T_LPWn OSFP_LPWn

OSFP_INTRSTn

OSFP_LPWnPRSn

OSFP_T_RSTnOSFP_T_LPWn

Page 20: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

NA

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

20 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

20 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

20 53Sunday, November 05, 2017

Page 21: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

QSFPDD 1x1

Cage GND on top layer

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

ModSelL: Module SelectResetL: Module ResetModPrsL: Module PresentIntL: InterruptInitMode: Initialization mode (LPMODE)

QSFPDD1x1_VCC1

QSFPDD1x1_VCCTX

IO_3V3

QSFPDD1x1_VCCRX

GND_QSFPDD1x1_CAGE

QSFPDD1x1_VCC1

QSFPDD1x1_VCC1QSFPDD1x1_VCCTX

QSFPDD1x1_VCCTX QSFPDD1x1_VCCRX

QSFPDD1x1_VCCRX

GND_QSFPDD1x1_CAGE

IO_3V3 S10_1V8

S10_1V8

IO_3V3 S10_1V8

S10_1V8

S10_1V8

IO_3V3

QSFPDD1x1_TXP034

QSFPDD1x1_RXP034QSFPDD1x1_RXN034

QSFPDD1x1_RXN234QSFPDD1x1_RXP234

QSFPDD1x1_RXP134QSFPDD1x1_RXN134

QSFPDD1x1_RXP334QSFPDD1x1_RXN334

QSFPDD1x1_RXN4 34QSFPDD1x1_RXP4 34

QSFPDD1x1_RXP5 34QSFPDD1x1_RXN5 34

QSFPDD1x1_RXP6 34QSFPDD1x1_RXN6 34

QSFPDD1x1_RXP7 34QSFPDD1x1_RXN7 34

QSFPDD1x1_TXN034

QSFPDD1x1_TXP134QSFPDD1x1_TXN134

QSFPDD1x1_TXN234QSFPDD1x1_TXP234

QSFPDD1x1_TXP334QSFPDD1x1_TXN334

QSFPDD1x1_TXN4 34QSFPDD1x1_TXP4 34

QSFPDD1x1_TXP5 34QSFPDD1x1_TXN5 34

QSFPDD1x1_TXN6 34QSFPDD1x1_TXP6 34

QSFPDD1x1_TXP7 34QSFPDD1x1_TXN7 34

DDQ1x1_Initmode 29

DDQ1x1_modprsL 29DDQ1x1_intl 29

DDQ1x1_modselL 29DDQ1x1_resetL 29

SDA_0 19,23SCL_0 19,23

OPT_FAN_RPM 12

OPT_FAN_RPM1V8 29

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

21 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

21 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

21 53Sunday, November 05, 2017

C223

22uf

R269 4.7K

R661 49.9

U29

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

R271 4.7K

L10 1.0uH

L9 DNI

R26810.0K

R622 DNI

C2271uF

C2364.7nFR662 49.9

L13 DNI

R270 4.7K

C2301uF

L8 1.0uH

L12 1.0uH

R272 4.7K

R663 49.9

U28

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

U30-2

2027180001

CG177

CG278

CG379

CG480

CG581

CG682

CG783

CG884

CG985

CG1086

CG1187

CG1288

R664 49.9

C2290.1uF

C222

0.1uF

R667 49.9

R665 49.9

L11 DNI

C2260.1uF

R666 49.9

C2310.1uF

C225

22uf

C224

0.1uF

U30-1

2027180001

GND1

GND4

GND7

VCCRX10

GND13

GND16

GND19

GND20

GND23

GND26

VccTx29

Vcc130

GND32

GND35

GND38

GND39

GND42

GND45

VccRx148

GND51

GND54

GND57GND58

GND61

GND64

VccTx167Vcc268

GND70

GND73

GND76

TX2n2

Tx2p3

Tx4n5

Tx4p6

ModSelL8

ResetL9

SCL11

SDA12

Rx3p14

Rx3n15

Rx1p17

Rx1n18

Rx2n21

Rx2p22

Rx4n24

Rx4p25

ModPrsL27

IntL28

InitMode31

Tx3p33

Tx3n34

Tx1p36

Tx1n37

Tx6n40Tx6p41

Tx8n43Tx8p44

Reserved146VS147

VS249VS350

Rx7p52Rx7n53

Rx5p55Rx5n56

Rx6n59Rx6p60

Rx8n62Rx8p63

NC65Reserved266

Reserved369

Tx7p71Tx7n72

Tx5p74Tx5n75

OSFP CAGE

HW3

2031431253

MolexCONN - 1x1 QSFP DD CAGE ASSEMBLY

C233

22uf

C232

0.1uF

C2280.1uF

C235

22uf

C234

0.1uF

DDQ1x1_T_Initmode

DDQ1x1_T_intlDDQ1x1_T_modprsL

DDQ1x1_T_modselLDDQ1x1_T_resetL

SCL_0SDA_0

DDQ1x1_T_modselLDDQ1x1_T_resetL

DDQ1x1_T_intlDDQ1x1_T_modprsL DDQ1x1_modprsL

DDQ1x1_intlDDQ1x1_T_Initmode DDQ1x1_Initmode

DDQ1x1_resetLDDQ1x1_modselL

DDQ1x1_modprsLDDQ1x1_intl

DDQ1x1_T_modprsLDDQ1x1_T_intlDDQ1x1_T_resetL

OPT_FAN_RPM OPT_FAN_RPM1V8

Page 22: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

QSFPDD 1x2

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Cage GND on top layer

QSFPDD1x2_VCC1A

QSFPDD1x2_VCCTXA

IO_3V3

QSFPDD1x2_VCCRXA

QSFPDD1x2_VCC1AQSFPDD1x2_VCCTXA

QSFPDD1x2_VCCRXA

QSFPDD1x2_VCC1BQSFPDD1x2_VCCTXB

QSFPDD1x2_VCCRXB

QSFPDD1x2_VCC1AQSFPDD1x2_VCCTXA

QSFPDD1x2_VCCRXA

QSFPDD1x2_VCC1BQSFPDD1x2_VCCTXB

QSFPDD1x2_VCCRXB

QSFPDD1x2_VCC1B

QSFPDD1x2_VCCTXB

IO_3V3

QSFPDD1x2_VCCRXB

GND_QSFPDD1x2_CAGE GND_QSFPDD1x2_CAGE

GND_QSFPDD1x2_CAGE

S10_1V8

IO_3V3 S10_1V8

S10_1V8

IO_3V3 S10_1V8

S10_1V8

IO_3V3 S10_1V8

S10_1V8

IO_3V3

QSFPDD1x2_RXP032

QSFPDD1x2_TXP032

QSFPDD1x2_RXN032

QSFPDD1x2_RXP132QSFPDD1x2_RXN132

QSFPDD1x2_RXN232QSFPDD1x2_RXP232

QSFPDD1x2_RXP332QSFPDD1x2_RXN332

QSFPDD1x2_RXN4 32QSFPDD1x2_RXP4 32

QSFPDD1x2_RXP5 32QSFPDD1x2_RXN5 32

QSFPDD1x2_RXN6 32QSFPDD1x2_RXP6 32

QSFPDD1x2_RXP7 32QSFPDD1x2_RXN7 32

QSFPDD1x2_TXN032

QSFPDD1x2_TXP132QSFPDD1x2_TXN132

QSFPDD1x2_TXP232QSFPDD1x2_TXN232

QSFPDD1x2_TXP332QSFPDD1x2_TXN332

QSFPDD1x2_TXP4 32QSFPDD1x2_TXN4 32

QSFPDD1x2_TXP5 32QSFPDD1x2_TXN5 32

QSFPDD1x2_TXP6 32QSFPDD1x2_TXN6 32

QSFPDD1x2_TXP7 32QSFPDD1x2_TXN7 32

QSFPDD1x2_TXP832QSFPDD1x2_TXN832

QSFPDD1x2_TXP932QSFPDD1x2_TXN932

QSFPDD1x2_TXP1032QSFPDD1x2_TXN1032

QSFPDD1x2_TXP1132QSFPDD1x2_TXN1132

QSFPDD1x2_TXP12 32QSFPDD1x2_TXN12 32

QSFPDD1x2_TXP13 32QSFPDD1x2_TXN13 32

QSFPDD1x2_TXP14 32QSFPDD1x2_TXN14 32

QSFPDD1x2_TXP15 32QSFPDD1x2_TXN15 32

QSFPDD1x2_RXP832QSFPDD1x2_RXN832

QSFPDD1x2_RXP932QSFPDD1x2_RXN932

QSFPDD1x2_RXN1032QSFPDD1x2_RXP1032

QSFPDD1x2_RXP1132QSFPDD1x2_RXN1132

QSFPDD1x2_RXN12 32QSFPDD1x2_RXP12 32

QSFPDD1x2_RXP13 32QSFPDD1x2_RXN13 32

QSFPDD1x2_RXN14 32QSFPDD1x2_RXP14 32

QSFPDD1x2_RXP15 32QSFPDD1x2_RXN15 32

DDQ1x2_Initmode1 29

OIF_SDA1 29

DDQ1x2_Initmode2 29

DDQ1x2_intl2 29DDQ1x2_modprsL2 29

DDQ1x2_resetL2 29DDQ1x2_modselL2 29

DDQ1x2_modprsL1 29DDQ1x2_intl1 29

DDQ1x2_modselL1 29DDQ1x2_resetL1 29

OIF_SCL1 29SDA_1 27SCL_1 27

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

22 53Monday, November 06, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

22 53Monday, November 06, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

22 53Monday, November 06, 2017

C237

0.1uF

L14 1.0uH

R698 49.9

L22 1.0uH

R706 49.9

OSFP CAGE

HW4

2031521343

MolexCONN - QSFP-DD 1X2 GANGED CAGE SPRING FINGER WITH H/S

C2461uF

C2571uFC259

1uF

L20 1.0uH

C250

22uf

C253

22uf

U75-2

2027180001

CG177

CG278

CG379

CG480

CG581

CG682

CG783

CG884

CG985

CG1086

CG1187

R707 49.9

R699 49.9

U32-1

2027180001

GND1

GND4

GND7

VCCRX10

GND13

GND16

GND19

GND20

GND23

GND26

VccTx29

Vcc130

GND32

GND35

GND38

GND39

GND42

GND45

VccRx148

GND51

GND54

GND57GND58

GND61

GND64

VccTx167Vcc268

GND70

GND73

GND76

TX2n2

Tx2p3

Tx4n5

Tx4p6

ModSelL8

ResetL9

SCL11

SDA12

Rx3p14

Rx3n15

Rx1p17

Rx1n18

Rx2n21

Rx2p22

Rx4n24

Rx4p25

ModPrsL27

IntL28

InitMode31

Tx3p33

Tx3n34

Tx1p36

Tx1n37

Tx6n40Tx6p41

Tx8n43Tx8p44

Reserved146VS147

VS249VS350

Rx7p52Rx7n53

Rx5p55Rx5n56

Rx6n59Rx6p60

Rx8n62Rx8p63

NC65Reserved266

Reserved369

Tx7p71Tx7n72

Tx5p74Tx5n75

C244

22uf

U32-2

2027180001

CG177

CG278

CG379

CG480

CG581

CG682

CG783

CG884

CG985

CG1086

CG1187

R277 1K

C251

0.1uF

R700 49.9

U31

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

R28510.0K

R274 4.7K

L19 DNI

C2580.1uF

C248

22uf

R283 1K

R708 49.9

L25 DNI

C2560.1uF

C2624.7nF

C252

0.1uF

R273 4.7K

C241

0.1uF

C240

22uf

R279 4.7K

L18 1.0uH

R709 49.9

L17 DNI

R275 4.7K

C255

22uf

C239

0.1uF

R701 49.9

L23 1.0uH

R280 4.7K

C2450.1uF

R703 49.9

R623 DNI

C2600.1uF

L16 DNI

R276 4.7K

C2610.1uF

R624 DNI

R281 4.7K

C242

22uf

R702 49.9

R278 1K

C249

0.1uF

R284 1K

R696 49.9

R704 49.9

C2470.1uF

C243

0.1uF

R282 4.7K

L15 1.0uH

U75-1

2027180001

GND1

GND4

GND7

VCCRX10

GND13

GND16

GND19

GND20

GND23

GND26

VccTx29

Vcc130

GND32

GND35

GND38

GND39

GND42

GND45

VccRx148

GND51

GND54

GND57GND58

GND61

GND64

VccTx167Vcc268

GND70

GND73

GND76

TX2n2

Tx2p3

Tx4n5

Tx4p6

ModSelL8

ResetL9

SCL11

SDA12

Rx3p14

Rx3n15

Rx1p17

Rx1n18

Rx2n21

Rx2p22

Rx4n24

Rx4p25

ModPrsL27

IntL28

InitMode31

Tx3p33

Tx3n34

Tx1p36

Tx1n37

Tx6n40Tx6p41

Tx8n43Tx8p44

Reserved146VS147

VS249VS350

Rx7p52Rx7n53

Rx5p55Rx5n56

Rx6n59Rx6p60

Rx8n62Rx8p63

NC65Reserved266

Reserved369

Tx7p71Tx7n72

Tx5p74Tx5n75

C238

22uf

R705 49.9

U34

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

L24 DNI

R697 49.9

U33

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

C254

0.1uF

L21 DNI

DDQ1x2_T_Initmode1

DDQ1x2_T_intl1DDQ1x2_T_modprsL1

DDQ1x2_T_resetL1

SDA_1

DDQ1x2_T_modselL1

SCL_1

DDQ1x2_T_Initmode2

DDQ1x2_T_intl2DDQ1x2_T_modprsL2

DDQ1x2_T_resetL2DDQ1x2_T_modselL2

DDQ1x2_modprsL1DDQ1x2_intl1

DDQ1x2_intl2DDQ1x2_modprsL2

OIF_SDA1OIF_SCL1

DDQ1x2_T_modselL1DDQ1x2_T_resetL1

DDQ1x2_T_intl1DDQ1x2_T_modprsL1 DDQ1x2_modprsL1

DDQ1x2_intl1

DDQ1x2_T_resetL2DDQ1x2_T_modselL2

DDQ1x2_T_modprsL2DDQ1x2_T_intl2 DDQ1x2_intl2

DDQ1x2_modprsL2DDQ1x2_resetL2DDQ1x2_modselL2 SDA_1

SCL_1

DDQ1x2_T_Initmode1DDQ1x2_T_Initmode2

OIF_SDA1OIF_SCL1

DDQ1x2_Initmode1DDQ1x2_Initmode2

DDQ1x2_resetL1DDQ1x2_modselL1

DDQ1x2_T_modprsL1DDQ1x2_T_intl1

DDQ1x2_T_intl2DDQ1x2_T_modprsL2

SDA_1SCL_1

SCL_1SDA_1

DDQ1x2_T_resetL1DDQ1x2_T_resetL2

Page 23: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

QSFPDD 2x1

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Cage GND on top layer

IO_3V3 S10_1V8

S10_1V8

IO_3V3

QSFPDD2x1_VCCTXA

QSFPDD2x1_VCC1A

QSFPDD2x1_VCCRXA

QSFPDD2x1_VCCTXB

QSFPDD2x1_VCC1B

QSFPDD2x1_VCCRXB

IO_3V3

GND_QSFPDD2x1_CAGE GND_QSFPDD2x1_CAGE

GND_QSFPDD2x1_CAGE

IO_3V3 S10_1V8

S10_1V8

IO_3V3 S10_1V8

S10_1V8

QSFPDD2x1_VCCRXA

QSFPDD2x1_VCCTXAQSFPDD2x1_VCC1A

QSFPDD2x1_VCCRXB

QSFPDD2x1_VCCTXBQSFPDD2x1_VCC1B

QSFPDD2x1_VCC1A

QSFPDD2x1_VCCRXA

QSFPDD2x1_VCCTXA

QSFPDD2x1_VCCRXB

QSFPDD2x1_VCCTXBQSFPDD2x1_VCC1B

IO_3V3

S10_1V8

DDQ2x1_modprsL1 29DDQ2x1_intl1 29

DDQ2x1_modselL1 29DDQ2x1_resetL1 29

QSFPDD2x1_TXN835QSFPDD2x1_TXP835

QSFPDD2x1_TXN935QSFPDD2x1_TXP935

QSFPDD2x1_TXP1035QSFPDD2x1_TXN1035

QSFPDD2x1_TXN1135QSFPDD2x1_TXP1135

QSFPDD2x1_TXN12 35QSFPDD2x1_TXP12 35

QSFPDD2x1_TXP14 35QSFPDD2x1_TXN14 35

QSFPDD2x1_TXN13 35QSFPDD2x1_TXP13 35

QSFPDD2x1_RXP835

QSFPDD2x1_RXP935

QSFPDD2x1_TXN15 35QSFPDD2x1_TXP15 35

QSFPDD2x1_RXN835

QSFPDD2x1_RXP1035QSFPDD2x1_RXN1035

QSFPDD2x1_RXN935

QSFPDD2x1_RXN1135QSFPDD2x1_RXP1135

QSFPDD2x1_RXP13 35

QSFPDD2x1_RXP12 35QSFPDD2x1_RXN12 35

QSFPDD2x1_RXP14 35QSFPDD2x1_RXN14 35

QSFPDD2x1_RXN13 35

QSFPDD2x1_RXN15 35QSFPDD2x1_RXP15 35

QSFPDD2x1_TXP035

QSFPDD2x1_RXP035QSFPDD2x1_RXN035

QSFPDD2x1_RXN135QSFPDD2x1_RXP135

QSFPDD2x1_RXP235QSFPDD2x1_RXN235

QSFPDD2x1_RXN335QSFPDD2x1_RXP335

QSFPDD2x1_RXP4 35QSFPDD2x1_RXN4 35

QSFPDD2x1_RXN5 35QSFPDD2x1_RXP5 35

QSFPDD2x1_RXP6 35QSFPDD2x1_RXN6 35

QSFPDD2x1_RXN7 35QSFPDD2x1_RXP7 35

QSFPDD2x1_TXP135

QSFPDD2x1_TXP235

QSFPDD2x1_TXN035

QSFPDD2x1_TXN135

QSFPDD2x1_TXP335

QSFPDD2x1_TXN235

QSFPDD2x1_TXP4 35

QSFPDD2x1_TXN335

QSFPDD2x1_TXN4 35

QSFPDD2x1_TXP6 35

QSFPDD2x1_TXP5 35

QSFPDD2x1_TXP7 35

QSFPDD2x1_TXN6 35

QSFPDD2x1_TXN5 35

QSFPDD2x1_TXN7 35DDQ2x1_Initmode1 29

DDQ2x1_Initmode2 29

DDQ2x1_intl2 29DDQ2x1_modprsL2 29

DDQ2x1_resetL2 29DDQ2x1_modselL2 29

SDA_0 19,21SCL_0 19,21OIF_SDA0 29OIF_SCL0 29

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

23 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

23 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

23 53Sunday, November 05, 2017

L35 DNIR294 4.7K

R626 DNI

C2730.1uF

C2820.1uF

R694 49.9

L34 1.0uH

C281

22uf

R295 4.7K

R682 49.9

C274

0.1uF

R287 4.7KR286 4.7K

L37 DNI

C264

22uf C267

0.1uFR289 4.7K

R695 49.9

C278

0.1uF

C2830.1uF

R683 49.9

C276

0.1uF

C2721uF

R288 4.7K

L36 1.0uH

C2850.1uF

L31 DNI

R684 49.9

U38

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

C265

0.1uF

U36-3

1736040002

GNDC1

TX2nC2

Tx2pC3

GNDC4

Tx4nC5

Tx4pC6

GNDC7

ModSelLC8

ResetLC9

VCCRXC10

SCLC11

SDAC12

GNDC13

Rx3pC14

Rx3nC15

GNDC16

Rx1pC17

Rx1nC18

GNDC19

GNDC20

Rx2nC21

Rx2pC22

GNDC23

Rx4nC24

Rx4pC25

GNDC26

ModPrsLC27

IntLC28

VccTxC29

Vcc1C30

InitModeC31

GNDC32

Tx3pC33

Tx3nC34

GNDC35

Tx1pC36

Tx1nC37

GNDC38

GNDD76

Tx5nD75

Tx5pD74

GNDD73

Tx7nD72

Tx7pD71

GNDD70

Reserved3D69

Vcc2D68

VccTx1D67

Reserved2D66

NCD65

GNDD64

Rx8pD63

Rx8nD62

GNDD61

Rx6pD60

Rx6nD59

GNDD58

GNDD57

Rx5nD56

Rx5pD55

GNDD54

Rx7nD53

Rx7pD52

GNDD51

VS3D50

VS2D49

VccRx1D48

VS1D47

Reserved1D46

GNDD45

Tx8pD44

Tx8nD43

GNDD42

Tx6pD41

Tx6nD40

GNDD39

C275

22uf

L30 1.0uH

R689 49.9

C269

0.1uF

C268

22uf

U35

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

C2870.1uF

L33 DNI

R685 49.9

C266

22uf

R690 49.9

U36-1

1736040002

GNDA1

GNDA4

GNDA7

VCCRXA10

GNDA13

GNDA16

GNDA19

GNDA20

GNDA23

GNDA26

VccTxA29

Vcc1A30

GNDA32

GNDA35

GNDA38

GNDB39

GNDB42

GNDB45

VccRx1B48

GNDB51

GNDB54

GNDB57GNDB58

GNDB61

GNDB64

VccTx1B67Vcc2B68

GNDB70

GNDB73

GNDB76

TX2nA2

Tx2pA3

Tx4nA5

Tx4pA6

ModSelLA8

ResetLA9

SCLA11

SDAA12

Rx3pA14

Rx3nA15

Rx1pA17

Rx1nA18

Rx2nA21

Rx2pA22

Rx4nA24

Rx4pA25

ModPrsLA27

IntLA28

InitModeA31

Tx3pA33

Tx3nA34

Tx1pA36

Tx1nA37

Tx6nB40Tx6pB41

Tx8nB43Tx8pB44

Reserved1B46VS1B47

VS2B49VS3B50

Rx7pB52Rx7nB53

Rx5pB55Rx5nB56

Rx6nB59Rx6pB60

Rx8nB62Rx8pB63

NCB65Reserved2B66

Reserved3B69

Tx7pB71Tx7nB72

Tx5pB74Tx5nB75

L27 DNI

L26 1.0uH

L32 1.0uH

R686 49.9

R691 49.9

R297 1KC280

0.1uF

R296 1K

C270

22uf

C2841uF

R290 1K

C263

0.1uF

R687 49.9

L29 DNI

R692 49.9

U36-2

1736040002

CG11

CG22

CG33

CG44

CG55

CG66

CG77

CG88

CG99

CG1010

CG1111

CG1212

CG1313

CG1414

CG1515

CG1616

CG1717

CG1818

CG1919

CG2020

CG2121

CG2222

CG2323

CG2424

CG2625

CG2626

C277

22uf

R291 1K

R29810.0K

R292 4.7K

U37

MAX3378_UCSP

VLB2

IO VL1A1

IO VL2A2

IO VL3A3

IO VL4A4

GNDB4

VCCB1

IO VCC1C1

IO VCC2C2

IO VCC3C3

IO VCC4C4

TSB3

R688 49.9

C2710.1uF

R693 49.9

L28 1.0uH

R625 DNI

C2884.7nF

R293 4.7K

C2861uF

C279

22uf

DDQ2x1_resetL1DDQ2x1_modselL1DDQ2x1_T_modselL1

DDQ2x1_T_resetL1

DDQ2x1_T_intl1DDQ2x1_T_modprsL1 DDQ2x1_modprsL1

DDQ2x1_intl1

DDQ2x1_T_resetL2DDQ2x1_T_modselL2

DDQ2x1_T_modprsL2DDQ2x1_T_intl2 DDQ2x1_intl2

DDQ2x1_modprsL2DDQ2x1_resetL2DDQ2x1_modselL2

DDQ2x1_T_Initmode1DDQ2x1_T_Initmode2

DDQ2x1_Initmode1DDQ2x1_Initmode2

DDQ2x1_T_Initmode1

SCL_0

DDQ2x1_T_modselL1

SDA_0

DDQ2x1_T_resetL1

DDQ2x1_T_modprsL1DDQ2x1_T_intl1

DDQ2x1_T_intl2

DDQ2x1_T_Initmode2

DDQ2x1_T_modselL2DDQ2x1_T_resetL2

DDQ2x1_T_modprsL2

DDQ2x1_T_modprsL1DDQ2x1_T_intl1

DDQ2x1_T_intl2DDQ2x1_T_modprsL2

DDQ2x1_modprsL1DDQ2x1_intl1

DDQ2x1_intl2DDQ2x1_modprsL2

SCL_0SDA_0

OIF_SCL0OIF_SDA0

SCL_0SDA_0

SDA_0SCL_0

OIF_SDA0OIF_SCL0

DDQ2x1_T_resetL2DDQ2x1_T_resetL1

Page 24: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

NA

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

24 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

24 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

24 53Sunday, November 05, 2017

Page 25: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MXP / 2.4mm Connectors

GOLD CHANNEL 1 - 2.4mm SMAGOLD CHANNEL 1 - 2.4mm SMA

GOLD CHANNEL 2 - 2.4mm SMA

GOLD CHANNEL 2 - 2.4mm SMA

MXPA

MXPB

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

MXPC

MXPD

SMAB_TXP034

SMAB_TXN034

SMAB_RXP0 34

SMAB_RXN0 34

SMAA_RXP0 34

SMAA_RXN0 34

SMAA_TXN034

SMAA_TXP034

MXPA_RXN0 33MXPA_RXP0 33

MXPA_TXN033MXPA_TXP033

MXPA_RXP1 33MXPA_RXN1 33

MXPA_TXP133MXPA_TXN133

MXPA_TXN233MXPA_TXP233 MXPA_RXP2 33

MXPA_RXN2 33

MXPA_TXN333

MXPA_RXP3 33MXPA_RXN3 33

MXPA_TXP333

MXPB_RXN0 36MXPB_RXP0 36

MXPB_TXN036MXPB_TXP036

MXPC_RXN0 33MXPC_TXN033MXPC_TXP033 MXPC_RXP0 33

MXPD_RXN0 33MXPD_TXN033MXPD_TXP033 MXPD_RXP0 33

MXPB_RXN1 36MXPB_RXP1 36MXPB_TXP136

MXPB_TXN136

MXPC_RXN1 33MXPC_RXP1 33MXPC_TXP133

MXPC_TXN133

MXPD_RXN1 33MXPD_TXP133MXPD_TXN133

MXPD_RXP1 33

MXPB_RXP2 36MXPB_RXN2 36

MXPC_RXN2 33

MXPB_TXN236MXPB_TXP236

MXPC_TXN233MXPC_TXP233 MXPC_RXP2 33

MXPD_RXN2 33MXPD_RXP2 33

MXPD_TXN233MXPD_TXP233

MXPB_RXN3 36MXPB_RXP3 36MXPB_TXP336

MXPB_TXN336

MXPC_RXN3 33MXPC_RXP3 33MXPC_TXP333

MXPC_TXN333

MXPD_RXN3 33MXPD_TXP333MXPD_TXN333

MXPD_RXP3 33

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

25 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

25 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

25 53Sunday, November 05, 2017

HW6

73415-8230

MolexWASHER AND BACKPLATE FOR 2.4MM MOLEX RF CONNECTOR

HW7

73415-8230

MolexWASHER AND BACKPLATE FOR 2.4MM MOLEX RF CONNECTOR

VIA - GND

J26

2.4mm

SCRW9

HW8

73415-8230

MolexWASHER AND BACKPLATE FOR 2.4MM MOLEX RF CONNECTOR

SCRW10

VIA - GND

J20

2.4mm

HW9

73415-8230

MolexWASHER AND BACKPLATE FOR 2.4MM MOLEX RF CONNECTOR

VIA - GND

J23

2.4mm

VIA - GND

J21

2.4mm

SCRW11

HW10

73415-8230

MolexWASHER AND BACKPLATE FOR 2.4MM MOLEX RF CONNECTOR

2X

8 M

XP

J16

2x8 MXP

11

22

33

44

55

66

77

88

99 10

10 1111 1212 1313 1414 1515 1616

M1

M1

M2

M2

SCRW12

HW11

73415-8230

MolexWASHER AND BACKPLATE FOR 2.4MM MOLEX RF CONNECTOR

VIA - GND

J25

2.4mm

VIA - GND

J22

2.4mm

HW12

73415-8230

MolexWASHER AND BACKPLATE FOR 2.4MM MOLEX RF CONNECTOR

SCRW1 SCRW2

SCRW13

2X

8 M

XP

J15

2x8 MXP

11

22

33

44

55

66

77

88

99 10

10 1111 1212 1313 1414 1515 1616

M1

M1

M2

M2

SCRW3

SCRW14

SCRW4

SCRW15

HW5

73415-8230

MolexWASHER AND BACKPLATE FOR 2.4MM MOLEX RF CONNECTOR

2X

8 M

XP

J17

2x8 MXP

11

22

33

44

55

66

77

88

99 10

10 1111 1212 1313 1414 1515 1616

M1

M1

M2

M2

SCRW16

SCRW5 SCRW6

2X

8 M

XP

J18

2x8 MXP

11

22

33

44

55

66

77

88

99 10

10 1111 1212 1313 1414 1515 1616

M1

M1

M2

M2

SCRW7

VIA - GND

J24

2.4mm

VIA - GND

J19

2.4mm

SCRW8

Page 26: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FMC+ 1

PCIE_PRSNTn short

Overlap pads for below resistors

FALAP030FALAN030FALAP130FALAN130FALAP230FALAN230

FALAN330FALAP330

FALAN430FALAP430

FALAP530FALAN530FALAP630FALAN630FALAP730FALAN730

FALAP830FALAN830

FALAN930FALAP930

FALAP1030FALAN1030

FALAN1130FALAP1130

FALAP1230FALAN1230

FALAN1330FALAP1330

FALAN1430FALAP1430

FALAN1530FALAP1530

FALAN16 30FALAP16 30

FALAP17 30FALAN17 30

FALAN18 30FALAP18 30

FALAP19 30FALAN19 30

FALAN20 30FALAP20 30

FALAP21 30FALAN21 30

FALAN22 30FALAP22 30

FALAN23 30FALAP23 30

FALAN24 30FALAP24 30

FALAN25 30FALAP25 30

FALAN26 30FALAP26 30

FALAP27 30FALAN27 30

FALAN28 30FALAP28 30

FALAP29 30FALAN29 30

FALAN30 30FALAP30 30

FALAP31 30FALAN31 30FALAP32_CON 26FALAN32_CON 26FALAP33_CON 26FALAN33_CON 26

FAHBP029FAHBN029FAHBP129FAHBN129FAHBP229FAHBN229FAHBP329FAHBN329

FAHBN429FAHBP429

FAHBP529FAHBN529

FAHBN629FAHBP629

FAHBP729FAHBN729

FAHBN829FAHBP829

FAHBN929FAHBP929

FAHBN1029FAHBP1029

FAHBN11 29FAHBP11 29

FAHBP12 29FAHBN12 29FAHBP13 29FAHBN13 29

FAHBN14 29FAHBP14 29

FAHBP15 29FAHBN15 29

FAHBN16 29FAHBP16 29

FAHBP17 29FAHBN17 29

FAHBN18 29FAHBP18 29

FAHBN19 29FAHBP19 29

FAHBN20 29FAHBP20 29

FAHBN21 29FAHBP21 29

FAHAP030FAHAN030FAHAP130FAHAN130

FAHAN230FAHAP230

FAHAP330FAHAN330

FAHAN430FAHAP430

FAHAP530FAHAN530

FAHAN630FAHAP630

FAHAN730FAHAP730

FAHAN830FAHAP830

FAHAP930FAHAN930

FAHAN1030FAHAP1030

FAHAP1130FAHAN1130

FAHAN12 30FAHAP12 30

FAHAP13 30FAHAN13 30

FAHAN14 30FAHAP14 30

FAHAP15 30FAHAN15 30

FAHAN16 30FAHAP16 30

FAHAP17 30FAHAN17 30

FAHAN18 30FAHAP18 30

FAHAN19 30FAHAP19 30

FAHAN20 30FAHAP20 30

FAHAP21 30FAHAN21 30

FAHAN22 30FAHAP22 30

FAHAP23 30FAHAN23 30

PCIe_WAKEn_3V3 13PCIe_PERSTn_3V3 13

FALAN32_CON26FALAP32_CON26

FALAN32 30FALAP32 30

FALAP33_CON26FALAN33_CON26

FALAP33 30FALAN33 30

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

26 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

26 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

26 53Sunday, November 05, 2017

J27A

ASP-184329-01

LA_N0_CCG7

LA_N1_CCD9

LA_N10C15

LA_N11H17

LA_N12G16

LA_N13D18

LA_N14C19

LA_N15H20

LA_N16G19

LA_N17_CCD21

LA_N18_CCC23

LA_N19H23

LA_N2H8

LA_N20G22

LA_N21H26

LA_N22G25

LA_N23D24

LA_N24H29

LA_N25G28

LA_N26D27

LA_N27C27

LA_N28H32

LA_N29G31

LA_N3G10

LA_N30H35

LA_N31G34

LA_N32H38

LA_N33G37

LA_N4H11

LA_N5D12

LA_N6C11

LA_N7H14

LA_N8G13

LA_N9D15

LA_P0_CCG6

LA_P1_CCD8

LA_P10C14

LA_P11H16

LA_P12G15

LA_P13D17

LA_P14C18

LA_P15H19

LA_P16G18

LA_P17_CCD20

LA_P18_CCC22

LA_P19H22

LA_P2H7

LA_P20G21

LA_P21H25

LA_P22G24

LA_P23D23

LA_P24H28

LA_P25G27

LA_P26D26

LA_P27C26

LA_P28H31

LA_P29G30

LA_P3G9

LA_P30H34

LA_P31G33

LA_P32H37

LA_P33G36

LA_P4H10

LA_P5D11

LA_P6C10

LA_P7H13

LA_P8G12

LA_P9D14

R300 0

R305 DNI

J27C

ASP-184329-01

HB_N0_CCK26

HB_N1J25

HB_N10K32

HB_N11J31

HB_N12F32

HB_N13E31

HB_N14K35

HB_N15J34

HB_N16F35

HB_N17_CCK38

HB_N18J37

HB_N19E34

HB_N2F23

HB_N20F38

HB_N21E37

HB_N3E22

HB_N4F26

HB_N5E25

HB_N6_CCK29

HB_N7J28

HB_N8F29

HB_N9E28

HB_P0_CCK25

HB_P1J24

HB_P10K31

HB_P11J30

HB_P12F31

HB_P13E30

HB_P14K34

HB_P15J33

HB_P16F34

HB_P17_CCK37

HB_P18J36

HB_P19E33

HB_P2F22

HB_P20F37

HB_P21E36

HB_P3E21

HB_P4F25

HB_P5E24

HB_P6_CCK28

HB_P7J27

HB_P8F28

HB_P9E27

J27B

ASP-184329-01

HA_N0_CCF5

HA_N1_CCE3

HA_N10K14

HA_N11J13

HA_N12F14

HA_N13E13

HA_N14J16

HA_N15F17

HA_N16E16

HA_N17_CCK17

HA_N18J19

HA_N19F20

HA_N2K8

HA_N20E19

HA_N21K20

HA_N22J22

HA_N23K23

HA_N3J7

HA_N4F8

HA_N5E7

HA_N6K11

HA_N7J10

HA_N8F11

HA_N9E10

HA_P0_CCF4

HA_P1_CCE2

HA_P10K13

HA_P11J12

HA_P12F13

HA_P13E12

HA_P14J15

HA_P15F16

HA_P16E15

HA_P17_CCK16

HA_P18J18

HA_P19F19

HA_P2K7

HA_P20E18

HA_P21K19

HA_P22J21

HA_P23K22

HA_P3J6

HA_P4F7

HA_P5E6

HA_P6K10

HA_P7J9

HA_P8F10

HA_P9E9

R303 0

R302 DNI

R304 0

R301 DNI

J27F

ASP-184329-01

GND8K2

GND9K3

GND10K6

GND11K9

GND12K12

GND13K15

GND14K18

GND15K21

GND16K24

GND17K27

GND18K30

GND19K33

GND20K36

GND21K39

GND22J1

GND23J4

GND24J5

GND25J8

GND26J11

GND27J14

GND28J17

GND29J20

GND30J23

GND31J26

GND32J29

GND33J32

GND34J35

GND35J38

GND36J40

GND37H3

GND38H6

GND39H9

GND40H12

GND41H15

GND42H18

GND43H21

GND44H24

GND45H27

GND46H30

GND47H33

GND48H36

GND49H39

GND50D2

GND51D3

GND52D6

GND53D7

GND54D10

GND55D13

GND56D16

GND57D19

GND58D22

GND59D25

GND60D28

GND61D37

GND62D39

GND63C1

GND64C4

GND65C5

GND66C8

GND67C9

GND68C12

GND69C13

GND70C16

GND71C17

GND72C20

GND73C21

GND74C24

GND75C25

GND76C28

GND77C29

GND78C32

GND79C33

GND118C36GND117C38GND116C40GND115B2GND114B3GND113B6GND112B7GND111B10GND110B11GND159B14GND158B15GND157B18GND156B19GND155B22GND154B23GND153B26GND152B27GND151B30GND150B31GND149B34GND148B35GND147B38GND146B39GND145A1GND144A4GND143A5GND142A8GND141A9GND140A12GND139A13GND138A16GND137A17GND136A20GND135A21GND134A24GND133A25GND132A28GND131A29GND130A32GND129A33GND128A36GND127A37GND126A40GND125G1GND124G4GND123G5GND122G8GND121G11GND120G14GND109G17GND108G20GND107G23GND106G26GND105G29GND104G32GND103G35GND102G38GND101G40GND100F2GND99F3GND98F6GND97F9GND96F12GND95F15GND94F18GND93F21GND92F24GND91F27GND90F30GND89F33GND88F36GND87F39GND86E1GND85E4GND84E5GND83E8GND82E11GND81E14GND80E17GND0

E20

GND1E23

GND2E26

GND3E29

GND5E32

GND6E35

GND4E38

GND7E40

J27G

ASP-184329-01

GND119M1

GND160M4

GND161M5

GND162M8

GND163M9

GND164M12

GND165M13

GND166M16

GND167M17

GND168M20

GND169M21

GND170M24

GND171M25

GND172M28

GND173M29

GND174M32

GND175M33

GND176M36

GND177M37

GND178M40

GND179L2

GND180L3

GND181L6

GND182L7

GND183L10

GND184L11

GND185L14

GND186L15

GND187L18

GND188L19

GND189L22

GND190L23

GND191L26

GND192L27

GND193L30

GND194L31

GND195L34

GND196L35

GND197L38

GND198L39

GND219Z2

GND220Z3

GND221Z6

GND222Z7

GND223Z10

GND224Z11

GND225Z14

GND226Z15

GND227Z18

GND228Z19

GND229Z22

GND230Z23

GND231Z26

GND232Z27

GND233Z30

GND234Z31

GND235Z34

GND236Z35

GND237Z38

GND238Z39

GND200Y4

GND201Y5

GND202Y8

GND203Y9

GND204Y12

GND205Y13

GND206Y16

GND207Y17

GND208Y20

GND209Y21

GND210Y24

GND211Y25

GND212Y28

GND213Y29

GND214Y32

GND215Y33

GND216Y36

GND217Y37

GND218Y40

GND199Y1

R299 0

Page 27: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FMC+ 2

I2C Address: b' 1010 010

PCIE REFCLK

IO_3V3

IO_3V3

IO_12V

FAM2CVIO

FAREFB

FAREFA

S10_1V8

IO_3V3

3.3V_STBY

FAGBTCLKM2CP431FAGBTCLKM2CN431

FAGBTCLKM2CN531FAGBTCLKM2CP531

FAM2CP0 31FAM2CN0 31FAM2CP1 31FAM2CN1 31

FAM2CN2 31FAM2CP2 31

FAM2CP3 31FAM2CN3 31

FAM2CN4 31FAM2CP4 31

FAC2MP031FAC2MN031FAC2MP131FAC2MN131

FAC2MN231FAC2MP231

FAC2MP331FAC2MN331

FAC2MN431FAC2MP431

FAC2MN531FAC2MP531

FAC2MN631FAC2MP631

FAC2MN731FAC2MP731

FAC2MP831FAC2MN831

FAC2MN931FAC2MP931

FAC2MP1031FAC2MN1031

FAC2MN1131FAC2MP1131

FAC2MP1231FAC2MN1231

FAC2MN1331FAC2MP1331

FAC2MN1431FAC2MP1431

FAC2MN1531FAC2MP1531

FAC2MN1631FAC2MP1631

FAC2MP1731FAC2MN1731

FAC2MN1831FAC2MP1831

FAC2MP1931FAC2MN1931

FAC2MN2031FAC2MP2031

FAC2MP2131FAC2MN2131FAC2MP2231FAC2MN2231FAC2MP2331FAC2MN2331

FAM2CP5 31FAM2CN5 31

FAM2CN6 31FAM2CP6 31

FAM2CN7 31FAM2CP7 31

FAM2CN8 31FAM2CP8 31

FAM2CN9 31FAM2CP9 31

FAM2CN10 31FAM2CP10 31

FAM2CP11 31FAM2CN11 31

FAM2CN12 31FAM2CP12 31

FAM2CN13 31FAM2CP13 31

FAM2CN14 31FAM2CP14 31

FAM2CN15 31FAM2CP15 31

FAM2CP16 31FAM2CN16 31

FAM2CN17 31FAM2CP17 31

FAM2CP18 31FAM2CN18 31

FAM2CN19 31FAM2CP19 31

FAM2CP20 31FAM2CN20 31FAM2CP21 31FAM2CN21 31FAM2CP22 31FAM2CN22 31FAM2CP23 31FAM2CN23 31FAGBTCLKM2CP0 31FAGBTCLKM2CN0 31FAGBTCLKM2CP1 31FAGBTCLKM2CN1 31FAGBTCLKM2CP2 31FAGBTCLKM2CN2 31

FAGBTCLKM2CP331FAGBTCLKM2CN331

SCL_122

FACLKDIR13

FAPG_C2M10

FAPRSNT_N8,10,13

SDA_122

FACLKBIDIRP229FACLKBIDIRN229FACLKBIDIRP330FACLKBIDIRN330

FATMS 8

FATDI 8FATCK 8

FATDO 8

FACLKM2CP0 29FACLKM2CN0 29FACLKM2CP1 30FACLKM2CN1 30

FAPG_M2C 10

FASYNCM2CP 30FASYNCM2CN 30FAREFCLKM2CN30

FAREFCLKM2CP30

FAREFCLKC2MP30FAREFCLKC2MN30

FASYNCC2MP 30FASYNCC2MN 30

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

27 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

27 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

27 53Sunday, November 05, 2017

C295 1uF

R310 100K

R313 100K

R307 100K

C292 10uF

R311 1.00K

R306 DNI

C289 10uF

J27D

ASP-184329-01

DP0_C2M_NC3 DP0_C2M_PC2

DP0_M2C_NC7DP0_M2C_PC6

DP1_C2M_NA23 DP1_C2M_PA22

DP1_M2C_NA3DP1_M2C_PA2

DP2_C2M_NA27 DP2_C2M_PA26

DP2_M2C_NA7DP2_M2C_PA6

DP3_C2M_NA31 DP3_C2M_PA30

DP3_M2C_NA11DP3_M2C_PA10

DP4_C2M_NA35 DP4_C2M_PA34

DP4_M2C_NA15DP4_M2C_PA14

DP5_C2M_NA39 DP5_C2M_PA38

DP5_M2C_NA19DP5_M2C_PA18

DP6_C2M_NB37 DP6_C2M_PB36

DP6_M2C_NB17DP6_M2C_PB16

DP7_C2M_NB33 DP7_C2M_PB32

DP7_M2C_NB13DP7_M2C_PB12

DP8_C2M_NB29 DP8_C2M_PB28

DP8_M2C_NB9DP8_M2C_PB8

DP9_C2M_NB25 DP9_C2M_PB24

DP9_M2C_NB5DP9_M2C_PB4

GBTCLK0_M2C_ND5GBTCLK0_M2C_PD4

GBTCLK1_M2C_NB21GBTCLK1_M2C_PB20

DP10_C2M_PZ24

DP10_C2M_NZ25

DP11_C2M_PY26

DP11_C2M_NY27

DP12_C2M_PZ28

DP12_C2M_NZ29

DP13_C2M_PY30

DP13_C2M_NY31

DP14_C2M_PM18

DP14_C2M_NM19

DP15_C2M_PM22

DP15_C2M_NM23

DP16_C2M_PM26

DP16_C2M_NM27

DP17_C2M_PM30

DP17_C2M_NM31

DP18_C2M_PM34

DP18_C2M_NM35

DP19_C2M_PM38

DP19_C2M_NM39

DP20_C2M_PZ8

DP20_C2M_NZ9

DP21_C2M_PY6

DP21_C2M_NY7

DP22_C2M_PZ4

DP22_C2M_NZ5

DP23_C2M_PY2

DP23_C2M_NY3

DP10_M2C_PY10

DP10_M2C_NY11

DP11_M2C_PZ12

DP11_M2C_NZ13

DP12_M2C_PY14

DP12_M2C_NY15

DP13_M2C_PZ16

DP13_M2C_NZ17

DP14_M2C_PY18

DP14_M2C_NY19

DP15_M2C_PY22

DP15_M2C_NY23

DP16_M2C_PZ32

DP16_M2C_NZ33

DP17_M2C_PY34

DP17_M2C_NY35

DP18_M2C_PZ36

DP18_M2C_NZ37

DP19_M2C_PY38

DP19_M2C_NY39

DP20_M2C_PM14

DP20_M2C_NM15

DP21_M2C_PM10

DP21_M2C_NM11

DP22_M2C_PM6

DP22_M2C_NM7

DP23_M2C_PM2

DP23_M2C_NM3

GBTCLK2_M2C_PL12

GBTCLK2_M2C_NL13

GBTCLK3_M2C_PL8

GBTCLK3_M2C_NL9

GBTCLK4_M2C_PL4

GBTCLK4_M2C_NL5

GBTCLK5_M2C_PZ20

GBTCLK5_M2C_NZ21

R312

DNI

C297 1uF

R309

DNI

C296 1uF

J27E

ASP-184329-01

CLK_DIRB1 CLK0_M2C_N

H5CLK0_M2C_PH4

CLK1_M2C_NG3CLK1_M2C_PG2

CLK2_BIDIR_NK5 CLK2_BIDIR_PK4

CLK3_BIDIR_NJ3 CLK3_BIDIR_PJ2

GA0C34

GA1D35

PG_C2MD1

PG_M2CF1

PRSNT_M2C_LH2

RES0B40

SCLC30 SDAC31

TCKD29TDID30TDOD31TMSD33TRST_LD34

3P3VAUXD32

3P3V0D40

3P3V1C39

3P3V2D36

3P3V3D38

12P0V0C35

12P0V1C37

VADJ0E39

VADJ1F40

VADJ2G39

VADJ3H40

VIO_B_M2C_0K40

VIO_B_M2C_1J39

VREF_B_M2CK1

VREF_A_M2CH1

3P3V4Z40

12P0V4L40

12P0V2L36

12P0V3L37

RES1L1

REFCLK_M2C_PL24

REFCLK_M2C_NL25

SYNC_C2M_PL16

SYNC_C2M_NL17

HSPC_PRSNT_M2C_LZ1

RES2L32

RES3L33

REFCLK_C2M_PL20

REFCLK_C2M_NL21

SYNC_M2C_NL29SYNC_M2C_PL28

C290 10uF

C294 10uF

R314

1.00K

C291 10uF C293 10uF

R308

1.00K

FAGA0FAGA1

FAPG_M2C

FAPRSNT_NFAGA1 FAGA0

FAPG_C2M

Page 28: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

S10 Banks - SDM

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Wallichs, Gary <[email protected]>Swaminathan, Shiva <[email protected]>A known current is applied to SENSOR_THERM_IN (with return currents coming out on SENSOR_THERM_OUT) and the voltage across the temperature-sensing diode is measured.

MSEL[2:0]1 0 1 AVSTx160 1 1 Normal AS0 0 1 Fast AS1 1 1 JTAG OnlyDefault AVSTx16

VFEF_ADC sources from 1.25V zener

AS x4

For Debug Purpose

E-tiles

SDM

S10_1V8

S10_1V8

S10_1V8S10_1V8 S10_1V8 S10_1V8

IO_2V5

ATB[3:2] 37

FPGA_OSC_CLK_1 7FPGA_nCONFIG 10,13

FPGA_nSTATUS 13FPGA_INIT_DONE 13

FPGA_MSEL[2:0] 13

FPGA_AVST_READY 13

VCC_SDA 18

FPGA_CvP_DONE 13FPGA_SEU_ERR 13

VCC_SCL 18

FPGA_CONF_DONE 13

S10_JTAG_TDI 9

S10_JTAG_TDO 9S10_JTAG_TMS 9S10_JTAG_TCK 9

TEMPDIODE_P[6:0] 12,30

TEMPDIODE_N[6:0] 12,30

VCC_ALERTn 13

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

28 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

28 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

28 53Sunday, November 05, 2017

R3384.7K

R322

10.0K

R317 2.0K

R331 DNI

R316 2.0K

R323

10.0K

R328 DNI

R332 10.0K

1ST280EYF55

U39J

DNU10BG39

DNU11BG38

DNU12U27

DNU13V28

RREF_BLBP37

O_SENS_EXT_IN11AH39

I2C_CLK11AJ37

I2C_DATA11AJ36

TEMPDIODE2nAG37

TEMPDIODE2pAH37

IO_AUX_RREF11AH38

DNU14AH36

O_SENS_EXT_IN12AF39

I2C_CLK12AF36

I2C_DATA12AE36

TEMPDIODE3nAE37

TEMPDIODE3pAF37

IO_AUX_RREF12AF38

DNU15AG36

O_SENS_EXT_IN20AY16

I2C_CLK20AV18

I2C_DATA20AV17

TEMPDIODE4nAW18

TEMPDIODE4pAY19

IO_AUX_RREF20AY17

DNU16BM2

O_SENS_EXT_IN21AH16

I2C_CLK21AJ18

I2C_DATA21AH19

TEMPDIODE5nAG18

TEMPDIODE5pAH18

IO_AUX_RREF21AH17

DNU17AJ19

O_SENS_EXT_IN22AF16

I2C_CLK22AF19

I2C_DATA22AE19

TEMPDIODE6nAF18

TEMPDIODE6pAE18

IO_AUX_RREF22AF17

DNU18AG19

R3394.7K

D22

LT1389

Gnd04

Vout6

Gnd15

nc11

nc22

nc33

nc47

nc58

R319 2.0K

R333 10.0K

TP54

R326 DNI

SW8

CAS-D20TB1

4

6

5

1

2

3

U40

EPCQ1024L

S#C2 DQ1

D2

W#/VPP/DQ2C4

VSSB3

DQ0D3

CB2

HOLD#/DQ3D4

VCCB4

NC1A2

NC2A3

NC3A4

NC4A5

NC5B1

NC6B5

NC7C1

NC8C3

NC9C5

NC10D1

NC11D5

NC12E1

NC13E2

NC14E3

NC15E4

NC16E5

R321 2.0K

R340DNI

R324 DNI

R334499

R320 2.0K

1ST280EYF55

U39I

OSC_CLK_1AW28

SDM_IO0, INIT_DONE, PWRMGT_PWM0, PWRMGT_SCLAU28

SDM_IO1, AVSTX8_DATA2, AS_DATA1, SDMMC_CFG_DATA1, NAND_RE_NBE29

SDM_IO5, INIT_DONE, AS_nCSO0, SDMMC_CFG_CCLK, NAND_WE_N, MSEL0, CONF_DONEAV28

SDM_IO3, AVSTX8_DATA3, AS_DATA2, SDMMC_CFG_DATA2, NAND_ADQ2BF29

NCONFIGBB28

SDM_IO4, AVSTX8_DATA1, AS_DATA0, SDMMC_CFG_CMD, NAND_ADQ1BD28

SDM_IO2, AVSTX8_DATA0, AS_CLK, SDMMC_CFG_DATA0, NAND_ADQ0AU27

SDM_IO7, AS_NCSO2, NAND_ALE, MSEL1BE27

SDM_IO11, AVSTX8_VALID, PWRMGT_SDA, NAND_ADQ6BG27

NSTATUSBD27

SDM_IO16, INIT_DONE, CONF_DONE, PWRMGT_SDAAV26

SDM_IO13, AVSTX8_DATA5, SDMMC_CFG_DATA5, NAND_CE_NBC28

SDM_IO9, AS_NCSO1, NAND_CLE, MSEL2BF27

SDM_IO6, AVSTX8_DATA4, AS_DATA3, SDMMC_CFG_DATA3, NAND_ADQ3BD29

SDM_IO10, AVSTX8_DATA7, SDMMC_CFG_DATA7, NAND_ADQ5AU26

SDM_IO8, AVST_READY, AS_NCSO3, SDMMC_CFG_DATA4, NAND_RBBG28

SDM_IO12, PWRMGT_PWM0, PWRMGT_SDA, NAND_WP_NBF28

SDM_IO15, AVSTX8_DATA6, SDMMC_CFG_DATA6, NAND_ADQ4BA28 SDM_IO14, AVSTX8_CLK, PWRMGT_SCL, NAND_ADQ7BH28

TDOBM30

TMSBL29

TCKBK29

TDIBL27

DNU4/ATB0BN31

DNU5/ATB1BP32

RREF_SDMBP31

DNU6BP27

GNDBJ27

VREFP_ADCBN29

VREFN_ADCBN28

VSIGP_0BP28

VSIGN_0BP29

VSIGP_1BM28

VSIGN_1BL28

DNU7BK27

TEMPDIODE0nBM27

TEMPDIODE0pBN30

C298

0.1uF

TP55

R325 10.0K

C299

0.1uF

J28

TSM-105-01-T-DV-TR

11

33

55

77

22

44

66

88

99

1010

TP57

R336 4.7K R337 4.7K

V17

RSNS1

SNS2

R329 DNI

R318 2.0K

R335 4.7K

R327 10.0KJ29

HEADER, 1x3-PIN

123

R330 DNI

TP56

R315 2.0K

ETILE_SCLETILE_SDA

ETILE_SCLETILE_SDATEMPDIODE_N1TEMPDIODE_P1

TEMPDIODE_N2

TEMPDIODE_P3TEMPDIODE_N3

TEMPDIODE_P2

TEMPDIODE_P4TEMPDIODE_N4

TEMPDIODE_P5TEMPDIODE_N5

FPGA_AS_DATA0

FPGA_CvP_DONE

FPGA_SEU_ERR

FPGA_nCONFIGFPGA_OSC_CLK_1

FPGA_AS_DATA3

FPGA_AS_DATA2

FPGA_AS_DATA1

FPGA_MSEL0

FPGA_AS_CLK

FPGA_CONF_DONE

FPGA_INIT_DONE

FPGA_nSTATUS

VCC_ALERTn

VCC_SCL

FPGA_AVST_READYFPGA_MSEL1

FPGA_MSEL2

VCC_SDA

S10_JTAG_TMSS10_JTAG_TCK

S10_JTAG_TDO

S10_JTAG_TDI

S10_VREFNADC

S10_VREFPADC

S10_VREFPADCS10_VREFNADC

ATB1ATB0

FPGA_nCONFIG

FPGA_CONF_DONEFPGA_INIT_DONE

FPGA_nSTATUS

FPGA_MSEL0FPGA_AS_CLK FPGA_AS_DATA1

FPGA_AS_DATA0

FPGA_AS_DATA3FPGA_AS_DATA2

FPGA_MSEL1 FPGA_MSEL0FPGA_MSEL2

FPGA_SEU_ERRFPGA_CvP_DONE

ETILE_SDAETILE_SCL

ATB2ATB3

TEMPDIODE_P0TEMPDIODE_N0

Page 29: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

S10 Top Banks 2 L/M/N

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

place termination at S10

CAD Notes:

HB00_CC

S10_1V8

FACLKM2CN0 27FACLKM2CP0 27

ENET_INTn 16

ENET_RSTn 16

ENET_MDIO 16ENET_MDC 16

USB_ADDR[1:0] 9USB_FULL 9

USB_SDA 9

USB_RESETn 9

USB_DATA[7:0] 9

USB_WRn 9USB_RDn 9USB_OEn 9

USB_SCL 9

USB_EMPTY 9

CPU_RESETn 13,17

USER_LED[3:0] 17

S10_Unlock 17

USER_PB[3:0] 17

USER_DIP[2:0] 17

OVERTEMPn_1V8 13TEMP_ALERTn_1V8 13

I2C_1V8_SDA 7,13,18I2C_1V8_SCL 7,13,18

USB_FPGA_CLK 9

CLK_TOP_PLL_125M_N 7CLK_TOP_PLL_125M_P 7

FAHBP026FAHBN026

FAHBP1326FAHBN1326

FACLKBIDIRP227FACLKBIDIRN227

FAHBP6 26

OSFP_LPWn 19OSFP_RSTn 19

OIF_SDA0 23OIF_SCL0 23

OSFP_INTn 19OSFP_PRSn 19

DDQ2x1_Initmode1 23DDQ2x1_modselL1 23DDQ2x1_resetL1 23

DDQ2x1_modprsL1 23DDQ2x1_intl1 23

DDQ2x1_Initmode2 23DDQ2x1_modselL2 23DDQ2x1_resetL2 23

DDQ2x1_intl2 23DDQ2x1_modprsL2 23

DDQ1x1_Initmode 21DDQ1x1_modselL 21DDQ1x1_resetL 21

DDQ1x1_intl 21DDQ1x1_modprsL 21

DDQ1x2_Initmode1 22DDQ1x2_modselL1 22DDQ1x2_resetL1 22

DDQ1x2_modprsL1 22DDQ1x2_intl1 22

DDQ1x2_Initmode2 22

DDQ1x2_modprsL2 22

DDQ1x2_resetL2 22DDQ1x2_modselL2 22

DDQ1x2_intl2 22

USER_IO[9:0] 13,17

OIF_SDA1 22OIF_SCL1 22

CLK_50M_S10 6

FAHBN726FAHBP726

FAHBN1426FAHBP1426FAHBN2026FAHBP2026

FAHBN126FAHBP126FAHBN626

FAHBN2126

FAHBN1826FAHBP1826

FAHBN326FAHBP326

FAHBN226FAHBP226

FAHBN1726FAHBP1726

FAHBN426FAHBP426

FAHBN1626FAHBP1626

FAHBN526FAHBP526

FAHBN1926FAHBP1926

FAHBN926FAHBP926

FAHBN1226FAHBP1226

FAHBN826FAHBP826

FAHBN1526FAHBP1526

FAHBN1126FAHBP1126

FAHBN1026FAHBP1026

FAHBP2126

ENET_SGMII_TX_P 16ENET_SGMII_TX_N 16

ENET_SGMII_RX_P 16ENET_SGMII_RX_N 16

OPT_FAN_RPM1V8 21

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

29 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

29 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

29 53Sunday, November 05, 2017

J331

2 3 4 5

1ST280EYF55

U39G

IO, LVDS2L_1N, DQ8K24

IO, LVDS2L_1P, DQ8L24

IO, LVDS2L_2N, DQ8H23

IO, LVDS2L_2P, DQ8J22

IO, LVDS2L_3N, DQ8H24

IO, LVDS2L_3P, DQ8J24

IO, LVDS2L_4N, DQSN8G22

IO, LVDS2L_4P, DQS8H22

IO, LVDS2L_5N, DQ8G23

IO, LVDS2L_5P, DQ8G24

IO, LVDS2L_6N, DQ8K23

IO, LVDS2L_6P, DQ8K22

IO, LVDS2L_7N, DQ9L22

IO, LVDS2L_7P, DQ9M22

IO, LVDS2L_8N, DQ9M20

IO, LVDS2L_8P, DQ9N20

IO, LVDS2L_9N, DQ9M21

IO, LVDS2L_9P, DQ9N21

IO, PLL_2L_CLKOUT1N, LVDS2L_10N, DQSN9N19

IO, PLL_2L_CLKOUT1p, PLL_2L_CLKOUT1, PLL_2L_FB1, LVDS2L_10p, DQS9P19

IO, LVDS2L_11N, DQ9L23

IO, RZQ_2L, LVDS2L_11P, DQ9M23

IO, CLK_2L_1N, LVDS2L_12N, DQ9M19

IO, CLK_2L_1P, LVDS2L_12P, DQ9N18

IO, CLK_2L_0N, LVDS2L_13N, DQ10P23

IO, CLK_2L_0P, LVDS2L_13P, DQ10N23

IO, LVDS2L_14N, DQ10R20

IO, LVDS2L_14P, DQ10T20

IO, PLL_2L_CLKOUT0N, LVDS2L_15N, DQ10P21

IO, PLL_2L_CLKOUT0p, PLL_2L_CLKOUT0, PLL_2L_FB0, LVDS2L_15p, DQ10R21

IO, LVDS2L_16N, DQSN10T19

IO, LVDS2L_16P, DQS10R19

IO, LVDS2L_17N, DQ10P22

IO, LVDS2L_17P, DQ10R22

IO, LVDS2L_18N, DQ10R18

IO, LVDS2L_18P, DQ10P18

IO, LVDS2L_19N, DQ11T23

IO, LVDS2L_19P, DQ11U23

IO, LVDS2L_20N, DQ11W21

IO, LVDS2L_20P, DQ11V21

IO, LVDS2L_21N, DQ11U22

IO, LVDS2L_21P, DQ11T22

IO, LVDS2L_22N, DQSN11U20

IO, LVDS2L_22P, DQS11U21

IO, LVDS2L_23N, DQ11W22

IO, LVDS2L_23P, DQ11W23

IO, LVDS2L_24N, DQ11T18

IO, LVDS2L_24P, DQ11U18

IO, LVDS2M_1N, DQ4A25

IO, LVDS2M_1P, DQ4B25

IO, LVDS2M_2N, DQ4E27

IO, LVDS2M_2P, DQ4D27

IO, LVDS2M_3N, DQ4C25

IO, LVDS2M_3P, DQ4D25

IO, LVDS2M_4N, DQSN4C27

IO, LVDS2M_4P, DQS4B27

IO, LVDS2M_5N, DQ4D26

IO, LVDS2M_5P, DQ4C26

IO, LVDS2M_6N, DQ4A26

IO, LVDS2M_6P, DQ4A27

IO, LVDS2M_7N, DQ5J26

IO, LVDS2M_7P, DQ5H26

IO, LVDS2M_8N, DQ5K27

IO, LVDS2M_8P, DQ5J27

IO, LVDS2M_9N, DQ5E25

IO, LVDS2M_9P, DQ5F25

IO, PLL_2M_CLKOUT1N, LVDS2M_10N, DQSN5G27

IO, PLL_2M_CLKOUT1p, PLL_2M_CLKOUT1, PLL_2M_FB1, LVDS2M_10p, DQS5G26

IO, LVDS2M_11N, DQ5G25

IO, RZQ_2M, LVDS2M_11P, DQ5H25

IO, CLK_2M_1N, LVDS2M_12N, DQ5F26

IO, CLK_2M_1P, LVDS2M_12P, DQ5F27

IO, CLK_2M_0N, LVDS2M_13N, DQ6N25

IO, CLK_2M_0P, LVDS2M_13P, DQ6M25

IO, LVDS2M_14N, DQ6P27

IO, LVDS2M_14P, DQ6N26

IO, PLL_2M_CLKOUT0N, LVDS2M_15N, DQ6K25

IO, PLL_2M_CLKOUT0p, PLL_2M_CLKOUT0, PLL_2M_FB0, LVDS2M_15p, DQ6L25

IO, LVDS2M_16N, DQSN6K26

IO, LVDS2M_16P, DQS6L27

IO, LVDS2M_17N, DQ6N24

IO, LVDS2M_17P, DQ6P24

IO, LVDS2M_18N, DQ6M26

IO, LVDS2M_18P, DQ6M27

IO, LVDS2M_19N, DQ7T25

IO, LVDS2M_19P, DQ7R25

IO, LVDS2M_20N, DQ7U25

IO, LVDS2M_20P, DQ7U26

IO, LVDS2M_21N, DQ7R24

IO, LVDS2M_21P, DQ7T24

IO, LVDS2M_22N, DQSN7R26

IO, LVDS2M_22P, DQS7P26

IO, LVDS2M_23N, DQ7V24

IO, LVDS2M_23P, DQ7W24

IO, LVDS2M_24N, DQ7V25

IO, LVDS2M_24P, DQ7W26

IO, LVDS2N_1N, DQ0G33

IO, LVDS2N_1P, DQ0G32

IO, LVDS2N_2N, DQ0G31

IO, LVDS2N_2P, DQ0H31

IO, LVDS2N_3N, DQ0H33

IO, LVDS2N_3P, DQ0J33

IO, LVDS2N_4N, DQSN0J31

IO, LVDS2N_4P, DQS0K31

IO, LVDS2N_5N, DQ0L33

IO, LVDS2N_5P, DQ0K33

IO, LVDS2N_6N, DQ0K32

IO, LVDS2N_6P, DQ0J32

IO, LVDS2N_7N, DQ1M35

IO, LVDS2N_7P, DQ1N35

IO, LVDS2N_8N, DQ1M31

IO, LVDS2N_8P, DQ1M32

IO, LVDS2N_9N, DQ1M36

IO, LVDS2N_9P, DQ1N36

IO, PLL_2N_CLKOUT1N, LVDS2N_10N, DQSN1M34

IO, PLL_2N_CLKOUT1p, PLL_2N_CLKOUT1, PLL_2N_FB1, LVDS2N_10p, DQS1N34

IO, LVDS2N_11N, DQ1N37

IO, RZQ_2N, LVDS2N_11P, DQ1P37

IO, CLK_2N_1N, LVDS2N_12N, DQ1M33

IO, CLK_2N_1P, LVDS2N_12P, DQ1L32

IO, CLK_2N_0N, LVDS2N_13N, DQ2R35

IO, CLK_2N_0P, LVDS2N_13P, DQ2T35

IO, LVDS2N_14N, DQ2P32

IO, LVDS2N_14P, DQ2R32

IO, PLL_2N_CLKOUT0N, LVDS2N_15N, DQ2P36

IO, PLL_2N_CLKOUT0p, PLL_2N_CLKOUT0, PLL_2N_FB0, LVDS2N_15p, DQ2R36

IO, LVDS2N_16N, DQSN2P33

IO, LVDS2N_16P, DQS2P34

IO, LVDS2N_17N, DQ2R37

IO, LVDS2N_17P, DQ2T37

IO, LVDS2N_18N, DQ2T34

IO, LVDS2N_18P, DQ2R34

IO, LVDS2N_19N, DQ3W33

IO, LVDS2N_19P, DQ3W34

IO, LVDS2N_20N, DQ3U33

IO, LVDS2N_20P, DQ3T33

IO, LVDS2N_21N, DQ3V34

IO, LVDS2N_21P, DQ3U35

IO, LVDS2N_22N, DQSN3T32

IO, LVDS2N_22P, DQS3U32

IO, LVDS2N_23N, DQ3U36

IO, LVDS2N_23P, DQ3U37

IO, LVDS2N_24N, DQ3V33

IO, LVDS2N_24P, DQ3W32

NC1J29

NC2P31

NC3C30

NC4K30

NC5U30

NC6A29

NC7R31

NC8D29

NC9L30

NC10H30

NC11D30

NC12N30

NC13B30

NC14E29

NC15U31

NC16F30

NC17N31

NC18G30

NC19T30

NC20A30

NC21H29

NC22N29

NC23E30

NC24R29

NC25F29

NC26T29

NC27L29

NC28G28

NC29N28

NC30C28

NC31R30

NC32K29

NC33L28

NC34C29

NC35F28

NC36P28

NC37A28

NC38H28

NC39T28

NC40J28

NC41M28

NC42B28

NC43U28

NC44D28

NC45P29

NC46R27

NC47M30

NC48T27

R34110.0K

J321

2345

R345DNI

J30 1

2345

R34210.0K

R34449.9

R343100

R34649.9

J311

2 3 4 5

CLKIN_SMA_2L_PCLKIN_SMA_2L_N

CLKOUT_SMA_2L_PCLKOUT_SMA_2L_N

CLKOUT_SMA_2L_PCLKOUT_SMA_2L_N

OVERTEMPn_1V8

TEMP_ALERTn_1V8

USB_OEn

USB_EMPTYUSB_FULL

USB_DATA0USB_SDAUSB_SCLUSB_WRnUSB_RDn

USB_RESETn

USB_DATA5USB_DATA4USB_DATA3USB_DATA2USB_DATA1

USB_ADDR0USB_DATA7USB_DATA6

FACLKM2CN0FACLKM2CP0

USB_ADDR1

USB_FPGA_CLK

RZQ_2N

USER_LED3USER_LED2

USER_LED1

ENET_MDC

ENET_INTnENET_RSTnENET_MDIO

USER_DIP1USER_DIP2

USER_DIP0

OIF_SDA0OIF_SCL0

OIF_SDA1OIF_SCL1

DDQ2x1_Initmode1

DDQ2x1_resetL1DDQ2x1_modselL1

DDQ2x1_modprsL1DDQ2x1_intl1

DDQ2x1_modprsL2

DDQ2x1_modselL2DDQ2x1_resetL2

DDQ2x1_Initmode2

DDQ2x1_intl2

DDQ1x1_Initmode

DDQ1x1_resetLDDQ1x1_modselL

DDQ1x1_modprsLDDQ1x1_intl

S10_Unlock

OSFP_RSTnOSFP_LPWn

OSFP_INTnOSFP_PRSn

I2C_1V8_SDAI2C_1V8_SCL

USER_PB1USER_PB0

USER_PB2USER_PB3

DDQ1x2_Initmode1

DDQ1x2_resetL1DDQ1x2_modselL1

DDQ1x2_modprsL1DDQ1x2_intl1

DDQ1x2_modselL2

DDQ1x2_intl2DDQ1x2_modprsL2DDQ1x2_resetL2

DDQ1x2_Initmode2

USER_LED0

TEMP_ALERTn_1V8OVERTEMPn_1V8

CLK_50M_S10CPU_RESETn

ENET_SGMII_TX_N

ENET_SGMII_RX_NENET_SGMII_TX_P

ENET_SGMII_RX_P

USER_IO2USER_IO1USER_IO7USER_IO5

USER_IO0

USER_IO9

USER_IO3

USER_IO8USER_IO6USER_IO4

CLKIN_SMA_2L_NCLKIN_SMA_2L_P

CLK_TOP_PLL_125M_NCLK_TOP_PLL_125M_P

OPT_FAN_RPM1V8

Page 30: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

S10 Bottom Banks - 3A/B/C

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

LA17_CC

LA00_CC

HA00_CC

H-tile

S10_1V8

FPGA_PR_ERROR 13FPGA_PR_REQUEST 13

FPGA_PR_DONE 13

FPGA_CONFIG_D[15:0]13

FALAP0 26FALAN0 26

FALAP17 26FALAN17 26

FPGA_AVST_CLK 13FPGA_AVST_VALID 13

PCIe_PERSTn_1V8 13

FACLKM2CP127FACLKM2CN127

FAREFCLKC2MP27FAREFCLKC2MN27

FAREFCLKM2CN27FAREFCLKM2CP27

FAHAP026FAHAN026

FACLKBIDIRN327FACLKBIDIRP327

FASYNCM2CP27FASYNCM2CN27

FASYNCC2MP27FASYNCC2MN27

FAHAN21 26

FAHAP22 26

FAHAP23 26FAHAN23 26

CLK_BOT_PLL_100M_P 7CLK_BOT_PLL_100M_N 7

TEMPDIODE_P[6:0] 12,28

TEMPDIODE_N[6:0] 12,28

FAHAP21 26FAHAN22 26

FAHAN1026FAHAP1026

FAHAN1826FAHAP1826

FAHAN2026FAHAP2026FAHAN1926FAHAP1926

FAHAN326FAHAP326

FAHAN226FAHAP226

FAHAN126FAHAP126

FAHAN726FAHAP726FAHAN526FAHAP526

FAHAN426FAHAP426FAHAN626FAHAP626FAHAN926FAHAP926

FAHAN826FAHAP826FAHAN1126FAHAP1126

FAHAN1326FAHAP1326

FAHAN1226FAHAP1226

FAHAN1426FAHAP1426

FAHAN1626FAHAP1626

FAHAN1526FAHAP1526

FAHAN1726FAHAP1726

FALAN3226FALAP3226FALAN3326FALAP3326

FALAN7 26FALAP7 26

FALAN12 26FALAP12 26

FALAN926FALAP926FALAN1026FALAP1026

FALAN1126FALAP1126

FALAN1626FALAP1626

FALAN1326FALAP1326

FALAN1426FALAP1426

FALAN1526FALAP1526

FALAN19 26FALAP19 26

FALAN20 26FALAP20 26

FALAN18 26FALAP18 26

FALAN23 26FALAP23 26

FALAN22 26FALAP22 26

FALAN21 26FALAP21 26

FALAN27 26FALAP27 26

FALAN26 26FALAP26 26

FALAN25 26FALAP25 26

FALAN24 26FALAP24 26

FALAN28 26FALAP28 26

FALAN29 26FALAP29 26

FALAN31 26FALAP31 26FALAN30 26FALAP30 26

FALAN426FALAP426

FALAN2 26FALAP2 26

FALAN1 26FALAP1 26

FALAN3 26FALAP3 26

FALAN6 26FALAP6 26

FALAN5 26FALAP5 26

FALAN8 26FALAP8 26

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

30 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

30 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

30 53Sunday, November 05, 2017

R3491K

TP58

1ST280EYF55

U39H

IO, LVDS3A_1N, DQ92AW22

IO, LVDS3A_1P, DQ92AW21

IO, LVDS3A_2N, DQ92AU21

IO, LVDS3A_2P, DQ92AU22

IO, LVDS3A_3N, DQ92AV19

IO, LVDS3A_3P, DQ92AW19

IO, LVDS3A_4N, DQSN92AV23

IO, LVDS3A_4P, DQS92AU23

IO, LVDS3A_5N, DQ92AY20

IO, LVDS3A_5P, DQ92AY21

IO, LVDS3A_6N, DQ92AV20

IO, LVDS3A_6P, DQ92AV21

IO, LVDS3A_7N, DQ93AV24

IO, LVDS3A_7P, DQ93AW23

IO, LVDS3A_8N, DQ93AY25

IO, LVDS3A_8P, DQ93BA25

IO, LVDS3A_9N, DQ93BA22

IO, LVDS3A_9P, DQ93AY22

IO, PLL_3A_CLKOUT1N, LVDS3A_10N, DQSN93AY24

IO, PLL_3A_CLKOUT1p, PLL_3A_CLKOUT1, PLL_3A_FB1, LVDS3A_10p, DQS93AW24

IO, LVDS3A_11N, DQ93BA24

IO, RZQ_3A, LVDS3A_11P, DQ93BA23

IO, CLK_3A_1N, LVDS3A_12N, DQ93AU25

IO, CLK_3A_1P, LVDS3A_12P, DQ93AV25

IO, CLK_3A_0N, LVDS3A_13N, DQ94BD25

IO, CLK_3A_0P, LVDS3A_13P, DQ94BE25

IO, LVDS3A_14N, DQ94BC26

IO, LVDS3A_14P, DQ94BB26

IO, PLL_3A_CLKOUT0N, LVDS3A_15N, DQ94BF25

IO, PLL_3A_CLKOUT0p, PLL_3A_CLKOUT0, PLL_3A_FB0, LVDS3A_15p, DQ94BG25

IO, LVDS3A_16N, DQSN94BH26

IO, LVDS3A_16P, DQS94BG26

IO, LVDS3A_17N, DQ94BC25

IO, LVDS3A_17P, DQ94BB25

IO, LVDS3A_18N, DQ94BE26

IO, LVDS3A_18P, DQ94BD26

IO, LVDS3A_19N, DQ95BM25

IO, LVDS3A_19P, DQ95BN25

IO, LVDS3A_20N, DQ95BM26

IO, LVDS3A_20P, DQ95BN26

IO, LVDS3A_21N, DQ95BJ25

IO, LVDS3A_21P, DQ95BH25

IO, LVDS3A_22N, DQSN95BJ26

IO, LVDS3A_22P, DQS95BK26

IO, LVDS3A_23N, DQ95BK25

IO, LVDS3A_23P, DQ95BL25

IO, LVDS3A_24N, DQ95BP26

IO, LVDS3A_24P, DQ95BP25

IO, LVDS3B_1N, DQ88AV31

IO, LVDS3B_1P, DQ88AV30

IO, LVDS3B_2N, DQ88AU31

IO, LVDS3B_2P, DQ88AU32

IO, LVDS3B_3N, DQ88AY30

IO, LVDS3B_3P, DQ88AY29

IO, LVDS3B_4N, DQSN88AW32

IO, LVDS3B_4P, DQS88AW31

IO, LVDS3B_5N, DQ88AV29

IO, LVDS3B_5P, DQ88AW29

IO, LVDS3B_6N, DQ88AY32

IO, LVDS3B_6P, DQ88AY31

IO, LVDS3B_7N, DQ89BB31

IO, LVDS3B_7P, DQ89BB30

IO, LVDS3B_8N, DQ89BD32

IO, LVDS3B_8P, DQ89BE32

IO, LVDS3B_9N, DQ89BC30

IO, LVDS3B_9P, DQ89BC29

IO, PLL_3B_CLKOUT1N, LVDS3B_10N, DQSN89BA32

IO, PLL_3B_CLKOUT1p, PLL_3B_CLKOUT1, PLL_3B_FB1, LVDS3B_10p, DQS89BB32

IO, LVDS3B_11N, DQ89BA30

IO, RZQ_3B, LVDS3B_11P, DQ89BA29

IO, CLK_3B_1N, LVDS3B_12N, DQ89BC31

IO, CLK_3B_1P, LVDS3B_12P, DQ89BD31

IO, CLK_3B_0N, LVDS3B_13N, DQ90BE31

IO, CLK_3B_0P, LVDS3B_13P, DQ90BE30

IO, LVDS3B_14N, DQ90BG32

IO, LVDS3B_14P, DQ90BF32

IO, PLL_3B_CLKOUT0N, LVDS3B_15N, DQ90BH30

IO, PLL_3B_CLKOUT0p, PLL_3B_CLKOUT0, PLL_3B_FB0, LVDS3B_15p, DQ90BJ31

IO, LVDS3B_16N, DQSN90BK32

IO, LVDS3B_16P, DQS90BJ32

IO, LVDS3B_17N, DQ90BG30

IO, LVDS3B_17P, DQ90BF30

IO, LVDS3B_18N, DQ90BH31

IO, LVDS3B_18P, DQ90BG31

IO, LVDS3B_19N, DQ91BL30

IO, LVDS3B_19P, DQ91BM31

IO, LVDS3B_20N, DQ91BN33

IO, LVDS3B_20P, DQ91BP33

IO, LVDS3B_21N, DQ91BJ28

IO, LVDS3B_21P, DQ91BH29

IO, LVDS3B_22N, DQSN91BK31

IO, LVDS3B_22P, DQS91BL32

IO, LVDS3B_23N, DQ91BJ29

IO, LVDS3B_23P, DQ91BK30

IO, LVDS3B_24N, DQ91BM32

IO, LVDS3B_24P, DQ91BM33

IO, LVDS3C_1N, DQ84AV33

IO, LVDS3C_1P, DQ84AV34

IO, LVDS3C_2N, DQ84AU35

IO, LVDS3C_2P, DQ84AV35

IO, LVDS3C_3N, DQ84BB33

IO, LVDS3C_3P, DQ84BA33

IO, LVDS3C_4N, DQSN84BA35

IO, LVDS3C_4P, DQS84BA34

IO, LVDS3C_5N, DQ84AW33

IO, LVDS3C_5P, DQ84AW34

IO, LVDS3C_6N, DQ84AY35

IO, LVDS3C_6P, DQ84AY34

IO, LVDS3C_7N, DQ85BE34

IO, LVDS3C_7P, DQ85BE35

IO, LVDS3C_8N, DQ85BD36

IO, LVDS3C_8P, DQ85BE36

IO, LVDS3C_9N, DQ85BD33

IO, LVDS3C_9P, DQ85BD34

IO, PLL_3C_CLKOUT1N, LVDS3C_10N, DQSN85BD37

IO, PLL_3C_CLKOUT1p, PLL_3C_CLKOUT1, PLL_3C_FB1, LVDS3C_10p, DQS85BE37

IO, LVDS3C_11N, DQ85BC33

IO, RZQ_3C, LVDS3C_11P, DQ85BC34

IO, CLK_3C_1N, LVDS3C_12N, DQ85BB35

IO, CLK_3C_1P, LVDS3C_12P, DQ85BC35

IO, CLK_3C_0N, LVDS3C_13N, DQ86BF34

IO, CLK_3C_0P, LVDS3C_13P, DQ86BF33

IO, LVDS3C_14N, DQ86BG35

IO, LVDS3C_14P, DQ86BF35

IO, PLL_3C_CLKOUT0N, LVDS3C_15N, DQ86BJ34

IO, PLL_3C_CLKOUT0p, PLL_3C_CLKOUT0, PLL_3C_FB0, LVDS3C_15p, DQ86BJ33

IO, LVDS3C_16N, DQSN86BH36

IO, LVDS3C_16P, DQS86BG36

IO, LVDS3C_17N, DQ86BH33

IO, LVDS3C_17P, DQ86BG33

IO, LVDS3C_18N, DQ86BH34

IO, LVDS3C_18P, DQ86BH35

IO, LVDS3C_19N, DQ87BM34

IO, LVDS3C_19P, DQ87BN34

IO, LVDS3C_20N, DQ87BJ36

IO, LVDS3C_20P, DQ87BK36

IO, LVDS3C_21N, DQ87BL34

IO, LVDS3C_21P, DQ87BL33

IO, LVDS3C_22N, DQSN87BK35

IO, LVDS3C_22P, DQS87BK34

IO, LVDS3C_23N, DQ87BP34

IO, LVDS3C_23P, DQ87BP35

IO, LVDS3C_24N, DQ87BL35

IO, LVDS3C_24P, DQ87BM35

TEMPDIODE1nBN37

TEMPDIODE1pBM37

IO3V0_10, NPERSTL0BF37

IO3V1_10BF38

IO3V2_10BH37

IO3V3_10BG37

IO3V4_10BJ37

IO3V5_10BK37

IO3V6_10BL37

IO3V7_10BM36

DNU3BM54

TP59

R348

10.0KR347

10.0K

FPGA_CONFIG_D6FPGA_CONFIG_D7

FPGA_CONFIG_D0FPGA_CONFIG_D1

FPGA_CONFIG_D11FPGA_CONFIG_D12

FPGA_CONFIG_D2FPGA_CONFIG_D3FPGA_CONFIG_D4FPGA_CONFIG_D5

FPGA_CONFIG_D14FPGA_CONFIG_D15

FPGA_CONFIG_D8FPGA_CONFIG_D9FPGA_CONFIG_D10

FPGA_CONFIG_D13

FPGA_AVST_VALID

FPGA_AVST_CLK

FPGA_PR_DONE

CLK_BOT_PLL_100M_NCLK_BOT_PLL_100M_P

FPGA_PR_ERROR

FPGA_PR_REQUEST

TEMPDIODE_P6TEMPDIODE_N6

Page 31: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

External Clock Input

S10 HTile Banks - 1C/D/E/F

PCIE REFCLK

FAC2MN027

FAM2CN027FAM2CP027

FAC2MP027

FAM2CP127FAM2CN127

FAC2MN127FAC2MP127

FAC2MN227

FAM2CN227FAM2CP227

FAC2MP227

FAM2CP327FAM2CN327

FAC2MN327FAC2MP327

FAM2CN427FAM2CP427

FAC2MP427FAC2MN427

FAM2CN527

FAC2MN527FAC2MP527

FAM2CP527

FAC2MP627FAC2MN627

FAM2CN627FAM2CP627

FAC2MP727

FAM2CP727FAM2CN727

FAC2MN727

FAM2CN827FAM2CP827

FAC2MP827FAC2MN827

FAC2MP927

FAM2CP927FAM2CN927

FAC2MN927FAM2CP1027

FAC2MP1027FAC2MN1027

FAM2CN1027

FAM2CP1127FAM2CN1127

FAC2MN1127FAC2MP1127

FAM2CP12 27FAM2CN12 27

FAC2MP12 27FAC2MN12 27

FAM2CP13 27

FAC2MN13 27FAC2MP13 27

FAM2CN13 27

FAC2MN14 27

FAM2CP14 27FAM2CN14 27

FAC2MP15 27

FAM2CN15 27

FAC2MP14 27

FAM2CP15 27

FAC2MN15 27

FAC2MN16 27

FAM2CP16 27FAM2CN16 27

FAM2CP17 27

FAC2MN17 27

FAC2MP16 27

FAC2MP17 27

FAM2CN17 27

FAM2CN18 27

FAC2MP18 27FAC2MN18 27

FAM2CP18 27

FAM2CN19 27FAM2CP19 27

FAC2MN19 27FAC2MP19 27

FAM2CN20 27

FAC2MP20 27FAC2MN20 27

FAM2CP20 27

FAM2CN21 27FAM2CP21 27

FAC2MN21 27FAC2MP21 27

FAM2CP22 27FAM2CN22 27

FAC2MP22 27

FAC2MP23 27

FAM2CN23 27

FAC2MN22 27FAM2CP23 27

FAC2MN23 27

FAGBTCLKM2CN227FAGBTCLKM2CP227

FAGBTCLKM2CN127

FAGBTCLKM2CN027

FAGBTCLKM2CP127

FAGBTCLKM2CP027FAGBTCLKM2CN4 27FAGBTCLKM2CP4 27

FAGBTCLKM2CP5 27FAGBTCLKM2CN5 27

FAGBTCLKM2CP3 27FAGBTCLKM2CN3 27

CLK_1E_PLL_307M_N 7CLK_1E_PLL_307M_P 7

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

31 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

31 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

31 53Sunday, November 05, 2017

J351

2345

C3010.1uF

C3000.1uF

1ST280EYF55

U39A

REFCLK_GXBL1C_CHTPBD42

REFCLK_GXBL1C_CHTNBD41

GXBL1C_TX_CH5NBL47

GXBL1C_TX_CH5PBL48

GXBL1C_RX_CH5N, GXBL1C_REFCLK5NBM41

GXBL1C_RX_CH5P, GXBL1C_REFCLK5PBM42

GXBL1C_TX_CH4NBM49

GXBL1C_TX_CH4PBM50

GXBL1C_RX_CH4N, GXBL1C_REFCLK4NBK41

GXBL1C_RX_CH4P, GXBL1C_REFCLK4PBK42

GXBL1C_TX_CH3NBP49

GXBL1C_TX_CH3PBP50

GXBL1C_RX_CH3N, GXBL1C_REFCLK3NBH41

GXBL1C_RX_CH3P, GXBL1C_REFCLK3PBH42

GXBL1C_TX_CH2NBM45

GXBL1C_TX_CH2PBM46

GXBL1C_RX_CH2N, GXBL1C_REFCLK2NBN39

GXBL1C_RX_CH2P, GXBL1C_REFCLK2PBN40

GXBL1C_TX_CH1NBN47

GXBL1C_TX_CH1PBN48

GXBL1C_RX_CH1N, GXBL1C_REFCLK1NBL39

GXBL1C_RX_CH1P, GXBL1C_REFCLK1PBL40

GXBL1C_TX_CH0NBP45

GXBL1C_TX_CH0PBP46

GXBL1C_RX_CH0N, GXBL1C_REFCLK0NBJ39

GXBL1C_RX_CH0P, GXBL1C_REFCLK0PBJ40

REFCLK_GXBL1C_CHBPBF42

REFCLK_GXBL1C_CHBNBF41

REFCLK_GXBL1D_CHTPAY42

REFCLK_GXBL1D_CHTNAY41

GXBL1D_TX_CH5NBH49

GXBL1D_TX_CH5PBH50

GXBL1D_RX_CH5N, GXBL1D_REFCLK5NBJ47

GXBL1D_RX_CH5P, GXBL1D_REFCLK5PBJ48

GXBL1D_TX_CH4NBJ51

GXBL1D_TX_CH4PBJ52

GXBL1D_RX_CH4N, GXBL1D_REFCLK4NBJ43

GXBL1D_RX_CH4P, GXBL1D_REFCLK4PBJ44

GXBL1D_TX_CH3NBK53

GXBL1D_TX_CH3PBK54

GXBL1D_RX_CH3N, GXBL1D_REFCLK3NBK45

GXBL1D_RX_CH3P, GXBL1D_REFCLK3PBK46

GXBL1D_TX_CH2NBK49

GXBL1D_TX_CH2PBK50

GXBL1D_RX_CH2N, GXBL1D_REFCLK2NBN43

GXBL1D_RX_CH2P, GXBL1D_REFCLK2PBN44

GXBL1D_TX_CH1NBL51

GXBL1D_TX_CH1PBL52

GXBL1D_RX_CH1N, GXBL1D_REFCLK1NBL43

GXBL1D_RX_CH1P, GXBL1D_REFCLK1PBL44

GXBL1D_TX_CH0NBN51

GXBL1D_TX_CH0PBN52

GXBL1D_RX_CH0N, GXBL1D_REFCLK0NBP41

GXBL1D_RX_CH0P, GXBL1D_REFCLK0PBP42

REFCLK_GXBL1D_CHBPBB42

REFCLK_GXBL1D_CHBNBB41

REFCLK_GXBL1E_CHTPAY39

REFCLK_GXBL1E_CHTNAY38

GXBL1E_TX_CH5NBD49

GXBL1E_TX_CH5PBD50

GXBL1E_RX_CH5N, GXBL1E_REFCLK5NBF45

GXBL1E_RX_CH5P, GXBL1E_REFCLK5PBF46

GXBL1E_TX_CH4NBE51

GXBL1E_TX_CH4PBE52

GXBL1E_RX_CH4N, GXBL1E_REFCLK4NBH45

GXBL1E_RX_CH4P, GXBL1E_REFCLK4PBH46

GXBL1E_TX_CH3NBF53

GXBL1E_TX_CH3PBF54

GXBL1E_RX_CH3N, GXBL1E_REFCLK3NBG43

GXBL1E_RX_CH3P, GXBL1E_REFCLK3PBG44

GXBL1E_TX_CH2NBF49

GXBL1E_TX_CH2PBF50

GXBL1E_RX_CH2N, GXBL1E_REFCLK2NBE43

GXBL1E_RX_CH2P, GXBL1E_REFCLK2PBE44

GXBL1E_TX_CH1NBG51

GXBL1E_TX_CH1PBG52

GXBL1E_RX_CH1N, GXBL1E_REFCLK1NBC43

GXBL1E_RX_CH1P, GXBL1E_REFCLK1PBC44

GXBL1E_TX_CH0NBH53

GXBL1E_TX_CH0PBH54

GXBL1E_RX_CH0N, GXBL1E_REFCLK0NBA43

GXBL1E_RX_CH0P, GXBL1E_REFCLK0PBA44

REFCLK_GXBL1E_CHBPBB39

REFCLK_GXBL1E_CHBNBB38

REFCLK_GXBL1F_CHTPAT42

REFCLK_GXBL1F_CHTNAT41

GXBL1F_TX_CH5NAY53

GXBL1F_TX_CH5PAY54

GXBL1F_RX_CH5N, GXBL1F_REFCLK5NBG47

GXBL1F_RX_CH5P, GXBL1F_REFCLK5PBG48

GXBL1F_TX_CH4NBA51

GXBL1F_TX_CH4PBA52

GXBL1F_RX_CH4N, GXBL1F_REFCLK4NBE47

GXBL1F_RX_CH4P, GXBL1F_REFCLK4PBE48

GXBL1F_TX_CH3NBB53

GXBL1F_TX_CH3PBB54

GXBL1F_RX_CH3N, GXBL1F_REFCLK3NBD45

GXBL1F_RX_CH3P, GXBL1F_REFCLK3PBD46

GXBL1F_TX_CH2NBB49

GXBL1F_TX_CH2PBB50

GXBL1F_RX_CH2N, GXBL1F_REFCLK2NBA47

GXBL1F_RX_CH2P, GXBL1F_REFCLK2PBA48

GXBL1F_TX_CH1NBC51

GXBL1F_TX_CH1PBC52

GXBL1F_RX_CH1N, GXBL1F_REFCLK1NBC47

GXBL1F_RX_CH1P, GXBL1F_REFCLK1PBC48

GXBL1F_TX_CH0NBD53

GXBL1F_TX_CH0PBD54

GXBL1F_RX_CH0N, GXBL1F_REFCLK0NBB45

GXBL1F_RX_CH0P, GXBL1F_REFCLK0PBB46

REFCLK_GXBL1F_CHBPAV42

REFCLK_GXBL1F_CHBNAV41

J341

2345

CLKIN_SMA_1D_P

CLKIN_SMA_1D_N

CLKIN_SMA_1D_PCLKIN_SMA_1D_N

Page 32: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

S10 ETile Banks - 8B

External Clock Input

QSFPDD1x2 Port 1:100G FEC with 28G NRZ, EHIPChannel 1: 0/1/2/3Channel 2: 8/9/10/11Swap channel or swap lane within one channel

QSFPDD1x2 Port 2:100G FEC with 28G NRZ, EHIPChannel 1: 12/13/14/15Channel 2: 20/21/22/23Swap channel or swap lane within one channel

QSFPDD1x2_TXP0 22

QSFPDD1x2_TXN0 22

QSFPDD1x2_TXP1 22

QSFPDD1x2_TXN1 22

QSFPDD1x2_TXP2 22

QSFPDD1x2_TXN2 22QSFPDD1x2_TXN3 22

QSFPDD1x2_TXP3 22

QSFPDD1x2_TXN12 22

QSFPDD1x2_TXP12 22

QSFPDD1x2_TXN13 22

QSFPDD1x2_TXP13 22QSFPDD1x2_TXP14 22

QSFPDD1x2_TXN14 22QSFPDD1x2_TXN15 22

QSFPDD1x2_TXP15 22

QSFPDD1x2_TXP5 22QSFPDD1x2_TXP6 22QSFPDD1x2_TXP7 22QSFPDD1x2_TXP8 22QSFPDD1x2_TXP9 22QSFPDD1x2_TXP10 22QSFPDD1x2_TXP11 22

QSFPDD1x2_TXP4 22

QSFPDD1x2_TXN5 22QSFPDD1x2_TXN6 22QSFPDD1x2_TXN7 22QSFPDD1x2_TXN8 22QSFPDD1x2_TXN9 22QSFPDD1x2_TXN10 22QSFPDD1x2_TXN11 22

QSFPDD1x2_TXN4 22

CLK_8B_OSC_156M_N 6CLK_8B_OSC_156M_P 6

CLK_8B_PLL_307M_P 7CLK_8B_PLL_307M_N 7

QSFPDD1x2_RXP022

QSFPDD1x2_RXN022QSFPDD1x2_RXN122

QSFPDD1x2_RXP122QSFPDD1x2_RXP222

QSFPDD1x2_RXN222QSFPDD1x2_RXN322

QSFPDD1x2_RXP322

QSFPDD1x2_RXP1222

QSFPDD1x2_RXN1222

QSFPDD1x2_RXP1322

QSFPDD1x2_RXN1322

QSFPDD1x2_RXP1422

QSFPDD1x2_RXN1422QSFPDD1x2_RXN1522

QSFPDD1x2_RXP1522

QSFPDD1x2_RXP422QSFPDD1x2_RXP522QSFPDD1x2_RXP622QSFPDD1x2_RXP722QSFPDD1x2_RXP822QSFPDD1x2_RXP922QSFPDD1x2_RXP1022QSFPDD1x2_RXP1122

QSFPDD1x2_RXN522QSFPDD1x2_RXN622QSFPDD1x2_RXN722QSFPDD1x2_RXN822QSFPDD1x2_RXN922QSFPDD1x2_RXN1022QSFPDD1x2_RXN1122

QSFPDD1x2_RXN422

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

32 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

32 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

32 53Sunday, November 05, 2017

1ST280EYF55

U39B

GXBL8B_RX_CH0P, GXBL9B_REFCLK0PAW45

GXBL8B_RX_CH1P, GXBL9B_REFCLK1PAV48

GXBL8B_RX_CH2P, GXBL9B_REFCLK2PAU45

GXBL8B_RX_CH3P, GXBL9B_REFCLK3PAT48

GXBL8B_RX_CH4P, GXBL9B_REFCLK4PAR45

GXBL8B_RX_CH5P, GXBL9B_REFCLK5PAP48

GXBL8B_RX_CH6P, GXBL9B_REFCLK6PAN45

GXBL8B_RX_CH7P, GXBL9B_REFCLK7PAM48

GXBL8B_RX_CH8P, GXBL9B_REFCLK8PAL45

GXBL8B_RX_CH9P, GXBL9B_REFCLK9PAK48

GXBL8B_RX_CH10P, GXBL9B_REFCLK10PAJ45

GXBL8B_RX_CH11P, GXBL9B_REFCLK11PAH48

GXBL8B_RX_CH12P, GXBL9B_REFCLK12PAG45

GXBL8B_RX_CH13P, GXBL9B_REFCLK13PAF48

GXBL8B_RX_CH14P, GXBL9B_REFCLK14PAE45

GXBL8B_RX_CH15P, GXBL9B_REFCLK15PAD48

GXBL8B_RX_CH16P, GXBL9B_REFCLK16PAC45

GXBL8B_RX_CH17P, GXBL9B_REFCLK17PAB48

GXBL8B_RX_CH18P, GXBL9B_REFCLK18PAA45

GXBL8B_RX_CH19P, GXBL9B_REFCLK19PY48

GXBL8B_RX_CH20P, GXBL9B_REFCLK20PW45

GXBL8B_RX_CH21P, GXBL9B_REFCLK21PV48

GXBL8B_RX_CH22P, GXBL9B_REFCLK22PU45

GXBL8B_RX_CH23P, GXBL9B_REFCLK23PT48

GXBL8B_RX_CH0N, GXBL9B_REFCLK0NAW44

GXBL8B_RX_CH1N, GXBL9B_REFCLK1NAV47

GXBL8B_RX_CH2N, GXBL9B_REFCLK2NAU44

GXBL8B_RX_CH3N, GXBL9B_REFCLK3NAT47

GXBL8B_RX_CH4N, GXBL9B_REFCLK4NAR44

GXBL8B_RX_CH5N, GXBL9B_REFCLK5NAP47

GXBL8B_RX_CH6N, GXBL9B_REFCLK6NAN44

GXBL8B_RX_CH7N, GXBL9B_REFCLK7NAM47

GXBL8B_RX_CH8N, GXBL9B_REFCLK8NAL44

GXBL8B_RX_CH9N, GXBL9B_REFCLK9NAK47

GXBL8B_RX_CH10N, GXBL9B_REFCLK10NAJ44

GXBL8B_RX_CH11N, GXBL9B_REFCLK11NAH47

GXBL8B_RX_CH12N, GXBL9B_REFCLK12NAG44

GXBL8B_RX_CH13N, GXBL9B_REFCLK13NAF47

GXBL8B_RX_CH14N, GXBL9B_REFCLK14NAE44

GXBL8B_RX_CH15N, GXBL9B_REFCLK15NAD47

GXBL8B_RX_CH16N, GXBL9B_REFCLK16NAC44

GXBL8B_RX_CH17N, GXBL9B_REFCLK17NAB47

GXBL8B_RX_CH18N, GXBL9B_REFCLK18NAA44

GXBL8B_RX_CH19N, GXBL9B_REFCLK19NY47

GXBL8B_RX_CH20N, GXBL9B_REFCLK20NW44

GXBL8B_RX_CH21N, GXBL9B_REFCLK21NV47

GXBL8B_RX_CH22N, GXBL9B_REFCLK22NU44

GXBL8B_RX_CH23N, GXBL9B_REFCLK23NT47

REFCLK_GXBL8B_CH4PAM39

REFCLK_GXBL8B_CH4NAM40

REFCLK_GXBL8B_CH5PAR37

REFCLK_GXBL8B_CH5NAR38

REFCLK_GXBL8B_CH6PAL37

REFCLK_GXBL8B_CH6NAM37

REFCLK_GXBL8B_CH7PAP38

REFCLK_GXBL8B_CH7NAP39

REFCLK_GXBL8B_CH8PAM38

REFCLK_GXBL8B_CH8NAL38

GXBL8B_TX_CH0PAW51

GXBL8B_TX_CH1PAV54

GXBL8B_TX_CH2PAU51

GXBL8B_TX_CH3PAT54

GXBL8B_TX_CH4PAR51

GXBL8B_TX_CH5PAP54

GXBL8B_TX_CH6PAN51

GXBL8B_TX_CH7PAM54

GXBL8B_TX_CH8PAL51

GXBL8B_TX_CH9PAK54

GXBL8B_TX_CH10PAJ51

GXBL8B_TX_CH11PAH54

GXBL8B_TX_CH12PAG51

GXBL8B_TX_CH13PAF54

GXBL8B_TX_CH14PAE51

GXBL8B_TX_CH15PAD54

GXBL8B_TX_CH16PAC51

GXBL8B_TX_CH17PAB54

GXBL8B_TX_CH18PAA51

GXBL8B_TX_CH19PY54

GXBL8B_TX_CH20PW51

GXBL8B_TX_CH21PV54

GXBL8B_TX_CH22PU51

GXBL8B_TX_CH23PT54

GXBL8B_TX_CH0NAW50

GXBL8B_TX_CH1NAV53

GXBL8B_TX_CH2NAU50

GXBL8B_TX_CH3NAT53

GXBL8B_TX_CH4NAR50

GXBL8B_TX_CH5NAP53

GXBL8B_TX_CH6NAN50

GXBL8B_TX_CH7NAM53

GXBL8B_TX_CH8NAL50

GXBL8B_TX_CH9NAK53

GXBL8B_TX_CH10NAJ50

GXBL8B_TX_CH11NAH53

GXBL8B_TX_CH12NAG50

GXBL8B_TX_CH13NAF53

GXBL8B_TX_CH14NAE50

GXBL8B_TX_CH15NAD53

GXBL8B_TX_CH16NAC50

GXBL8B_TX_CH17NAB53

GXBL8B_TX_CH18NAA50

GXBL8B_TX_CH19NY53

GXBL8B_TX_CH20NW50

GXBL8B_TX_CH21NV53

GXBL8B_TX_CH22NU50

GXBL8B_TX_CH23NT53

REFCLK_GXBL8B_CH0PAN42

REFCLK_GXBL8B_CH0NAM43

REFCLK_GXBL8B_CH1PAN40

REFCLK_GXBL8B_CH1NAN41

REFCLK_GXBL8B_CH2PAN38

REFCLK_GXBL8B_CH2NAN39

REFCLK_GXBL8B_CH3PAN37

REFCLK_GXBL8B_CH3NAP37

J361

2345

J371

2345

CLKIN_SMA_8B_N

CLKIN_SMA_8B_P

CLKIN_SMA_8B_PCLKIN_SMA_8B_N

Page 33: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

S10 ETile Banks - 8C

External Clock Input

MXPC Port:100G FEC-only with PAM4, EHIP Channel 1: 12/14; Channel 2: 20/22Swap channel or swap lane within one channel

MXPD Port:100G FEC-only with PAM4, EHIPChannel 1: 0/2; Channel 2: 8/10Swap channel or swap lane within one channel

MXPA Port:100G FEC-only with PAM4, no EHIP Channel 1: 4/6; Channel 2: 16/18Swap channel or swap lane within one channel

MXPD_TXP1 25

MXPD_TXN0 25

MXPD_TXP0 25

MXPD_TXP2 25

MXPD_TXN1 25

MXPD_TXN3 25

MXPD_TXP3 25

MXPD_TXN2 25

MXPC_TXN1 25

MXPC_TXN0 25

MXPC_TXP0 25

MXPC_TXP2 25

MXPC_TXP1 25

MXPC_TXN3 25

MXPC_TXP3 25

MXPC_TXN2 25

CLK_8C_PLL_176M_P7CLK_8C_PLL_176M_N7

CLK_8C_OSC_156M_N 6CLK_8C_OSC_156M_P 6

MXPD_RXP025

MXPD_RXP125

MXPD_RXN025

MXPD_RXN125

MXPD_RXP225

MXPD_RXN225

MXPD_RXN325

MXPD_RXP325

MXPC_RXP025

MXPC_RXN025

MXPC_RXN125

MXPC_RXP125

MXPC_RXP225

MXPC_RXN225

MXPC_RXP325

MXPC_RXN325

MXPA_RXN025

MXPA_RXP025

MXPA_RXP125

MXPA_RXN125

MXPA_RXN225

MXPA_RXP325

MXPA_RXN325

MXPA_RXP225

MXPA_TXP0 25

MXPA_TXP1 25

MXPA_TXN0 25

MXPA_TXN1 25

MXPA_TXP2 25

MXPA_TXN2 25

MXPA_TXN3 25

MXPA_TXP3 25

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

33 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

33 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

33 53Sunday, November 05, 2017

1ST280EYF55

U39C

GXBL8C_RX_CH0P, GXBL9C_REFCLK0PP48

GXBL8C_RX_CH1P, GXBL9C_REFCLK1PM48

GXBL8C_RX_CH2P, GXBL9C_REFCLK2PK48

GXBL8C_RX_CH3P, GXBL9C_REFCLK3PH48

GXBL8C_RX_CH4P, GXBL9C_REFCLK4PF48

GXBL8C_RX_CH5P, GXBL9C_REFCLK5PG45

GXBL8C_RX_CH6P, GXBL9C_REFCLK6PJ45

GXBL8C_RX_CH7P, GXBL9C_REFCLK7PL45

GXBL8C_RX_CH8P, GXBL9C_REFCLK8PN45

GXBL8C_RX_CH9P, GXBL9C_REFCLK9PR45

GXBL8C_RX_CH10P, GXBL9C_REFCLK10PE45

GXBL8C_RX_CH11P, GXBL9C_REFCLK11PF42

GXBL8C_RX_CH12P, GXBL9C_REFCLK12PE39

GXBL8C_RX_CH13P, GXBL9C_REFCLK13PG39

GXBL8C_RX_CH14P, GXBL9C_REFCLK14PH42

GXBL8C_RX_CH15P, GXBL9C_REFCLK15PJ39

GXBL8C_RX_CH16P, GXBL9C_REFCLK16PK42

GXBL8C_RX_CH17P, GXBL9C_REFCLK17PL39

GXBL8C_RX_CH18P, GXBL9C_REFCLK18PD36

GXBL8C_RX_CH19P, GXBL9C_REFCLK19PF36

GXBL8C_RX_CH20P, GXBL9C_REFCLK20PH36

GXBL8C_RX_CH21P, GXBL9C_REFCLK21PK36

GXBL8C_RX_CH22P, GXBL9C_REFCLK22PC33

GXBL8C_RX_CH23P, GXBL9C_REFCLK23PE33

GXBL8C_RX_CH0N, GXBL9C_REFCLK0NP47

GXBL8C_RX_CH1N, GXBL9C_REFCLK1NM47

GXBL8C_RX_CH2N, GXBL9C_REFCLK2NK47

GXBL8C_RX_CH3N, GXBL9C_REFCLK3NH47

GXBL8C_RX_CH4N, GXBL9C_REFCLK4NF47

GXBL8C_RX_CH5N, GXBL9C_REFCLK5NG44

GXBL8C_RX_CH6N, GXBL9C_REFCLK6NJ44

GXBL8C_RX_CH7N, GXBL9C_REFCLK7NL44

GXBL8C_RX_CH8N, GXBL9C_REFCLK8NN44

GXBL8C_RX_CH9N, GXBL9C_REFCLK9NR44

GXBL8C_RX_CH10N, GXBL9C_REFCLK10NE44

GXBL8C_RX_CH11N, GXBL9C_REFCLK11NF41

GXBL8C_RX_CH12N, GXBL9C_REFCLK12NE38

GXBL8C_RX_CH13N, GXBL9C_REFCLK13NG38

GXBL8C_RX_CH14N, GXBL9C_REFCLK14NH41

GXBL8C_RX_CH15N, GXBL9C_REFCLK15NJ38

GXBL8C_RX_CH16N, GXBL9C_REFCLK16NK41

GXBL8C_RX_CH17N, GXBL9C_REFCLK17NL38

GXBL8C_RX_CH18N, GXBL9C_REFCLK18ND35

GXBL8C_RX_CH19N, GXBL9C_REFCLK19NF35

GXBL8C_RX_CH20N, GXBL9C_REFCLK20NH35

GXBL8C_RX_CH21N, GXBL9C_REFCLK21NK35

GXBL8C_RX_CH22N, GXBL9C_REFCLK22NC32

GXBL8C_RX_CH23N, GXBL9C_REFCLK23NE32

REFCLK_GXBL8C_CH4PAB37

REFCLK_GXBL8C_CH4NAA37

REFCLK_GXBL8C_CH5PAC36

REFCLK_GXBL8C_CH5NAC37

REFCLK_GXBL8C_CH6PW37

REFCLK_GXBL8C_CH6NY37

REFCLK_GXBL8C_CH7PAB39

REFCLK_GXBL8C_CH7NAB40

REFCLK_GXBL8C_CH8PY38

REFCLK_GXBL8C_CH8NAA38

GXBL8C_TX_CH0PR51

GXBL8C_TX_CH1PP54

GXBL8C_TX_CH2PN51

GXBL8C_TX_CH3PM54

GXBL8C_TX_CH4PL51

GXBL8C_TX_CH5PK54

GXBL8C_TX_CH6PJ51

GXBL8C_TX_CH7PH54

GXBL8C_TX_CH8PG51

GXBL8C_TX_CH9PF54

GXBL8C_TX_CH10PD54

GXBL8C_TX_CH11PE51

GXBL8C_TX_CH12PC51

GXBL8C_TX_CH13PA51

GXBL8C_TX_CH14PD48

GXBL8C_TX_CH15PB48

GXBL8C_TX_CH16PC45

GXBL8C_TX_CH17PA45

GXBL8C_TX_CH18PD42

GXBL8C_TX_CH19PB42

GXBL8C_TX_CH20PC39

GXBL8C_TX_CH21PA39

GXBL8C_TX_CH22PB36

GXBL8C_TX_CH23PA33

GXBL8C_TX_CH0NR50

GXBL8C_TX_CH1NP53

GXBL8C_TX_CH2NN50

GXBL8C_TX_CH3NM53

GXBL8C_TX_CH4NL50

GXBL8C_TX_CH5NK53

GXBL8C_TX_CH6NJ50

GXBL8C_TX_CH7NH53

GXBL8C_TX_CH8NG50

GXBL8C_TX_CH9NF53

GXBL8C_TX_CH10ND53

GXBL8C_TX_CH11NE50

GXBL8C_TX_CH12NC50

GXBL8C_TX_CH13NA50

GXBL8C_TX_CH14ND47

GXBL8C_TX_CH15NB47

GXBL8C_TX_CH16NC44

GXBL8C_TX_CH17NA44

GXBL8C_TX_CH18ND41

GXBL8C_TX_CH19NB41

GXBL8C_TX_CH20NC38

GXBL8C_TX_CH21NA38

GXBL8C_TX_CH22NB35

GXBL8C_TX_CH23NA32

REFCLK_GXBL8C_CH0PAB43

REFCLK_GXBL8C_CH0NAB42

REFCLK_GXBL8C_CH1PAB41

REFCLK_GXBL8C_CH1NAC40

REFCLK_GXBL8C_CH2PAA40

REFCLK_GXBL8C_CH2NAA39

REFCLK_GXBL8C_CH3PAC38

REFCLK_GXBL8C_CH3NAB38

J381

2345

J391

2345

CLKIN_SMA_8C_NCLKIN_SMA_8C_P

CLKIN_SMA_8C_N

CLKIN_SMA_8C_P

Page 34: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

S10 ETile Banks - 9A

External Clock Input

QSFPDD1x1 Port:100G FEC-only with PAM4, EHIPChannel 1: 0/2; Channel 2: 8/10Channel 3: 12/14; Channel 4: 20/22Swap channel or swap lane within one channel

SMAA_TXP0 25

SMAA_TXN0 25

SMAB_TXP0 25

SMAB_TXN0 25

QSFPDD1x1_TXP0 21

QSFPDD1x1_TXN0 21

QSFPDD1x1_TXP1 21

QSFPDD1x1_TXN1 21

QSFPDD1x1_TXN2 21

QSFPDD1x1_TXP2 21

QSFPDD1x1_TXN3 21

QSFPDD1x1_TXP3 21

QSFPDD1x1_TXP4 21

QSFPDD1x1_TXN4 21

QSFPDD1x1_TXP5 21

QSFPDD1x1_TXN5 21

QSFPDD1x1_TXN6 21

QSFPDD1x1_TXP6 21

QSFPDD1x1_TXP7 21

QSFPDD1x1_TXN7 21

SMAA_RXP025

SMAA_RXN025

SMAB_RXP025

SMAB_RXN025

QSFPDD1x1_RXP021

QSFPDD1x1_RXN021

QSFPDD1x1_RXN121

QSFPDD1x1_RXP121

QSFPDD1x1_RXP221

QSFPDD1x1_RXN221

QSFPDD1x1_RXN321

QSFPDD1x1_RXP321

QSFPDD1x1_RXP421

QSFPDD1x1_RXN421

QSFPDD1x1_RXN521

QSFPDD1x1_RXP521

QSFPDD1x1_RXP621

QSFPDD1x1_RXN621

QSFPDD1x1_RXP721

QSFPDD1x1_RXN721

CLK_9A_PLL_176M_P 7CLK_9A_PLL_176M_N 7

CLK_9A_OSC_156M_N 6CLK_9A_OSC_156M_P 6

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

34 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

34 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

34 53Sunday, November 05, 2017

1ST280EYF55

U39D

GXBR9A_RX_CH0P, GXBR9A_REFCLK0PBG22

GXBR9A_RX_CH1P, GXBR9A_REFCLK1PBJ22

GXBR9A_RX_CH2P, GXBR9A_REFCLK2PBL22

GXBR9A_RX_CH3P, GXBR9A_REFCLK3PBK19

GXBR9A_RX_CH4P, GXBR9A_REFCLK4PBF19

GXBR9A_RX_CH5P, GXBR9A_REFCLK5PBH19

GXBR9A_RX_CH6P, GXBR9A_REFCLK6PBD13

GXBR9A_RX_CH7P, GXBR9A_REFCLK7PBE16

GXBR9A_RX_CH8P, GXBR9A_REFCLK8PBG16

GXBR9A_RX_CH9P, GXBR9A_REFCLK9PBJ16

GXBR9A_RX_CH10P, GXBR9A_REFCLK10PBF13

GXBR9A_RX_CH11P, GXBR9A_REFCLK11PBH13

GXBR9A_RX_CH12P, GXBR9A_REFCLK12PBK13

GXBR9A_RX_CH13P, GXBR9A_REFCLK13PBJ10

GXBR9A_RX_CH14P, GXBR9A_REFCLK14PBA10

GXBR9A_RX_CH15P, GXBR9A_REFCLK15PBC10

GXBR9A_RX_CH16P, GXBR9A_REFCLK16PBE10

GXBR9A_RX_CH17P, GXBR9A_REFCLK17PBG10

GXBR9A_RX_CH18P, GXBR9A_REFCLK18PBK7

GXBR9A_RX_CH19P, GXBR9A_REFCLK19PBH7

GXBR9A_RX_CH20P, GXBR9A_REFCLK20PBF7

GXBR9A_RX_CH21P, GXBR9A_REFCLK21PBD7

GXBR9A_RX_CH22P, GXBR9A_REFCLK22PBB7

GXBR9A_RX_CH23P, GXBR9A_REFCLK23PAY7

GXBR9A_RX_CH0N, GXBR9A_REFCLK0NBG23

GXBR9A_RX_CH1N, GXBR9A_REFCLK1NBJ23

GXBR9A_RX_CH2N, GXBR9A_REFCLK2NBL23

GXBR9A_RX_CH3N, GXBR9A_REFCLK3NBK20

GXBR9A_RX_CH4N, GXBR9A_REFCLK4NBF20

GXBR9A_RX_CH5N, GXBR9A_REFCLK5NBH20

GXBR9A_RX_CH6N, GXBR9A_REFCLK6NBD14

GXBR9A_RX_CH7N, GXBR9A_REFCLK7NBE17

GXBR9A_RX_CH8N, GXBR9A_REFCLK8NBG17

GXBR9A_RX_CH9N, GXBR9A_REFCLK9NBJ17

GXBR9A_RX_CH10N, GXBR9A_REFCLK10NBF14

GXBR9A_RX_CH11N, GXBR9A_REFCLK11NBH14

GXBR9A_RX_CH12N, GXBR9A_REFCLK12NBK14

GXBR9A_RX_CH13N, GXBR9A_REFCLK13NBJ11

GXBR9A_RX_CH14N, GXBR9A_REFCLK14NBA11

GXBR9A_RX_CH15N, GXBR9A_REFCLK15NBC11

GXBR9A_RX_CH16N, GXBR9A_REFCLK16NBE11

GXBR9A_RX_CH17N, GXBR9A_REFCLK17NBG11

GXBR9A_RX_CH18N, GXBR9A_REFCLK18NBK8

GXBR9A_RX_CH19N, GXBR9A_REFCLK19NBH8

GXBR9A_RX_CH20N, GXBR9A_REFCLK20NBF8

GXBR9A_RX_CH21N, GXBR9A_REFCLK21NBD8

GXBR9A_RX_CH22N, GXBR9A_REFCLK22NBB8

GXBR9A_RX_CH23N, GXBR9A_REFCLK23NAY8

REFCLK_GXBR9A_CH4PBB19

REFCLK_GXBR9A_CH4NBC20

REFCLK_GXBR9A_CH5PBD20

REFCLK_GXBR9A_CH5NBD21

REFCLK_GXBR9A_CH6PBC22

REFCLK_GXBR9A_CH6NBC23

REFCLK_GXBR9A_CH7PBD23

REFCLK_GXBR9A_CH7NBE23

REFCLK_GXBR9A_CH8PBD22

REFCLK_GXBR9A_CH8NBC21

GXBR9A_TX_CH0PBN22

GXBR9A_TX_CH1PBP19

GXBR9A_TX_CH2PBM19

GXBR9A_TX_CH3PBN16

GXBR9A_TX_CH4PBL16

GXBR9A_TX_CH5PBP13

GXBR9A_TX_CH6PBM13

GXBR9A_TX_CH7PBN10

GXBR9A_TX_CH8PBL10

GXBR9A_TX_CH9PBP7

GXBR9A_TX_CH10PBM7

GXBR9A_TX_CH11PBN4

GXBR9A_TX_CH12PBL4

GXBR9A_TX_CH13PBJ4

GXBR9A_TX_CH14PBK1

GXBR9A_TX_CH15PBH1

GXBR9A_TX_CH16PBG4

GXBR9A_TX_CH17PBF1

GXBR9A_TX_CH18PBE4

GXBR9A_TX_CH19PBD1

GXBR9A_TX_CH20PBC4

GXBR9A_TX_CH21PBB1

GXBR9A_TX_CH22PBA4

GXBR9A_TX_CH23PAY1

GXBR9A_TX_CH0NBN23

GXBR9A_TX_CH1NBP20

GXBR9A_TX_CH2NBM20

GXBR9A_TX_CH3NBN17

GXBR9A_TX_CH4NBL17

GXBR9A_TX_CH5NBP14

GXBR9A_TX_CH6NBM14

GXBR9A_TX_CH7NBN11

GXBR9A_TX_CH8NBL11

GXBR9A_TX_CH9NBP8

GXBR9A_TX_CH10NBM8

GXBR9A_TX_CH11NBN5

GXBR9A_TX_CH12NBL5

GXBR9A_TX_CH13NBJ5

GXBR9A_TX_CH14NBK2

GXBR9A_TX_CH15NBH2

GXBR9A_TX_CH16NBG5

GXBR9A_TX_CH17NBF2

GXBR9A_TX_CH18NBE5

GXBR9A_TX_CH19NBD2

GXBR9A_TX_CH20NBC5

GXBR9A_TX_CH21NBB2

GXBR9A_TX_CH22NBA5

GXBR9A_TX_CH23NAY2

REFCLK_GXBR9A_CH0PBC17

REFCLK_GXBR9A_CH0NBB18

REFCLK_GXBR9A_CH1PBC18

REFCLK_GXBR9A_CH1NBD18

REFCLK_GXBR9A_CH2PBE21

REFCLK_GXBR9A_CH2NBE22

REFCLK_GXBR9A_CH3PBD19

REFCLK_GXBR9A_CH3NBC19

J411

2345

J401

2345

CLKIN_SMA_9A_N

CLKIN_SMA_9A_P

CLKIN_SMA_9A_PCLKIN_SMA_9A_N

Page 35: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

S10 ETile Banks - 9B

External Clock Input

QSFPDD2x1 Port 1:100G FEC with 28G NRZ, EHIPChannel 1: 0/1/2/3Channel 2: 8/9/10/11Swap channel or swap lane within one channel

QSFPDD2x1 Port 2:100G FEC with 28G NRZ, EHIPChannel 1: 12/13/14/15Channel 2: 20/21/22/23Swap channel or swap lane within one channel

CLK_9B_OSC_156M_P 6CLK_9B_OSC_156M_N 6

CLK_9B_PLL_322M_N 7CLK_9B_PLL_322M_P 7

QSFPDD2x1_RXP023

QSFPDD2x1_RXN023QSFPDD2x1_RXN123 QSFPDD2x1_TXN1 23

QSFPDD2x1_TXN2 23QSFPDD2x1_TXN3 23

QSFPDD2x1_RXP123

QSFPDD2x1_RXN223

QSFPDD2x1_TXN4 23QSFPDD2x1_TXN5 23QSFPDD2x1_TXN6 23QSFPDD2x1_TXN7 23

QSFPDD2x1_RXP223

QSFPDD2x1_TXN8 23QSFPDD2x1_TXN9 23QSFPDD2x1_TXN10 23QSFPDD2x1_TXN11 23

QSFPDD2x1_RXP323

QSFPDD2x1_RXN323

QSFPDD2x1_TXN12 23QSFPDD2x1_TXN13 23QSFPDD2x1_TXN14 23QSFPDD2x1_TXN15 23

QSFPDD2x1_RXP423

QSFPDD2x1_RXN423QSFPDD2x1_RXN523

QSFPDD2x1_RXP523QSFPDD2x1_RXP623

QSFPDD2x1_RXN623

QSFPDD2x1_TXP0 23

QSFPDD2x1_TXN0 23

QSFPDD2x1_RXN723

QSFPDD2x1_RXP723

QSFPDD2x1_TXP1 23QSFPDD2x1_TXP2 23QSFPDD2x1_TXP3 23

QSFPDD2x1_RXP823

QSFPDD2x1_TXP4 23QSFPDD2x1_TXP5 23

QSFPDD2x1_RXN823

QSFPDD2x1_RXP923

QSFPDD2x1_TXP6 23QSFPDD2x1_TXP7 23

QSFPDD2x1_RXN923

QSFPDD2x1_TXP8 23QSFPDD2x1_TXP9 23

QSFPDD2x1_RXP1023

QSFPDD2x1_RXN1023

QSFPDD2x1_TXP10 23QSFPDD2x1_TXP11 23

QSFPDD2x1_RXN1123

QSFPDD2x1_RXP1123

QSFPDD2x1_TXP12 23QSFPDD2x1_TXP13 23

QSFPDD2x1_RXP1223

QSFPDD2x1_RXN1223

QSFPDD2x1_TXP14 23QSFPDD2x1_TXP15 23

QSFPDD2x1_RXN1323

QSFPDD2x1_RXP1323

QSFPDD2x1_RXN1423

QSFPDD2x1_RXP1423

QSFPDD2x1_RXN1523

QSFPDD2x1_RXP1523

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

35 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

35 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

35 53Sunday, November 05, 2017

J431

2345

J421

2345

1ST280EYF55

U39E

GXBR9B_RX_CH0P, GXBR9B_REFCLK0PAW10

GXBR9B_RX_CH1P, GXBR9B_REFCLK1PAV7

GXBR9B_RX_CH2P, GXBR9B_REFCLK2PAU10

GXBR9B_RX_CH3P, GXBR9B_REFCLK3PAT7

GXBR9B_RX_CH4P, GXBR9B_REFCLK4PAR10

GXBR9B_RX_CH5P, GXBR9B_REFCLK5PAP7

GXBR9B_RX_CH6P, GXBR9B_REFCLK6PAN10

GXBR9B_RX_CH7P, GXBR9B_REFCLK7PAM7

GXBR9B_RX_CH8P, GXBR9B_REFCLK8PAL10

GXBR9B_RX_CH9P, GXBR9B_REFCLK9PAK7

GXBR9B_RX_CH10P, GXBR9B_REFCLK10PAJ10

GXBR9B_RX_CH11P, GXBR9B_REFCLK11PAH7

GXBR9B_RX_CH12P, GXBR9B_REFCLK12PAG10

GXBR9B_RX_CH13P, GXBR9B_REFCLK13PAF7

GXBR9B_RX_CH14P, GXBR9B_REFCLK14PAE10

GXBR9B_RX_CH15P, GXBR9B_REFCLK15PAD7

GXBR9B_RX_CH16P, GXBR9B_REFCLK16PAC10

GXBR9B_RX_CH17P, GXBR9B_REFCLK17PAB7

GXBR9B_RX_CH18P, GXBR9B_REFCLK18PAA10

GXBR9B_RX_CH19P, GXBR9B_REFCLK19PY7

GXBR9B_RX_CH20P, GXBR9B_REFCLK20PW10

GXBR9B_RX_CH21P, GXBR9B_REFCLK21PV7

GXBR9B_RX_CH22P, GXBR9B_REFCLK22PU10

GXBR9B_RX_CH23P, GXBR9B_REFCLK23PT7

GXBR9B_RX_CH0N, GXBR9B_REFCLK0NAW11

GXBR9B_RX_CH1N, GXBR9B_REFCLK1NAV8

GXBR9B_RX_CH2N, GXBR9B_REFCLK2NAU11

GXBR9B_RX_CH3N, GXBR9B_REFCLK3NAT8

GXBR9B_RX_CH4N, GXBR9B_REFCLK4NAR11

GXBR9B_RX_CH5N, GXBR9B_REFCLK5NAP8

GXBR9B_RX_CH6N, GXBR9B_REFCLK6NAN11

GXBR9B_RX_CH7N, GXBR9B_REFCLK7NAM8

GXBR9B_RX_CH8N, GXBR9B_REFCLK8NAL11

GXBR9B_RX_CH9N, GXBR9B_REFCLK9NAK8

GXBR9B_RX_CH10N, GXBR9B_REFCLK10NAJ11

GXBR9B_RX_CH11N, GXBR9B_REFCLK11NAH8

GXBR9B_RX_CH12N, GXBR9B_REFCLK12NAG11

GXBR9B_RX_CH13N, GXBR9B_REFCLK13NAF8

GXBR9B_RX_CH14N, GXBR9B_REFCLK14NAE11

GXBR9B_RX_CH15N, GXBR9B_REFCLK15NAD8

GXBR9B_RX_CH16N, GXBR9B_REFCLK16NAC11

GXBR9B_RX_CH17N, GXBR9B_REFCLK17NAB8

GXBR9B_RX_CH18N, GXBR9B_REFCLK18NAA11

GXBR9B_RX_CH19N, GXBR9B_REFCLK19NY8

GXBR9B_RX_CH20N, GXBR9B_REFCLK20NW11

GXBR9B_RX_CH21N, GXBR9B_REFCLK21NV8

GXBR9B_RX_CH22N, GXBR9B_REFCLK22NU11

GXBR9B_RX_CH23N, GXBR9B_REFCLK23NT8

REFCLK_GXBR9B_CH4PAL18

REFCLK_GXBR9B_CH4NAM18

REFCLK_GXBR9B_CH5PAN18

REFCLK_GXBR9B_CH5NAP18

REFCLK_GXBR9B_CH6PAL17

REFCLK_GXBR9B_CH6NAM17

REFCLK_GXBR9B_CH7PAN17

REFCLK_GXBR9B_CH7NAP17

REFCLK_GXBR9B_CH8PAM15

REFCLK_GXBR9B_CH8NAM16

GXBR9B_TX_CH0PAW4

GXBR9B_TX_CH1PAV1

GXBR9B_TX_CH2PAU4

GXBR9B_TX_CH3PAT1

GXBR9B_TX_CH4PAR4

GXBR9B_TX_CH5PAP1

GXBR9B_TX_CH6PAN4

GXBR9B_TX_CH7PAM1

GXBR9B_TX_CH8PAL4

GXBR9B_TX_CH9PAK1

GXBR9B_TX_CH10PAJ4

GXBR9B_TX_CH11PAH1

GXBR9B_TX_CH12PAG4

GXBR9B_TX_CH13PAF1

GXBR9B_TX_CH14PAE4

GXBR9B_TX_CH15PAD1

GXBR9B_TX_CH16PAC4

GXBR9B_TX_CH17PAB1

GXBR9B_TX_CH18PAA4

GXBR9B_TX_CH19PY1

GXBR9B_TX_CH20PW4

GXBR9B_TX_CH21PV1

GXBR9B_TX_CH22PU4

GXBR9B_TX_CH23PT1

GXBR9B_TX_CH0NAW5

GXBR9B_TX_CH1NAV2

GXBR9B_TX_CH2NAU5

GXBR9B_TX_CH3NAT2

GXBR9B_TX_CH4NAR5

GXBR9B_TX_CH5NAP2

GXBR9B_TX_CH6NAN5

GXBR9B_TX_CH7NAM2

GXBR9B_TX_CH8NAL5

GXBR9B_TX_CH9NAK2

GXBR9B_TX_CH10NAJ5

GXBR9B_TX_CH11NAH2

GXBR9B_TX_CH12NAG5

GXBR9B_TX_CH13NAF2

GXBR9B_TX_CH14NAE5

GXBR9B_TX_CH15NAD2

GXBR9B_TX_CH16NAC5

GXBR9B_TX_CH17NAB2

GXBR9B_TX_CH18NAA5

GXBR9B_TX_CH19NY2

GXBR9B_TX_CH20NW5

GXBR9B_TX_CH21NV2

GXBR9B_TX_CH22NU5

GXBR9B_TX_CH23NT2

REFCLK_GXBR9B_CH0PAN13

REFCLK_GXBR9B_CH0NAM12

REFCLK_GXBR9B_CH1PAN15

REFCLK_GXBR9B_CH1NAN14

REFCLK_GXBR9B_CH2PAP15

REFCLK_GXBR9B_CH2NAN16

REFCLK_GXBR9B_CH3PAR17

REFCLK_GXBR9B_CH3NAP16

CLKIN_SMA_9B_N

CLKIN_SMA_9B_P

CLKIN_SMA_9B_PCLKIN_SMA_9B_N

Page 36: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

S10 ETile Banks - 9C

External Clock Input

MXPB Port:100G FEC with 28G NRZ, EHIPChannel 1: 20/21/22/23100G FEC-only with PAM4, EHIPChannel 1: 20/22Swap lane within one channel

OSFP Port:100G with PAM4, no EHIPChannel 1: 0/2; Channel 2: 4/6Channel 3: 8/10; Channel 4: 12/14Swap channel or swap lane within one channel

CLK_9C_PLL_322M_P 7

CLK_9C_OSC_156M_N 6CLK_9C_OSC_156M_P 6CLK_9C_PLL_322M_N 7

MXPB_TXP1 25MXPB_TXP0 25

MXPB_TXP2 25MXPB_TXP3 25

OSFP_RXP019

OSFP_RXP119

OSFP_RXP319

OSFP_RXP219

OSFP_RXP419

OSFP_RXP519

OSFP_RXP719

OSFP_RXP619

OSFP_RXN019

OSFP_RXN119

OSFP_RXN219

OSFP_RXN319

OSFP_RXN419

OSFP_RXN519

OSFP_RXN619

OSFP_RXN719

OSFP_TXP0 19

OSFP_TXP2 19

OSFP_TXP1 19

OSFP_TXP3 19

OSFP_TXP4 19

OSFP_TXP6 19

OSFP_TXP5 19

OSFP_TXP7 19

OSFP_TXN0 19

OSFP_TXN1 19

OSFP_TXN2 19

OSFP_TXN4 19

OSFP_TXN3 19

OSFP_TXN5 19

OSFP_TXN6 19

OSFP_TXN7 19

MXPB_TXN0 25

MXPB_TXN2 25MXPB_TXN1 25

MXPB_TXN3 25

MXPB_RXP125MXPB_RXP025

MXPB_RXP225MXPB_RXP325

MXPB_RXN025MXPB_RXN125MXPB_RXN225MXPB_RXN325

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

36 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

36 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

36 53Sunday, November 05, 2017

1ST280EYF55

U39F

GXBR9C_RX_CH0P, GXBR9C_REFCLK0PP7

GXBR9C_RX_CH1P, GXBR9C_REFCLK1PM7

GXBR9C_RX_CH2P, GXBR9C_REFCLK2PK7

GXBR9C_RX_CH3P, GXBR9C_REFCLK3PH7

GXBR9C_RX_CH4P, GXBR9C_REFCLK4PF7

GXBR9C_RX_CH5P, GXBR9C_REFCLK5PG10

GXBR9C_RX_CH6P, GXBR9C_REFCLK6PJ10

GXBR9C_RX_CH7P, GXBR9C_REFCLK7PL10

GXBR9C_RX_CH8P, GXBR9C_REFCLK8PN10

GXBR9C_RX_CH9P, GXBR9C_REFCLK9PR10

GXBR9C_RX_CH10P, GXBR9C_REFCLK10PE10

GXBR9C_RX_CH11P, GXBR9C_REFCLK11PF13

GXBR9C_RX_CH12P, GXBR9C_REFCLK12PE16

GXBR9C_RX_CH13P, GXBR9C_REFCLK13PG16

GXBR9C_RX_CH14P, GXBR9C_REFCLK14PH13

GXBR9C_RX_CH15P, GXBR9C_REFCLK15PJ16

GXBR9C_RX_CH16P, GXBR9C_REFCLK16PK13

GXBR9C_RX_CH17P, GXBR9C_REFCLK17PL16

GXBR9C_RX_CH18P, GXBR9C_REFCLK18PD19

GXBR9C_RX_CH19P, GXBR9C_REFCLK19PF19

GXBR9C_RX_CH20P, GXBR9C_REFCLK20PH19

GXBR9C_RX_CH21P, GXBR9C_REFCLK21PK19

GXBR9C_RX_CH22P, GXBR9C_REFCLK22PC22

GXBR9C_RX_CH23P, GXBR9C_REFCLK23PE22

GXBR9C_RX_CH0N, GXBR9C_REFCLK0NP8

GXBR9C_RX_CH1N, GXBR9C_REFCLK1NM8

GXBR9C_RX_CH2N, GXBR9C_REFCLK2NK8

GXBR9C_RX_CH3N, GXBR9C_REFCLK3NH8

GXBR9C_RX_CH4N, GXBR9C_REFCLK4NF8

GXBR9C_RX_CH5N, GXBR9C_REFCLK5NG11

GXBR9C_RX_CH6N, GXBR9C_REFCLK6NJ11

GXBR9C_RX_CH7N, GXBR9C_REFCLK7NL11

GXBR9C_RX_CH8N, GXBR9C_REFCLK8NN11

GXBR9C_RX_CH9N, GXBR9C_REFCLK9NR11

GXBR9C_RX_CH10N, GXBR9C_REFCLK10NE11

GXBR9C_RX_CH11N, GXBR9C_REFCLK11NF14

GXBR9C_RX_CH12N, GXBR9C_REFCLK12NE17

GXBR9C_RX_CH13N, GXBR9C_REFCLK13NG17

GXBR9C_RX_CH14N, GXBR9C_REFCLK14NH14

GXBR9C_RX_CH15N, GXBR9C_REFCLK15NJ17

GXBR9C_RX_CH16N, GXBR9C_REFCLK16NK14

GXBR9C_RX_CH17N, GXBR9C_REFCLK17NL17

GXBR9C_RX_CH18N, GXBR9C_REFCLK18ND20

GXBR9C_RX_CH19N, GXBR9C_REFCLK19NF20

GXBR9C_RX_CH20N, GXBR9C_REFCLK20NH20

GXBR9C_RX_CH21N, GXBR9C_REFCLK21NK20

GXBR9C_RX_CH22N, GXBR9C_REFCLK22NC23

GXBR9C_RX_CH23N, GXBR9C_REFCLK23NE23

REFCLK_GXBR9C_CH4PAA16

REFCLK_GXBR9C_CH4NAA15

REFCLK_GXBR9C_CH5PAC19

REFCLK_GXBR9C_CH5NAC18

REFCLK_GXBR9C_CH6PW18

REFCLK_GXBR9C_CH6NY18

REFCLK_GXBR9C_CH7PAB16

REFCLK_GXBR9C_CH7NAB15

REFCLK_GXBR9C_CH8PY17

REFCLK_GXBR9C_CH8NAA17

GXBR9C_TX_CH0PR4

GXBR9C_TX_CH1PP1

GXBR9C_TX_CH2PN4

GXBR9C_TX_CH3PM1

GXBR9C_TX_CH4PL4

GXBR9C_TX_CH5PK1

GXBR9C_TX_CH6PJ4

GXBR9C_TX_CH7PH1

GXBR9C_TX_CH8PG4

GXBR9C_TX_CH9PF1

GXBR9C_TX_CH10PD1

GXBR9C_TX_CH11PE4

GXBR9C_TX_CH12PB2

GXBR9C_TX_CH13PB5

GXBR9C_TX_CH14PD7

GXBR9C_TX_CH15PB7

GXBR9C_TX_CH16PC10

GXBR9C_TX_CH17PA10

GXBR9C_TX_CH18PD13

GXBR9C_TX_CH19PB13

GXBR9C_TX_CH20PC16

GXBR9C_TX_CH21PA16

GXBR9C_TX_CH22PB19

GXBR9C_TX_CH23PA22

GXBR9C_TX_CH0NR5

GXBR9C_TX_CH1NP2

GXBR9C_TX_CH2NN5

GXBR9C_TX_CH3NM2

GXBR9C_TX_CH4NL5

GXBR9C_TX_CH5NK2

GXBR9C_TX_CH6NJ5

GXBR9C_TX_CH7NH2

GXBR9C_TX_CH8NG5

GXBR9C_TX_CH9NF2

GXBR9C_TX_CH10ND2

GXBR9C_TX_CH11NE5

GXBR9C_TX_CH12NB3

GXBR9C_TX_CH13NC5

GXBR9C_TX_CH14ND8

GXBR9C_TX_CH15NB8

GXBR9C_TX_CH16NC11

GXBR9C_TX_CH17NA11

GXBR9C_TX_CH18ND14

GXBR9C_TX_CH19NB14

GXBR9C_TX_CH20NC17

GXBR9C_TX_CH21NA17

GXBR9C_TX_CH22NB20

GXBR9C_TX_CH23NA23

REFCLK_GXBR9C_CH0PAB12

REFCLK_GXBR9C_CH0NAB13

REFCLK_GXBR9C_CH1PAB14

REFCLK_GXBR9C_CH1NAC15

REFCLK_GXBR9C_CH2PAB18

REFCLK_GXBR9C_CH2NAA18

REFCLK_GXBR9C_CH3PAC17

REFCLK_GXBR9C_CH3NAB17

J451

2345

J441

2345

CLKIN_SMA_9C_P

CLKIN_SMA_9C_N

CLKIN_SMA_9C_NCLKIN_SMA_9C_P

Page 37: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Sense lines need to be routed as widetraces to its source regulatorPlace Resistor Pads overlapping so that only a resistor can be populated

S10 PWR

S10_VCCERT

S10_2V4

S10_VCC S10_VCC

S10_2V5

S10_1V8F

S10_VCCERAM

S10_VCCR

S10_VCCERAM

S10_VCCPLLDIG_SDM

S10_VCCH_E

S10_VCC

S10_1V8

S10_1V8F

S10_1V8

S10_VCCT

S10_VCCRTPLL_GXE

S10_1V8

S10_VCCERAM

S10_1V8

FAREFA

FAREFBFAM2CVIO

VCCIO_2M

S10_1V8

ATB[3:2] 28

VCCLSENSE_P40VCCLSENSE_N40

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

37 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

37 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

37 53Sunday, November 05, 2017

C3020.1uF

R353 DNI

1ST280EYF55

U39L

VCCERAMAA35

VCCERAMAA19

VCCRTPLL_GXEL2AH40

VCCRTPLL_GXEL2AF40

VCCRTPLL_GXEL3U40

VCCRTPLL_GXEL3R40

VCCRTPLL_GXER1AY15

VCCRTPLL_GXER1AV15

VCCRTPLL_GXER2AH15

VCCRTPLL_GXER2AF15

VCCRTPLL_GXER3U15

VCCRTPLL_GXER3R15

VCCRT_GXEL2AL42

VCCRT_GXEL2AL41

VCCRT_GXEL2AK42

VCCRT_GXEL2AK41

VCCRT_GXEL2AJ42

VCCRT_GXEL2AJ41

VCCRT_GXEL2AH42

VCCRT_GXEL2AG42

VCCRT_GXEL2AG41

VCCRT_GXEL2AF42

VCCRT_GXEL2AE42

VCCRT_GXEL2AE41

VCCRT_GXEL2AD42

VCCRT_GXEL3AD41

VCCRT_GXEL3Y42

VCCRT_GXEL3Y41

VCCRT_GXEL3W42

VCCRT_GXEL3W41

VCCRT_GXEL3V42

VCCRT_GXEL3V41

VCCRT_GXEL3U42

VCCRT_GXEL3T42

VCCRT_GXEL3T41

VCCRT_GXEL3R42

VCCRT_GXEL3P42

VCCRT_GXEL3P41

VCCRT_GXEL3N42

VCCRT_GXEL3N41

VCCRT_GXER1BB14

VCCRT_GXER1BB13

VCCRT_GXER1BA14

VCCRT_GXER1BA13

VCCRT_GXER1AY13

VCCRT_GXER1AW14

VCCRT_GXER1AW13

VCCRT_GXER1AV13

VCCRT_GXER1AU14

VCCRT_GXER1AU13

VCCRT_GXER1AT14

VCCRT_GXER1AT13

VCCRT_GXER1AR14

VCCRT_GXER1AR13

VCCRT_GXER2AL14

VCCRT_GXER2AL13

VCCRT_GXER2AK14

VCCRT_GXER2AK13

VCCRT_GXER2AJ14

VCCRT_GXER2AJ13

VCCRT_GXER2AH13

VCCRT_GXER2AG14

VCCRT_GXER2AG13

VCCRT_GXER2AF13

VCCRT_GXER2AE14

VCCRT_GXER2AE13

VCCRT_GXER2AD14

VCCRT_GXER2AD13

VCCRT_GXER3Y14

VCCRT_GXER3Y13

VCCRT_GXER3W14

VCCRT_GXER3W13

VCCRT_GXER3V14

VCCRT_GXER3V13

VCCRT_GXER3U13

VCCRT_GXER3T14

VCCRT_GXER3T13

VCCRT_GXER3R13

VCCRT_GXER3P14

VCCRT_GXER3P13

VCCRT_GXER3N14

VCCRT_GXER3N13

VCCT_GXBL1CBC42

VCCT_GXBL1CBC41

VCCT_GXBL1DAW42

VCCT_GXBL1DAW41

VCCT_GXBL1EAW39

VCCT_GXBL1EAW38

VCCT_GXBL1FAR42

VCCT_GXBL1FAR41

VCCFUSEWR_SDMAY27

VCCPTAJ31

VCCPTAJ29

VCCPTAJ28

VCCPTAJ27

VCCPTAJ26

VCCPTAJ24

VCCPTAH32

VCCPTAH31

VCCPTAH30

VCCPTAH25

VCCPTAH24

VCCPTAG32

VCCPTAG31

VCCPTAG30

VCCPTAG29

VCCPTAG28

VCCPTAG27

VCCPTAG26

VCCPTAG25

VCCPTAG24

VCCA_PLLAH29

VCCA_PLLAH27

VCCA_PLLAH26

VCCADCBB27

VCCBATBA27

VCCH_GXBLBC40

VCCH_GXBLAW40

VCCH_GXBLAW37

VCCH_GXBLAR40

VCCH_GXEL2AK39

VCCH_GXEL2AJ39

VCCH_GXEL2AG39

VCCH_GXEL2AE39

VCCH_GXEL2AD39

VCCH_GXEL3W39

VCCH_GXEL3V39

VCCH_GXEL3T39

VCCH_GXEL3P39

VCCH_GXEL3N39

VCCH_GXER1BB16

VCCH_GXER1BA16

VCCH_GXER1AW16

VCCH_GXER1AU16

VCCH_GXER1AT16

VCCH_GXER2AK16

VCCH_GXER2AJ16

VCCH_GXER2AG16

VCCH_GXER2AE16

VCCH_GXER2AD16

VCCH_GXER3W16

VCCH_GXER3V16

VCCH_GXER3T16

VCCH_GXER3P16

VCCH_GXER3N16

VCCR_GXBL1CBE42

VCCR_GXBL1CBE41

VCCR_GXBL1CBE40

VCCR_GXBL1DBA42

VCCR_GXBL1DBA41

VCCR_GXBL1DBA40

VCCR_GXBL1EBA39

VCCR_GXBL1EBA38

VCCR_GXBL1EBA37

VCCR_GXBL1FAU42

VCCR_GXBL1FAU41

VCCR_GXBL1FAU40

VCCERAMY36

VCCERAMY35

VCCERAMY30

VCCERAMY29

VCCERAMY26

VCCERAMY25

VCCERAMY20

VCCERAMY19

VCCERAMW36

VCCERAMW19

VCCERAMV37

VCCERAMV36

VCCERAMV35

VCCERAMV20

VCCERAMV19

VCCERAMV18

VCCERAMAU38

VCCERAMAU37

VCCERAMAU36

VCCERAMAU20

VCCERAMAU19

VCCERAMAU18

VCCERAMAT38

VCCERAMAT36

VCCERAMAT31

VCCERAMAT28

VCCERAMAT23

VCCERAMAT22

VCCERAMAT18

VCCERAMAR36

VCCERAMAR19

VCCERAMAR18

VCCERAMAP36

VCCERAMAP19

VCCERAMAM36

VCCERAMAM19

VCCERAMAL36

VCCERAMAL19

VCCERAMAK36

VCCERAMAK35

VCCERAMAK21

VCCERAMAK20

VCCERAMAK19

VCCERAMAJ34

VCCERAMAJ21

VCCERAMAJ20

VCCERAMAH35

VCCERAMAH34

VCCERAMAH21

VCCERAMAG35

VCCERAMAG34

VCCERAMAG21

VCCERAMAG20

VCCERAMAF35

VCCERAMAF21

VCCERAMAF20

VCCERAMAE35

VCCERAMAE34

VCCERAMAD36

VCCERAMAD35

VCCERAMAD20

VCCERAMAD19

VCCERAMAC20

VCCERAMAB36

VCCERAMAB19

VCCERAMAA36

FB8

DNI

1ST280EYF55

U39K

VCCPY31

VCCPY24

VCCPAP31

VCCPAP24

VCCPAN31

VCCPAN24

VCCPAA31

VCCPAA24

VCCY34

VCCY33

VCCY32

VCCY22

VCCY21

VCCAT35

VCCAT34

VCCAT33

VCCAT30

VCCAT29

VCCAT26

VCCAT25

VCCAT24

VCCAT20

VCCAR34

VCCAR33

VCCAR32

VCCAR31

VCCAR29

VCCAR28

VCCAR27

VCCAR26

VCCAR25

VCCAR24

VCCAR22

VCCAR21

VCCAR20

VCCAP35

VCCAP34

VCCAP33

VCCAP30

VCCAP29

VCCAP28

VCCAP27

VCCAP26

VCCAP23

VCCAP22

VCCAP21

VCCAP20

VCCAN35

VCCAN34

VCCAN33

VCCAN32

VCCAN30

VCCAN29

VCCAN28

VCCAN26

VCCAN25

VCCAN23

VCCAN21

VCCAN20

VCCAM35

VCCAM34

VCCAM32

VCCAM31

VCCAM30

VCCAM28

VCCAM27

VCCAM26

VCCAM25

VCCAM23

VCCAM22

VCCAM21

VCCAM20

VCCAL34

VCCAL33

VCCAL32

VCCAL30

VCCAL29

VCCAL28

VCCAL27

VCCAL25

VCCAL24

VCCAL23

VCCAL22

VCCAL21

VCCAK34

VCCAK32

VCCAK31

VCCAK30

VCCAK29

VCCAK27

VCCAK26

VCCAK25

VCCAK24

VCCAK22

VCCAJ33

VCCAJ32

VCCAJ23

VCCAJ22

VCCAH23

VCCAH22

VCCAG33

VCCAG22

VCCAF33

VCCAF32

VCCAF30

VCCAF29

VCCAF28

VCCAF27

VCCAF25

VCCAF24

VCCAF23

VCCAF22

VCCAE32

VCCAE31

VCCAE30

VCCAE29

VCCAE27

VCCAE24

VCCAE22

VCCAE21

VCCAD34

VCCAD33

VCCAD32

VCCAD31

VCCAD29

VCCAD28

VCCAD27

VCCAD26

VCCAD24

VCCAD23

VCCAD22

VCCAD21

VCCAC34

VCCAC33

VCCAC31

VCCAC30

VCCAC29

VCCAC27

VCCAC26

VCCAC25

VCCAC24

VCCAC23

VCCAC21

VCCAB34

VCCAB33

VCCAB32

VCCAB31

VCCAB29

VCCAB28

VCCAB27

VCCAB26

VCCAB24

VCCAB23

VCCAB22

VCCAB21

VCCAA34

VCCAA33

VCCAA30

VCCAA29

VCCAA28

VCCAA26

VCCAA25

VCCAA23

VCCAA22

VCCAA21

VCCAA20

1ST280EYF55

U39M

VCCLSENSEAE25

VCCW31

VCCW29

VCCV31

VCCV30

VCCV29

VCCIO3VBE38

VCCIO3VBD38

VCCIO2LT21

VCCIO2LR23

VCCIO2LP20

VCCIO2MU24

VCCIO2MT26

VCCIO2MP25

VCCIO2NT36

VCCIO2NR33

VCCIO2NP35

VCCIO3AAY23

VCCIO3AAW20

VCCIO3AAV22

VCCCLK_GXEL2AK37

VCCCLK_GXEL3AD37

VCCCLK_GXER1AY18

VCCCLK_GXER2AK18

VCCIO3BBA31

VCCIO3BAW30

VCCIO3BAV32

VCCIO3CBB34

VCCIO3CAY33

VCCIO3CAW35

VCCPTY27

VCCPTW27

VCCIO_SDMAY26

VCCW28

VCCPLLDIG_SDMAW27

VCCA_PLLY28

VCCPLL_SDMAW26

VREFB2LN0V22

VREFB2MN0V26

VREFB2NN0N33

VREFB3AN0BA21

VREFB3BN0AU30

VREFB3CN0AU33

GNDSENSEAE26

DNU19/ATB2BP36

DNU20/ATB3BN36

VCCCLK_GXER3AD18

FB7

120ohm, 800mA1 2

FB610A, RDC 4mOhm

R352

0.001

R715DNI

FB510A, RDC 4mOhm

ATB2ATB3

Page 38: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

S10 GND

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

38 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

38 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

C

38 53Sunday, November 05, 2017

1ST280EYF55

U39O

GNDJ46

GNDJ43

GNDJ42

GNDJ41

GNDJ40

GNDJ37

GNDJ36

GNDJ35

GNDJ34

GNDJ30

GNDJ3

GNDJ25

GNDJ23

GNDJ21

GNDJ20

GNDJ2

GNDJ19

GNDJ18

GNDJ15

GNDJ14

GNDJ13

GNDJ12

GNDJ1

GNDH9

GNDH6

GNDH52

GNDH51

GNDH50

GNDH5

GNDH49

GNDH46

GNDH45

GNDH44

GNDH43

GNDH40

GNDH4

GNDH39

GNDH38

GNDH37

GNDH34

GNDH32

GNDH3

GNDH27

GNDH21

GNDH18

GNDH17

GNDH16

GNDH15

GNDH12

GNDH11

GNDH10

GNDG9

GNDG8

GNDG7

GNDG6

GNDG54

GNDG53

GNDG52

GNDG49

GNDG48

GNDG47

GNDG46

GNDG43

GNDG42

GNDG41

GNDG40

GNDG37

GNDG36

GNDG35

GNDG34

GNDG3

GNDG29

GNDG21

GNDG20

GNDG2

GNDG19

GNDG18

GNDG15

GNDG14

GNDG13

GNDG12

GNDG1

GNDF9

GNDF6

GNDF52

GNDF51

GNDF50

GNDF5

GNDF49

GNDF46

GNDF45

GNDF44

GNDF43

GNDF40

GNDF4

GNDF39

GNDF38

GNDF37

GNDF34

GNDF33

GNDF32

GNDF31

GNDF3

GNDF24

GNDF23

GNDF22

GNDF21

GNDF18

GNDF17

GNDF16

GNDF15

GNDF12

GNDF11

GNDF10

GNDE9

GNDE8

GNDE7

GNDE6

GNDE54

GNDE53

GNDE52

GNDE49

GNDE48

GNDE47

GNDE46

GNDE43

GNDE42

GNDE41

GNDE40

GNDE37

GNDE36

GNDE35

GNDE34

GNDE31

GNDE3

GNDE28

GNDE26

GNDE24

GNDE21

GNDE20

GNDE2

GNDE19

GNDE18

GNDE15

GNDE14

GNDE13

GNDE12

GNDE1

GNDD9

GNDD6

GNDD52

GNDD51

GNDD50

GNDD5

GNDD49

GNDD46

GNDD45

GNDD44

GNDD43

GNDD40

GNDD4

GNDD39

GNDD38

GNDD37

GNDD34

GNDD33

GNDD32

GNDD31

GNDD3

GNDD24

GNDD23

GNDD22

GNDD21

GNDD18

GNDD17

GNDD16

GNDD15

GNDD12

GNDD11

GNDD10

GNDC9

GNDC8

GNDC7

GNDC6

GNDC54

GNDC53

GNDC52

GNDC49

GNDC48

GNDC47

GNDC46

GNDC43

GNDC42

GNDC41

GNDC40

GNDC4

GNDC37

GNDC36

GNDC35

GNDC34

GNDC31

GNDC3

GNDC24

GNDC21

GNDC20

GNDC2

GNDC19

GNDC18

GNDC15

GNDC14

GNDC13

GNDC12

GNDC1

GNDBP9

GNDBP6

GNDBP53

GNDBP52

GNDBP51

GNDBP5

GNDBP48

GNDBP47

GNDBP44

GNDBP43

GNDBP40

GNDBP4

GNDBP39

GNDBP38

GNDBP30

GNDBP3

GNDBP24

GNDBP23

GNDBP22

GNDBP21

GNDBP2

GNDBP18

GNDBP17

GNDBP16

GNDBP15

GNDBP12

GNDBP11

GNDBP10

GNDBN9

GNDBN8

GNDBN7

GNDBN6

GNDBN54

GNDBN53

GNDBN50

GNDBN49

GNDBN46

GNDBN45

GNDBN42

GNDBN41

GNDBN38

GNDBN35

GNDBN32

GNDBN3

GNDBN27

GNDBN24

GNDBN21

GNDBN20

GNDBN2

GNDBN19

GNDBN18

GNDBN15

GNDBN14

GNDBN13

GNDBN12

GNDBN1

GNDBM9

GNDBM6

GNDBM53

GNDBM52

GNDBM51

GNDBM5

GNDBM48

GNDBM47

GNDBM44

GNDBM43

GNDBM40

1ST280EYF55

U39Q

GNDBA54

GNDBA53

GNDBA50

GNDBA49

GNDBA46

GNDBA45

GNDBA36

GNDBA3

GNDBA26

GNDBA20

GNDBA2

GNDBA19

GNDBA18

GNDBA17

GNDBA15

GNDBA12

GNDBA1

GNDB9

GNDB6

GNDB54

GNDB53

GNDB52

GNDB51

GNDB50

GNDB49

GNDB46

GNDB45

GNDB44

GNDB43

GNDB40

GNDB4

GNDB39

GNDB38

GNDB37

GNDB34

GNDB33

GNDB32

GNDB31

GNDB29

GNDB26

GNDB24

GNDB23

GNDB22

GNDB21

GNDB18

GNDB17

GNDB16

GNDB15

GNDB12

GNDB11

GNDB10

GNDB1

GNDAY9

GNDAY6

GNDAY52

GNDAY51

GNDAY50

GNDAY5

GNDAY49

GNDAY48

GNDAY47

GNDAY46

GNDAY45

GNDAY44

GNDAY43

GNDAY40

GNDAY4

GNDAY37

GNDAY36

GNDAY3

GNDAY28

GNDAY14

GNDAY12

GNDAY11

GNDAY10

GNDAW9

GNDAW8

GNDAW7

GNDAW6

GNDAW54

GNDAW53

GNDAW52

GNDAW49

GNDAW48

GNDAW47

GNDAW46

GNDAW43

GNDAW36

GNDAW3

GNDAW25

GNDAW2

GNDAW17

GNDAW15

GNDAW12

GNDAW1

GNDAV9

GNDAV6

GNDAV52

GNDAV51

GNDAV50

GNDAV5

GNDAV49

GNDAV46

GNDAV45

GNDAV44

GNDAV43

GNDAV40

GNDAV4

GNDAV39

GNDAV38

GNDAV37

GNDAV36

GNDAV3

GNDAV27

GNDAV16

GNDAV14

GNDAV12

GNDAV11

GNDAV10

GNDAU9

GNDAU8

GNDAU7

GNDAU6

GNDAU54

GNDAU53

GNDAU52

GNDAU49

GNDAU48

GNDAU47

GNDAU46

GNDAU43

GNDAU39

GNDAU34

GNDAU3

GNDAU29

GNDAU24

GNDAU2

GNDAU17

GNDAU15

GNDAU12

GNDAU1

GNDAT9

GNDAT6

GNDAT52

GNDAT51

GNDAT50

GNDAT5

GNDAT49

GNDAT46

GNDAT45

GNDAT44

GNDAT43

GNDAT40

GNDAT4

GNDAT39

GNDAT37

GNDAT32

GNDAT3

GNDAT27

GNDAT21

GNDAT19

GNDAT17

GNDAT15

GNDAT12

GNDAT11

GNDAT10

GNDAR9

GNDAR8

GNDAR7

GNDAR6

GNDAR54

GNDAR53

GNDAR52

GNDAR49

GNDAR48

GNDAR47

GNDAR46

GNDAR43

GNDAR39

GNDAR35

GNDAR30

GNDAR3

GNDAR23

GNDAR2

GNDAR16

GNDAR15

GNDAR12

GNDAR1

GNDAP9

GNDAP6

GNDAP52

GNDAP51

GNDAP50

GNDAP5

GNDAP49

GNDAP46

GNDAP45

GNDAP44

GNDAP43

GNDAP42

GNDAP41

GNDAP40

GNDAP4

GNDAP32

GNDAP3

GNDAP25

GNDAP14

GNDAP13

GNDAP12

GNDAP11

GNDAP10

GNDAN9

GNDAN8

GNDAN7

GNDAN6

GNDAN54

GNDAN53

GNDAN52

GNDAN49

GNDAN48

GNDAN47

GNDAN46

GNDAN43

GNDAN36

GNDAN3

GNDAN27

GNDAN22

GNDAN2

GNDAN19

GNDAN12

GNDAN1

GNDAM9

GNDAM6

GNDAM52

GNDAM51

GNDAM50

GNDAM5

GNDAM49

GNDAM46

GNDAM45

GNDAM44

GNDAM42

GNDAM41

GNDAM4

GNDAM33

GNDAM3

GNDAM29

GNDAM24

GNDAM14

GNDAM13

GNDAM11

GNDAM10

GNDAL9

GNDAL8

GNDAL7

GNDAL6

GNDAL54

GNDAL53

GNDAL52

GNDAL49

GNDAL48

GNDAL47

GNDAL46

GNDAL43

GNDAL40

GNDAL39

GNDAL35

GNDAL31

GNDAL3

GNDAL26

GNDAL20

GNDAL2

GNDAL16

GNDAL15

GNDAL12

GNDAL1

GNDAK9

GNDAK6

GNDAK52

GNDAK51

1ST280EYF55

U39P

GNDBM4

GNDBM39

GNDBM38

GNDBM3

GNDBM29

GNDBM24

GNDBM23

GNDBM22

GNDBM21

GNDBM18

GNDBM17

GNDBM16

GNDBM15

GNDBM12

GNDBM11

GNDBM10

GNDBM1

GNDBL9

GNDBL8

GNDBL7

GNDBL6

GNDBL54

GNDBL53

GNDBL50

GNDBL49

GNDBL46

GNDBL45

GNDBL42

GNDBL41

GNDBL38

GNDBL36

GNDBL31

GNDBL3

GNDBL26

GNDBL24

GNDBL21

GNDBL20

GNDBL2

GNDBL19

GNDBL18

GNDBL15

GNDBL14

GNDBL13

GNDBL12

GNDBL1

GNDBK9

GNDBK6

GNDBK52

GNDBK51

GNDBK5

GNDBK48

GNDBK47

GNDBK44

GNDBK43

GNDBK40

GNDBK4

GNDBK39

GNDBK38

GNDBK33

GNDBK3

GNDBK28

GNDBK24

GNDBK23

GNDBK22

GNDBK21

GNDBK18

GNDBK17

GNDBK16

GNDBK15

GNDBK12

GNDBK11

GNDBK10

GNDBJ9

GNDBJ8

GNDBJ7

GNDBJ6

GNDBJ54

GNDBJ53

GNDBJ50

GNDBJ49

GNDBJ46

GNDBJ45

GNDBJ42

GNDBJ41

GNDBJ38

GNDBJ35

GNDBJ30

GNDBJ3

GNDBJ24

GNDBJ21

GNDBJ20

GNDBJ2

GNDBJ19

GNDBJ18

GNDBJ15

GNDBJ14

GNDBJ13

GNDBJ12

GNDBJ1

GNDBH9

GNDBH6

GNDBH52

GNDBH51

GNDBH5

GNDBH48

GNDBH47

GNDBH44

GNDBH43

GNDBH40

GNDBH4

GNDBH39

GNDBH38

GNDBH32

GNDBH3

GNDBH27

GNDBH24

GNDBH23

GNDBH22

GNDBH21

GNDBH18

GNDBH17

GNDBH16

GNDBH15

GNDBH12

GNDBH11

GNDBH10

GNDBG9

GNDBG8

GNDBG7

GNDBG6

GNDBG54

GNDBG53

GNDBG50

GNDBG49

GNDBG46

GNDBG45

GNDBG42

GNDBG41

GNDBG40

GNDBG34

GNDBG3

GNDBG29

GNDBG24

GNDBG21

GNDBG20

GNDBG2

GNDBG19

GNDBG18

GNDBG15

GNDBG14

GNDBG13

GNDBG12

GNDBG1

GNDBF9

GNDBF6

GNDBF52

GNDBF51

GNDBF5

GNDBF48

GNDBF47

GNDBF44

GNDBF43

GNDBF40

GNDBF4

GNDBF39

GNDBF36

GNDBF31

GNDBF3

GNDBF26

GNDBF24

GNDBF23

GNDBF22

GNDBF21

GNDBF18

GNDBF17

GNDBF16

GNDBF15

GNDBF12

GNDBF11

GNDBF10

GNDBE9

GNDBE8

GNDBE7

GNDBE6

GNDBE54

GNDBE53

GNDBE50

GNDBE49

GNDBE46

GNDBE45

GNDBE39

GNDBE33

GNDBE3

GNDBE28

GNDBE24

GNDBE20

GNDBE2

GNDBE19

GNDBE18

GNDBE15

GNDBE14

GNDBE13

GNDBE12

GNDBE1

GNDBD9

GNDBD6

GNDBD52

GNDBD51

GNDBD5

GNDBD48

GNDBD47

GNDBD44

GNDBD43

GNDBD40

GNDBD4

GNDBD39

GNDBD35

GNDBD30

GNDBD3

GNDBD24

GNDBD17

GNDBD16

GNDBD15

GNDBD12

GNDBD11

GNDBD10

GNDBC9

GNDBC8

GNDBC7

GNDBC6

GNDBC54

GNDBC53

GNDBC50

GNDBC49

GNDBC46

GNDBC45

GNDBC39

GNDBC38

GNDBC37

GNDBC36

GNDBC32

GNDBC3

GNDBC27

GNDBC24

GNDBC2

GNDBC16

GNDBC15

GNDBC14

GNDBC13

GNDBC12

GNDBC1

GNDBB9

GNDBB6

GNDBB52

GNDBB51

GNDBB5

GNDBB48

GNDBB47

GNDBB44

GNDBB43

GNDBB40

GNDBB4

GNDBB37

GNDBB36

GNDBB3

GNDBB29

GNDBB24

GNDBB23

GNDBB22

GNDBB21

GNDBB20

GNDBB17

GNDBB15

GNDBB12

GNDBB11

GNDBB10

GNDBA9

GNDBA8

GNDBA7

GNDBA6

1ST280EYF55

U39R

GNDAK50

GNDAK5

GNDAK49

GNDAK46

GNDAK45

GNDAK44

GNDAK43

GNDAK40

GNDAK4

GNDAK38

GNDAK33

GNDAK3

GNDAK28

GNDAK23

GNDAK17

GNDAK15

GNDAK12

GNDAK11

GNDAK10

GNDAJ9

GNDAJ8

GNDAJ7

GNDAJ6

GNDAJ54

GNDAJ53

GNDAJ52

GNDAJ49

GNDAJ48

GNDAJ47

GNDAJ46

GNDAJ43

GNDAJ40

GNDAJ38

GNDAJ35

GNDAJ30

GNDAJ3

GNDAJ25

GNDAJ2

GNDAJ17

GNDAJ15

GNDAJ12

GNDAJ1

GNDAH9

GNDAH6

GNDAH52

GNDAH51

GNDAH50

GNDAH5

GNDAH49

GNDAH46

GNDAH45

GNDAH44

GNDAH43

GNDAH41

GNDAH4

GNDAH33

GNDAH3

GNDAH28

GNDAH20

GNDAH14

GNDAH12

GNDAH11

GNDAH10

GNDAG9

GNDAG8

GNDAG7

GNDAG6

GNDAG54

GNDAG53

GNDAG52

GNDAG49

GNDAG48

GNDAG47

GNDAG46

GNDAG43

GNDAG40

GNDAG38

GNDAG3

GNDAG23

GNDAG2

GNDAG17

GNDAG15

GNDAG12

GNDAG1

GNDAF9

GNDAF6

GNDAF52

GNDAF51

GNDAF50

GNDAF5

GNDAF49

GNDAF46

GNDAF45

GNDAF44

GNDAF43

GNDAF41

GNDAF4

GNDAF34

GNDAF31

GNDAF3

GNDAF26

GNDAF14

GNDAF12

GNDAF11

GNDAF10

GNDAE9

GNDAE8

GNDAE7

GNDAE6

GNDAE54

GNDAE53

GNDAE52

GNDAE49

GNDAE48

GNDAE47

GNDAE46

GNDAE43

GNDAE40

GNDAE38

GNDAE33

GNDAE3

GNDAE28

GNDAE23

GNDAE20

GNDAE2

GNDAE17

GNDAE15

GNDAE12

GNDAE1

GNDAD9

GNDAD6

GNDAD52

GNDAD51

GNDAD50

GNDAD5

GNDAD49

GNDAD46

GNDAD45

GNDAD44

GNDAD43

GNDAD40

GNDAD4

GNDAD38

GNDAD30

GNDAD3

GNDAD25

GNDAD17

GNDAD15

GNDAD12

GNDAD11

GNDAD10

GNDAC9

GNDAC8

GNDAC7

GNDAC6

GNDAC54

GNDAC53

GNDAC52

GNDAC49

GNDAC48

GNDAC47

GNDAC46

GNDAC43

GNDAC42

GNDAC41

GNDAC39

GNDAC35

GNDAC32

GNDAC3

GNDAC28

GNDAC22

GNDAC2

GNDAC16

GNDAC14

GNDAC13

GNDAC12

GNDAC1

GNDAB9

GNDAB6

GNDAB52

GNDAB51

GNDAB50

GNDAB5

GNDAB49

GNDAB46

GNDAB45

GNDAB44

GNDAB4

GNDAB35

GNDAB30

GNDAB3

GNDAB25

GNDAB20

GNDAB11

GNDAB10

GNDAA9

GNDAA8

GNDAA7

GNDAA6

GNDAA54

GNDAA53

GNDAA52

GNDAA49

GNDAA48

GNDAA47

GNDAA46

GNDAA43

GNDAA42

GNDAA41

GNDAA32

GNDAA3

GNDAA27

GNDAA2

GNDAA14

GNDAA13

GNDAA12

GNDAA1

GNDA9

GNDA8

GNDA7

GNDA6

GNDA53

GNDA52

GNDA5

GNDA49

GNDA48

GNDA47

GNDA46

GNDA43

GNDA42

GNDA41

GNDA40

GNDA4

GNDA37

GNDA36

GNDA35

GNDA34

GNDA31

GNDA3

GNDA24

GNDA21

GNDA20

GNDA2

GNDA19

GNDA18

GNDA15

GNDA14

GNDA13

GNDA12

1ST280EYF55

U39N

GNDY9

GNDY6

GNDY52

GNDY51

GNDY50

GNDY5

GNDY49

GNDY46

GNDY45

GNDY44

GNDY43

GNDY40

GNDY4

GNDY39

GNDY3

GNDY23

GNDY16

GNDY15

GNDY12

GNDY11

GNDY10

GNDW9

GNDW8

GNDW7

GNDW6

GNDW54

GNDW53

GNDW52

GNDW49

GNDW48

GNDW47

GNDW46

GNDW43

GNDW40

GNDW38

GNDW35

GNDW30

GNDW3

GNDW25

GNDW20

GNDW2

GNDW17

GNDW15

GNDW12

GNDW1

GNDV9

GNDV6

GNDV52

GNDV51

GNDV50

GNDV5

GNDV49

GNDV46

GNDV45

GNDV44

GNDV43

GNDV40

GNDV4

GNDV38

GNDV32

GNDV3

GNDV27

GNDV23

GNDV17

GNDV15

GNDV12

GNDV11

GNDV10

GNDU9

GNDU8

GNDU7

GNDU6

GNDU54

GNDU53

GNDU52

GNDU49

GNDU48

GNDU47

GNDU46

GNDU43

GNDU41

GNDU39

GNDU38

GNDU34

GNDU3

GNDU29

GNDU2

GNDU19

GNDU17

GNDU16

GNDU14

GNDU12

GNDU1

GNDT9

GNDT6

GNDT52

GNDT51

GNDT50

GNDT5

GNDT49

GNDT46

GNDT45

GNDT44

GNDT43

GNDT40

GNDT4

GNDT38

GNDT31

GNDT3

GNDT17

GNDT15

GNDT12

GNDT11

GNDT10

GNDR9

GNDR8

GNDR7

GNDR6

GNDR54

GNDR53

GNDR52

GNDR49

GNDR48

GNDR47

GNDR46

GNDR43

GNDR41

GNDR39

GNDR38

GNDR3

GNDR28

GNDR2

GNDR17

GNDR16

GNDR14

GNDR12

GNDR1

GNDP9

GNDP6

GNDP52

GNDP51

GNDP50

GNDP5

GNDP49

GNDP46

GNDP45

GNDP44

GNDP43

GNDP40

GNDP4

GNDP38

GNDP30

GNDP3

GNDP17

GNDP15

GNDP12

GNDP11

GNDP10

GNDN9

GNDN8

GNDN7

GNDN6

GNDN54

GNDN53

GNDN52

GNDN49

GNDN48

GNDN47

GNDN46

GNDN43

GNDN40

GNDN38

GNDN32

GNDN3

GNDN27

GNDN22

GNDN2

GNDN17

GNDN15

GNDN12

GNDN1

GNDM9

GNDM6

GNDM52

GNDM51

GNDM50

GNDM5

GNDM49

GNDM46

GNDM45

GNDM44

GNDM43

GNDM42

GNDM41

GNDM40

GNDM4

GNDM39

GNDM38

GNDM37

GNDM3

GNDM29

GNDM24

GNDM18

GNDM17

GNDM16

GNDM15

GNDM14

GNDM13

GNDM12

GNDM11

GNDM10

GNDL9

GNDL8

GNDL7

GNDL6

GNDL54

GNDL53

GNDL52

GNDL49

GNDL48

GNDL47

GNDL46

GNDL43

GNDL42

GNDL41

GNDL40

GNDL37

GNDL36

GNDL35

GNDL34

GNDL31

GNDL3

GNDL26

GNDL21

GNDL20

GNDL2

GNDL19

GNDL18

GNDL15

GNDL14

GNDL13

GNDL12

GNDL1

GNDK9

GNDK6

GNDK52

GNDK51

GNDK50

GNDK5

GNDK49

GNDK46

GNDK45

GNDK44

GNDK43

GNDK40

GNDK4

GNDK39

GNDK38

GNDK37

GNDK34

GNDK3

GNDK28

GNDK21

GNDK18

GNDK17

GNDK16

GNDK15

GNDK12

GNDK11

GNDK10

GNDJ9

GNDJ8

GNDJ7

GNDJ6

GNDJ54

GNDJ53

GNDJ52

GNDJ49

GNDJ48

GNDJ47

Page 39: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR - POWER INPUT

12V Power Input Connector

Inrush Current 2ARamp Time 12ms

place very close to Cap

3.3V_STBY ramp time = 1.2ms

connect GNDsthrough a single via

UV: 9.65V/10.1325VOV: 14.475V/13.75125V

2.1M 215K 84.5K for UV 4V

CAD Notes:

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Ramp up 200us-10ms

OC Setting 30A, Ramp Time 4.8ms, Inrush Curren 3.3AOC response Time 0.12msUV threshold 10.5V, OV threshold 15.05V

12V12V_IN

12V_IN

12V_DCIN12V IO_3V3 3.3V_PRE

12V_DCIN

12V_IN 3.3V_STBY

GND_3V3STBY

GND_3V3STBYGND_3V3STBY

12V_DCIN

12V_IN

12V_IN

12V_VSENSE 1012V_VSENSE_GND 10

START 10

EN_12V 11

12V_PWRGD 10

12VIN_VSENSE 1012VIN_VSENSE_GND 1012VIN_PWRFAILn 10

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

39 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

39 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

39 53Sunday, November 05, 2017

R372

5.49M

V26

RSNS1

SNS2

V24

RS

NS

1S

NS

2

C309

330uF

C310DNI

C322

4.7nF

R376 100K

C1111

1uF

J46

PCIe 2x3 ATX

12V01

12V12

12V23

GND04

GND15

GND26

U43

FDMC8010

5

123

4

678

R377

200k

R36010.0K

C1112

680pF

C320

10uF1210

U41

LTC4218CDHC-12

NC1

VDD2

UV3

OV4

TIMER5

INTVCC6

GND7

SOURCE8

GATE9PG10/FLT11FB12IMON13ISET14SENSE-15SENSE+16

NC

217

R358

1.00K

R711

DNI

R357

DNI

R362

10

R369

2.49K

R35538.3K

R364150

D24LED_WE1206

C313

DNI

U44

FDMC8010

5

123

4

678

C318

0.01uF

C317

47uF20V

R380

154K

R371

1.00K

R370

10

C321

DNI

R356287K D23

LED_WE1206

C1023

DNI

R374 DNI

D25LED_WE1206

C311

0.01uF

C316

47uF20V

C314

47uF20V

R712 20.0K

C315

0.1uF

V23

RSNS1

SNS2

C308

330uF

C31947UF

R359 0.001

R368DNI

R710 0.001

R354DNI

C307

150uF7343P

R36710.0K

R366

100K

C1024

DNI

R37530.1K

C306

0.01uF

V25

RSNS1

SNS2

R381

13.3K

R379100K

C312

DNI

C305

330uF

R36338.3K

V28

RSNS1

SNS2

U45

LTC4365

VIN4

VOUT6

GA

TE

5

UV3

GND1

OV2

FAULT7SHDN

8

GND9

R3730

SW10

1 2 3

654

C303

0.1uFR365150

U46

LTM4624

VOUT1D1

VIN1E5

INTVccE4

GND4E3

VOUT4E2VOUT3E1

FREQA4

RUNA3

TRACK/SSA2

GND2D3

VOUT0C1

PGOODC2

GND1C3

MODEC4

SVinC5 VOUT2

D2

NC1A5

SGNDB4

COMPA1

FBB1

GND0B3

NC2B2

NC3B5

GND3D4

VIN0D5

D37

SMCJ12A

V27

RSNS1

SNS2

C304

150uF7343P

R378150

V22

RS

NS

1S

NS

2

EN_12V

12V_PWRGD

START

12V_VSENSE

12V_VSENSE_GND

12VIN_VSENSE_GND

12VIN_VSENSE

12VIN_PWRFAILn

Page 40: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

PWR - VCC 1

I2C ADDRESS:b'1000 111'

Ramp time 5ms

0.89VRamp up 5ms

12V

S10_VCC

S10_VCC

GND_VCC

VCC_VDD33

VCC_VDD33

GND_VCC

GND_VCC

GND_VCC GND_VCC

GND_VCC

EN_VCC 11,41,52

VCC_SYNC 41

VCCLSENSE_P 37

VCC_VSENSE_GND 52

VCC_VSENSE 52

VCCLSENSE_N 37

VCC_PWRGD 10,41

VCC_PWRFAULTn 10,41

PMBUS_SCL 18,41

PMBUS_SDA 18,41

PMBUS_ALERTn 13,18,41

VCC_SHARECLKn 41

VCC_COMP041

VCC_COMP141

VSENSEP_VCC41VSENSEN_VCC41

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

40 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

40 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

40 53Sunday, November 05, 2017

C326

100uF

TP4

C345

100pF

R390

4.70K

R391

10.0K

C336

22uF

R3820

R388

10.0K

C329330uF6.3V

C343330uF6.3V

R392

10.0K

R383DNI

TP5

R3860

U47

LTM4678EY#PBF

VOUT0_1K7

VOUT0_2K8

VOUT0_3K9

VOUT0_10L11

VO

UT

1_1

A7

VO

UT

1_2

A8

VO

UT

1_3

A9

VO

UT

1_4

A10

VOUT0_4K10

VOUT0_5K11

VOUT0_6L7

VOUT0_11L12

VO

UT

1_5

B7

VO

UT

1_6

B8

VO

UT

1_7

B9

VO

UT

1_8

B10

VOUT0_7L8

VOUT0_8L9

VOUT0_9L10

VOUT0_12M7

GN

D1

A4

GN

D2

A5

GN

D3

A6

GN

D4

B1

VO

UT

1_9

B11

VO

UT

1_10

B12

VO

UT

1_11

C7

VO

UT

1_12

C8

GN

D5

B3

GN

D6

B4

GN

D7

B5

GN

D8

B6

ASELF12

FSWPHCFGE9

GN

D9

C1

GN

D10

C2

GN

D11

C3

GN

D12

C4

PGOOD0J7

PGOOD1D9

GN

D13

C5

TSNS0bJ8 TSNS0a

J11

ALERTH11

RUN0G12

VOUT0CFGE11

VTRIM0CFGE10

TS

NS

1a

J10

TS

NS

1b

D8

GN

D14

C6

GN

D15

D2

GN

D16

D3

GN

D17

D4

SDAH10

SCLJ12

RUN1F11

VOUT1CFGE12

VTRIM1CFGC12

VDD25D12

WPC11

GN

D18

D5

GN

D20

E5

GN

D21

E6

GN

D22

F5

GN

D23

F6

GN

D24

F7

SYNCK12

GN

D45

L4

GN

D46

L5

SHARE_CLKD11

EXTVCCF8

GN

D25

G5

GN

D26

G6

GN

D39

K3

GN

D38

K2

GN

D40

K4

GN

D27

G7

COMP0aJ9

SGND3G9

SGND4G10

COMP1aD10

GN

D28

G8

GN

D29

H5

GN

D44

L3

VOSNS0+M11

VOSNS0-M12

INTVCC_1E7

VO

SN

S1+

A11

GN

D30

H6

GN

D35

J4

GN

D36

J5

GN

D31

H7

SW0_2M1

GN

D37

J6

GN

D32

H8

GN

D33

J2

GN

D34

J3

SW

1_3

B2

GN

D41

K5

VINH0_4G4 VINH0_3G3 VINH0_2G2 VINH0_1G1

GN

D42

K6

VIN

H1_1

E1

VIN

H1_2

E2

VIN

H1_3

E3

VIN

H1_4

E4

IN+J1

VINH0_8H4 VINH0_7H3 VINH0_6H2 VINH0_5H1

IN-K1

GN

D43

L1

VIN

H1_5

F1

VIN

H1_6

F2

VIN

H1_7

F3

VIN

H1_8

F4

SGND1F9

SGND2F10

GN

D19

D6

SV

IND

1

SW

1_1

A1

SW0_1L2

SW

1_2

A2

SW0_3M2

VOUT0_13M8

VOUT0_14M9

VOUT0_15M10

GN

D0

A3

GN

D47

L6

GN

D49

M3

GN

D50

M4

GN

D51

M5

GN

D48

M6

VO

UT

1_13

C9

VO

UT

1_14

D7

VO

SN

S1-

A12

VDD33E8

FAULT1G11

FAULT0H12

CO

MP

0b

H9

CO

MP

1b

C10

R394 22.6K

C331

150uF7343P

C342330uF6.3V

R387DNI

R395 1.65K

C330

2.2uF

C337

100uF

C327330uF6.3V

R397 1.65K

C339

100uF

C344

2200pF

J47

HEADER, 1x2-PIN

12

C328330uF6.3V

C338

100uF

R396 6.34K

R393 6.34K

C332

150uF7343P

R384DNI

TP3

C340

100uF

C323

100uF

C333

22uF

C341330uF6.3V

R398 6.34K

C324

100uF

V29

RSNS1

SNS2

C335

22uF

C325

100uF

R627 10.0K

C334

22uF

R385DNI

R389

10.0K

VS

EN

SE

P_

VC

CV

SE

NS

EN

_V

CC

VCC_COMP0 VCC_COMP1

VSENSEP_VCC

VSENSEN_VCC

Page 41: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR - VCC 2

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

0.89V/92A

I2C ADDRESS:b'1001 000'

12V

S10_VCC

S10_VCC

GND_VCC

VCC_VDD33

GND_VCC

GND_VCC

VCC_PWRGD 10,40

VCC_PWRFAULTn 10,40

PMBUS_SCL 18,40

PMBUS_SDA 18,40

PMBUS_ALERTn 13,18,40

VCC_COMP040

EN_VCC 11,40,52

VCC_COMP140

VCC_SYNC 40

VCC_SHARECLKn 40

VSENSEN_VCC 40

VSENSEP_VCC 40

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

41 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

41 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

41 53Sunday, November 05, 2017

C363

100uF

R407 1.65K

J49

DNI

C365330uF6.3V

C364330uF6.3V

C346

100uF

R406 6.34K

J48

DNI

C348

100uF

R408 6.34K

C357

150uF7343P

R401

DNI

C347

100uFC351330uF6.3VTP6

C349

100uFC352330uF6.3V

R402

DNI

C358

150uF7343P

C350330uF6.3V

TP7

C359

22uFR399

10.0K

C355

22uF

C366330uF6.3V

R400

4.70K

C354

22uF

TP8C360

100uF

R403 7.68K

R404 1.65K

C362

100uF

C353

2.2uF

C356

22uF

R628 10.0K

C361

100uF

U48

LTM4678EY#PBF

VOUT0_1K7

VOUT0_2K8

VOUT0_3K9

VOUT0_10L11

VO

UT

1_1

A7

VO

UT

1_2

A8

VO

UT

1_3

A9

VO

UT

1_4

A10

VOUT0_4K10

VOUT0_5K11

VOUT0_6L7

VOUT0_11L12

VO

UT

1_5

B7

VO

UT

1_6

B8

VO

UT

1_7

B9

VO

UT

1_8

B10

VOUT0_7L8

VOUT0_8L9

VOUT0_9L10

VOUT0_12M7

GN

D1

A4

GN

D2

A5

GN

D3

A6

GN

D4

B1

VO

UT

1_9

B11

VO

UT

1_10

B12

VO

UT

1_11

C7

VO

UT

1_12

C8

GN

D5

B3

GN

D6

B4

GN

D7

B5

GN

D8

B6

ASELF12

FSWPHCFGE9

GN

D9

C1

GN

D10

C2

GN

D11

C3

GN

D12

C4

PGOOD0J7

PGOOD1D9

GN

D13

C5

TSNS0bJ8 TSNS0a

J11

ALERTH11

RUN0G12

VOUT0CFGE11

VTRIM0CFGE10

TS

NS

1a

J10

TS

NS

1b

D8

GN

D14

C6

GN

D15

D2

GN

D16

D3

GN

D17

D4

SDAH10

SCLJ12

RUN1F11

VOUT1CFGE12

VTRIM1CFGC12

VDD25D12

WPC11

GN

D18

D5

GN

D20

E5

GN

D21

E6

GN

D22

F5

GN

D23

F6

GN

D24

F7

SYNCK12

GN

D45

L4

GN

D46

L5

SHARE_CLKD11

EXTVCCF8

GN

D25

G5

GN

D26

G6

GN

D39

K3

GN

D38

K2

GN

D40

K4

GN

D27

G7

COMP0aJ9

SGND3G9

SGND4G10

COMP1aD10

GN

D28

G8

GN

D29

H5

GN

D44

L3

VOSNS0+M11

VOSNS0-M12

INTVCC_1E7

VO

SN

S1+

A11

GN

D30

H6

GN

D35

J4

GN

D36

J5

GN

D31

H7

SW0_2M1

GN

D37

J6

GN

D32

H8

GN

D33

J2

GN

D34

J3

SW

1_3

B2

GN

D41

K5

VINH0_4G4 VINH0_3G3 VINH0_2G2 VINH0_1G1

GN

D42

K6

VIN

H1_1

E1

VIN

H1_2

E2

VIN

H1_3

E3

VIN

H1_4

E4

IN+J1

VINH0_8H4 VINH0_7H3 VINH0_6H2 VINH0_5H1

IN-K1

GN

D43

L1

VIN

H1_5

F1

VIN

H1_6

F2

VIN

H1_7

F3

VIN

H1_8

F4

SGND1F9

SGND2F10

GN

D19

D6

SV

IND

1

SW

1_1

A1

SW0_1L2

SW

1_2

A2

SW0_3M2

VOUT0_13M8

VOUT0_14M9

VOUT0_15M10

GN

D0

A3

GN

D47

L6

GN

D49

M3

GN

D50

M4

GN

D51

M5

GN

D48

M6

VO

UT

1_13

C9

VO

UT

1_14

D7

VO

SN

S1-

A12

VDD33E8

FAULT1G11

FAULT0H12

CO

MP

0b

H9

CO

MP

1b

C10

R405 1.65K

VS

EN

SE

P_

VC

CV

SE

NS

EN

_V

CC

VSENSEP_VCCVSENSEN_VCC

Page 42: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR - VCCERAM

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

I2C ADDRESS:b'1000 000'

0.90V/26A

S10_VCCERAM

S10_VCCERAM

GND_VCCERAM

12V

12V

GND_VCCERAM

GND_VCCERAM

S10_VCCERAM

GND_VCCERAM

GND_VCCERAM

GND_VCCERAM

EN_VCCERAM11,52

I2C_PWR_SCL18,43,44,45,46I2C_PWR_SDA18,43,44,45,46I2C_PWR_ALERTn13,18,43,44,45,46

VCCERAM_PWRGD10

VCCERAM_VSENSE52

VCCERAM_VSENSE_GND52

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

42 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

42 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

42 53Sunday, November 05, 2017

C371

330uF6.3V

TP62

R426DNI

TP63

J51

WE_PWR_Terminal_5.08mm

11

22

TP10

C1019

22uF

R4

15

DN

I

R620DNI

J50

HEADER, 1x2-PIN

12

R4220

C372

22uF

R621DNI

TP11

R4

11

10

.0K

R428 1.65K

R427DNI

C375

22uF

R4210

R430 1.65K

C378

330uF6.3V

R4

12

10

.0K

C377

DNI

C376

22uF

R4

13

10

.0K

C379

100uF

R419

0

R4

10

0

TP12

R4

14

DN

I

C380

100uF

C1018

DNI

R423

10.0K

C373

DNI

R424 0

R4

16

DN

I

R431 DNI

C381

100uF

C367

100uFR4

09

0

TP60

TP13

R4

18

DN

I

C382

100uF

C368

100uF

TP61

TP14

R4330

C369

100uF

R425 15.4K

TP64

R417DNI

R619DNI

C370

100uF

R429 DNI

R4200

U49

LTM4676A

VOUT0_1A1

VOUT0_2A2

VOUT0_3A3

VOUT0_10D1

ISNS0b-E1

ISNS0b+F1

ISN

S1b-

G1

ISN

S1b+

H1

VO

UT

1_1

J1

VO

UT

1_2

J2

VO

UT

1_3

J3

VO

UT

1_4

K1

VOUT0_4B1

VOUT0_5B2

VOUT0_6B3

VOUT0_11D2

ISNS0a-E2

ISNS0a+F2

ISN

S1a-

G2

ISN

S1a+

H2

VO

UT

1_5

K2

VO

UT

1_6

K3

VO

UT

1_7

L1

VO

UT

1_8

L2

VOUT0_7C1

VOUT0_8C2

VOUT0_9C3

VOUT0_12D3

GN

D1

A4

GN

D2

A6

GN

D3

A7

GN

D4

A8

VO

UT

1_9

L3

VO

UT

1_10

M1

VO

UT

1_11

M2

VO

UT

1_12

M3

GN

D5

A9

GN

D6

A10

GN

D7

B4

GN

D8

B5

ASELG4

FSWPHCFGH4

GN

D9

B6

GN

D10

B7

GN

D11

B8

GN

D12

B9

GPIO0E4

GPIO1F4

SNUB0A5

GN

D13

C4

TSNS0bC5

TSNS0aD5

ALERTE5

RUN0F5

VOUT0CFGG5

VTRIM0CFGH5

TS

NS

1a

J5

TS

NS

1b

K5

GN

D14

C6

SN

UB

1M

5

GN

D15

C7

GN

D16

C8

GN

D17

C9

SDAD6

SCLE6

RUN1F6

VOUT1CFGG6

VTRIM1CFGH6

VDD25J6

WPK6

GN

D18

D4

GN

D20

E3

GN

D21

F3

GN

D22

F10

GN

D23

G3

GN

D24

G10

SYNCE7

GN

D45

M9

GN

D46

M10

SHARE_CLKH7

VDD33J7

GN

D25

G11

GN

D26

G12

GN

D39

L8

GN

D38

L7

GN

D40

L9

GN

D27

H3

COMP0bD8

COMP0aE8

SG

ND

3F

7

SG

ND

4F

8

CO

MP

1a

H8

CO

MP

1b

J8

GN

D28

H10

GN

D29

J4

GN

D44

M8

VOSNS0+D9

VOSNS0-E9

INTVCC_1F9

INTVCC_2G9

VO

SN

S1

H9

VO

RB

1J9

GN

D30

J10

GN

D35

L4

GN

D36

L5

GN

D31

K4

SW0B10

DN

C2

E11

VORB0+D10

VORB0-E10

GN

D37

L6

GN

D32

K7

GN

D33

K8

GN

D34

K9

DN

C1

C10

SW

1L10

GN

D41

M4

VINH0_4B12 VINH0_3B11 VINH0_2A12 VINH0_1A11

DN

C4

K10

VINL_2F12

GN

D42

M6

DN

C3

H11

VIN

H1_1

H12

VIN

H1_2

J11

VIN

H1_3

J12

VIN

H1_4

K11

VINH0_9E12 VINH0_8D12 VINH0_7D11 VINH0_6C12 VINH0_5C11

VINL_1F11

GN

D43

M7

VIN

H1_5

K12

VIN

H1_6

L11

VIN

H1_7

L12

VIN

H1_8

M11

VIN

H1_9

M12

SG

ND

1G

7

SG

ND

2G

8

GN

D19

D7

C374

DNI

TP9

VCCERAMCOMP VCCERAM_VSENSE

I2C_PWR_ALERTn

VCCERAMCOMP I2C_PWR_SCL

I2C_PWR_SDA

VCCERAM_PWRGD

EN_VCCERAM

Page 43: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR VCCT/VCCR

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

1.125V

I2C ADDRESS:b'1000 110'

1.125V

1.12VRamp up 5ms

Ramp up 5ms

1.12V

GND_VCCR

12V

GND_VCCR

GND_VCCR

GND_VCCR

GND_VCCR

S10_VCCR

GND_VCCR

GND_VCCR

VCCTR_VDD33

VCCTR_VDD33

S10_VCCT

I2C_PWR_ALERTn13,18,42,44,45,46

VCCR_PWRGD10VCCT_PWRGD10

I2C_PWR_SCL18,42,44,45,46I2C_PWR_SDA18,42,44,45,46

EN_VCCT11,52EN_VCCR11,52

VCCR_VSENSE_GND52VCCR_VSENSE52

VCCT_VSENSE52VCCT_VSENSE_GND52

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

43 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

43 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

43 53Sunday, November 05, 2017

TP17

C394

DNI

C398

100uF

C392

DNI

C391

22uF

R451DNI

TP18

R4640

R4

41

DN

I

R449DNI

R4540

R4380

C384

100uF

C393

DNI

C396

DNI

TP19

C1017

22uF

R4

46

DN

I

J53

WE_PWR_Terminal_5.08mm

11

22

R455 5.23K

C390

22uF

C400

100uF

C383

DNI

J52

HEADER, 1x2-PIN

12

TP22

R453

10.0K

C399

100uF

R435DNI

R4520

R463 9.09K

R4480

R4

42

DN

I

R4

40

10

.0K

R434DNI

R462 2.43K

C388

330uF6.3V

R450

0

R4370

R4

43

DN

I

C397

330uF6.3V

R456 DNI

C395

DNI

TP20

J54

HEADER, 1x2-PIN

12

C386

100uF

TP16

R457DNI

R4

47

DN

I

R458DNI R460 9.09K

R4

44

DN

I

TP15

R459 2.43K

R4

39

10

.0K

R4

45

DN

I

U50

LTM4675

VOUT0_1A1

VOUT0_2B1

VOUT0_3C1

VO

UT

1_1

J1

VO

UT

1_2

K1

VO

UT

1_3

L1

VO

UT

1_4

M1

VOUT0_4D1

GND1A3

GND2A4

GND3A5

GND4A6

GN

D5

A7

GN

D6

A8

GN

D7

B2

GN

D8

B3

ASELG2

FSWPHCFGH2

GN

D9

B4

GN

D10

B5

GN

D11

B6

GN

D12

B7

GPIO0E2

GPIO1F2

GN

D13

C2

TSNS0_2D3 TSNS0_1C3

ALERTE3

RUN0F3

VOUT0CFGG3

VTRIM0CFGH3

TS

NS

1a

J3

TS

NS

1b

K3

GN

D14

C4

GN

D15

C5

GN

D16

C6

GN

D17

C7

SDAD4

SCLE4

RUN1F4

VOUT1CFGG4

VTRIM1CFGH4

VD

D25

J4

WPK4

GN

D18

C8

GN

D20

E1

GN

D21

E9

GN

D22

F1

GN

D23

F8

GN

D24

G1

SYNCE5

GND45M4GND46M5

SHARE_CLKH5

INT

VC

C_2

G7

GN

D25

G8

GN

D26

G9

GN

D39

L4

GN

D38

L3

GN

D40

L5

GN

D27

H1

COMP0aE6

SGND3G5

SGND4G6

COMP0bD6

GN

D28

H8

GN

D29

H9

GND44M3

VOSNS0+D7

VOSNS0-E7

INT

VC

C_1

F7

VO

SN

S1

H7

GN

D30

J2

GN

D35

K7

GN

D36

K8

GN

D31

J8

GN

D37

L2

GN

D32

K2

GN

D33

K5

GN

D34

K6

GN

D41

L6

VINH0_4D9 VINH0_3C9 VINH0_2B9 VINH0_1A9

GN

D42

L7

VIN

H1_1

J9

VIN

H1_2

K9

VIN

H1_3

L9

VIN

H1_4

M9

SVINF9

GND43M2

SGND1F5

SGND2F6

GN

D19

D2

SW

1_1

L8

SW0_1B8

GND0A2

GND47M6

GND49M8

GND48M7

VD

D33

J5

CO

MP

1a

H6

CO

MP

1b

J6

GN

D50

D5

VORB0+D8

VORB0-E8

VO

RB

1J7

C385

100uF

J55

WE_PWR_Terminal_5.08mm

11

22

C387

100uF

C389

22uF

C401

100uF

TP21

I2C_PWR_SDA

I2C_PWR_SCL

I2C_PWR_ALERTn

VCCR_PWRGD

VCCT_PWRGD

VCCRCOMP

EN_VCCR

VCCTCOMP

EN_VCCT

VCCTCOMP

VCCT_VSENSE_GND

VCCT_VSENSE

VCCR_VSENSEVCCR_VSENSE_GND

Page 44: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR - VCCERT

I2C ADDRESS:b'1000 100'

Ramp up 5ms

0.9V

S10_VCCERT

GND_VCCERT

GND_VCCERT

12V

S10_VCCERT

S10_VCCERT

GND_VCCERT GND_VCCERT

GND_VCCERT

GND_VCCERT

VCCERT_VSENSE_GND 52

VCCERT_VSENSE 52

VCCERT_PWRFAULTn 10

VCCERT_PWRGD 10

I2C_PWR_SCL 18,42,43,45,46

I2C_PWR_SDA 18,42,43,45,46

I2C_PWR_ALERTn 13,18,42,43,45,46

EN_VCCERT 11,52

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

44 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

44 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

44 53Sunday, November 05, 2017

C413

22uF

C4142200pF

R477 1.65K

R470

4.70K

C404

100uF

C415

100uF

C412

22uF

TP25

C402

100pF

C416

100uF

C406

100uF

R4720

C1014

150uF7343P

C407330uF6.3V

C418

100uF

U51

LTM4678EY#PBF

VOUT0_1K7

VOUT0_2K8

VOUT0_3K9

VOUT0_10L11

VO

UT

1_1

A7

VO

UT

1_2

A8

VO

UT

1_3

A9

VO

UT

1_4

A10

VOUT0_4K10

VOUT0_5K11

VOUT0_6L7

VOUT0_11L12

VO

UT

1_5

B7

VO

UT

1_6

B8

VO

UT

1_7

B9

VO

UT

1_8

B10

VOUT0_7L8

VOUT0_8L9

VOUT0_9L10

VOUT0_12M7

GN

D1

A4

GN

D2

A5

GN

D3

A6

GN

D4

B1

VO

UT

1_9

B11

VO

UT

1_10

B12

VO

UT

1_11

C7

VO

UT

1_12

C8

GN

D5

B3

GN

D6

B4

GN

D7

B5

GN

D8

B6

ASELF12

FSWPHCFGE9

GN

D9

C1

GN

D10

C2

GN

D11

C3

GN

D12

C4

PGOOD0J7

PGOOD1D9

GN

D13

C5

TSNS0bJ8 TSNS0a

J11

ALERTH11

RUN0G12

VOUT0CFGE11

VTRIM0CFGE10

TS

NS

1a

J10

TS

NS

1b

D8

GN

D14

C6

GN

D15

D2

GN

D16

D3

GN

D17

D4

SDAH10

SCLJ12

RUN1F11

VOUT1CFGE12

VTRIM1CFGC12

VDD25D12

WPC11

GN

D18

D5

GN

D20

E5

GN

D21

E6

GN

D22

F5

GN

D23

F6

GN

D24

F7

SYNCK12

GN

D45

L4

GN

D46

L5

SHARE_CLKD11

EXTVCCF8

GN

D25

G5

GN

D26

G6

GN

D39

K3

GN

D38

K2

GN

D40

K4

GN

D27

G7

COMP0aJ9

SGND3G9

SGND4G10

COMP1aD10

GN

D28

G8

GN

D29

H5

GN

D44

L3

VOSNS0+M11

VOSNS0-M12

INTVCC_1E7

VO

SN

S1+

A11

GN

D30

H6

GN

D35

J4

GN

D36

J5

GN

D31

H7

SW0_2M1

GN

D37

J6

GN

D32

H8

GN

D33

J2

GN

D34

J3

SW

1_3

B2

GN

D41

K5

VINH0_4G4 VINH0_3G3 VINH0_2G2 VINH0_1G1

GN

D42

K6

VIN

H1_1

E1

VIN

H1_2

E2

VIN

H1_3

E3

VIN

H1_4

E4

IN+J1

VINH0_8H4 VINH0_7H3 VINH0_6H2 VINH0_5H1

IN-K1

GN

D43

L1

VIN

H1_5

F1

VIN

H1_6

F2

VIN

H1_7

F3

VIN

H1_8

F4

SGND1F9

SGND2F10

GN

D19

D6

SV

IND

1

SW

1_1

A1

SW0_1L2

SW

1_2

A2

SW0_3M2

VOUT0_13M8

VOUT0_14M9

VOUT0_15M10

GN

D0

A3

GN

D47

L6

GN

D49

M3

GN

D50

M4

GN

D51

M5

GN

D48

M6

VO

UT

1_13

C9

VO

UT

1_14

D7

VO

SN

S1-

A12

VDD33E8

FAULT1G11

FAULT0H12

CO

MP

0b

H9

CO

MP

1b

C10

C411

22uF

R476 22.6K

V38

RSNS1

SNS2

R473DNI

C419330uF6.3V

R469

DNI

R478 DNI

R629 10.0K

R480 DNI

R474DNI

R468

DNI

C408

2.2uF

TP23

J57

HEADER, 1x2-PIN

1 2

C409

150uF7343P

R467

DNI

R466

0

J56

WE_PWR_Terminal_5.08mm

11

22

C410

22uF

C403

100uF

TP24

R475 3.24K

R479 1.65K

R471

10.0K

C405

100uF

C417

100uF

VC

CE

RT

_V

SE

NS

EV

CC

ER

T_

VS

EN

SE

_G

ND

VCCERT_COMP0

VCCERT_COMP1

VCCERT_VSENSE_GNDVCCERT_VSENSE

Page 45: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR - VCCH_E/1.8V_PRE

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

I2C ADDRESS:b'1000 010'

1.1VRamp up 5ms

1.8VRamp up 5.2ms

GND_VCCH_E

GND_VCCH_E

1.8V_PRE

12V

S10_VCCH_E

12V

GND_VCCH_E

GND_VCCH_EGND_VCCH_E

GND_VCCH_E

GND_VCCH_E

S10_VCCH_E

I2C_PWR_SDA18,42,43,44,46I2C_PWR_SCL18,42,43,44,46

I2C_PWR_ALERTn13,18,42,43,44,46

VCCH_E_VSENSE 52

VCCH_E_VSENSE_GND 52

VCCH_E_PWRGD10

EN_VCCH_E11,52EN_1V8PRE11

1V8PRE_PWRGD10

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

45 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

45 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

45 53Sunday, November 05, 2017

C425

100uF

TP30

J59

HEADER, 1x2-PIN

12

R4

95

DN

I

R4

94

DN

I

R504DNI

R5030

C438

100uF

R48317.8K

TP31

R506 1.65K

R482DNI

R507 DNI

R508 2.43K

R505DNI

R510 5.23K

R4980

TP32

U52

LTM4676A

VOUT0_1A1

VOUT0_2A2

VOUT0_3A3

VOUT0_10D1

ISNS0b-E1

ISNS0b+F1

ISN

S1b-

G1

ISN

S1b+

H1

VO

UT

1_1

J1

VO

UT

1_2

J2

VO

UT

1_3

J3

VO

UT

1_4

K1

VOUT0_4B1

VOUT0_5B2

VOUT0_6B3

VOUT0_11D2

ISNS0a-E2

ISNS0a+F2

ISN

S1a-

G2

ISN

S1a+

H2

VO

UT

1_5

K2

VO

UT

1_6

K3

VO

UT

1_7

L1

VO

UT

1_8

L2

VOUT0_7C1

VOUT0_8C2

VOUT0_9C3

VOUT0_12D3

GN

D1

A4

GN

D2

A6

GN

D3

A7

GN

D4

A8

VO

UT

1_9

L3

VO

UT

1_10

M1

VO

UT

1_11

M2

VO

UT

1_12

M3

GN

D5

A9

GN

D6

A10

GN

D7

B4

GN

D8

B5

ASELG4

FSWPHCFGH4

GN

D9

B6

GN

D10

B7

GN

D11

B8

GN

D12

B9

GPIO0E4

GPIO1F4

SNUB0A5

GN

D13

C4

TSNS0bC5

TSNS0aD5

ALERTE5

RUN0F5

VOUT0CFGG5

VTRIM0CFGH5

TS

NS

1a

J5

TS

NS

1b

K5

GN

D14

C6

SN

UB

1M

5

GN

D15

C7

GN

D16

C8

GN

D17

C9

SDAD6

SCLE6

RUN1F6

VOUT1CFGG6

VTRIM1CFGH6

VDD25J6

WPK6

GN

D18

D4

GN

D20

E3

GN

D21

F3

GN

D22

F10

GN

D23

G3

GN

D24

G10

SYNCE7

GN

D45

M9

GN

D46

M10

SHARE_CLKH7

VDD33J7

GN

D25

G11

GN

D26

G12

GN

D39

L8

GN

D38

L7

GN

D40

L9

GN

D27

H3

COMP0bD8

COMP0aE8

SG

ND

3F

7

SG

ND

4F

8

CO

MP

1a

H8

CO

MP

1b

J8

GN

D28

H10

GN

D29

J4

GN

D44

M8

VOSNS0+D9

VOSNS0-E9

INTVCC_1F9

INTVCC_2G9

VO

SN

S1

H9

VO

RB

1J9

GN

D30

J10

GN

D35

L4

GN

D36

L5

GN

D31

K4

SW0B10

DN

C2

E11

VORB0+D10

VORB0-E10

GN

D37

L6

GN

D32

K7

GN

D33

K8

GN

D34

K9

DN

C1

C10

SW

1L10

GN

D41

M4

VINH0_4B12 VINH0_3B11 VINH0_2A12 VINH0_1A11

DN

C4

K10

VINL_2F12

GN

D42

M6

DN

C3

H11

VIN

H1_1

H12

VIN

H1_2

J11

VIN

H1_3

J12

VIN

H1_4

K11

VINH0_9E12 VINH0_8D12 VINH0_7D11 VINH0_6C12 VINH0_5C11

VINL_1F11

GN

D43

M7

VIN

H1_5

K12

VIN

H1_6

L11

VIN

H1_7

L12

VIN

H1_8

M11

VIN

H1_9

M12

SG

ND

1G

7

SG

ND

2G

8

GN

D19

D7

C430

22uF

R4

96

DN

I

R4

89

10

.0K

TP33

TP26

R502DNI

R4

88

10

.0K

C437

100uF

C420

1800pF

C426

330uF6.3V

TP39

C422

DNI

C433

10pF

C436

330uF6.3V

TP27

C1010

22uF

C435330uF6.3V

J58

WE_PWR_Terminal_5.08mm

11

22

TP35

C427

330uF6.3V

C431

22uF

C429

100uF

R4

93

DN

I

TP28

R5120

TP37

C423

100uF

R4

92

DN

I

C421

10pF

C434

DNI

C424

100uF

R511 32.4K

R501

10.0K

C428

100uF

R509 DNI

C439

100uF

R5000

C432

1800pF

R4

91

DN

I

R485DNI

R4860

TP36

TP29

R49917.8K

R497DNI

C1015

22uF

R4840

TP34

TP38

R487 DNI

R4

90

DN

I

EN_VCCH_E

EN_1V8PRE

I2C_PWR_SDA

I2C_PWR_SCL

I2C_PWR_ALERTn

VCCH_E_PWRGD

1V8PRE_PWRGD

VCCHECOMP

1V8COMP

1V8COMP

Page 46: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR - 3.3V_PRE

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

I2C ADDRESS:b'1000 011'

Ramp up 200us-10ms 3.3V/26A3.3V_PRE

GND_3V3

12V12V

GND_3V3

GND_3V3

3.3V_PRE

GND_3V3

GND_3V3

GND_3V3

EN_3V3PRE11

3V3PRE_PWRGD10

I2C_PWR_SCL18,42,43,44,45I2C_PWR_SDA18,42,43,44,45

I2C_PWR_ALERTn13,18,42,43,44,45

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

46 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

46 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

46 53Sunday, November 05, 2017

C1016

22uF

TP52

R526 0

C446

22uF

R536 22.6K

R534 22.6K

R5310

R527

4.75K

C447

22uF

U53

LTM4676A

VOUT0_1A1

VOUT0_2A2

VOUT0_3A3

VOUT0_10D1

ISNS0b-E1

ISNS0b+F1

ISN

S1b-

G1

ISN

S1b+

H1

VO

UT

1_1

J1

VO

UT

1_2

J2

VO

UT

1_3

J3

VO

UT

1_4

K1

VOUT0_4B1

VOUT0_5B2

VOUT0_6B3

VOUT0_11D2

ISNS0a-E2

ISNS0a+F2

ISN

S1a-

G2

ISN

S1a+

H2

VO

UT

1_5

K2

VO

UT

1_6

K3

VO

UT

1_7

L1

VO

UT

1_8

L2

VOUT0_7C1

VOUT0_8C2

VOUT0_9C3

VOUT0_12D3

GN

D1

A4

GN

D2

A6

GN

D3

A7

GN

D4

A8

VO

UT

1_9

L3

VO

UT

1_10

M1

VO

UT

1_11

M2

VO

UT

1_12

M3

GN

D5

A9

GN

D6

A10

GN

D7

B4

GN

D8

B5

ASELG4

FSWPHCFGH4

GN

D9

B6

GN

D10

B7

GN

D11

B8

GN

D12

B9

GPIO0E4

GPIO1F4

SNUB0A5

GN

D13

C4

TSNS0bC5

TSNS0aD5

ALERTE5

RUN0F5

VOUT0CFGG5

VTRIM0CFGH5

TS

NS

1a

J5

TS

NS

1b

K5

GN

D14

C6

SN

UB

1M

5

GN

D15

C7

GN

D16

C8

GN

D17

C9

SDAD6

SCLE6

RUN1F6

VOUT1CFGG6

VTRIM1CFGH6

VDD25J6

WPK6

GN

D18

D4

GN

D20

E3

GN

D21

F3

GN

D22

F10

GN

D23

G3

GN

D24

G10

SYNCE7

GN

D45

M9

GN

D46

M10

SHARE_CLKH7

VDD33J7

GN

D25

G11

GN

D26

G12

GN

D39

L8

GN

D38

L7

GN

D40

L9

GN

D27

H3

COMP0bD8

COMP0aE8

SG

ND

3F

7

SG

ND

4F

8

CO

MP

1a

H8

CO

MP

1b

J8

GN

D28

H10

GN

D29

J4

GN

D44

M8

VOSNS0+D9

VOSNS0-E9

INTVCC_1F9

INTVCC_2G9

VO

SN

S1

H9

VO

RB

1J9

GN

D30

J10

GN

D35

L4

GN

D36

L5

GN

D31

K4

SW0B10

DN

C2

E11

VORB0+D10

VORB0-E10

GN

D37

L6

GN

D32

K7

GN

D33

K8

GN

D34

K9

DN

C1

C10

SW

1L10

GN

D41

M4

VINH0_4B12 VINH0_3B11 VINH0_2A12 VINH0_1A11

DN

C4

K10

VINL_2F12

GN

D42

M6

DN

C3

H11

VIN

H1_1

H12

VIN

H1_2

J11

VIN

H1_3

J12

VIN

H1_4

K11

VINH0_9E12 VINH0_8D12 VINH0_7D11 VINH0_6C12 VINH0_5C11

VINL_1F11

GN

D43

M7

VIN

H1_5

K12

VIN

H1_6

L11

VIN

H1_7

L12

VIN

H1_8

M11

VIN

H1_9

M12

SG

ND

1G

7

SG

ND

2G

8

GN

D19

D7

C451

330uF6.3V

R528 10.0K

TP45

C1011

22uF

C440

DNI

R5

22

DN

I

C452

100uF

C450

DNI

R5370

C441

100uF

TP46

R5

19

10

.0K

C453

100uF

C442

100uF

R5290

R532 2.43K

R538 DNI

TP47

R5

20

10

.0K

C454

100uF

C443

100uF

R530DNI

R5

21

DN

I

C455

100uF

C445

100uF

R5

17

DN

I

R5390

C444

330uF6.3V

TP48

R5

23

DN

I

TP43

R533 12.7K

TP50

R5

15

DN

I

R535 DNI

C448

2200pF

R516

0

R5

24

DN

I

TP49

TP40

TP42

R513DNI

R518DNI

R5140

TP44

C449

68pF

TP51

TP41

R525DNI

3.3VCOMP 3V3_SENSE+

I2C_PWR_ALERTn

I2C_PWR_SCL

3.3VCOMP I2C_PWR_SDA

3V3PRE_PWRGD

EN_3V3PRE

3V3_SENSE+

3V3_SENSE-

Page 47: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

NA

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

47 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

47 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

47 53Sunday, November 05, 2017

Page 48: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR - S10_1V8 S10_2V5 S10_2V4

S10_1V8 Enable Circuit

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

S10_2V5 Enable Circuit

connect GNDsthrough a single via

2.4V

CAD Notes:

2.5V1.8VRamp up 4.5ms

Ramp up 2ms

Ramp up 5.2ms

12V

1.8V_PRES10_1V8

12V

IO_2V5S10_2V5

3.3V_PRE

GND_2V4

GND_2V4

S10_2V4

EN_S102V5 11,52EN_S101V8 11,52

EN_S102V4 11,52

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

48 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

48 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

48 53Sunday, November 05, 2017

U57

LTC4365

VIN4

VOUT6

GA

TE

5

UV3

GND1

OV2

FAULT7SHDN

8

GND9

C463

5pF

R5480

U58

EP5348UI

NC

(SW

)01

NC

(SW

)113

NC

(SW

)214

NC

03

PGND2

VFB4

AGND5

VOUT06

VOUT17

NC

18

NC

29

ENABLE10

AVIN11

PVIN12

U54

FDMC2514

5

123

4

R551

DNI

C466

0.1uF

R546DNI

R542100K

C459

DNI

R544

0

R5470

U56

LTC4365

VIN4

VOUT6

GA

TE

5

UV3

GND1

OV2

FAULT7SHDN

8

GND9

R550

200k

R543

0

V43

RSNS1

SNS2

C461

47nF

U55

FDMC2514

5

123

4

C462

2.2uF

C458

100uF1206

C465

2.2uF

C457

DNI

R54910.0K

C460

47nF

C456

100uF1206

R545DNI

C464

10uF

R552

66.5K

R541100K

EN_S101V8EN_S102V5

EN_S102V4

Page 49: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR - IO_2V5 IO_3V3 IO_12V

2.525V

connect GNDsthrough a single via

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

place two V very close to decoupling cap location

place decoupling cap under FPGA

IO_3V3 Enable Circuit

place two V very close to decoupling cap location

place decoupling cap under FPGA

UV: 9.65V/10.1325VOV: 14.475V/13.75125V

2.1M 215K 84.5K for UV 4V

3.3V

Ramp up 2.5ms

Ramp up 1.7ms

Ramp up 9ms

12V3.3V_PRE

IO_2V5

GND_2V5

GND_2V5

IO_2V5

12V

3.3V_PREIO_3V3

IO_12V12V

3.3V_PRE

GND_2V5

IO2V5_PWRGD 10

IO2V5_VSENSE 10

IO2V5_VSENSE_GND 10

IO3V3_VSENSE 10

IO3V3_VSENSE_GND 10

EN_IO3V3 11,52EN_IO2V5 11,52

IO12V_PWRGD 10

IO12V_VSENSE_GND 10

IO12V_VSENSE 10

EN_IO12V 11

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

49 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

49 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

49 53Sunday, November 05, 2017

C469

0.01uF

C467

22uf

R565107K

U63

LTC4365

VIN4

VOUT6

GA

TE

5

UV3

GND1

OV2

FAULT7SHDN

8

GND9

C476

0.01uF

C47047UF

C47147UF

C4738.2pF

R5610

R5730

V45

RSNS1

SNS2

V47

RSNS1

SNS2

R559348K

R560

5.49M

R572DNI

V49

RSNS1

SNS2

R564 100K

C480

0.01uF

V44

RSNS1

SNS2

U61

LTC4365

VIN4

VOUT6

GA

TE

5

UV3

GND1

OV2

FAULT7SHDN

8

GND9

R566

200k

R569100K

C478

DNI

C479

0.01uF

C472

0.01uF

R571

0

R5570

R5581.00K

R568

100K

R570

100K

C4741uF

R556

10

EN5339QI

U60

PGND2

PGND3

PGND8

PGND9

TST210

TST111

TST012

NC

13

AGND15

AVIN16

ENABLE18

PVIN19

PVIN20

NC

(SW

)01

NC

(SW

)121

NC

(SW

)222

NC

(SW

)323

NC

(SW

)424

VOUT4

VOUT5

VOUT6

VOUT7

VFB14

POK17

PG

ND

25

PG

ND

26

V46

RSNS1

SNS2

V48

RSNS1

SNS2U62

FDMC2514

5

123

4

R55510.0K

C477

100uF1206

U59

FDMC8010

5

123

4

678

V50

RSNS1

SNS2

R55338.3K

R554

DNI

C468

150uF7343P

IO2V5_PWRGD

EN_IO2V5

EN_IO3V3

EN_IO12V

Page 50: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Decoupling 1

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

DNI

DNI

DNI

DNI

DNI

S10_VCC

S10_VCCR

S10_VCCERT

S10_VCC

S10_VCCT

S10_VCC

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

50 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

50 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

50 53Sunday, November 05, 2017

C752

0.1uF

C511

220uF

C1048

4.7uF

C583

DNIC600

4.7uF

C532

1uF

C768

4.7uF

C720

0.1uF

C795

1uF

C642

0.22uF

C619

100uF

C624

0.22uF

C704

0.1uF

C492

0.47uF

C757

4.7uF

C802

100uF

C564

4.7uF

C510

330uF

C540

220uF

C767

4.7uF

C654

0.22uF

C765

4.7uF

C736

4.7uF

C1032

4.7uF

C520

1uF

C635

0.22uF

C673

0.22uF

C742

4.7uF

C776

4.7uF

C771

4.7uF

C618

330uF

C701

0.1uF

C1049

4.7uF

C601

4.7uF

C534

1uF

C641

0.22uF

C1057

4.7uF

C790

1uF

C729

0.1uF

C659

0.22uFC705

0.1uFC661

0.22uF

C491

0.47uF

C620

100uF

C799

1uF

C623

0.22uF

C803

100uF

C563

4.7uF

C570

4.7uF

C538

220uF

C656

0.22uF

C692

2.2uF

C675

0.22uF

C815

4.7uF

C523

1uF

C638

0.22uF

C552

2.2uF

C722

4.7uF

C755

4.7uF

C602

4.7uF

C535

1uF

C728

0.1uF

C512

220uF

C796

1uF

C644

0.22uF

C1058

0.01uF

C625

0.22uF

C694

2.2uF

C706

0.1uFC662

0.22uF

C494

0.47uF

C805

330uF

C683

1uF

C753

4.7uF

C566

4.7uF

C541

220uF

C655

0.22uF

C691

2.2uF

C812

4.7uF

C522

1uF

C637

0.22uF

C674

0.22uF

C551

2.2uF

C482

0.47uF

C725

4.7uF

C603

4.7uF C610

100uF

C1059

0.01uF

C575

100uF

C744

0.1uF

C643

0.22uF

C663

0.22uF

C493

0.47uF

C626

0.22uF

C693

2.2uF

C707

0.1uF

C787

330uF

C685

1uF

C565

4.7uF

C657

0.22uF

C739

4.7uF

C539

330uF

C737

4.7uF

C813

4.7uF

C524

1uF

C554

2.2uF

C590

4.7uF

C572

100uF

C560

4.7uF

C481

0.47uF

C1013

4.7uF

C791

1uF

C743

0.1uF

C573

100uF

C734

4.7uF

C645

0.22uF

C1060

0.01uF

C1050

4.7uF

C627

0.22uF

C696

2.2uF

C708

0.1uFC664

0.22uF

C496

0.47uF

C788

330uF

C684

1uF

C568

4.7uF

C741

4.7uF

C732

4.7uF

C544

220uF

C525

1uF

C502

220uF

C676

0.22uF

C514

220uF

C814

4.7uF

C1040

4.7uF

C553

2.2uF

C591

4.7uF

C484

0.47uF

C576

100uF

C792

1uF

C780

4.7uF

C1061

0.01uF

C1051

4.7uF

C746

0.1uF

C646

0.22uF

C495

0.47uF

C804

100uF

C628

0.22uF

C695

2.2uF

C709

0.1uFC665

0.22uF

C745

4.7uF

C789

330uF

C501

330uF

C686

1uF

C567

4.7uF

C820

330uF

C542

330uF

C677

0.22uF

C515

220uF

C758

4.7uF

C1012

4.7uF

C527

1uF

C503

220uF

C592

4.7uF

C800

1uF

C714

0.1uF

C1041

4.7uF

C777

4.7uF

C555

2.2uF

C483

0.47uF

C779

4.7uF

C611

100uF

C1033

4.7uF

C723

4.7uF

C647

0.22uF

C1062

0.01uF

C1052

4.7uF

C807

330uF

C578

100uF

C629

0.22uF

C698

4.7uF

C710

0.1uFC666

0.22uF

C498

0.47uF

C735

4.7uF

C571

DNI

C581

100uF

C775

4.7uF

C766

4.7uF

C543

220uF

C819

330uF

C604

4.7uF

C526

1uF

C504

330uF

C797

1uF

C770

4.7uF

C759

4.7uF

C1042

2.2uF

C556

2.2uF

C593

4.7uF

C715

0.1uF

C689

2.2uF

C486

0.47uF

C1034

4.7uF

C1053

4.7uF

C648

0.22uF

C1063

0.01uF

C497

0.47uF

C763

4.7uF

C1026

4.7uF

C630

0.22uF

C697

4.7uF

C711

0.1uFC667

0.22uF

C764

4.7uF

C769

4.7uF

C687

1uF

C569

4.7uF C574

DNI

C756

4.7uF

C513

330uF

C546

220uF

C747

0.1uF

C760

4.7uF

C595

4.7uF

C529

1uF

C505

220uF

C716

0.1uF

C1043

2.2uF

C772

4.7uF

C594

4.7uF

C485

0.47uF

C1035

4.7uF

C681

1uF

C649

0.22uF

C726

4.7uF

C1054

4.7uF

C579

100uF

C631

0.22uF

C712

0.1uFC668

0.22uF

C499

0.47uF

C1027

4.7uF

C517

0.47uF

C688

1uF

C577

330uF

C1064

0.01uF

C586

4.7uF

C749

0.1uF

C596

4.7uF

C528

1uF

C700

4.7uF

C506

220uF

C549

220uF

C761

4.7uF

C809

4.7uF

C1044

2.2uF

C558

2.2uF

C717

0.1uF

C488

0.47uF

C1036

4.7uF

C682

1uF

C547

220uF

C1055

4.7uF

C818

100uF

C650

0.22uF

C500

0.47uF

C1028

4.7uF

C516

0.47uF

C632

0.22uF

C699

4.7uF

C713

0.1uFC669

0.22uF

C585

100uF

C679

1uF

C773

4.7uF

C754

4.7uF

C721

4.7uF

C605

4.7uF

C1065

0.01uF

C587

4.7uF

C748

0.1uF

C548

DNI

C762

4.7uF

C810

4.7uF

C597

4.7uF

C531

1uF

C639

0.22uF

C1045

2.2uF

C738

4.7uF

C559

2.2uF

C718

0.1uF

C487

0.47uF

C1037

4.7uF

C784

100uF

C658

0.22uF

C651

0.22uF

C740

4.7uF

C1056

4.7uF

C821

330uF

C633

0.22uF

C670

0.22uF

C1029

4.7uF

C519

0.47uF

C680

2.2uF

C617

100uF

C774

4.7uF

C584

100uF

C690

2.2uF

C588

4.7uF

C750

0.1uF

C733

4.7uF

C598

4.7uF

C530

1uF

C508

220uF

C678

0.47uF

C811

4.7uF

C783

4.7uF

C724

4.7uF

C719

0.1uF

C794

1uF

C1046

2.2uF

C489

0.47uF

C621

0.22uF

C702

0.1uF

C1038

4.7uF

C785

100uF

C562

4.7uF

C537

220uF

C652

0.22uF

C660

0.22uF

C1030

4.7uF

C518

0.47uF

C634

0.22uF

C671

0.22uF

C778

4.7uF

C609

DNI

C550

220uF

C1047

2.2uF

C545

DNI

C589

4.7uF

C751

0.1uF

C599

4.7uF

C533

1uF

C509

220uF

C727

0.1uF

C703

0.1uF

C793

1uF

C490

0.47uF

C622

0.22uF

C616

100uF

C1039

4.7uF

C786

100uF

C561

4.7uF

C536

330uF

C653

0.22uF

C672

0.22uF

C1031

4.7uF

C521

1uF

C731

4.7uF

C636

0.22uF

C612

DNIC640

0.22uF

Page 51: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Decoupling 2

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

FMC+ Bank B

For VCCH pin

S10_1V8 S10_VCCERAM

S10_1V8FS10_2V4

S10_VCCRTPLL_GXE

S10_VCCH_E

S10_1V8F

S10_2V5

S10_VCCPLLDIG_SDM

VCCIO_2M

S102V4_VSENSE 10

S102V4_VSENSE_GND 10

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

51 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

51 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

51 53Sunday, November 05, 2017

C969

4.7uF

C848

0.22uF

C874

47nF

C817

100uF

C915

1uF

C906

22nF

C971

4.7uF

C866

0.1uF

C898

0.47uF

C1108

100uF

C940

1uF

C843

1uF

C927

4.7uF

C934

4.7uF

C924

2.2uF

C832

4.7uF

C842

1uF

V51

RSNS1

SNS2

C880

47nF

C935

4.7uF

C845

0.47uF

C875

47nF

C825

4.7uF

C990

4.7uF

C980

4.7uF

C864

0.1uF

C901

0.47uF

C892

0.22uF

C933

4.7uF

C923

2.2uF

C834

4.7uF

C994

0.1uF

C1104

4.7uF

V52

RSNS1

SNS2

C1092

4.7uF

C950

4.7uF

C877

47nF

C979

100uFC1096

4.7uF

C846

0.47uF

C981

4.7uF

C867

0.1uF

C942

1uF

C884

47nF

C893

0.22uF

C613

100uF

C828

4.7uF

C931

4.7uF

C858

0.1uF

C854

0.1uF

C1093

4.7uF

C1105

4.7uF

C944

4.7uF

C881

47nF

C982

100uF

C958

4.7uF

C1097

4.7uF

C847

0.47uF

C952

2.2uF

C983

4.7uF

C885

47nF

C894

0.22uF

C987

4.7uF

C859

0.1uF

C614

100uF

C836

4.7uF

C857

47nF

C1106

4.7uF

C1094

4.7uF

C910

4.7uF

C879

47nF

C961

4.7uF

C1098

4.7uF

C840

1uF

C903

0.47uF

C822

4.7uF

C954

2.2uF

C883

47nF

C895

0.22uF

C918

1uF

C835

4.7uF

C856

47nF

C860

0.1uF

C1095

4.7uF

C1107

4.7uF

C946

4.7uF

C991

0.1uF

C909

4.7uF

C882

47nF

C962

4.7uF

C993

4.7uF

C1099

4.7uF

C907

100uF

C951

2.2uF

C902

0.47uF

C919

2.2uF

C978

100uF

C897

0.47uF

C851

0.22uF

C1100

4.7uF

C861

0.1uF

C888

47nF

C890

22nF

C986

330uF

C937

4.7uF

C960

4.7uF

C992

4.7uF

C1001

0.1uF

C956

4.7uF

C826

0.1uF

C896

0.47uF

C862

0.1uF

C872

47nF

C928

4.7uF

C1101

4.7uF

C972

330uF

C889

22nF

C917

1uF

C816

100uF

C869

0.22uF

C905

1uF

C908

100uF

C963

4.7uF

C936

4.7uF

C837

4.7uF

C985

100uF

C953

2.2uF

C1109

4.7uF

C930

4.7uF

C1102

4.7uF

C863

0.1uF

C964

4.7uF

C920

2.2uF

C806

330uF

C974

330uF

C996

0.1uF

C886

47nF

C911

1uF

C868

0.22uF

C904

1uF

C938

4.7uF

C853

0.1uF

C615

330uF

C984

4.7uF

C829

4.7uF

C838

1uF

C876

47nF

C1000

0.1uF

C947

4.7uFC957

4.7uF

C926

4.7uF

C965

4.7uF

C929

4.7uF

C1103

4.7uF

C973

330uF

C891

22nF

C841

1uF

C912

1uF

C871

0.22uF

C831

4.7uF

C849

0.22uF

C949

4.7uFC955

4.7uF

C925

4.7uF

C966

4.7uF

C995

0.1uF

C913

1uF

C989

4.7uF

C870

0.22uF

C830

4.7uF

C852

0.1uF

C948

4.7uF

C922

2.2uF

C824

4.7uF

C967

4.7uF

C976

100uF

C899

0.47uF

C887

47nF

C970

4.7uF

C914

1uF

C999

0.1uF

C939

1uF

C977

100uF

C833

4.7uF

C878

47nF

C959

4.7uF

C975

330uF

C823

4.7uF

C968

4.7uF

C844

0.47uF

C921

2.2uF

C873

47nF

C900

0.47uF

C997

0.1uF

C916

1uF

C988

4.7uF

C941

1uF

C865

0.1uF

C932

4.7uF

C827

100uF

C839

1uF

C855

0.1uF

Page 52: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

place two V very close to decoupling cap location

place decoupling cap under FPGA

Fast Discharge and V-Sense

place two V very close to decoupling cap location

place two V very close to decoupling cap location

place two V very close to decoupling cap location

place two V very close to decoupling cap location

place two V very close to decoupling cap location

place two V very close to decoupling cap location

place decoupling cap under FPGA

place decoupling cap under FPGA

place decoupling cap under FPGA

place decoupling cap under FPGA

place decoupling cap under FPGA

place decoupling cap under 1.8V regulator

Copyright (c) 2016, Intel Corporation. All Rights Reserved.Intel Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

place two V very close to decoupling cap location

place decoupling cap under FPGA

S10_VCC

S10_VCCERT

S10_VCCERAM

S10_VCCT

S10_VCCR

S10_VCCH_E

S10_1V8

S10_VCC3.3V_STBY

S10_VCCR3.3V_STBY

S10_VCCERAM3.3V_STBY

S10_VCCT3.3V_STBY

S10_VCCERT3.3V_STBY

S10_2V53.3V_STBY

S10_VCCH_E3.3V_STBY

S10_2V43.3V_STBY

S10_1V83.3V_STBY

S10_2V5

3.3V_STBY IO_2V5

3.3V_STBY IO_3V3

VCC_VSENSE 40

VCCERAM_VSENSE 42VCCERAM_VSENSE_GND 42VCCERT_VSENSE 44VCCERT_VSENSE_GND 44

VCC_VSENSE_GND 40

VCCR_VSENSE 43VCCR_VSENSE_GND 43

VCCT_VSENSE 43VCCT_VSENSE_GND 43

S102V5_VSENSE_GND 10S102V5_VSENSE 10

VCCH_E_VSENSE 45VCCH_E_VSENSE_GND 45

S101V8_VSENSE 10S101V8_VSENSE_GND 10

EN_VCC 11,40,41EN_VCCT 11,43EN_VCCR 11,43EN_VCCERAM 11,42EN_VCCH_E 11,45EN_VCCERT 11,44EN_S102V5 11,48EN_S101V8 11,48EN_S102V4 11,48EN_IO2V5 11,49EN_IO3V3 11,49

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

52 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

52 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

52 53Sunday, November 05, 2017

R611 10

R58910.0K

U68

FDMC2514

5

123

4

V56

RSNS1

SNS2

V61

RSNS1

SNS2

R5800.5

V68

RSNS1

SNS2

R64210.0K

R57410.0K

Q31FDV305N

R58810

C1008

0.01uF

R60410.0K

R597 10

R650 DNI

R6430.5

R613 10

R5940.5

R600 DNI

R59010.0K

U71

FDMC2514

5

123

4

Q26FDV305N

R612 DNIR615 DNI

V63

RSNS1

SNS2

R644 10

R584 DNIR576 10

R595 10

Q25FDV305NC1007

0.01uF

R5750.5

R6060.5

C1002

0.01uF

U66

FDMC2514

5

123

4

R60510.0K

U74

FDMC2514

5

123

4

R58710

V57

RSNS1

SNS2

R645 DNI

R610 10

Q34FDV305N

R60110

V53

RSNS1

SNS2

R58110.0K

V60

RSNS1

SNS2

R60210

C1006

0.01uF

V65

RSNS1

SNS2

U65

FDMC2514

5

123

4

R65110

V62

RSNS1

SNS2

R577 DNI

R5910.5

Q29FDV305N

R5930.5

V67

RSNS1

SNS2

R5820.5

V64

RSNS1

SNS2

U73

FDMC2514

5

123

4

R61810

R585 10

V55

RSNS1

SNS2

R6090.5

R57910.0K

U69

FDMC2514

5

123

4

C1005

0.01uF

Q32FDV305N

Q33FDV305N

Q24FDV305N

Q27FDV305N

R614 DNI

R599 DNI

V66

RSNS1

SNS2

R64610

R61610

R6070.5

R57810

R59210.0K

U72

FDMC2514

5

123

4

R64710.0K

V58

RSNS1

SNS2

R583 10

R60310

Q30FDV305N

V54

RSNS1

SNS2

R6480.5

U67

FDMC2514

5

123

4

C945

47nF

R60810.0K

Q28FDV305N

U64

FDMC2514

5

123

4

R598 DNI

U70

FDMC2514

5

123

4

C1009

0.01uF

R586 DNI

R649 10

V59

RSNS1

SNS2

R61710

R596 10

C1003

0.01uF

VCC_VSENSE

VCC_VSENSE_GND

VCCERT_VSENSE

VCCERT_VSENSE_GND

VCCERAM_VSENSE

VCCERAM_VSENSE_GND

VCCT_VSENSE

VCCT_VSENSE_GND

VCCR_VSENSE

VCCR_VSENSE_GND

VCCH_E_VSENSE

VCCH_E_VSENSE_GND

S101V8_VSENSE

S101V8_VSENSE_GND

EN_VCC

EN_VCCR

EN_VCCERAM

EN_VCCT

EN_VCCERT

EN_S102V5

EN_VCCH_E EN_S102V4

EN_S101V8

S102V5_VSENSE

S102V5_VSENSE_GND

EN_IO2V5

EN_IO3V3

Page 53: Pre-Release Schematic DO NOT COPY · 2020-01-20 · c28 1uf c19 1uf r22 dni 0 r24 0 r18 20 r26 r31 dni tp53 c29 1uf r17 4.70k c36 0.1uf c27 1uf y2 50.00mhz 1 3 4 2 0 r28 r21 dni c37

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Copyright (c) 2015, Altera Corporation. All Rights Reserved.Altera Corporation, 301, Bibo Rd #888, Shanghai, China, 201203

Revision History

DESCRIPTIONVer. DATE PAGESA1 Remove non-SDM thermal sense pin support on U27/V28

Change part number for D5/D6A1

Swap p and n for TEMPDIODE_*6/TEMPDIODE_SDM* per latest pin-outA1Swap pin location for MAX5_SWITCH0 and MAX5_SWITCH1A1Remove current sense resistors and current sense lines for digital power railsA1

Change Flash part number to MT28EWA1

Swap pin location for CLK_TOP_PLL_125M and CLKIN_SMA_2L to support SGMII SMA inputA1

Move 6 power good signals from PWR MAX 10 Bank8A1

Swap Si547_FS0/1 signal on system MAX and resistor MUXA1Add C1111/C1112A1

Change hot-socket protection chipA2A2 Add 2nd fan headerA2 Change EN6337 to EN5339A2 Add R715 to support 1.8V option for VCCFuseWR rail

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

53 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

53 53Sunday, November 05, 2017

Title

Size Document Number Rev

Date: Sheet of

150-0321330-A2 A2

Stratix 10 TX SI Development Kit (6XX-44526R)

B

53 53Sunday, November 05, 2017