presentation for major project

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Performance Analysis of Shared Buffer

ATM switches

Prepared By:

Patel Bhavdeep V. (07BEC062)Garasiya Siddharth R. (06BEC026)

Department of Electronics & Communication Engineering,

Ahmedabad-382 481

Date: 12th February, 2011


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List of content Introduction

What is ATM ?

Architecture of ATM

Switching

Hierarchy Layers

Remaining work


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Some of the key aspects of todays world...

Recent need of high data-rate communication.

To accommodate more number of users in a network.

Cheaper & Easy techniques of data communication.

ATM satisfies this all aspects.

Efficient use of resources & effective Architecture.

Introduction


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ATM is Asynchronous Transfer Mode.

It is cell relay protocol designed by the ATM forum &

adopted by the ITU-T.

Uses virtual circuit switching.

Problem with old techniques :

Data communications at the data link layer had been based on

frame switching and frame networks.

Different protocols use frames of varying size and intricacy.

What is ATM?


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Networks become more complex so larger and larger headers

relative to the size of the data unit.

To make header use more efficient some protocol have

enlarged the size of the data unit.

But on the other side large data fields create waste.

Also it creates problem while multiplexing real time data.

Cell networks :

A cell is a small data unit of fixed size.

Different frame data are split into multiple small data units

of equal length and are loaded into cells.

What is ATM?


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The cells are then multiplexed with other cells and routed

through the cell network.

So the problems associated with multiplexing different-sized

frames are avoided.

Also high-speed of links are coupled with small data cells.

So the interleaving time is too small that it looks like

continuous data (Real time streaming).

What is ATM?


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In a way ATM uses Asynchronous TDM, so called

Asynchronous transfer mode.

ATM multiplexers fill a slot with a cell from any input channel

that has a cell.

The slot is empty if none of the channels has a cell to send.

What is ATM?


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ATM is a cell-switched network.

UNI-User to network

interface.

NNI-Network to network

interface.

Connection between two endpoints is accomplished through

transmission paths (TPs), virtual paths (VPs), and virtualcircuits (VCs).

A virtual path (VP) provides a connection or a set of

connections between two switches.

Architecture of ATM


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Identifiers :

In a virtual circuit network, to route data from one endpoint

to another, the virtual connections need to be identified.

Hierarchical identifier with two levels:

1. A virtual path identifier (VPI)

2. A virtual-circuit identifier (VCI).

The VPI defines the specific VP, and the VCI defines aparticular VC inside the VP.

In a UNI, the VPI is 8 bits, whereas in an NNI, the VPI is 12

bits.

Architecture of ATM


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The length of the VCI is same in both interfaces (16 bits).

Idea behind dividing a virtual circuit identifier into two parts

is to allow hierarchical routing.

Most of the switches in a typical ATM network are routed

using VPIs.

The switches that interact directly with the endpoint devices,

use both VPIs and VCIs.

Architecture of ATM


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Cells :

A cell is only 53 bytes long.

5 bytes allocated to the header and 48 bytes carrying the

payload.

Most of the header is occupied by the VPI and VCI.

ATM uses two types of connections: PVC and SVC.

PVC- Permanent Virtual Connection

SVC- Switched Virtual Connection

Architecture of ATM


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A switch routes the cell using both the VPIs and the VCIs.

The switch checks its switching table, which stores six pieces

of information per row.

-Arrival interface number

-Incoming VPI & VCI

-Corresponding outgoing

interface number

-The new VPI & VCI.

Switching


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Structure of Packet Switches :

It has four components.

1). Input port performs the

physical and data link

functions of the switch.

The input port has buffers (queues) to hold the packet before

it is directed to the switching fabric.

2). Output port does the same

as input but in reverse order.

Switching


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3). The routing processor performs the functions of the network

layer.

It finds the address of the next hop and the output port

number from which the packet is sent out.

For this it uses destination address and searches the routing

table.

4). Switching Fabrics move the packet from

the input queue to the output queue.

Crossbar Switch: A crossbar switch connects n inputs to m

outputs in a grid, using electronic micro-switches

(transistors) at each cross-point.

Switching


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Banyan switch: It is a multistage switch that route the

packets based on the o/p port represented as a binary string.

For n inputs and n outputs, stages with micro-

switches at each stage.

The first stage routes the packet based on the high-order bit

of the binary string.

Second stage routes it,

based on second-orderbit, & so on

Switching


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The problem with the banyan switch is the possibility of

internal collision even when two packets are not heading for

the same output port.

Batcher-Banyan Switch : A switch comes before the banyan

switch and sorts the incoming packets according to their finaldestinations.

The trap module prevents duplicate packets from passing to

the banyan switchsimultaneously.

Switching


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Shared buffer switch :

Memory is shared between i/p & o/p port buffers.

Efficient use of memory & high speed switching.

Switching


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The ATM standard defines three layers.

1. Application Adaptation Layer (AAL)

2. The ATM layer

3. The physical layer

The endpoints use all three layers while the switches use only

the two bottom layers.

Hierarchy Layers


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Physical layer :

Like Ethernet and wireless LANs, ATM cells can be carried by

any physical layer carrier.

The original design of ATM was based on SONET.

SONET is preferred for the high data rate of carrier, and

using SONET, the boundaries of cells can be clearly defined.

SONET specifies the use of a pointer to define the beginning

of a payload.

So remaining cells can be identified by counting 53 bytes.

Other technologies, even wireless, may be used.

Hierarchy Layers


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ATM layer :

The ATM layer provides routing, traffic management,

switching, and multiplexing services.

It takes 48 byte data from AAL & adds 5 byte header.

ATM uses two formats for this header

1. For UNI cells & 2. For NNI cells.

Hierarchy Layers


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Application Adaptation Layer :

Aim for designing AAL was, it must accept any type of

payload, both data frames and streams of bits.

AAL uses two sub-layers to accomplish these tasks.

1. Convergence Sub-layer (CS).

2. Segmentation And Reassembly (SAR) sub-layer.

ATM defines four versions of the AAL:

AAL1, AAL2, AAL3/4, and AAL5.

Different headers are added by each sub-layer in all versions.

Hierarchy Layers


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Detail about Packet switches.

Analysis of shared ATM Switches based on Papers

Data rate & capacity of shared buffer memory.

Report on performance of ATM switches with differentconditions.

Remaining Work


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