presenter information: wallace scott military & space products, texas instruments 6412 highway...
TRANSCRIPT
Presenter Information:Wallace ScottMilitary & Space Products, Texas Instruments6412 Highway 75 South, MS 860Sherman, Texas 75090, USAPhone (903)-868-6448 Fax (903)[email protected]
Heavy Ion Induced Single Event Effectson a 32-Bit, Floating-Point
Digital Signal Processor
W.Scott, R.Joshi, R.Daniels, T.Linnebur, I.Khan, K.Settle (Texas Instruments), Dr. M.Shoga (Science Applications International Corporation - SAIC),
Dr. M.Gauthier (ICS Radiation Technologies, Inc.)
The Single Event Effects (SEE) response of SMV320C6701, a 32-bit, floating-point digital signal processor (DSP) from Texas Instruments was tested with heavy ions.
The processor was tested for Single Event Latch-up (SEL) and Single Event Upsets (SEU) at room and high temperature. An innovative test methodology and test flow developed for evaluating the SEU response of different functional blocks of the DSP are discussed. The SEU response of various functional blocks of the DSP at different (Linear Energy Transfer) LETs is also presented.
Finally, based on the SEE response of the DSP, its potential use in different spacecraft orbits is described.
Abstract
Test Device - SMV320C6701GLPW14
Advanced VelociTITM
very-long-instruction-word (VLIW) architecture
Up to 1120 MIPS and 840 MFLOPS at 140 MHz 1 Mbit On-Chip SRAM for
fast program/data access 2 Multi-Channel Buffered
Serial Ports (McBSPs) provide glueless connect to codecs & framers, full duplex operation, and support SPI and ST-Bus
-55°C to 125°C Tcase 429-pin CBGA package
C6701 CPUDMAController
Data Memory64 KByte
Program Memory64 KByte
EMIF
McBSP 1
Timer 1
Timer 0
McBSP 0
Host Port Interface
16
32
Test Device – Key Parameters
Design Features
Process FeaturesLibrary
featuresCore Vdd 1.8V Starting Substrate
(Baseline for Class-V)
EPI (3.5µm)
Metal Levels
5
IO Vdd 3.3V STI Depth 5000A Flip Chip Yes
Core Lpoly 0.18µm PLL Yes
Core tox 40A
IO Lpoly 0.45µm
IO tox 80A
Test Details
Test Location: Texas A&M University Cyclotron Facility (TAMU-CF), College Station, Texas, USA
Website: http://cycltron.tamu.edu
Test Date: May 18, 2004
Ions Incident Angle
LET eff MeV/mg/cm²
#Units Test Temperature
Ar 0° 6.24 1 25°C
Ar 45° 9.16 2 25°C
Kr 0° 23.6 2 25°C
Kr 45° 35.4 2 25°C
Xe 0° 47.1 1 25°C
Xe 45° 71.1 1 25°C
Xe 45° 71.1 3 125°C
Xe45° + #2
Degrader89 3 125°C
Heavy Ion Beam Parameters
SEE Test System• Monitoring and Recording equipment
Texas Instruments 256-pin Automatic Test Equipment (ATE)
Monitor Supply currents (I/Os, Core, and PLL)
Automatic power-down when supply currents exceed user programmed limits
Event-Driven, exhaustive Functional and SCAN testing Translates to ~5-10 MHz test frequency
High-Speed (167 MHz) memory testing via internal-BIST (Built-In Self-Test)
Log parameters and fail counts
ContinuityContinuity Open PinsOpen Pins Open SupplyOpen Supply Short PinsShort Pins Short SupplyShort Supply
FunctionalFunctional Boot LoadingBoot Loading CacheCache
FunctionalFunctional Data and Program MemoryData and Program Memory
FunctionalFunctional Data word sizes, DMA, EMIFData word sizes, DMA, EMIF Multi-Channel Serial PortsMulti-Channel Serial Ports Power-down ModePower-down Mode PLLPLL
FunctionalFunctional ATPG (JTAG)ATPG (JTAG) Memory - BISTMemory - BIST
VDD-CORE VDD-I/O VDD-PLL
1.4V 2.35V 2.35V
2.05V 3.45V 3.35V
1.6V 3.14V 3.14V
2.0V 3.47V 3.47V
1.5V 3.63V 3.63V
SEE Test Flow
Continuity• • •
Supply Shorts
Continuity
•Functional Verification•Monitor Supply Currents
SEE Test Flow
NO SELNO SEL
SEL DetectionSEL Detection SEU DetectionSEU Detection
SEU/SEFI Rate Estimation
• The environment models in CREME96 were used Solar min & Solar Max for background ratesOctober 1989 Large Solar Flare for worst 5-minute,
worst day, worst week event rates
• A shielding of 150 mils was assumed
• All heavy ion rates are for GEO orbit
EMIF, McBSP, DMA, Power Down Logic, Data Access Controller, Program/Cache Memory, Data Memory, Boot Modes
Tests: 81 Vectors: ~1.3 Million Upset Rate: 4.0E-03 upsets/day or ~250 days/upset
SEU Characteristics
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
0 20 40 60 80
Eff. LET (MeV/mg/cm2)
Cro
ss S
ecti
on
(cm
2)
test data
Weibul Fit
Program/Cache and Data Memory Program Access/Cache Controller and Data Access Controller
Tests: 25 Vectors: ~97k Upset Rate: 2.88E-04 upsets/day or ~3472 days/upset
SEU Characteristics
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
0 20 40 60 80
Eff. LET (MeV/mg/cm2)
Cro
ss S
ecti
on
(cm
2)
test data
Weibul Fit
Program/Cache Memory verification using BIST (167 MHz) Upset Rate: 3.47E-05 upsets/day or ~28837 days/upset
SEU Characteristics
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
0 20 40 60 80
Eff. LET (MeV/mg/cm2)
Cro
ss S
ecti
on
(cm
2)
test data
Weibul Fit
SEU Characteristics
Data Memory verification using BIST (167 MHz) Upset Rate: 1.75E-04 upsets/day or ~5709 days/upset
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
0 20 40 60 80
Eff. LET (MeV/mg/cm2)
Cro
ss S
ecti
on
(cm
2)
test data
Weibul Fit
SEU CharacteristicsCPU
Tests: 49 Vectors: ~32 MillionUpset Rate: 6.24E-04 upsets/day or ~1603 days/upset
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
0 20 40 60 80
Eff. LET
Cro
ss S
ecti
on
(cm
2)
test data
Weibul Fit
Summary and Conclusion
• SMV3206701 is not susceptible to SEL up to tested LET of 89 MeV-cm2/mg and max temperature of 125°C
• The DSP has an estimated worst-case SEU rate of 4.0E-03 upsets/device-day or ~250 days per upset (GEO orbit)
• The DSP did not show significant sensitivity to different bias voltages and temperatures