processes for flexible electronic systems

Processes for Flexible Electronic SystemsMichael Feil

FraunhoferIZM

Institut Zuverlässigkeit und Mikrointegration

Institutsteil München

[email protected]

IZM

Fraunhofer Institut Zuverlässigkeit und Mikrointegration Institutsteil München

M. Feil

Flexible Electronic Systems

Outline

Introduction

Single sheet versus reel-to-reel (R2R)

Substrate materials

R2R printing processes

R2R fine conductor lines

R2R integration of active components

Conclusion

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Trends in Electronic Applications

Fraunhofer IZM

Philips Research

TodayToday TomorrowTomorrow

Logitech

Casio

Infineon

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Electronic Goes Flexible

Advantages of flexible electronics

• freedom in design

• cheap foil substrates

• light-weight

• compact portable products

• cost-effective assembly with reel-to-reel processing

• environment-friendly

• ubiquitous applications

rigid-flex

rigid

full flexible

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capacitive layerembedded chip

integrated resistor

embedded IPD

antenna

EU IP Project SHIFT - Smart High-Integration Flex2004-2007

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Single sheet production

Characteristics• Typically for standard PCBs, • From cassette to cassette handling, • Transport inside of a machine via belts and/or rolls

• All processes from flex circuit board up to the assembled and finished system possible

Advantages:Multilayer easier and with better accuracy producible, Some assembly and curing processes simpler

Critical points:- Handling of thin foil substrates, the thinner the more difficult, - Fixing on a rigid temporary carrier needed, - High throughput

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Reel-to-reel (R2R)

Characteristics• Increase of throughput from stop and go to continuously working processes ⇒

rotatory principles e.g. printing methods from flatbed screen printing to offset printing (paper industry)

• At the moment mainly used for single layer processing• R2R assembly used for smart labels, • Vacuum processes may, but must not be expensive (cigarette paper)• Force free web transport

Advantages:Very fast continuously running processes possible (from m/min to some m/s)Easier handling of thin foils

Critical points:- Unexpected belt stop (especially at thermal processes), - Electrostatic charge - Layer to layer adjustment with high accuracy

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Substrate materialsImportant parameters:CostMechanical Characteristics• Thermal stability (solder processes at > 240°C)• Moisture absorption• Warpage resistant, shrinkage• Coefficient of thermal expansion (CTE)• Isotropy of the material• Surface tension, wettability (adhesion)• Chemicals resistant• BiocompatibilityElectrical Characteristics• Dielectric coefficient (typ. 3 – 4)• Loss angle (typ. 0,01 – 0,001)• Voltage stability (typ. some kV at 50μm substrate thickness)• Spec. resistance (typ. >1016 Ωcm), surface resistance (typ. > 1012 Ωcm)

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• Low Cost Materials Lower thermal stability, improvable by special treatmentTg <100°CPolyester (PET) Standard material for smart label, good chem. resistance, max.

process temperature: 120°C, medium moisture absorption (0,5%), lowest price

PET thermal stabilized good chem. resistance, max. process temperature: 150°C, Polyethylen-naphtalat good chem. resistance, max. process temperature: 160°C, relatively (PEN) low-priced

• Temperature resistant substratesPolyimid (PI) Standard material for flex boards, good chem. resistance (alcali!),

max. process temperature: > 280°C, medium moisture absorption (0,8%), high price

Liquid Crystalline Polymer relatively new material especially for high frequency applications(LCP) very high chem. resistance, max. process temperature: 280°C,

very low moisture absorption (0,04%), high price

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Modules of the Reel-to-Reel Application Center

Substrate Technology

Assembly Technology

Screen Printing

Dispensing Die-Attach FC-Bonding Curing

Bonding Module

Laminator El. Test

Screen Printing Curing

Standard Substrates

Direct MetallizationSystem

Resist Coating

Fine-Pitch Substrates

Alignement

Development

Etiching, Stripping

Laser treatment

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R2R Screen Printing, Example: Electroluminescent Pastes

Structure of the display

Process steps

1. Substrate (PET)

2. Print of bottom electrode, Ag paste ca. 10μm

3. 2 Prints of isolating layers, dielectric paste 20μm

4. Print of luminescent material,35μm (3 colors possible)

5. Print of transparent electrode,10μm

6. Lamination of cover foil

cover foiltransparent electrodeluminescent materialdielectric layersbottom electrodesubstrate

1 2 3 4 5

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R2R screen printing processes used in SHIFT

2-layer process

Print of dielectric layer

Min. size of printed via openings: 200μm

Via openings by laser: 50 – 150μm

Second conductor layer by screen printing

SubstrateLayer 1: CuDielectric layerLayer 2: Polymer Ag paste

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Integration of printed resistorsESL R12112 (100 Ω/ ) and ESL R12114 (10 kΩ/ )L/W between 0.33 and 10Minimal dimensions: 0.5 mmthermal treatment at 150°C up to 2h

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R2R fine conductor lines

Process flow subtractive technique

• (Cleaning)

• Lamination of photo resist (15μm solid resist, 15μm Mylar cover foil)

• Exposure (vacuum contact)

• Develop of photo resist

• Cu etch

• Removal of photo resist

Process flow semiadditive technique

(Cleaning)

Lamination of photo resist (15μm solid resist, 15μm Mylar cover foil)

Exposure (vacuum contact)

Develop of photo resist

Electro plating of Cu up to the desired thickness

Removal of photo resist

Cu difference etching

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Fine pitch substrates

Subtractive technique: 5μm Cu Semiadditive technique: 6-7μm Cu

Interdigital test pattern, 30μm pitchInterdigital test pattern, 40μm pitch

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R2R integration of active components

Ultra thin silicon becomes bendable ⇒ ideal for application in ultra thin flexible systems

Base material = monocrystallineSi ⇒ brittle material ⇒ adequate handling

Dicing by thinning process (DbyT) using dry Si etching ⇒nearly ideal chip edges for highest breakage resistance

DbyT allows any chip geometry (circle, polygone, rounded corners, etc.)

Need of adapted assembly methods

Biegeradius ca. 2mm!

3-Punkt-Biegetest

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Manufacture and transfer of 20 μm thin chipsaccording to „Dicing-by-Thinning“ concept

Device wafer

Carrier wafer

Carrier wafer

Device wafer

Carrier wafer

Laminate double side adhesive tape; combination of temperature- and UV-releasable tape

Backside thinning ( grinding, etching)until front side groovesare opened

Device wafer

Device wafer having dry-etched chip grooves

Remove chip / tape ensemble by heating;Transfer of chips onto „pick-up tape“

Removal of tapeChips ready for pick&place

Bonding of device and carrier wafer under vacuum conditions;Waferstack ready for thinning

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Assembly and Electrical Interconnection Methods for Thin Chips

Face Up Assemblyand Isoplanar Contacts

Contacts across chip edge

Contacts through laminated foil

Contacts throughcoated film Solder

Face Down Assembly FC-like Technique

ACA

ICA

ICA /NCA

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Pick and Place of 20 μm Thin Chips

Automated, fast pick-up process for 20 –50 μm thin chips developed by Mühlbauer

Process is based on:

Dicing-by-Thinning concept using dry-etched grooves

Pick & place process using thermal releasable tapes

IC

local heating

Principle of thermal releasable connection

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source: Epson

Isoplanar Interconnection Technique• Due to low topography of thin

ICs, electrical interconnection is achieved by printing or dispensing of silver-filled polymer across chip edge

• Pressure less method

• Lowest total system thickness (thickness of conductor line does not contribute to the assembly height of IC)

• Pitch depending on print method

Cross-section of an Isoplanar Contact

Substrate SubstrateCuring

NCA

IC

IC ICAConductor line

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Flip Chip Bonding Technique with ACA

Flip Chip with ACA:

• Low resistance

• State of the art

• High pin count

• Narrow pitches

IC

substrate

bonding force

conductorbumps

substrate

IC

curing with continuous bonding force

afterplacement

ACA

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Reel-to-reel (R2R) assembly of thin chip

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Ultrathin soldered Flip Chip Interconnections

Chips: min. thickness: 20 μmsize: 5 x 5 mm2, pitch: 100 μm

Contact: 3 μm SnCuFlex: PI 25 μm, Cu 10 μm

epoxy+ Kapton each 25 μm

Barbara Pahl, IZM Berlin

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1. Substrate: PET/Polyimide2. Metallization: Cu 3. Cu Patterning: Litho/etching4. ACA deposition/ chip placement5. Screen printing dielectric layer6. Screen printing of Ag paste or Cu-technique

Ultra thin foil package

1

2, 34

5

6

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Demonstrator for Film Package

Combination of Flat Battery, IC (SMD) and display

Integrated with „cold“assembly steps

Further integration with solar cell and charging circuit

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Conclusion

In future, flexible electronic systems have a very high application potential

This requires thin flexible foils as substrates

In view of cost and handling of thin foils, R2R processes are the right choice

Need of integration methods of various elements like active and passive elements, sensors, power supply, etc. with adequate mechanical properties and geometrical dimensions

Many methods are working in a laboratory scale, but from production point of view there is something to do

In this field, the Fraunhofer IZM with his R2R application center is a competent partner for the industry

processes for flexible electronic systems

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