proposal for 50 gbps per lane backplane and direct attached...
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50 Gb/s Ethernet over a Single Lane, Next Generation 100 Gbps and 200 Gbps Ethernet Study Group. IEEE 802.3 1 50 Gb/s Ethernet over a Single Lane, Next Generation 100 Gbps and 200 Gbps Ethernet Study Group. IEEE 802.3 1
Proposal for 50 Gbps per lane Backplane and Direct attached Cable objectives
Upen Reddy Kareti CISCO SYSTEMS INC.
March 2016
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50 Gb/s Ethernet over a Single Lane, Next Generation 100 Gbps and 200 Gbps Ethernet Study Group. IEEE 802.3 2
• Mark Gustlin , Xilinx Inc. • Ali Ghiasi, Ghiasi Quantum LLC • Sudeep Bhoja, Inphi
• Vipul Bhatt, Inphi • Venu Balasubramonian, Marvell • Fernando De Bernardinis, Marvell
• Erdem Matoglu, Amphenol-tcs • Nathan Tracy, TE-Connectivity • Megha Shanbhag, TE-Connectivity
• Scott Sommers, Molex • Gary Nicholl, Cisco • Vineet Salunke, Cisco
• James Fife, etopus • Tom Palkert, Molex • Adam Healey, Broadcom
• Matt Brown, AppliedMicro • Chris Roth, Molex • Jeremy Stephens, Intel
• Jeffery Maki, Juniper • David Ofelt, Juniper • Mike Dudek, Qlogic
• Richard Mellitz, Intel • Mike Peng Li, Intel
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50 Gb/s Ethernet over a Single Lane, Next Generation 100 Gbps and 200 Gbps Ethernet Study Group. IEEE 802.3 3
Modify the currently adopted objectives for copper twin-ax and backplane PHYs as below:
• Define single-lane 50 Gb/s PHYs for operation over
Copper twin-axial cables with lengths up to at least 3m Printed circuit board backplane with a total channel insertion loss of <= 30dB at 13.28125 GHz.
• Define a four-lane 200 Gb/s PHYs for operation over:
Copper twin-axial cables with lengths up to at least 3m. Printed circuit board backplane with a total channel insertion loss of <= 30dB at 13.28125 GHz.
• Define a two-lane 100 Gb/s PHY for operation over: copper twin-axial cables with lengths up to at least 3m. printed circuit board backplane with a total channel insertion loss of <= 30dB at 13.28125 GHz.
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50 Gb/s Ethernet over a Single Lane, Next Generation 100 Gbps and 200 Gbps Ethernet Study Group. IEEE 802.3 4
Thank you.