publicweb.unimap.edu.my ~paul pdfs ent162 ent162 assignment 2 ans
TRANSCRIPT
Assignment 2
1. An SCR half-wave rectifier has a forward breakdown voltage of 150 V when a gate current of 1 mA flows in the gate circuit. If a sinusoidal voltage of 400 V peak is applied, find:
1. Firing angle
2. Average output voltage
3. Average current for a load resistance of 200 Ω
4. Power output
Assume that the gate current is 1mA throughout and the forward breakdown voltage is more than 400 V when Ig = 1mA
Solution.
Vm = 400 V, v=150 V, RL = 200 Ω
1. Now
Or
i.e. firing angle,
2. Average output voltage is
3. Average current,
4. Output power =
2. An a.c. voltage v=240 sin 314 t is applied to an SCR half-wave rectifier. If the SCR has a forward breakdown voltage of 180 V, find the time during which SCR remains off.
Figure 1
Solution.
The SCR will remain off till the voltage across it reaches 180 V. this is shown in Fig. 1. Clearly, SCR will remain off for t second.
Now
Here
Or
Or
3. The intrinsic stand-off ratio for a UJT is determined to be 0.6. if theinter-base resistance is 10 kΩ, what are the values of RB1 and RB2 ?
Solution.
Now
Or
Also
Or
And
4. Calculate 1. Input impedance and 2. The voltage gain of the OP-AMP amplifier circuit of Fig.2.
Figure 2
Solution.
The input impedance of the OP-AMP amplifier is very high and when negative feedback is used, the impedance is increased even further. Hence, input impedance of a non-inverting OP-AMP amplifier can be thought of as infinite.
5. For the inverting amplifier of Fig. 3 R1 = 1 K and Rf=1M. assuming an ideal OP-amp amplifier, determine the following circuit values:
1. Voltage gain
2. Input resistance
3. Output resistance.
Figure 3
Solution.
It should be noted that we will be calculating values of the circuit and not for the OP-AMP proper.
1.
2. Because of virtual ground at A, Rin = R1 = 1K.
3. Output resistance of the circuit equals the output resistance of the OP-AMP i.e., zero ohm.
6. Find the output voltage of an OP-AMP inverting adder for the following sets of input voltages and resistors. In all cases, Rf=1M.
Solution.
v1 = -3 V, v2 = +3 V. v3 = +2 V; R1 = 250 K, R2 = 500 K, R3 = 1 M
7. In the subtractor circuit of Figure 4, R1 = 5 K, Rf = 10 K, v1 = 4 V and v2 = 5 V. find the value of output voltage.
Figure 4
Solution.
8. A 5 mV, 1kHz sinusoidal signal is applied to the input of an OP-AMP integrator of Fig.5 for which R=100 K and . find the output voltage.
Figure 5
Solution.
The equation for the sinusoidal voltage is
Obviously, it has been assumed that at t=0,
9. The input to the differentiator circuit of Fig.6 is a sinusoidal voltage of peak value 5 mV and frequency 1 kHz. Find out the output if R = 100 K and .
Figure 6
Solution.
The equation of the input voltage is
As seen, output is a cosinusoidal voltage of frequency 1 kHz and peak value .
10.A certain differential amplifier has a differential voltage gain of 2000 and a common mode gain of 0.2. determine CMRR and express it in dB.
Solution.
11.A differential amplifier has an output of 1 V with a differential input of 10 mV and an output of 5 mV with a common-mode input of 10 mV. Find the CMRR in dB.
Differential gain, mV
= 100
Common-mode gain,
12.The differential amplifier shown in Figure 7 has a differential voltage gain of 2500 and a CMRR of 30,000. A single-ended input signal of 500 µ2 r.m.s. is applied. At the same time, 1V, 50 Hz interference signal appears on both inputs as a result of radiated pick-up from the a.c. power system.
Determine the common-mode gain.
Find the CMRR in dB
Determine the r.m.s. output signal.
Determine the r.m.s interference voltage on the output.
Figure 7
Solution.
In Figure 7, the differential input voltage is the difference between the voltages on input 1 and that on input 2 is grounded, its voltage is zero.
Differential input voltage= 500 - 0 = 500
The output signal in this case is taken at output 1.
The common-mode input is 1 V r.m.s. and the common-mode gain is .
Noise on the output =
13.Determine the bandwidth of each of the amplifiers in Figure 8. Both OP-AMP have an open-loop voltage gain of 100 dB and a unity-gain bandwidth of 3 MHz.
Figure 8 Figure 9
Solution
For the noninverting amplifier shown in Figure 8, the closed-loop voltage gain (ACL) is
For the inverting amplifier shown in Fig. 9
Bandwidth, BW=
14.A three stage OP-AMP circuit is required to provide voltage gains of +10,-18 and -27. Design the OP-AMP circuit. Use a 270 feedback resistor for all three
circuits. What output voltage will result for an input of 150
Figure 10
Solution.
Designing the above OP-AMP circuit means to find the values of R1, R2. And R3. The first stage gain is +10 so that this stage operates as noninverting amplifier.
Now
The second-stage gain is -18 so that this stage operates as an inverting amplifier.
The third-stage gain is -27 so that this stage operates as an inverting amplifier.
Overall voltage-gain, A = A1A2A3 = (10) x (-18) x(-27) = 4860
Output voltage,