Solid-9ore EIerrronirs Vol. 40, Nos l-8. Pp. 505-51 I. 1996 Coovriaht R: 1996 Published by Elscvier Science Ltd

Pergamon 0038-l 101(%)0027!M ’ ’ - P&ted in Great Britak All rights reserved 0038-I lOI/ $15.00 + 0.00

QUANTUM FUNCTIONAL DEVICES FOR ADVANCED ELECTRONICS

N. YOKOYAMA, S. MUTOt, K. IMAMURA, M. TAKATSU, T. MORI, Y. SUGIYAMA, Y. SAKUMA, H. NAKAO and T. ADACHIHARA

Fujitsu Limited, Fujitsu Laboratories Ltd, Morinosato-Wakamiya, Atsugi 243-01, Japan

Abstract-Recent research in semiconductor device technology seems to be focused on reducing the cost and power dissipation of traditional Si CMOS integrated circuits, rather than developing new and advanced semiconductor devices. We believe however, that devices enter the nanometer-scale regime in the next century, where quantum mechanical effects play an important role in the device’s function; therefore, it is important to continue basic research into the physics and technology of nanometer scale structures and device applications in order to cultivate “nanoelectronics”. This paper reviews our research activities on quantum functional devices and discusses our future research direction.

I. INTRODUCTION

To predict 2 1 -century semiconductor device technol- ogy, the minimum design rule used in Si DRAMS has been plotted as a function of the calendar year in Fig. 1. The relationship between the design rule and time has been linear during about a half century. Every 15 years, minimum size decreased by an order of magnitude and integration levels increased by three orders. The chip size increased by an order of magni- tude in every 15 years. We expect 1 -gigabit Si DRAMS with a minimum design rule of around 0.1 pm (100 nm) and a chip of 10 cm’ to be practically used by the end of the decade. Extrapolating this line leads us to predict a 1-terabit DRAM with a minimum size of 1Onm by 2015, and a 1 petabit DRAM with a minimum size of 1 nm by 2030. It is impossible, however, to realize these devices using traditional semiconductor technologies.

Traditional semiconductor technology is expected to mature in the next century and. it is said that research aimed at reducing costs and software/system development will be more important than advanced semiconductor device research. We think, however, that quantum effect devices using quantum mech- anical effects in nanometer-scale structures could revolutionize semiconductor device technology.

Recent quantum effect nanometer-scale devices can be divided into three categories.

(1) Quantum wave devices, which use the electron- wave transport and control the phase of the electron wave.

(2) Quantum functional devices, which use quantum effects, such as size and tunneling effects in ultrafine structures. Single electron devices could be included in this category.

tPresent address: Faculty of Engineering. Hokkaido University, Japan.

(3) Atomic or molecular devices, which use the motion of the atom or molecule.

In 1985, we proposed and demonstrated a resonant- tunneling hot electron transistor, or RHET[ I], which exhibits a negative transconductance due to quantum mechanical effects. Using this RHET, we decreased the number of transistors needed in full adders to about one fourth that of conventional bipolar circuits. The RHET could be called the first quantum func- tional device. This paper reviews our research activ- ities on RHET technologies and discusses our future research direction.

2. ADVANCED RHET TECHNOLOGIES

Although the RHET circuit used fewer transistors, it used many resistors. To overcome this drawback, we developed a multi-emitter RHET[2,3]. The double- emitter RHET shown on the right in Fig. 2 is essentially the same as the RHET on the left, but it has separate emitters and no base electrodes. Under normal bias conditions in the conventional RHET, electrons in the emitter are injected into the base layer. Electrons scattered in the base region, drain to the base electrode. The double-emitter RHET turns on when the voltage difference between the emitters exceeds a certain threshold, that is the sum of the emitter barrier’s forward and reverse turn-on voltages. The low potential emitter works as an injector of electrons and the high potential emitter works as a sink for scattered electrons, like the base contact of conventional RHETs. Thus, the emitter plays a different role depending on its potential. When the two emitters have the same potential, either both high or both low, the RHET goes off.

Figure 3 compares XNOR gates using a conven- tional RHET and double-emitter RHET. The con- ventional RHET XNOR gate needed three resistors for an input-voltage adder. In the new circuit, we can

50s

506 N. Yokoyama et al.

1950 1970 1990 2010 2030 2050

Calendar year

Fig. I. Semiconductor device technology trends.

feed the input signals directly to the emitters and take the collector voltage as the output. The output is high when the multi-emitter RHET is off. This condition is satisfied only when both inputs are the same logic level. When one input is low and the other high, the potential difference between the two electrodes exceeds the threshold, and the transistor turns on. The output then goes low. This indicates that the circuit acts as an XNOR gate.

We then examined a triple-emitter RHET structure, shown in Fig. 4. We fed three input signals to the three emitters and took the collector voltage as the output. The output is high when the triple-emitter RHET is off. This condition is satisfied only when all the inputs are the same logic level. When a low level and a high level input occur together, the potential difference between the two electrodes exceeds the threshold and the transistor turns on, bringing the output low. The circuit’s logic is described as ABC + ABC, and it functions as three input AND/NOR gate. Since the subtraction of input voltages is done in the transistor, no external elements except a load resistor are needed. We can also increase the number of emitters.

We can also use a double-emitter RHET as a static memory cell (Fig. 5). We connected word lines WL,

Conventional RHET Double-emitter RHET

Fig. 3. Exclusive-NOR gates.

El E2 E3 ABC -__ A +ABC

:

3-input AND/N1

Fig. 4. Triple-emitter RHET.

OR

YEE

&El

V0C

Fig. 5. Double-emitter RHET SRAM cell.

and WL, to emitters E, and E,. We also connected the bit line BL to the subcollector. Each emitter has an n-shaped negative differential resistance region, giving two stable states-S1 and S2-when a suitable voltage applied between WL, and WL2. The electron potential of base region B is higher for S, than S,. The main feature of this device is its read and write operations, which use its collector barrier

Resonant-tunneling Emitters v__..*_ tmmer Bmprrier , &

Collector

Conventional RHET Double-emitter RHET Fig. 2. RHET structures and band diagrams.

Quantum functional devices for advanced electronics 501

Si CMOS SRAM

Design rule

Fig. 6. SRAM integration densities.

current-voltage characteristics, shown on the right bottom in Fig. 5. No current flows when the base- collector voltage is low. The current increases and decreases quickly with collector-base voltages above and below the bias thresholds. By applying the collec- tor voltages and monitoring the collector current, we can read and change (write) the base potential.

Figure 6 plots the estimated bit density of our new SRAM as a function of the minimum design rule, together with that of Si SRAMs. The bit density of a I-Gb Si SRAM is expected to reach 10’ cm-* with a minimum size of 100 nm. It is believed that further scaling down to 10nm will not be possible due to short-channel effects, and quantum effects occurred with making nanometer-scale device structures. The bit density of our SRAM chip is higher than that of conventional SRAMs. The chip size of a 1 -Gb SRAM is estimated to be about 1.4 cm*, l/7 that of Si SRAMs, with a design rule of 100 nm. Since our

1.

2.

3.

Substrate: GaAs(ll l)B

Mask: 1 OOnm-thick SiO2

device uses quantum mechanical effects and does not suffer from short channel effects, it can be possibly scaled down to 10 nm to create I-Tb SRAMs with a chip size of 10 cm2. It is clear, however, that for such high-density memory circuits, we must develop new nanostructure process technology and reduce non- resonant-tunneling current to reduce a standby power dissipation.

3. EMERGING TECHNOLOGIES TOWARDS TERABIT MEMORIES

3.1. Fabrication of quantum boxes

When multiple-emitter RHETs enter the IO nm scale, the energy separation between quantized energy levels in the quantum well could be larger than the longitudinal optical phonon energy. In such a regime, we expect that valley current in non-resonant state could be reduced due to decreased optical phonon scattering.

To scale down the SRAM cell with down to a 1Onm design rule, we need a breakthrough in the device process. Recently, we have proposed the use of (111)B substrates to make quantum boxes(41. If we use (11 l)B substrates and anisotropic etching using a 1% bromine ethanol solution, we can make inverted tetrahedral-shaped recesses (TSR) having three kinds of (11 l)A facets, converging to a very sharp bottom. Figure 7 is an SEM picture of the etched surface and a magnification of the bottom of the TSR. We found that tetrahedral-shaped recesses (TSR) arrays are regularly formed as expected and the (1 I 1)A facets are very smooth and the bottom of the TSR is very acute, crossing the three (11 l)A facets.

Etchant: 1% Br2-ethanol solution

. . . . /::. . . . ,P

,:f,. ‘:- ‘, ‘:i :, :

. ..--1-.._.... __._:.. ..I._:

- 4p.m - 200 nm Fig. 7. Anisotropic etching of GaAs (1 I 1)B.

508 N. Yokoyama ef al.

- 2pm - 300 nm

( ) a w Fig. 8. Cross-section of InGaAs/GaAs heterostructure.

We attempted to make quantum box structures by growing an AlAs/GaAs heterostructure at the bottom of the TSR. The GaAs box-like structure of 15 nm thick and 30 nm wide was obtained. The advantage of this method is that we can position these artificial boxes by a mask-window; the sixes of the boxes are automatically reduced to less than lithographic limit. Identical boxes can be formed based on the uniform shape of TSRs.

More recently, we formed a novel InGaAs/GaAs quantum box structures in the TSR[S]. Figure 8 shows the side view of an as-grown InGaAs/GaAs heterostructure cleaved at the center of the TSR. Smooth sidewalls are successfully grown, even under the mask. And that the initial TSR shape is kept after the MOVPE growth. Although the right image was taken by SEM, we confirmed that no dislocation was observed at the bottom and other area with TEM observations.

Figure 9 shows a photoluminescence (PL) of the pseudomorphic heterostructure with a thin InGaAs layer of 2.5 nm. The PL spectrum shows two clear peaks at 1.48 eV and 1.45 eV. The lower energy peak

1.35 1.4 1.45 1.5 1.55

Energy (ev)

Fig. 9. Photoluminescence (PL) of the pseudomorphic heterostructure.

has stronger dependence on the InGaAs thickness than the higher energy peak. We performed cathode- luminescence measurement at the both peaks (Fig. 10). The right image corresponds to the higher energy peak and the left image corresponds to the lower energy peak. These two images have a complementary relationship with each other. The right image shows a bright image at the side walls of (1ll)A facet. While, the left image shows a clear bright image at the bottom of the TSR structure.

We performed magneto-PL[6] at 4.2 K with the pseudomorphic heterostructure of 5-nm-thick InGaAs. The magnetic field was applied perpendicular to the substrate. As the magnetic field increases, the higher energy peak increases with 11 meV, while the lower energy peak increases with 2 meV for 11.5 Tesla. These results indicate the lateral confinement[7] at the bottom of the TSR.

3.2. ffeteroepitaxial metalfilm growth on semiconductor substrates[8]

A lattice-matched metal/semiconductor structure would enable us to pass electrical wirings under nanometer-scale devices. Also, it could be used to build new nanometer-scale device structures, such as metal-base, metal-collector, or metal quantum-well structures. Clearly, the heteroepitaxial metal film growth technique could be a powerful tool for creating future nanoelectronics.

In the case of intermetallic compounds on GaAs, the compounds reported so far have positive misfit, so we can’t grow lattice-matched metals on GaAs. With an InP substrate, however, while most inter- metallic compounds have negative misfit, &phase NiIn can have a positive misfit. So if the B-phase NiIn is stabilized by alloying with NiAl, we can control the lattice constant of cubic metals for lattice- matching to InP. The proportion of In calculated for lattice-matching to InP is 0.24.

35 1.4 1.45 1.5 1.55 Energy (eV) -1Opm

1.45 eV 1.48 eV Fig. 10. Cathode-luminescence measurement at the both peaks.

Evolution of RHEED pattern for Ni(lnAl) growth

e) 20 ML-Ni f) 20 ML-InAl Fig. 11. Evolution of the RHEED patterns.

510 N. Yokoyama er al.

Figure 11 shows the evolution of the RHEED patterns during the Ni(Iq,,AQ,) growth using a three-chamber MBE system. The incident angle of the electron beam was along with the (110) of InP substrate. As terminated c-4 x 4 pattern [Fig. 11(a)] changed rapidly to a diffuse 1 x 1 pattern with the first ML of Ni [Fig. 11(b)]. It changed to a diffuse 6 x 6 pattern with the first In,,~Al,, deposition [Fig. 1 I(c)], indicating that Iq,uAJ,,6 is crystalline from the first monolayer. After the fifth ML of Ni was deposited, the RHEED showed a 6 x 6 pattern and started elongating [Fig. 1 l(d)]. At the 20th cycle, sharp 3 x 3 and 6 x 6 reconstruction patterns appeared altem- ately, according to the Ni and I~.2rA1,,,6 deposition. This indicates that the 3 x 3 and 6 x 6 reconstruc- tions are related to the Ni and Iq.,A& surfaces [Fig. 1 l(e,f)]. These patterns remained until the 100th cycle of Ni deposition [ - 30 nm, Fig. 1 l(g)].

Although the crystal structure for normal NiIn is different from that of NiAl, no other diffraction spot was observed from the NiIno.z,AlO,w alloy. Also,

VEl = VE2 (low or high B

Ell

Fig. 12. Operating principle of quantum functional bipolar transistors.

though the film is much thicker than the critical thickness of NiAl/InP, these structures still grew two-dimensionally. This indicates that the a-phase NiIn was stabilized and the critical thickness was enlarged by alloying the NiIn with NiAl.

High resolution transmission electron microscope (HRTEM) imaging indicated that the interface of the metal/InAlAs was abrupt and smooth, on the order of one monolayer step, and there is no disordered region caused by the interface reaction. The resistivity in the 100 ML film was about 50 puR-cm, comparable to that of the NiAl bulk.

4. QUANTUM FUNCI’IONAL DEVICES OPERHINC AT ROOM TFhlPF3Kl’URE

Quantum functional bipolar transistors that we developed[9] have two separate emitters and no base electrodes. The key to this device is the use of heavily doped base and emitters, which allow band-to-band tunneling in reversed bias conditions.

Collector-emitter voltage (V)

Fig. 13. Collector I-V characteristics of double-emitter HBTs at 300K.

I- vcc = 2 v

1 kR a +

A B

ABC --- ABC

34nput AND/NOR gate Fig. 14. Three-input AND/NOR gate.

Quantum functional devices for advanced electronics 511

Figure 12 shows the operating principle of this device. When emitters E 1 and E2 are at the same logic level, either low or high, there is no collector current since the base is open. When we apply a positive bias on emitter 2 with respect to emitter 1, the base potential is pulled down due to band-to-band tunnel- ing in this emitter 2. Electrons are then injected from the forward biased emitter 1 to the base region, turning the transistor on. Since emitters 1 and 2 are symmetric, the transistor also goes on when positive bias is applied to emitter 1 with respect to emitter 2.

The device is thus similar to the double emitter RHET and is switched on or off depending on the voltage difference between the two emitters. The important difference between them is that the multi- emitter HBTs operate at room temperature, but do not have a negative conductance region.

Figure 13 shows the common-emitter collector 1-V characteristics measured at various voltage differences between emitters for double emitter HBTs with emitter doping concentration of 3 x lO’*cm-’ and base doping concentration of 3 x lOI9 cm-‘. The epitaxial structures were grown on an InP substrate by MOCVD. The thickness of the base layer is 80 nm. The turn on voltage is 1.2 V and the current gain was over 20.

We constructed and tested a basic logic gate using a triple-emitter HBT. Three inputs are directly given to the emitters; the collector voltage is taken as an output (Fig. 14). When all the inputs are at the same logic level, either low or high, the transistor is off. Output goes high. For other input combinations. the transistor is on and output goes low. These waveforms, obtained at room temperature, indicate that the gate operates correctly with a supply voltage of 2 V. The number of elements needed to this gate is about one tenth that for conventional bipolar and CMOS logic gates.

Figure 15 shows three input ECL logic gates designed for multi-emitter HBTs and compares them

GND GND

NOR OR OR

Vref A

: Vref

vcs vcs

VTT $+Y’ VTT

Vee Vee

Conventional ECL ECL using ME-HBTs

Fig. 15. Three-input ECL logic gates

with those for conventional HBTs. The new ECL gate ,uses a quadruple-emitter HBT. One of the four emitters is fixed to low by connecting it to the current source, and therefore the quadruple-emitter HBT is off when inputs A, B and C are all low. For other combinations, the transistor goes on, that is, the circuit acts as three input NOR/OR gates. It should be noted here that the new circuit does not need an emitter follower for each output, because the reverse biased emitter, acting as a current sink, acts as a level shifter in itself.

5. SUMMARY

Using multi-emitter RHETs, logic and memory circuits could be constructed with fewer transistors and resistors. Our research on this quantum func- tional device will be going in two different directions. One is to scale it down further to 10 nm to develop quantum box devices, aiming at terabit-memory devices. We described a new process technology to make quantum box tunneling structures using a GaAs (1 i1)B substrate, and to grow lattice-matched metal/semiconductor heterostructures.

The other direction is to develop more practical quantum functional devices. One example is the development of a multi-emitter bipolar transistor which has a highly doped emitter and base regions to allow interband tunneling. This device operates at room temperature and could be potentially used to develop advanced bipolar circuits.

Acknowledgements-A part of this work was performed under the management of FED (the R&D Association for Future Electron Devices) as a part of the R&D of Industrial Science and Technology for Frontier Program supported by NEDQ (the New Energy and Industrial Technology Development Organization).

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