reconfigurable ultra low power lna for 2.4ghz wireless sensor networks tarist., mabrouki a.,...
TRANSCRIPT
Reconfigurable Ultra Low Power LNA for
2.4GHz Wireless Sensor Networks
TarisT., Mabrouki A., Kraïmia H., Deval Y., Begueret J-B.
Bordeaux, France
2ICECS 2010 – 13-15 Décembre – Athens, Greece
Context
RF Front End Specifications
Circuit design
Conclusion & Perspectives
OUTLINE
3ICECS 2010 – 13-15 Décembre – Athens, Greece
Context
RF Front End Specifications
Circuit design
Conclusion & Perspectives
OUTLINE
4ICECS 2010 – 13-15 Décembre – Athens, Greece
Context
MicroElectronic Milestones
Computers in the seventies
• Low cost Si technologies
• Digital processing
The Cellular phone in the 90’s
• Telecommunication network
• RF circuits and systems
Wireless Sensor Network & RFID in the early 21th century
• Gate reduction
• Energy (scavenging, management…)
5ICECS 2010 – 13-15 Décembre – Athens, Greece
Context
Wireless Sensor Network Configuration
…by matching the RF link budget to the communication scenario
Reduce the node power consumption…
RF link 1
RF link 2
AB
C
Wireless Sensor Network
6ICECS 2010 – 13-15 Décembre – Athens, Greece
Context
RF Front End Specifications
Circuit design
Conclusion & Perspectives
OUTLINE
7ICECS 2010 – 13-15 Décembre – Athens, Greece
RF Front End Specifications
Node Top-down
Node at system level
RF Tx/Rx
Power unit
µController ADC Sensor
Memory
RF Link Budget 1
RF Link Budget 2
RFFE Demodulator
Node Rx at system level
NFRx1
NFRx2
PRx
SNRdem
NFRx = PRx - SNRdem+(174-10 log BW)
8ICECS 2010 – 13-15 Décembre – Athens, Greece
RF Front End Specifications
RF Link Parameters
NFRx = PRx – SNRdem + (174-10 log BW)
PRxPTx
node A node B distance R
PRx = PTx - Lpath(R)
Attenuation L(R)BFSK modulation
BER~10-3
SNRdem~10 dB
Channel Characteristic
2.4 GHz ISM Band
BW = 10MHz
R NFRx PRx Lpath(dB)
10 m 26 dB -83 dBm 90 dB
20 m 13 dB -95 dBm 102 dB
30 m 7 dB -102 dBm 109 dB
9ICECS 2010 – 13-15 Décembre – Athens, Greece
RF Front End Specifications
RFFE and NF specification
RFFE Demodulator
Node Rx at system level
NFRx1
NFRx2
PRx
SNRdem
RFFE and system specification
LNANLNA
N
LNA
mixerLNARx F
GG
F
G
FFF
1...
1...
1
NFRx is mainly supported by the LNA !
LNA
LO
Mixer
NFRx1
NFRx2
10ICECS 2010 – 13-15 Décembre – Athens, Greece
RF Front End Specifications
RFFE and NF specification
RFFE Demodulator
Node Rx at system level
NFRx1
NFRx2
PRx
SNRdem
RFFE and system specification
NFRx is mainly supported by the LNA !
LNA
LO
Mixer
NFRx1
NFRx2
R NFLNA GLNA NFmixer
10 m 25 dB 5 dB 18 dB
20 m 11 dB 10 dB 18 dB
30 m 4.5 dB 14 dB 18 dB
11ICECS 2010 – 13-15 Décembre – Athens, Greece
Context
RF Front End Specifications
Circuit design
Conclusion & Perspectives
OUTLINE
12ICECS 2010 – 13-15 Décembre – Athens, Greece
Circuit Design
Low Power RF Metric
DC
TmLP I
fgFOM
.
0.00E+00
5.00E+10
1.00E+11
1.50E+11
2.00E+11
2.50E+11
3.00E+11
3.50E+11
VGS (V)
FO
ML
PModerate inversion
Strong In-version
WeakInversion
Vth ~ Vth + 100mV…by maximizing the FOMLP
Optimization of RF performances versus
power consumption in the transistor…
RF skills
Current consumption
Optimized biasing!
13ICECS 2010 – 13-15 Décembre – Athens, Greece
Circuit Design
Amplifier Configurations
…active load configurations are preferred!
To compensate for the low gm in MI region…
bias
in
outRF
MN
MP
Id
in
outRF
MN
MP
Id
outRFin
MN
MP
Id
Single Transistor Stage (STS)
Self Biased Inverter (SBI)
OR ?
14ICECS 2010 – 13-15 Décembre – Athens, Greece
Circuit Design
…the one of self biased inverter is the largest !
Single Transistor Stage (STS)
Gai
n (d
B)
10G0
10
20
30
1GFrequency (Hz)
100G
Self Biased Inverter (SBI)
Comparison of the Gain BandWidth (GBW) product…
GBWSTS
GBWSBI
Amplifier Configuration
15ICECS 2010 – 13-15 Décembre – Athens, Greece
Circuit Design
LNA topology
LNA 2.4GHz – CMOS 0.13µm
RF
in M1
M2
Id
Vpol1
Rpol1
Cl
VDD
Lg Cm1
Vpol2
Rpol2
M3
Cm2
Cm3
Lpk
out
VCC
Rin/buffer
DAC3
0.8V
Cdec
Current reuse
with feedback buffer
Digital Control
50 @ 2.4GHz
50 @ 2.4GHz
LNA core
Off-chip
16ICECS 2010 – 13-15 Décembre – Athens, Greece
Circuit Design
Post Layout Performances
0
2
4
6
8
10
12
14
1 1,5 2 2,5 3 3,5 4
S21
(dB)
f (GHz)
VCC=300mVVCC=400mVVCC=600mV
-18
-16
-14
-12
-10
-8
-6
-4
-2
01 1,5 2 2,5 3 3,5 4
S11
(dB)
f (GHz)
VCC=300mVVCC=400mVVCC=600mV
0
2
4
6
8
10
12
14
1 1,5 2 2,5 3 3,5 4
NF
(dB)
f (GHz)
VCC=300mVVCC=400mVVCC=600mV
INOUT
VCC
Cdec
S21
S11
NF
900µm
700µm
17ICECS 2010 – 13-15 Décembre – Athens, Greece
Context
RF Front End Specifications
Circuit design
Conclusion & Perspectives
OUTLINE
18ICECS 2010 – 13-15 Décembre – Athens, Greece
Conclusion & Perspectives
Match the radio performances with the RF link budget to reduce the
power consumption of nodes in WSN
A matter of Noise Figure/Gain reconfiguration in the LNA
Best tradeoff between RF skills and current consumption in MI
region
Select the topology providing the largest GBW
System Considerations
Circuit analysis
R NFLNA GLNA
10 m 25 dB 5 dB
20 m 11 dB 10 dB
30 m 4.5 dB 14 dB
Pdc NFLNA GLNA
60 µW 4.4 dB 12.2 dB
90 µW 4 dB 13.1 dB
120 µW 3.8 dB 14.6 dB
Requirem
ent
Good
agreement
19ICECS 2010 – 13-15 Décembre – Athens, Greece
Conclusion & Perspectives
Done Next step
LNA
LO
Mixer
NFRx1
NFRx2
A mixer to be designed in MI region
Gilbert Cell with current bleeding topology
A VCO with low power techniques
Negative resistance topology
Pdc NFmixer Gmixer
200 µW 18 dB 5-8 dB
Last step
Pdc PN@10MHz Frequency
100 µW -80 dBc/Hz 2.4 GHz
20ICECS 2010 – 13-15 Décembre – Athens, Greece
Thank you for your Attention